CN116013187A - Display system - Google Patents
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- CN116013187A CN116013187A CN202111233762.2A CN202111233762A CN116013187A CN 116013187 A CN116013187 A CN 116013187A CN 202111233762 A CN202111233762 A CN 202111233762A CN 116013187 A CN116013187 A CN 116013187A
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Abstract
A display system comprises a display panel, which comprises a plurality of micro light emitting diodes, wherein the display panel is divided into a plurality of display blocks; and a plurality of drivers for driving the plurality of display blocks respectively. The data signals of each driver are provided to the corresponding display block at different times during the horizontal scan. The peak current generated during each horizontal scanning period can be effectively avoided, and the flicker is reduced, so that the peak power problem and the flicker effect can be greatly improved.
Description
Technical Field
The present invention relates to a display system, and more particularly, to a micro light emitting diode display system.
Background
A micro light emitting diode (microLED, mLED or μled) display panel is one type of flat panel display panel, and is composed of individual micro (micro) light emitting diodes having a size of 1 to 100 micrometers. Compared with the traditional liquid crystal display panel, the micro light emitting diode display panel has larger contrast ratio and quicker response time and consumes less power. Micro light emitting diodes (micro light emitting diodes) and Organic Light Emitting Diodes (OLEDs) have low power consumption characteristics, but they have higher brightness (brightness), higher luminous efficacy (luminous efficacy) and longer lifetime than organic light emitting diodes because they use a three-five diode technology (e.g., gan).
Conventional micro-led display systems may use a Pulse Width Modulation (PWM) scheme to generate a PWM signal having a duty cycle proportional to the brightness (or intensity) of data provided to the micro-led display panel.
In conventional micro-led display systems, whether or not using a pwm scheme, the peak power problem occurs because the beginning of each horizontal scan period is subject to a peak current. In addition, conventional micro light emitting diode display systems are susceptible to flicker effects, with visible brightness changes occurring between display periods of the display panel.
Therefore, a novel mechanism is needed to improve the peak power problem and flicker effect.
Disclosure of Invention
The present invention is directed to a display system that can effectively avoid the generation of peak current and reduce flicker during each horizontal scan, thereby greatly improving the peak power problem and flicker effect.
The main purpose of the invention is realized by the following technical proposal
According to one embodiment, a display system includes a display panel and a plurality of drivers. The display panel comprises a plurality of micro light emitting diodes and is divided into a plurality of display blocks. The plurality of drivers respectively drive the plurality of display blocks. The data signals of each driver are provided to the corresponding display block at different times during the horizontal scan.
The main object of the present invention can be further achieved by the following technical measures.
Each driver comprises a first circuit, and a row of micro light emitting diodes are turned on at each time; and a second circuit for providing data to the micro light emitting diodes of the turned-on row of the display block.
Wherein the driver comprises: the pulse width modulation device is used for generating a pulse width modulation signal, and the working period of the pulse width modulation signal is proportional to the brightness of the data.
Wherein the method further comprises the following steps: the timing controller is used for coordinating the plurality of drivers.
Wherein the data signal of the next channel of the two adjacent channels is later than the data signal of the previous channel of the two adjacent channels, and the two data signals have time offset.
Wherein the time offsets of all channels of the display block are the same.
Wherein the time offsets of all channels of the display block are randomly set.
Wherein the data signal of each driver is provided to the corresponding display block at an inverse time during the horizontal scan.
Wherein the data signal of one of the two adjacent channels is provided at the beginning of the horizontal scanning period and the data signal of the other of the two adjacent channels is provided at the end of the horizontal scanning period.
The main purpose of the invention can be realized by the following technical proposal
According to another embodiment, each driver includes a pulse width modulation device for generating an original pulse width modulated signal, the duty cycle of which is proportional to the brightness of the data. The duty cycle of the original pwm signal is divided into a plurality of sub-duty cycles separated from each other, thereby generating separate pwm signals, which are supplied to the corresponding display blocks during the horizontal scanning.
The main object of the present invention can be further achieved by the following technical measures.
Wherein each driver includes: a first circuit for turning on a row of micro light emitting diodes at each time; and a second circuit for providing data to the micro light emitting diodes of the turned-on row of the display block.
Wherein the method further comprises the following steps: the timing controller is used for coordinating the plurality of drivers.
Wherein the duty cycle of the original pwm signal is equally divided.
Wherein the time lengths of at least part of the sub-duty cycles are different.
Each driver includes a logic OR gate that performs a logic OR operation on a plurality of internal PWM signals to generate the separate PWM signals.
The main purpose of the invention can be realized by the following technical proposal
According to yet another embodiment, a display panel comprises a plurality of micro light emitting diodes, the display panel being divided into a plurality of display blocks; and a plurality of drivers for driving the plurality of display blocks, respectively, wherein each driver uses a multiple scanning mechanism to reduce flicker effect.
The main object of the present invention can be further achieved by the following technical measures.
Wherein the multiple scan mechanism comprises an interlaced scan comprising two video fields that are sequentially captured.
Wherein the multiple scan mechanism comprises a triple interlaced scan comprising three video fields captured in succession.
Wherein scan lines within a video field of the multiple scan scheme are randomly scanned.
Compared with the prior art, the invention has obvious advantages and beneficial effects.
A display system is provided, which can effectively avoid the generation of peak current and reduce flicker during each horizontal scanning period, thereby greatly improving the peak power problem and flicker effect.
The foregoing description is only an overview of the present invention, and is intended to be implemented in accordance with the teachings of the present invention, as well as the preferred embodiments thereof, together with the following detailed description of the invention, given by way of illustration only, together with the accompanying drawings.
Drawings
Fig. 1 is a schematic diagram of a display panel according to an embodiment of the invention, which includes a plurality of display blocks.
Fig. 2 shows a block diagram of a display system according to an embodiment of the invention.
Fig. 3 shows a control timing diagram of a display system according to a first embodiment of the invention.
Fig. 4 shows a control timing diagram of a display system according to a second embodiment of the invention.
Fig. 5A shows a control timing diagram of a display system according to a third embodiment of the invention.
Fig. 5B shows a logic or gate of the second circuit according to the third embodiment of the present invention.
Symbol description
100: display system
11: display panel
111: display block
1111: driver(s)
1111A: first circuit
1111B: second circuit
1112: scanning line
1113: data line
1114: pulse width modulation device
1115: logic OR gate
12: time sequence controller
HDE: horizontal scanning signal
D1 to D8, D16, D32, D47 to D48: data signal
PWM1 to PWM4: internal pulse width modulation signal
Detailed Description
In order to further describe the technical means and effects adopted by the present invention to achieve the preset purpose, the following detailed description will refer to the specific implementation, structure, characteristics and effects of the display system according to the present invention with reference to the accompanying drawings and preferred embodiments.
Fig. 1 shows a schematic diagram of a display panel 11 according to an embodiment of the invention, which may be divided into a plurality of display blocks 111 arranged in rows and columns (or channels), wherein each display block 111 includes a plurality of micro light emitting diodes (micro leds). Each display block 111 is driven by a corresponding driver 1111. In one example, the display panel 11 (e.g., a 17 inch display panel) includes 10x8 display tiles 111, each display tile 111 having a resolution of 48x40 RGB. Therefore, the overall resolution of the display panel 11 is 480×320 RGB (= (48 x 10) x (40 x 8) RGB).
Fig. 2 shows a block diagram of a display system 100 according to an embodiment of the invention. For each display block 111, the driver 1111 of the present embodiment may include a first circuit 1111A for turning on micro light emitting diodes of at least one row of the display block 111 at each time via the scan line 1112. The driver 1111 may include a second circuit 1111B for providing data to the micro leds of the turned-on row of the display block 111 via the data line 1113 (or channel). The driver 1111 may include a Pulse Width Modulation (PWM) device 1114 for generating a PWM signal with a duty cycle (duty cycle) proportional to the brightness (or intensity) of the data (provided to the display block 111). In the present embodiment, the first circuit 1111A, the second circuit 1111B and the pwm device 1114 are fabricated in a single integrated circuit. The display system 100 may include a timing controller 12 to coordinate all of the drivers 1111.
Fig. 3 shows a control timing diagram of the display system 100 according to the first embodiment of the invention. The horizontal scan signal HDE defines a horizontal scan period (i.e., a period of a scan period) for scanning one row of the display block 111. The data signals D1 to D48 respectively represent data, which are supplied to (the on-columns of) the display block 111 during the horizontal scanning period via the data line 1113 (48 channels in this example). It is noted that the duty cycle of the data signal is proportional to the brightness of the corresponding data. For ease of understanding, the duty cycles of the data signals D1-D48 shown in FIG. 3 are the same.
According to one of the features of the present embodiment, the data signals D1 to D48 of different channels are supplied to the display block 111 (via the second circuit 1111B) at different times (during the horizontal scan). Wherein the data signal of the following channel of (any) adjacent two channels is behind the data signal of the preceding channel of (lag) the adjacent two channels, with a time offset (time offset) in between. In one embodiment, the time offset is the same for all channels. In another alternative embodiment, the time offset of at least some of the channels is different. For example, the time offsets of all channels are set randomly.
Fig. 4 shows a control timing diagram of the display system 100 according to the second embodiment of the invention. As illustrated in fig. 4, the data signals D1-D8 have increasing duty cycles (i.e., brightness).
According to one of the features of the present embodiment, the data signal of the channel is provided to the display block 111 at the reverse (during the horizontal scan) time (via the second circuit 1111B). Wherein the data signal of one of (any) two adjacent channels is provided at the beginning of the horizontal scanning period, and the data signal of the other of the two adjacent channels is provided at the end of the horizontal scanning period.
Fig. 5A shows a control timing diagram of the display system 100 according to the third embodiment of the invention. According to one of the features of the present embodiment, the duty cycle of the original pwm signal may be divided into a plurality of sub-duty cycles (sub-duty cycles) separated from each other, thereby generating a separated (divided) pwm signal (provided to the display block 111 during the horizontal scan). As illustrated in fig. 5A, the duty cycle of the original pwm signal is divided into four sub-duty cycles to generate separate pwm signals. In one embodiment, the duty cycle of the original pwm signal is divided equally (evenly). In another alternative embodiment, the time lengths of at least some of the sub-duty cycles are different.
Fig. 5A shows internal PWM signals PWM 1-PWM 4 of the driver 1111, and fig. 5B shows a logic OR (OR) gate 1115 of the second circuit 1111B according to the third embodiment of the present invention. In this embodiment, the logical OR gate 1115 performs a logical OR operation on the internal PWM signals PWM 1-PWM 4 to generate separate PWM signals.
According to the embodiments of fig. 3 to 5B, the peak power (peak) problem is greatly reduced because the peak current (peak current) is avoided during each horizontal scan (or synchronization). Furthermore, the driver 1111 is driven by the display block 111 with more columns and/or more rows due to the reduced power consumption. The mechanisms described above with respect to fig. 3-5B may be applied to different frames (frames) on the time axis (temporal). In other words, two adjacent frames may each use different mechanisms as described above at different times.
According to a fourth embodiment of the present invention, a multiple scan (multiplex scan) or multi-scan mechanism may be used to reduce flicker (flicker) effects. For example, the driver 1111 may use interleaved (interleaved) scanning, which includes two video fields (fields) captured consecutively. In another example, a triple-interleaved (triple-interleaved) scan may be used, which includes three video fields that are sequentially captured. In yet another example, a random (random) scan may be used to randomly scan lines within a video field.
The above description is only of the preferred embodiments of the present invention and is not intended to limit the scope of the claims; all such equivalent changes and modifications that do not depart from the spirit of the invention as disclosed herein are intended to be included within the scope of the present invention.
Claims (19)
1. A display system, comprising:
a display panel comprising a plurality of micro light emitting diodes, the display panel being divided into a plurality of display blocks; and
A plurality of drivers for driving the display blocks respectively;
wherein the data signals of each driver are provided to the corresponding display block at different times during the horizontal scan.
2. The display system of claim 1, wherein each driver comprises:
a first circuit for turning on a row of micro light emitting diodes at each time; and
And a second circuit for providing data to the micro light emitting diodes of the turned-on row of the display block.
3. The display system of claim 2, wherein the driver comprises:
the pulse width modulation device is used for generating a pulse width modulation signal, and the working period of the pulse width modulation signal is proportional to the brightness of the data.
4. The display system of claim 1, further comprising:
the timing controller is used for coordinating the plurality of drivers.
5. The display system of claim 1, wherein the data signal of a channel subsequent to the adjacent two channels lags the data signal of a channel preceding the adjacent two channels with a time offset therebetween.
6. The display system of claim 5 wherein the time offset of all channels of the display block is the same.
7. The display system of claim 5 wherein the time offsets for all channels of the display block are randomly set.
8. The display system of claim 1, wherein the data signal of each driver is provided to the corresponding display block at an opposite time during the horizontal scan.
9. The display system of claim 1, wherein the data signal of one of the two adjacent channels is provided at a beginning of a horizontal scan period and the data signal of the other of the two adjacent channels is provided at an end of the horizontal scan period.
10. A display system, comprising:
a display panel comprising a plurality of micro light emitting diodes, the display panel being divided into a plurality of display blocks; and
A plurality of drivers for driving the display blocks, each driver including a pulse width modulation device for generating an original pulse width modulation signal, the duty cycle of which is proportional to the brightness of the data;
wherein the duty cycle of the original pwm signal is divided into a plurality of sub-duty cycles separated from each other, thereby generating separate pwm signals, which are supplied to the corresponding display blocks during the horizontal scanning.
11. The display system of claim 10, wherein each driver comprises:
a first circuit for turning on a row of micro light emitting diodes at each time; and
And a second circuit for providing data to the micro light emitting diodes of the turned-on row of the display block.
12. The display system of claim 10, further comprising:
the timing controller is used for coordinating the plurality of drivers.
13. The display system of claim 10 wherein the duty cycle of the original pwm signal is equally divided.
14. The display system of claim 10, wherein the time lengths of at least some of the sub-duty cycles are different.
15. The display system of claim 10 wherein each driver comprises a logic or gate that performs a logical or operation on a plurality of internal pwm signals to generate the separate pwm signals.
16. A display system, comprising:
a display panel comprising a plurality of micro light emitting diodes, the display panel being divided into a plurality of display blocks; and
A plurality of drivers for driving the display blocks respectively;
wherein each driver uses a multiple scan mechanism to reduce flicker effects.
17. The display system of claim 16 wherein the multiple scan mechanism comprises an interlaced scan comprising two video fields captured in succession.
18. The display system of claim 16 wherein the multiple scan mechanism comprises a triple interlaced scan comprising three video fields captured in succession.
19. The display system of claim 16 wherein scan lines within a video field of the multiple scan mechanism are randomly scanned.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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CN202111233762.2A CN116013187A (en) | 2021-10-22 | 2021-10-22 | Display system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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CN202111233762.2A CN116013187A (en) | 2021-10-22 | 2021-10-22 | Display system |
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CN116013187A true CN116013187A (en) | 2023-04-25 |
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CN202111233762.2A Pending CN116013187A (en) | 2021-10-22 | 2021-10-22 | Display system |
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CN (1) | CN116013187A (en) |
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2021
- 2021-10-22 CN CN202111233762.2A patent/CN116013187A/en active Pending
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