CN115951527A - Display panel and display device - Google Patents
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- CN115951527A CN115951527A CN202211718382.2A CN202211718382A CN115951527A CN 115951527 A CN115951527 A CN 115951527A CN 202211718382 A CN202211718382 A CN 202211718382A CN 115951527 A CN115951527 A CN 115951527A
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Abstract
The invention discloses a display panel and a display device, the display panel includes: a plurality of scanning lines; a plurality of data lines; a pixel circuit including a first switching module, a second switching module, and a pixel electrode; the control end of the first switch module and the control end of the second switch module are connected with the same corresponding scanning line, the second end of the first switch module of the mth row of pixel circuits is connected with the pixel electrodes of the nth row of pixel circuits, and m is smaller than n. According to the invention, the second end of the first switch module of the mth row pixel circuit is connected with the pixel electrode of the nth row pixel circuit, so that the pixel electrode on the nth row can be precharged when the mth row pixel circuit is charged, the pixel voltage of the nth row is stabilized, when the pixel electrode of the mth row pixel circuit leaks electricity, the charge of the pixel electrode of the nth row pixel circuit is supplemented, the leakage path of the leakage current is increased, the voltage holding ratio of the pixel electrode is increased, and the display effect of the display panel is improved.
Description
Technical Field
The invention relates to the technical field of display, in particular to a display panel and a display device.
Background
Each pixel on the thin film transistor liquid crystal Display (TFT-LCD) and Electronic Paper Display (EPD) Display panels is driven by a thin film transistor integrated behind it, so that high-speed, high-brightness, and high-contrast Display can be achieved.
The display panel of the prior art includes data lines, scan lines and pixel electrodes, wherein thin film transistors are formed at intersections of the data lines and the scan lines, control terminals of the thin film transistors are connected to the scan lines, sources of the thin film transistors are connected to the data lines, and drains of the thin film transistors are connected to the pixel electrodes. Fig. 1 is a schematic structural diagram of a display panel provided in the prior art, as shown in fig. 1, the display panel includes a scan line gate and a data line data, the common electrode is regarded as ground GND, a storage capacitor Cst is formed between a pixel electrode and the common electrode connected to a thin film transistor M1, and a parasitic capacitor Clc is also present, when the thin film transistor M1 is reversely biased, free electrons attach to an active layer of the thin film transistor M1 due to the presence of the free electrons, so that a slight leakage current is generated between a drain electrode of the thin film transistor M1 and a source electrode of the thin film transistor M1.
When the display panel is designed, the excessive leakage current causes some problems, for example, the excessive leakage current has a certain influence on the retention ratio of the pixel voltage, when the grid of the thin film transistor M1 is closed, the loss of the retention voltage is too fast, and when the loss exceeds 2 gray scales, the phenomenon of pixel flicker in the display panel is caused; on the other hand, if the leakage current is too large, the residual dc component during pixel discharge increases to cause charge residue, which results in the generation of residual image during display of the display panel and reduces the display effect of the display panel.
Disclosure of Invention
The invention provides a display panel and a display device, which can pre-charge pixel electrodes on an nth row when pixel electrodes on an mth row are charged so as to stabilize pixel voltage of the nth row, and can supplement charges of the pixel electrodes of pixel circuits on the nth row when the pixel electrodes of the mth row are leaked, so that a leakage path of leakage current is increased, the voltage holding ratio of the pixel electrodes is increased, and the display effect of the display panel is improved.
In a first aspect, an embodiment of the present invention provides a display panel, including: a plurality of scan lines; a plurality of data lines; the pixel circuit is defined by a scanning line and a data line in a crossed mode and is arranged in an array mode, and the pixel circuit comprises a first switch module, a second switch module and a pixel electrode; the first switch module and the second switch module respectively comprise a first end, a second end and a control end; the first end of the first switch module is connected with the corresponding data line, the second end of the first switch module is connected with the first end of the second switch module, and the second end of the second switch module is connected with the pixel electrode; the control end of the first switch module and the control end of the second switch module are connected with the same corresponding scanning line, the first switch module and the second switch module are used for responding to the on-off of scanning signals on the scanning line, the second end of the first switch module of the mth row of pixel circuits is connected with the pixel electrodes of the nth row of pixel circuits, m is smaller than n, and m and n are positive integers.
Optionally, n = m +1.
Optionally, in the same column, the second end of the first switch module of the mth row of pixel circuits is connected to the pixel electrode of the nth row of pixel circuits.
Optionally, the pixel electrode on the nth row is pre-charged when the pixel electrode on the mth row is charged.
Optionally, when the first switch module and the second switch module of the mth row of pixel circuits are turned off, the electric charges of the pixel electrodes of the nth row of pixel circuits are supplemented by the electric leakage of the pixel electrodes of the mth row of pixel circuits.
Optionally, the first switch module includes a first thin film transistor, the second switch module includes a second thin film transistor, and a first pole, a second pole, and a gate of the first thin film transistor are respectively used as a first end, a second end, and a control end of the first switch module; the first pole, the second pole and the grid of the second thin film transistor are respectively used as the first end, the second end and the control end of the second switch module.
Optionally, the display panel includes a first metal layer, a second metal layer, and a third metal layer; the scanning lines are positioned on the first metal layer, the data lines are positioned on the second metal layer, and the pixel electrodes are positioned on the third metal layer; a first metal part is connected between the second pole of the first thin film transistor of the pixel circuit of the row and the pixel electrode of the next row; a second metal part is connected between the second pole of the second thin film transistor and the pixel electrode of the current row; the first metal part and the second metal part are both L-shaped.
Optionally, the display panel further includes a common electrode, and the common electrode is different from the first metal layer, the second metal layer, and the third metal layer.
Optionally, the display panel includes a liquid crystal display panel or an electronic paper display panel.
In a second aspect, an embodiment of the present invention provides a display device, which includes the display panel provided in the first aspect.
According to the display panel provided by the embodiment of the invention, the control end of the first switch module and the control end of the second switch module are connected with the same corresponding scanning line, the second end of the first switch module of the mth row of pixel circuits is connected with the pixel electrodes of the nth row of pixel circuits, so that the pixel electrodes on the nth row can be precharged when the mth row of pixel electrodes are charged, the pixel voltage of the nth row is stabilized, when the pixel electrodes of the mth row of pixel circuits are leaked, the charges of the pixel electrodes of the nth row of pixel circuits are supplemented, and the charges of the opposite pixel electrodes of the leaked currents are supplemented to increase the voltage holding ratio of the pixel electrodes, so that the overall display effect of the display panel is improved.
It should be understood that the statements in this section do not necessarily identify key or critical features of the embodiments of the present invention, nor do they necessarily limit the scope of the invention. Other features of the present invention will become apparent from the following description.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a schematic structural diagram of a display panel provided in the prior art;
FIG. 2 is a schematic cross-sectional view of a prior art display panel;
fig. 3 is a schematic structural diagram of a display panel according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of the connection of several pixel circuits of FIG. 3;
FIG. 5 is a schematic diagram of a display panel according to another embodiment of the present invention;
FIG. 6 is a schematic diagram illustrating a working timing sequence of a display panel according to an embodiment of the present invention;
fig. 7 is a schematic cross-sectional view of a display panel according to an embodiment of the invention;
FIG. 8 is a simulation diagram of a display panel according to an embodiment of the present invention;
fig. 9 is a schematic structural diagram of a display device according to an embodiment of the present invention.
Detailed Description
In order to make the technical solutions of the present invention better understood, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be obtained by a person skilled in the art without making any creative effort based on the embodiments in the present invention, shall fall within the protection scope of the present invention.
It should be noted that the terms "first," "second," and the like in the description and claims of the present invention and in the drawings described above are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used is interchangeable under appropriate circumstances such that the embodiments of the invention described herein are capable of operation in sequences other than those illustrated or described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
As described in the background art, in the related art, when the thin film transistor is reverse biased, free electrons are attached to an active layer of the thin film transistor due to the presence of the free electrons, thereby causing a slight leakage current to be generated in a drain electrode of the thin film transistor and a source electrode of the thin film transistor. Fig. 2 is a schematic cross-sectional structure diagram of a display panel in the prior art, wherein fig. 2 only schematically illustrates a partial structure of the display panel, and referring to fig. 1, a leakage current path 10 generated by a thin film transistor mainly leaks electricity to a data line through a pixel electrode (i.e., a storage capacitor Cst), which causes a voltage drop of the storage capacitor Cst, affects a voltage value of the pixel electrode, and brings a certain effect on a voltage holding ratio of the pixel electrode.
In view of the above problems, embodiments of the present invention provide a display panel, which increases a leakage path of a leakage current to increase a voltage holding ratio of a pixel electrode, thereby improving a display effect of the display panel. Fig. 3 is a schematic structural diagram of a display panel according to an embodiment of the present invention, and fig. 4 is a schematic connection diagram of a plurality of pixel circuits in fig. 3. The embodiment of the invention can be suitable for the TFT-LCD or EPD display condition. With reference to fig. 3 and 4, the display panel 10 includes a plurality of scan lines 100; a plurality of data lines 200; pixel circuits 300 arranged in an array defined by intersections of the scan lines 100 and the data lines 200.
The pixel circuit 300 includes a first switch module 310, a second switch module 320, and a pixel electrode; the first switch module 310 and the second switch module 320 each include a first terminal, a second terminal, and a control terminal; a first end of the first switch module 310 is connected to the corresponding data line 200, a second end of the first switch module 310 is connected to a first end of the second switch module 320, and a second end of the second switch module 320 is connected to the pixel electrode; the control end of the first switch module 310 and the control end of the second switch module 320 are connected to the same corresponding scan line 100, the first switch module 310 and the second switch module 320 are configured to be turned on or off in response to a scan signal on the scan line 100, the second end of the first switch module 310 of the mth row of pixel circuits 300 is connected to the pixel electrodes of the nth row of pixel circuits 300, m is smaller than n, and m and n are positive integers.
The scan signal transmitted on the scan line 100 may control the first switch module 310 and the second switch module 320 to be turned on or off. In one embodiment, the scan line 100 is connected to a scan driver, the scan driver is disposed in left and right frame regions of the display panel, the scan driver generally includes a plurality of cascaded shift registers, the shift registers are connected to a clock signal line, a high potential signal line, a low potential signal line, etc., the cascaded shift registers generate a scan signal according to control of signals on the clock signal line, the high potential signal line, and the low potential signal line, and output the scan signal to the scan line, and the cascaded shift registers sequentially provide the scan signal with a turn-on level pulse to the scan line 100. The data line 200 is connected to a data driver, which is disposed in the lower frame region or on a flexible circuit board bound to the lower frame region, and may be a Display Driver Ic (DDIC), and the data driver supplies a data voltage to the data line 200. In another embodiment, the scan lines 100 and the data lines 200 are connected to a data driver, and the data driver provides a scan signal to the scan lines 100 and a data voltage to the data lines 200. Fig. 3 schematically shows a case where the scan driver is disposed in a left bezel region of the display panel 10 and the data driver is disposed in a lower bezel region of the display panel.
The scan line 100 transmits a scan signal to the pixel circuit 300, the data line 200 transmits a data signal to the pixel circuit 300, one pixel circuit 300 corresponds to one sub-pixel, and the pixel circuit 300 controls the light emission of the sub-pixel according to the data signal and the scan signal to realize image display. The first and second switching modules 310 and 320 may be thin film transistors, and when the first and second switching modules 310 and 320 are turned on, the data voltage on the data line 200 is transmitted to the pixel electrode through the turned-on first and second switching modules 310 and 320. The display panel 10 further includes a common electrode, and a storage capacitor Cst and a parasitic capacitor Clc are formed between the pixel electrode and the common electrode. The data voltage transmitted to the pixel electrode is stored, and the data voltage is used to control the light emitting brightness of the sub-pixel, thereby controlling the display image of the display panel 10.
With continued reference to fig. 3 and 4, each row of pixel circuits 300 is provided with a corresponding scan line 100, the first switch module 310 and the second switch module 320 in the pixel circuits 300 are connected to the corresponding scan line 100, each column of pixel circuits 300 is provided with a corresponding data line 200, and the first switch module 310 in the pixel circuits is connected to the corresponding data line 200. With continued reference to fig. 3, the operation of the display panel 10 is: the scan signal on the scan line 100 in the 1 st row controls the first switch module 310 and the second switch module 320 in the 1 st row to be connected to be turned on, the data voltage on the data line 200 is transmitted to the pixel electrode in the first row, and the first switch module 310 and the second switch module 320 in other rows are both turned off; the scanning signal on the 2 nd row scanning line 100 controls the first switch module 310 and the second switch module 320 connected to the 2 nd row to be turned on, the data voltage on the data line 200 is transmitted to the 2 nd row pixel electrode, and the first switch module 310 and the second switch module 320 of other rows are turned off; … …; the scanning signal on the scanning line 100 of the kth row controls the conduction of the first switch module 310 and the second switch module 320 connected to the kth row, and the data voltage on the data line 200 is transmitted to the pixel electrode of the kth row. Because the second end of the first switch module 310 of the mth row of pixel circuits 300 is connected to the pixel electrodes of the nth row of pixel circuits 300, the first switch module 310 of the mth row of pixel circuits 300 is turned on, and transmits the data voltage to the pixel electrodes of the nth row of pixel circuits 300 while transmitting the data voltage to the mth row of pixel electrodes, so as to pre-charge the pixel electrodes of the nth row, that is, pre-charge the storage capacitor Cst of the nth row, which is beneficial to stabilizing the voltage of the pixel electrodes of the nth row. In addition, during the period that the first switch module 310 and the second switch module 320 of the pixel circuit in the mth row are turned off, the leakage of the pixel electrode in the mth row compensates for the charge of the pixel electrode in the nth row to stabilize the voltage of the pixel electrode. The mth row is any row before the nth row, in other words, the pixel circuits in the mth row are charged first (i.e., during the process of writing the data voltage to the pixel electrodes), and the pixel circuits in the nth row are charged later. The pixel circuits 300 where the pixel electrodes of the pixel circuits 300 in the nth row are located and the pixel circuits 300 where the first switch modules 310 in the mth row connected to the nth row are located may be located in the same column or different columns, which may achieve the effect of the embodiment of the present invention, and the embodiment of the present invention is not limited.
Because the pixel electrodes on the nth row are precharged when the pixel electrodes on the mth row are charged, when the first switch module 310 and the second switch module 320 of the pixel circuits on the mth row are turned off, the charges of the pixel electrodes of the pixel circuits on the mth row are supplemented by the leakage current of the pixel electrodes of the pixel circuits on the mth row. The problem of poor display caused by electric leakage in the prior art can be reduced.
According to the display panel provided by the embodiment of the invention, the control end of the first switch module and the control end of the second switch module are connected with the same corresponding scanning line, the second end of the first switch module of the mth row of pixel circuits is connected with the pixel electrode of the nth row of pixel circuits, the pixel electrode on the nth row can be pre-charged when the mth row of pixel electrodes is charged, so that the pixel voltage of the nth row is stabilized, when the pixel electrode of the mth row of pixel circuits is leaked, the charge of the pixel electrode of the nth row of pixel circuits is supplemented, the leakage path of the leakage current is increased, the voltage holding ratio of the pixel electrode is increased, and the overall display effect of the display panel is improved.
Fig. 5 is a schematic structural diagram of another display panel according to an embodiment of the present invention, and as shown in fig. 5, optionally, the display panel 10 according to the embodiment of the present invention includes a liquid crystal display panel or an electronic paper display panel.
The first switch module 310 includes a first thin film transistor TFT1, the second switch module 320 includes a second thin film transistor TFT2, and a first pole, a second pole and a gate of the first thin film transistor TFT1 are respectively used as a first terminal, a second terminal and a control terminal of the first switch module; the first, second and gate electrodes of the second thin film TFT2 transistor serve as the first, second and control terminals of the second switching module 320, respectively.
The thin film transistor may be an N-type thin film transistor or a P-type thin film transistor; the first electrode of the thin film transistor may be a source electrode and the second electrode may be a drain electrode, or the first electrode of the thin film transistor may be a drain electrode and the second electrode may be a source electrode, which is not limited in the present invention.
In the same column, the second end of the first switch module 310 of the m-th row of pixel circuits 300 is connected to the pixel electrode of the n-th row of pixel circuits.
Since the first thin film transistor TFT1 and the second thin film transistor TFT2 are both controlled by the scan line 100, the first thin film transistor TFT1 and the second thin film transistor TFT2 are simultaneously turned on and simultaneously turned off.
When the pixel electrodes in the mth row are charged, the pixel electrodes in the nth row are pre-charged, and when the first switch module 310 and the second switch module 320 of the pixel circuit 300 in the mth row are turned off, the charges of the pixel electrodes of the pixel circuit 300 in the nth row are supplemented by the leakage current of the pixel electrodes of the pixel circuit 300 in the mth row. Wherein n = m +1. In this embodiment, the m-th row of pixel electrodes can be pre-charged with the n-th row of storage capacitors Cst when being charged, so as to stabilize the voltage of the n-th row of pixel electrodes, and to stabilize the voltage Vds between the source and drain electrodes of the thin film transistor. When the pixel electrode of the mth row leaks electricity, the charge supplement of the pixel electrode of the nth row can be realized, and the voltage of a single pixel is more stable. The first electrode of the first thin film transistor TFT1 in the mth row is connected to the pixel electrode in the nth row, so that a leakage current path is increased, the leakage current can be effectively reduced, the voltage holding ratio of the pixel electrode is improved, and the display effect of the display panel is improved. That is, for two adjacent rows, when the pixel electrode in the previous row is charged, the pixel electrode in the next row (i.e., the storage capacitor) can be charged. On the basis of improving the voltage holding ratio of the pixel electrode, the wiring length is saved, the wiring difficulty and the interference between signals are reduced, and the display effect of the display panel is further improved.
Fig. 6 is a schematic diagram of an operation timing sequence of a display panel according to an embodiment of the present invention. The operation timing chart can be applied to the display panel shown in fig. 5. With reference to fig. 5 and 6, the display panel will be described with an example in which each of the thin film transistors is an N-type thin film transistor. Illustratively, the driving process of the shift register includes a plurality of stages.
In the first stage t01, at this time, the first row scanning signal G1 is in a high level state, the first thin film transistor TFT1 and the second thin film transistor TFT2 of the first row of pixel circuits are turned on, the first row of pixel electrodes start to be charged, that is, the data voltage is written into the pixel electrodes, and the pixel electrodes of the second row of pixel circuits are precharged.
In the second stage t02, when the second row scanning signal G2 is in a high level state, the first thin film transistor TFT1 and the second thin film transistor TFT2 of the second row pixel circuit are turned on, and the second row pixel electrode starts to be charged, that is, the data voltage is written into the pixel electrode, and the pixel electrode of the third row pixel circuit is precharged.
In the third stage t03, when the third row scanning signal G3 is in a high level state, the first thin film transistor TFT1 and the second thin film transistor TFT2 of the third row pixel circuit are turned on, and the third row pixel electrode starts to be charged, that is, the data voltage is written into the pixel electrode, and the pixel electrode of the fourth row pixel circuit is precharged.
In the fourth phase t04, when the fourth row scanning signal G3 is in a high level state, the first thin film transistor TFT1 and the second thin film transistor TFT2 of the third row pixel circuit are turned on, and the third row pixel electrode starts to be charged, that is, the data voltage is written into the pixel electrode, and the pixel electrodes of the fifth row pixel circuit are precharged.
Fig. 7 is a schematic cross-sectional structure diagram of a display panel according to an embodiment of the present invention, and as shown in fig. 7, the display panel includes a first metal layer 400, a second metal layer 410, and a third metal layer 420; the scan lines are located in the first metal layer 400, the data lines are located in the second metal layer 410, and the pixel electrodes are located in the third metal layer 420. The first metal layer 400 is formed on a substrate of the display panel, and before the first metal layer 400 is formed, a semiconductor layer, which is a semiconductor pattern layer, is formed. In an exemplary embodiment, the forming of the semiconductor pattern layer may include: a first insulating layer and a semiconductor thin film are sequentially deposited on a substrate, and the semiconductor thin film is patterned through a patterning process to form a first insulating layer covering the substrate and a semiconductor pattern layer disposed on the first insulating layer. In an exemplary embodiment, forming the first metal layer 400 may include: and depositing a second insulating film and a first metal film on the substrate on which the semiconductor layer is formed in sequence, patterning the second insulating film and the first metal film through a patterning process, and forming a first metal layer 400 pattern on the second insulating layer and the second insulating layer, wherein the first metal layer 400 pattern comprises a grid electrode and a scanning line.
In an exemplary embodiment, forming the second metal layer 410 may include: depositing a third insulating film and a second metal film on the substrate on which the patterns are formed, and patterning the second metal film by using a patterning process to form a second metal layer 410 arranged on the second insulating layer, wherein the second metal layer 410 comprises a source drain metal electrode and a data line of the thin film transistor. In the embodiment of the present invention, since the preceding tft needs to be connected to the following pixel electrode, the second metal layer 410 further includes a metal part for connecting the preceding tft and the following pixel electrode. The metal part, the data line and the source and drain metal electrode of the thin film transistor are prepared in the same layer, and no additional preparation process is needed.
In an exemplary embodiment, the pixel electrode may have a rectangular shape or a diamond shape, the data line may have a stripe shape in which the main portion extends along the second direction Y, the source and drain metal electrodes of the thin film transistor are connected to the pixel electrode through the via hole, and the metal portion is also connected to the pixel electrode through the corresponding via hole.
The patterning process includes processes of coating photoresist, mask exposure, developing, etching, stripping photoresist and the like for metal materials, inorganic materials or transparent conductive materials, and processes of coating organic materials, mask exposure, developing and the like for organic materials. The deposition can be any one or more of sputtering, evaporation and chemical vapor deposition, the coating can be any one or more of spraying, spin coating and ink-jet printing, and the etching can be any one or more of dry etching and wet etching, and the disclosure is not limited. "thin film" refers to a layer of a material deposited, coated, or otherwise formed on a substrate. The "thin film" may also be referred to as a "layer" if it does not require a patterning process throughout the fabrication process. If the "thin film" requires a patterning process during the entire fabrication process, it is referred to as "thin film" before the patterning process and "layer" after the patterning process. The "layer" after the patterning process comprises at least one "pattern".
In the embodiment of the present invention, the metal part includes a first metal part 430 and a second metal part 440, and the first metal part 430 is connected between the second electrode of the first thin film transistor of the pixel circuit of the present row and the pixel electrode of the next row; a second metal part 440 is connected between the second pole of the second thin film transistor and the pixel electrode of the current row; the first metal part 430 and the second metal part 440 are both L-shaped.
The display panel further includes a common electrode, which is different from the first metal layer 400, the second metal layer 410, and the third metal layer 420.
When the pixel electrodes in the previous row are charged, the pixel electrodes (i.e., the storage capacitors) in the next row can be charged. When the previous row of pixel electrodes leaks electricity, the leakage current path 10 mainly leaks electricity to the next row of pixel electrodes (i.e., the storage capacitor Cst) through the previous row of pixel electrodes (i.e., the storage capacitor Cst), so that the charge compensation of the next row of pixel electrodes can be realized, and the voltage of a single pixel is more stable. By increasing the path of the leakage current, the leakage current can be effectively reduced, and the voltage holding ratio of the pixel electrode is improved, so that the display effect of the display panel is improved.
Fig. 8 is a simulation diagram of a display panel according to an embodiment of the present invention. Referring to fig. 8, the voltage holding ratio 50 of the pixel electrode according to the embodiment of the present invention is greater than the voltage holding ratio 60 of the pixel electrode with the conventional serial structure.
Based on the same inventive concept, the embodiment of the invention also provides a display device. Fig. 9 is a schematic structural diagram of a display device according to an embodiment of the present invention, and as shown in fig. 9, the display device includes any one of the display panels provided in the foregoing embodiments. Illustratively, as shown in fig. 9, the display device 20 includes a display panel 10. Therefore, the display device also has the advantages of the display panel in the above embodiments, and the same points can be understood by referring to the explanation of the display panel above, which is not described in detail below.
The display device 20 provided in the embodiment of the present invention may be the electronic paper shown in fig. 9, and may also be any electronic product with a display function, including but not limited to the following categories: the mobile phone, the television, the notebook computer, the desktop display, the tablet computer, the digital camera, the smart band, the smart glasses, the vehicle-mounted display, the industrial control device, the medical display screen, the touch interaction terminal and the like, which are not particularly limited in this embodiment of the present invention.
The above-described embodiments should not be construed as limiting the scope of the invention. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions may be made in accordance with design requirements and other factors. Any modification, equivalent replacement, and improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims (10)
1. A display panel, comprising:
a plurality of scanning lines;
a plurality of data lines;
the pixel circuits are defined by the scanning lines and the data lines in a crossed mode and are arranged in an array mode, and each pixel circuit comprises a first switch module, a second switch module and a pixel electrode; the first switch module and the second switch module both comprise a first end, a second end and a control end; the first end of the first switch module is connected with the corresponding data line, the second end of the first switch module is connected with the first end of the second switch module, and the second end of the second switch module is connected with the pixel electrode; the control end of the first switch module and the control end of the second switch module are connected with the same corresponding scanning line, the first switch module and the second switch module are used for responding to the on-off of a scanning signal on the scanning line, the second end of the first switch module of the pixel circuit in the mth row is connected with the pixel electrode in the nth row of the pixel circuit, m is smaller than n, and m and n are positive integers.
2. The display panel according to claim 1, wherein n = m +1.
3. The display panel of claim 2, wherein the second end of the first switch module of the m-th row of the pixel circuits is connected to the pixel electrodes of the n-th row of the pixel circuits in the same column.
4. A display panel according to any one of claims 1 to 3, wherein the pixel electrode on the n-th row is pre-charged while the pixel electrode on the m-th row is charged.
5. The display panel according to any one of claims 1 to 3, wherein when the first and second switching modules of the pixel circuits in the m-th row are turned off, the leakage of the pixel electrodes of the pixel circuits in the m-th row supplements the charge of the pixel electrodes of the pixel circuits in the n-th row.
6. The display panel according to claim 1, wherein the first switch module comprises a first thin film transistor, the second switch module comprises a second thin film transistor, and a first pole, a second pole and a gate of the first thin film transistor respectively serve as a first terminal, a second terminal and a control terminal of the first switch module; and a first pole, a second pole and a grid of the second thin film transistor are respectively used as a first end, a second end and a control end of the second switch module.
7. The display panel according to claim 6, wherein the display panel comprises a first metal layer, a second metal layer, and a third metal layer;
the scanning lines are located on the first metal layer, the data lines are located on the second metal layer, and the pixel electrodes are located on the third metal layer;
a first metal part is connected between the second electrode of the first thin film transistor of the pixel circuit in the current row and the pixel electrode in the next row; a second metal part is connected between a second pole of the second thin film transistor and the pixel electrode of the current row; the first metal part and the second metal part are both L-shaped.
8. The display panel according to claim 7, further comprising a common electrode, the common electrode being a different layer from the first metal layer, the second metal layer, and the third metal layer.
9. The display panel according to claim 1, wherein the display panel comprises a liquid crystal display panel or an electronic paper display panel.
10. A display device characterized by comprising the display panel according to any one of claims 1 to 9.
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CN202211718382.2A Pending CN115951527A (en) | 2022-12-29 | 2022-12-29 | Display panel and display device |
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CN (1) | CN115951527A (en) |
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2022
- 2022-12-29 CN CN202211718382.2A patent/CN115951527A/en active Pending
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