CN115942847B - Large-area n-type ultrathin crystalline film and preparation method and application thereof - Google Patents
Large-area n-type ultrathin crystalline film and preparation method and application thereof Download PDFInfo
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- 238000002360 preparation method Methods 0.000 title claims abstract description 14
- 239000010408 film Substances 0.000 claims abstract description 37
- 239000010409 thin film Substances 0.000 claims abstract description 24
- 239000000758 substrate Substances 0.000 claims abstract description 10
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 26
- 229910052710 silicon Inorganic materials 0.000 claims description 26
- 239000010703 silicon Substances 0.000 claims description 26
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical group O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 12
- 238000000576 coating method Methods 0.000 claims description 11
- 238000000034 method Methods 0.000 claims description 9
- 239000004793 Polystyrene Substances 0.000 claims description 7
- 239000011248 coating agent Substances 0.000 claims description 6
- 235000012239 silicon dioxide Nutrition 0.000 claims description 6
- 239000000377 silicon dioxide Substances 0.000 claims description 6
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 5
- 229910052737 gold Inorganic materials 0.000 claims description 5
- 239000010931 gold Substances 0.000 claims description 5
- 230000005499 meniscus Effects 0.000 claims description 5
- 229920002223 polystyrene Polymers 0.000 claims description 5
- 229910052709 silver Inorganic materials 0.000 claims description 5
- 239000004332 silver Substances 0.000 claims description 5
- MVPPADPHJFYWMZ-UHFFFAOYSA-N chlorobenzene Substances ClC1=CC=CC=C1 MVPPADPHJFYWMZ-UHFFFAOYSA-N 0.000 claims description 4
- 239000000463 material Substances 0.000 claims description 4
- 239000002904 solvent Substances 0.000 claims description 4
- MVPPADPHJFYWMZ-IDEBNGHGSA-N chlorobenzene Chemical group Cl[13C]1=[13CH][13CH]=[13CH][13CH]=[13CH]1 MVPPADPHJFYWMZ-IDEBNGHGSA-N 0.000 claims description 2
- 238000004519 manufacturing process Methods 0.000 claims description 2
- 238000003756 stirring Methods 0.000 claims description 2
- 229920000642 polymer Polymers 0.000 abstract description 4
- 238000002156 mixing Methods 0.000 abstract description 3
- 238000010008 shearing Methods 0.000 abstract description 3
- 238000010129 solution processing Methods 0.000 abstract description 2
- 239000010410 layer Substances 0.000 description 38
- CSCPPACGZOOCGX-UHFFFAOYSA-N Acetone Chemical compound CC(C)=O CSCPPACGZOOCGX-UHFFFAOYSA-N 0.000 description 8
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 8
- KFZMGEQAYNKOFK-UHFFFAOYSA-N Isopropanol Chemical compound CC(C)O KFZMGEQAYNKOFK-UHFFFAOYSA-N 0.000 description 8
- 239000013078 crystal Substances 0.000 description 7
- 239000000243 solution Substances 0.000 description 7
- HEDRZPFGACZZDS-UHFFFAOYSA-N Chloroform Chemical compound ClC(Cl)Cl HEDRZPFGACZZDS-UHFFFAOYSA-N 0.000 description 4
- 238000011010 flushing procedure Methods 0.000 description 4
- 229910052757 nitrogen Inorganic materials 0.000 description 4
- 238000012546 transfer Methods 0.000 description 4
- 238000000861 blow drying Methods 0.000 description 3
- 239000007788 liquid Substances 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- 238000009210 therapy by ultrasound Methods 0.000 description 3
- 239000000969 carrier Substances 0.000 description 2
- 238000012512 characterization method Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000001035 drying Methods 0.000 description 2
- 230000005669 field effect Effects 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 238000000879 optical micrograph Methods 0.000 description 2
- 239000000523 sample Substances 0.000 description 2
- 238000012360 testing method Methods 0.000 description 2
- 229910021642 ultra pure water Inorganic materials 0.000 description 2
- 239000012498 ultrapure water Substances 0.000 description 2
- 230000002238 attenuated effect Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000008033 biological extinction Effects 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 239000000470 constituent Substances 0.000 description 1
- 238000002425 crystallisation Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005660 hydrophilic surface Effects 0.000 description 1
- 230000005661 hydrophobic surface Effects 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 230000006698 induction Effects 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000005054 phenyltrichlorosilane Substances 0.000 description 1
- 239000004033 plastic Substances 0.000 description 1
- 230000010287 polarization Effects 0.000 description 1
- 239000002994 raw material Substances 0.000 description 1
- 230000001105 regulatory effect Effects 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 150000003384 small molecules Chemical class 0.000 description 1
- PYJJCSYBSYXGQQ-UHFFFAOYSA-N trichloro(octadecyl)silane Chemical compound CCCCCCCCCCCCCCCCCC[Si](Cl)(Cl)Cl PYJJCSYBSYXGQQ-UHFFFAOYSA-N 0.000 description 1
- ORVMIVQULIKXCP-UHFFFAOYSA-N trichloro(phenyl)silane Chemical compound Cl[Si](Cl)(Cl)C1=CC=CC=C1 ORVMIVQULIKXCP-UHFFFAOYSA-N 0.000 description 1
- 238000001771 vacuum deposition Methods 0.000 description 1
Classifications
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
- Y02E10/549—Organic PV cells
Abstract
The invention discloses a large-area n-type ultrathin crystalline film, a preparation method and application thereof, and belongs to the technical fields of solution processing of small organic molecules and thin film transistors. The invention obtains the n-type ultrathin film with large area and high quality by adopting a polymer blending auxiliary solution shearing strategy. The film has a smooth and flat surface and a flatness close to the atomic level, and exhibits excellent crystallinity. The device prepared based on the film has high carrier mobility and excellent on-off ratio, and shows excellent electrical properties; the preparation process provided by the invention is simple and low in cost, can realize large-area preparation at normal temperature, and is easy to integrate; can be applied to all substrates, and is easy to prepare flexible devices.
Description
Technical Field
The invention relates to the technical fields of solution processing of small organic molecules and thin film transistors, in particular to a large-area n-type ultrathin crystalline film and a preparation method and application thereof.
Background
Large area single crystals are the best candidates for high performance, integrated plastic electrons because of their ability to overcome disturbances in grain boundaries, defects, impurities, charge traps. Currently, large-area preparation of organic single crystals has become possible. On the one hand, the source molecule has good self-crystallization property; on the other hand, because meniscus-assisted coating Methods (MGCs) were developed, orientation induction allowed organic molecules to assemble in the same direction. In the case of organic field effect transistors, the conduction channel of which is located in an organic semiconductor having several molecular layers thick near the interface between the organic semiconductor and the insulating layer, studies have shown that single-layer crystals can achieve properties equivalent to those of the same phase single crystals. The ultra-thin nature reduces the bulk resistance of the semiconductor, thereby facilitating carrier injection. Meanwhile, carriers in the ultrathin channel can be regulated by the gate with high efficiency, and the carriers can be completely exhausted in a depletion region, so that ultralow off-state current is realized. At present, the method for preparing the ultrathin monocrystal mainly comprises a liquid level substrate method and a meniscus guide coating method, wherein the liquid level substrate method can prepare a two-dimensional organic crystal with controllable layer number based on space limitation, but the liquid level substrate method cannot prepare the two-dimensional organic crystal in a large area. MGC methods can be manufactured in large areas, but in order to ensure film continuity, the thickness of the film tends to increase, and thus achieving ultra-thin is still a challenge. Although few reports on p-type ultrathin single-crystal films exist at present, reports on large-area n-type ultrathin crystalline films are lacking.
Disclosure of Invention
The invention aims to provide a large-area n-type ultrathin crystalline film, and a preparation method and application thereof. The large-area and high-quality n-type ultrathin crystalline film is prepared by selecting small molecules TU-3 and polymer PS with good solubility and high stability as raw materials and adopting a polymer blending auxiliary solution shearing strategy. The prepared n-type ultrathin crystalline film has smooth and flat surface and flatness close to atomic level, and has excellent crystallinity, and can be used for preparing a thin film transistor.
In order to achieve the above purpose, the present invention provides the following technical solutions:
one of the technical schemes of the invention is as follows: the preparation method of the large-area n-type ultrathin crystalline film comprises the following steps:
TU-3 and polystyrene are dissolved in a solvent, wherein the concentration of TU-3 is 2-5 mg/mL, the concentration of Polystyrene (PS) is 5-10 mg/mL, then stirring is carried out at 100 ℃ to prepare a coating solution, and a large-area n-type ultrathin crystalline film is prepared by coating the film by a meniscus guiding coating method;
the structural formula of TU-3 is as follows:
preferably, the solvent is chlorobenzene.
The second technical scheme of the invention is as follows: there is provided a large-area n-type ultrathin crystalline film produced according to the above production method.
The third technical scheme of the invention: provided is a thin film transistor, the constituent parts of which include: a silicon layer, an insulating layer, an active layer, a source electrode and a drain electrode which are used as a substrate and a grid electrode at the same time;
the insulating layer is silicon dioxide thermally grown on the silicon layer, the active layer is positioned on the insulating layer, the source electrode and the drain electrode are positioned on the active layer, the source electrode and the drain electrode are not connected, and the total area of the source electrode and the drain electrode is smaller than the area of the active layer;
the active layer is the large-area n-type ultrathin crystalline film.
Preferably, the material of the insulating layer is silicon dioxide; the source electrode is made of gold and/or silver; the drain electrode is made of gold and/or silver.
Preferably, the thickness of the silicon wafer is 0.1-1000 mu m; the thickness of the insulating layer is 0.01-10 mu m; the thickness of the active layer is 5-200 nm; the thicknesses of the source electrode and the drain electrode are 10-200 nm.
More preferably, the silicon wafer has a thickness of 1000 μm; the thickness of the insulating layer is 300nm; the thickness of the active layer is 5nm; the thicknesses of the source electrode and the drain electrode are 160nm.
The fourth technical scheme of the invention: the preparation method of the thin film transistor comprises the following steps:
an active layer is prepared on a silicon layer with an insulating layer, wherein the insulating layer is connected with the silicon layer and the active layer, and finally a source electrode and a drain electrode are prepared on the active layer, so that the thin film transistor is obtained.
The beneficial technical effects of the invention are as follows:
the invention obtains the n-type ultrathin film with large area and high quality by adopting a polymer blending auxiliary solution shearing strategy. The film has a smooth and flat surface and a flatness close to the atomic level, and exhibits excellent crystallinity. The device prepared based on the film has high carrier mobility and excellent on-off ratio, and shows excellent electrical properties; the preparation process provided by the invention is simple and low in cost, can realize large-area preparation at normal temperature, and is easy to integrate; can be applied to all substrates, and is easy to prepare flexible devices.
Drawings
Fig. 1 is a schematic structural diagram of a thin film transistor prepared in example 1, wherein 1 is a silicon layer, 2 is an insulating layer, 3 is a source electrode, 4 is a drain electrode, and 5 is an active layer.
Fig. 2 is a polarized light microscopic photograph of the large-area n-type ultrathin crystalline film prepared in the step (2) of example 1, wherein a and B are photographs before and after 45 degrees of rotation of the same film under a low power mirror, and C and D are photographs before and after 45 degrees of rotation of the same film under a high power mirror.
FIG. 3 is an atomic force microscope photograph of a large-area n-type ultrathin crystalline film prepared in step (2) of example 1.
Fig. 4 is an optical micrograph of the large-area n-type ultrathin crystalline film prepared in step (2) of example 1.
Fig. 5 shows a transfer characteristic and an output characteristic of the thin film transistor prepared in example 1 at a gate voltage of 0 to 50 v, wherein a is the transfer characteristic and B is the output characteristic.
Fig. 6 is a source-drain current versus time curve of the thin film transistor prepared in example 1.
Detailed Description
Various exemplary embodiments of the invention will now be described in detail, which should not be considered as limiting the invention, but rather as more detailed descriptions of certain aspects, features and embodiments of the invention. It is to be understood that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention.
In addition, for numerical ranges in this disclosure, it is understood that each intermediate value between the upper and lower limits of the ranges is also specifically disclosed. Every smaller range between any stated value or stated range, and any other stated value or intermediate value within the stated range, is also encompassed within the invention. The upper and lower limits of these smaller ranges may independently be included or excluded in the range.
Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. Although only preferred methods and materials are described herein, any methods and materials similar or equivalent to those described herein can be used in the practice or testing of the present invention.
As used herein, the terms "comprising," "including," "having," "containing," and the like are intended to be inclusive and mean an inclusion, but not limited to.
Example 1
Preparation of a thin film transistor:
(1) TU-3 and polystyrene were dissolved in chlorobenzene, wherein TU-3 had a concentration of 3mg/mL and Polystyrene (PS) had a concentration of 6mg/mL, and then stirred at 100℃to prepare a coating solution;
(2) After ultrasonic treatment of ultrapure water, acetone and isopropanol, flushing and nitrogen blow-drying, placing the silicon wafer with the silicon dioxide layer in a culture dish after surface cleaning treatment of plasma, dropwise adding 5 microliter of phenyl trichlorosilane, placing the silicon wafer in an oven, heating at 120 ℃ for 2 hours, and taking out the silicon wafer to obtain the silicon wafer with hydrophilic surface, namely a substrate;
(3) Ultrasonic treatment of the silicon wafer treated in the step (2) with chloroform, acetone and isopropanol, flushing and blow-drying with nitrogen, preparing a coating solution to one side of the substrate with silicon dioxide by a meniscus guiding coating method through a doctor blade coater, and obtaining a large-area n-type ultrathin crystalline film, namely an active layer;
(4) Taking another silicon wafer, carrying out ultrasonic treatment on the ultrapure water, acetone and isopropanol, flushing and blow-drying by nitrogen, placing the silicon wafer in a culture dish after the surface of the plasma is cleaned, dripping 5 microliter of octadecyl trichlorosilane, placing the silicon wafer in an oven, heating the silicon wafer at 120 ℃ for 2 hours, and taking out the silicon wafer to obtain the silicon wafer with the hydrophobic surface;
(5) Ultrasonic-drying the silicon wafer treated in the step (4) by using chloroform, acetone and isopropanol, flushing and drying by using nitrogen, attaching a mask plate, and placing the mask plate into a vacuum coating instrument, wherein the vacuum degree is 1 multiplied by 10 -6 Sequentially depositing 80nm silver and 80nm gold under the condition of Pa to obtain a source-drain electrode;
(6) And transferring the source and drain electrodes onto the active layer in the step 3) under the electron microscope probe table, wherein the two electrodes are not contacted and smaller than the area of the active layer, so that the thin film transistor is manufactured.
The thickness of the substrate in the thin film transistor prepared in example 1 was 1000 μm; the thickness of the insulating layer is 300nm; the thickness of the active layer is 5.5nm; the thickness of the source and drain electrodes was 160nm.
Fig. 1 is a schematic structural diagram of a thin film transistor prepared in example 1, wherein 1 is a silicon layer, 2 is an insulating layer, 3 is a source electrode, 4 is a drain electrode, and 5 is an active layer.
Characterization of the large area n-type ultrathin crystalline film prepared in step (2) of example 1:
fig. 2 is a polarized light microscopic photograph, wherein a and B are photographs before and after the same film rotates by 45 degrees under a low power mirror, and C and D are photographs before and after the same film rotates by 45 degrees under a high power mirror, and it can be seen from fig. 2 that when the polarization angle rotates by 45 degrees, films of different sizes exhibit uniform color change and significant extinction phenomenon, indicating that they have a long range ordered internal structure and excellent crystallinity.
Fig. 3 is an atomic force microscope photograph, and as can be seen from fig. 3, the root mean square Roughness (RMS) of the surface of the produced large-area n-type ultrathin crystalline film is 0.66nm, with a continuous flat surface, and the thickness thereof is 5.5nm.
Fig. 4 is an optical micrograph, and the active layer and the source-drain electrode of the thin film transistor can be seen from fig. 4.
Characterization of field effect properties of the thin film transistor prepared in example 1:
the thin film transistor obtained in example 1 was tested using a probe station tester, and a gate voltage of 0 to 50 v was applied to obtain a transfer characteristic curve and an output characteristic curve as shown in fig. 5, wherein a is the transfer characteristic curve and B is the output characteristic curve. As can be seen from fig. 5, the electron mobility of the device can reach up to 1.58 square centimeters per volt per second, and the current on-off ratio exceeds 10 7 。
The thin film transistor prepared in example 1 was applied with a gate voltage of 40 v and a source-drain voltage of 20 v, and the relationship between the source-drain voltage and time was tested, and the test result is shown in fig. 6, and it can be seen from fig. 6 that the current was not attenuated in 8.5 hours, which indicates that the thin film transistor prepared in the invention has good stability.
The above embodiments are only illustrative of the preferred embodiments of the present invention and are not intended to limit the scope of the present invention, and various modifications and improvements made by those skilled in the art to the technical solutions of the present invention should fall within the protection scope defined by the claims of the present invention without departing from the design spirit of the present invention.
Claims (7)
1. The preparation method of the n-type ultrathin crystalline film is characterized by comprising the following steps of:
TU-3 and polystyrene are dissolved in a solvent, wherein the concentration of TU-3 is 2-5 mg/mL, the concentration of polystyrene is 5-10 mg/mL, then stirring is carried out at 100 ℃ to prepare a coating solution, and an n-type ultrathin crystalline film with the thickness of 5-200 nm is prepared by coating the film by a meniscus guiding coating method;
the structural formula of TU-3 is as follows:
；
the solvent is chlorobenzene.
2. An n-type ultrathin crystalline film made according to the method of claim 1.
3. A thin film transistor, comprising: a silicon layer, an insulating layer, an active layer, a source electrode and a drain electrode which are used as a substrate and a grid electrode at the same time;
the insulating layer is silicon dioxide thermally grown on the silicon layer, the active layer is positioned on the insulating layer, the source electrode and the drain electrode are positioned on the active layer, the source electrode and the drain electrode are not connected, and the total area of the source electrode and the drain electrode is smaller than the area of the active layer;
the active layer is the n-type ultrathin crystalline film of claim 2.
4. The thin film transistor according to claim 3, wherein a material of the insulating layer is silicon dioxide; the source electrode is made of gold and/or silver; the drain electrode is made of gold and/or silver.
5. The thin film transistor according to claim 3, wherein the thickness of the silicon layer is 0.1 to 1000 μm; the thickness of the insulating layer is 0.01-1000 mu m; the thicknesses of the source electrode and the drain electrode are 10-200 nm.
6. The thin film transistor according to claim 5, wherein the thickness of the silicon layer is 1000 μm; the thickness of the insulating layer is 1000 μm; the thickness of the active layer is 5nm; the thicknesses of the source electrode and the drain electrode are 160nm.
7. The method for manufacturing a thin film transistor according to any one of claims 3 to 6, comprising the steps of:
an active layer is prepared on a silicon layer with an insulating layer, wherein the insulating layer is connected with the silicon layer and the active layer, and finally a source electrode and a drain electrode are prepared on the active layer, so that the thin film transistor is obtained.
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| JP2019153653A (en) * | 2018-03-02 | 2019-09-12 | 三菱ケミカル株式会社 | Organic semiconductor device |
| CN111276613A (en) * | 2018-12-04 | 2020-06-12 | 天津大学 | Woven fibrous organic photoelectric field effect transistor and preparation method and application thereof |
| CN112201754A (en) * | 2020-02-18 | 2021-01-08 | 天津大学 | Ultrathin crystalline continuous organic semiconductor film and preparation method and application thereof |
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| US10845328B2 (en) * | 2016-08-16 | 2020-11-24 | The Board Of Trustees Of The University Of Illinois | Nanoporous semiconductor thin films |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| JP2019153653A (en) * | 2018-03-02 | 2019-09-12 | 三菱ケミカル株式会社 | Organic semiconductor device |
| CN111276613A (en) * | 2018-12-04 | 2020-06-12 | 天津大学 | Woven fibrous organic photoelectric field effect transistor and preparation method and application thereof |
| CN112201754A (en) * | 2020-02-18 | 2021-01-08 | 天津大学 | Ultrathin crystalline continuous organic semiconductor film and preparation method and application thereof |
Non-Patent Citations (1)
| Title |
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| Solution-printed organic semiconductor blends exhibiting transport properties on par with single Crystals;Muhammad R. Niazi;《Nature Communications》;第1-8页 * |
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