CN115939271B

CN115939271B - Micro LED device manufacturing method, micro LED device and display device

Info

Publication number: CN115939271B
Application number: CN202211483373.XA
Authority: CN
Inventors: 符民; 张珂
Original assignee: Shenzhen Stan Technology Co Ltd
Current assignee: Shenzhen Stan Technology Co Ltd
Priority date: 2022-11-24
Filing date: 2022-11-24
Publication date: 2023-12-15
Anticipated expiration: 2042-11-24
Also published as: CN115939271A

Abstract

The disclosure provides a micro LED device manufacturing method, a micro LED device and a display device. The method comprises the following steps: providing a miniature LED epitaxial wafer, wherein the epitaxial wafer comprises a first semiconductor layer, a multi-layer quantum well structure and a second semiconductor layer; etching is carried out from the second semiconductor layer until the first semiconductor layer is exposed, so that a mesa structure is obtained, wherein the mesa structure comprises a plurality of bosses; providing a metal layer on each boss and on the exposed first semiconductor layer to obtain a first intermediate structure; arranging a extinction layer on the first intermediate structure, and arranging a plurality of contact holes on the extinction layer to expose the metal layer; arranging a metal block on the exposed metal layer to obtain a micro LED chip array; and flip-chip bonding the micro LED chip array and the driving substrate through the metal block to obtain the micro LED device. According to this scheme, the optical crosstalk phenomenon and the peripheral light leakage phenomenon can be improved.

Description

Micro LED device manufacturing method, micro LED device and display device

Technical Field

The disclosure relates to the technical field of semiconductor LEDs, in particular to a preparation method of a micro LED device, the micro LED device and a display device.

Background

The Micro-LED display screen has the characteristics of self-luminescence, low power consumption, high brightness, high contrast, high resolution and the like, and the Micro-LED display screen has a high-density pixel array, and the size of a single pixel is often tens of micrometers or even a few micrometers. With the progressive development of display technology, micro-LED technology has gradually become a trend of new display technology. However, micro-LEDs have problems with optical crosstalk.

Disclosure of Invention

In order to solve the technical problems mentioned in the background art, the scheme of the disclosure provides a preparation method of a micro LED device, the micro LED device and a display device.

According to one aspect of the disclosed embodiments, a method for manufacturing a micro LED device is provided. The method comprises the following steps: providing a miniature LED epitaxial wafer, wherein the miniature LED epitaxial wafer sequentially comprises a first semiconductor layer, a multilayer quantum well structure and a second semiconductor layer from bottom to top; etching is carried out from the second semiconductor layer until the first semiconductor layer is exposed, so that a mesa structure is obtained, wherein the mesa structure comprises a plurality of bosses; providing a metal layer on the second semiconductor layer of each boss and on the exposed first semiconductor layer to obtain a first intermediate structure; arranging a extinction layer on the first intermediate structure, and arranging a plurality of contact holes on the extinction layer to expose the metal layer; arranging a metal block on the exposed metal layer to obtain a micro LED chip array; and flip-chip bonding the micro LED chip array and the driving substrate through the metal block to obtain the micro LED device.

Further, the plurality of bosses form an array of bosses and the array of bosses is located at a center of the mesa structure.

Further, disposing a metal layer on the second semiconductor layer of each boss and on the exposed first semiconductor layer includes: providing a current spreading layer on the second semiconductor layer of each boss and on the exposed first semiconductor layer; and arranging the metal layer on the current expansion layer.

Further, the current spreading layer comprises an indium tin oxide layer.

Further, the extinction layer includes first extinction portion and insulating portion set up the extinction layer on the first intermediate structure, and offer a plurality of contact holes in order to expose on the extinction layer the metal layer includes: setting a first extinction part on the exposed first semiconductor layer to obtain a second intermediate structure; an insulating part is arranged on the second intermediate structure, and a plurality of contact holes are formed in the insulating part so as to expose the metal layer.

Further, the insulating portion includes an insulating photoresist layer.

Further, the height of the first extinction portion is flush with the height of the metal layer on the first semiconductor layer.

Further, the first extinction portion includes a black photoresist, and disposing the first extinction portion on the exposed first semiconductor layer includes: disposing the black photoresist on the first intermediate structure to entirely cover the first intermediate structure; and carrying out full-face etching on the black photoresist by dry etching to expose the metal layer.

Further, forming a plurality of contact holes on the insulating portion to expose the metal layer includes: a plurality of first contact holes and a plurality of second contact holes are formed in the insulating portion, so that each of the plurality of first contact holes exposes the metal layer on the first semiconductor layer and each of the plurality of second contact holes exposes the metal layer on the second semiconductor layer.

Further, the extinction layer includes a second extinction portion, the extinction layer is disposed on the first intermediate structure, and a plurality of contact holes are formed in the extinction layer to expose the metal layer, including: and a second extinction part is arranged on the first intermediate structure, and a plurality of contact holes are formed in the second extinction part so as to expose the metal layer.

Further, the material of the metal block includes indium.

Further, flip-chip bonding the micro LED chip array and the driving substrate through the metal block to obtain a micro LED device includes: reflowing the metal block to form a metal bump; and the micro LED chip array is in flip-chip bonding with the driving substrate through the metal convex points.

Further, the substrate is a sapphire substrate, the first semiconductor layer is an N-GaN layer, and the second semiconductor layer is a P-GaN layer.

Further, starting etching from the second semiconductor layer until the first semiconductor layer is exposed, and obtaining the mesa structure includes: and etching the second semiconductor layer by adopting an inductively coupled plasma etching method until the first semiconductor layer is exposed, so as to obtain the mesa structure.

Further, disposing a current spreading layer on the second semiconductor layer of each boss and on the exposed first semiconductor layer includes: a current spreading layer is disposed on the second semiconductor layer of each of the lands and on the exposed first semiconductor layer using an electron beam evaporation method and a lift-off process method.

Further, disposing the metal layer on the current spreading layer includes: and arranging the metal layer on the current expansion layer by adopting an electron beam evaporation method and a stripping process method.

Further, disposing an insulating portion on the second intermediate structure and forming a plurality of contact holes on the insulating portion to expose the metal layer includes: spin-coating an insulating layer on the second intermediate structure; and etching a plurality of contact holes on the insulating layer by adopting exposure and development to expose the metal layer.

Further, disposing a second extinction portion on the first intermediate structure, and forming a plurality of contact holes on the second extinction portion to expose the metal layer includes: spin coating a second extinction portion on the first intermediate structure; and etching a plurality of contact holes on the second extinction part by adopting exposure and development to expose the metal layer.

Further, disposing a metal block on the exposed metal layer includes: and arranging a metal block on the metal layer by adopting an evaporation method and a wet etching method.

Further, reflowing the metal bump to form a metal bump includes: the metal block is placed in a vacuum reflow oven and is in N ₂ And reflowing in a formic acid environment to form the metal bump.

According to another aspect of the present disclosure, a micro LED device is also provided. The micro LED device comprises a micro LED chip array and a driving substrate. The micro LED chip array comprises a first intermediate structure, the first intermediate structure comprises a mesa structure and a metal layer, the mesa structure comprises a plurality of bosses, each boss in the plurality of bosses sequentially comprises a first semiconductor layer, a quantum well structure and a second semiconductor layer, and the metal layer is arranged on the second semiconductor layer of each boss and the exposed first semiconductor layer. And the micro LED chip array further comprises: a extinction layer disposed on the first intermediate structure and including a contact hole for exposing the metal layer; and the metal block is arranged on the exposed metal layer, and the micro LED chip array is in flip-chip bonding with the driving substrate through the metal block.

Further, the micro LED chip array further includes a current spreading layer disposed on the second semiconductor layer and the exposed first semiconductor layer of each boss, and the metal layer is disposed on the current spreading layer.

Further, the extinction layer includes a first extinction portion and an insulating portion, the first extinction portion is disposed on the exposed first semiconductor layer, the insulating portion is disposed on the first intermediate structure provided with the first extinction portion, and a plurality of contact holes are formed in the insulating portion to expose the metal layer.

Further, the insulating portion includes an insulating photoresist layer.

Further, the extinction layer comprises a second extinction portion, the second extinction portion is arranged on the first intermediate structure, and a plurality of contact holes are formed in the second extinction portion so as to expose the metal layer.

According to still another aspect of the embodiments of the present disclosure, there is also provided a display device. The display device comprises the miniature LED device.

By the technical scheme, the mesa structure comprising a plurality of bosses can be obtained by etching the epitaxial wafer, the metal layer is arranged on the mesa structure to form an intermediate structure, the extinction layer is arranged on the intermediate structure, the extinction layer is provided with a plurality of contact holes to expose the metal layer, and the metal block is arranged on the exposed metal layer to form the micro LED chip array, so that the micro LED device is formed. Each micro LED chip in the micro LED chip array in the micro LED device manufactured in the way is taken as a pixel, the light which is not emitted normally of the pixel can be absorbed through the extinction layer, namely, the light reflected from the substrate to the inside of the device can be absorbed, so that the light crosstalk phenomenon between different pixels can be improved, the phenomenon that the light continuously reflects in the inside of the device and is emitted from the periphery of the device can be improved, in other words, the optical crosstalk phenomenon and the peripheral light leakage problem can be improved while the high resolution is realized, and further the high-efficiency display is realized.

Drawings

The above, as well as additional purposes, features, and advantages of exemplary embodiments of the present disclosure will become readily apparent from the following detailed description when read in conjunction with the accompanying drawings. Several embodiments of the present disclosure are illustrated by way of example, and not by way of limitation, in the figures of the accompanying drawings and in which like reference numerals refer to similar or corresponding parts and in which:

fig. 1 is a flow chart illustrating a method of manufacturing a micro LED device according to one embodiment of the present disclosure;

FIGS. 2 a-2 i are schematic diagrams illustrating a manufacturing process flow of a method for manufacturing a micro LED device according to one embodiment of the present disclosure;

fig. 3 a-3 d are schematic views illustrating a manufacturing process flow of a method for manufacturing a micro LED device according to another embodiment of the present disclosure.

Detailed Description

It should be noted that, without conflict, the embodiments of the present application and features of the embodiments may be combined with each other. The present disclosure will be described in detail below with reference to the accompanying drawings in conjunction with embodiments.

It should be noted that the following detailed description is illustrative and is intended to provide further explanation of the application. Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs.

Spatially relative terms, such as "above … …," "above … …," "upper surface at … …," "above," and the like, may be used herein for ease of description to describe one device or feature's spatial location relative to another device or feature as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations in use or operation in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, elements described as "above" or "over" other devices or structures would then be oriented "below" or "beneath" the other devices or structures. Thus, the exemplary term "above … …" may include both orientations of "above … …" and "below … …". The device may also be oriented 90 degrees or at other orientations and the spatially relative descriptors used herein interpreted accordingly.

Exemplary embodiments according to the present disclosure will now be described in more detail with reference to the accompanying drawings. These exemplary embodiments may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. It should be appreciated that these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of these exemplary embodiments to those skilled in the art, that in the drawings, thicknesses of layers and regions are exaggerated for clarity, and identical reference numerals are used to denote identical devices, and thus descriptions thereof will be omitted.

The disclosure provides a method for manufacturing a miniature LED device. Referring to fig. 1, 2 a-2 i, and 3 a-3 d, fig. 1 is a flowchart illustrating a method of manufacturing a micro LED device according to one embodiment of the present disclosure. Fig. 2 a-2 i are schematic diagrams illustrating a manufacturing process flow of a method for manufacturing a micro LED device according to one embodiment of the present disclosure. Fig. 3 a-3 d are schematic views illustrating a manufacturing process flow of a method for manufacturing a micro LED device according to another embodiment of the present disclosure.

According to an embodiment of the present disclosure, a Micro LED device includes an array of Micro LED chips, each Micro LED chip in the array of Micro LED chips as one pixel, and a driving substrate, the pixel size is typically less than or equal to 200 micrometers.

As shown in fig. 1, the method for manufacturing the micro LED device includes the following steps S101 to S107.

Step S101, a miniature LED epitaxial wafer is provided, and the miniature LED epitaxial wafer sequentially comprises a first semiconductor layer, a multilayer quantum well structure and a second semiconductor layer from bottom to top.

And step S102, etching is performed from the second semiconductor layer until the first semiconductor layer is exposed, so that a mesa structure is obtained, wherein the mesa structure comprises a plurality of bosses.

Step S103, disposing a metal layer on the second semiconductor layer of each boss and on the exposed first semiconductor layer, to obtain a first intermediate structure.

Step S104, a extinction layer is arranged on the first intermediate structure, and a plurality of contact holes are formed in the extinction layer to expose the metal layer.

And step 105, setting a metal block on the exposed metal layer to obtain the micro LED chip array.

And S106, reversely bonding the micro LED chip array and the driving substrate through the metal block to obtain the micro LED device.

In step S101, a micro LED epitaxial wafer may be provided, which includes, in order from bottom to top, a first semiconductor layer, a multi-layered quantum well structure, and a second semiconductor layer.

According to the embodiments of the present disclosure, in order to manufacture the micro LED device, the micro LED chip array needs to be manufactured first, and then the micro LED epitaxial wafer may be obtained first, where the epitaxial wafer may be manufactured in advance, or may be manufactured in the manufacturing process of the micro LED chip array of the present disclosure. Referring to fig. 2 a-3 c, fig. 2a illustrates a micro LED epitaxial wafer 10 according to one embodiment of the present disclosure. As shown in fig. 2a, the micro LED epitaxial wafer 10 may include, from bottom to top, a substrate 101, a buffer layer 102, a third semiconductor layer 103, a first semiconductor layer 104, a multi-layer quantum well structure 105, and a second semiconductor layer 106.

According to an embodiment of the present disclosure, the first substrate 101 may be a sapphire substrate, the third semiconductor layer 103 may be a U-GaN layer, the first semiconductor layer 104 may be an N-GaN layer, and the second semiconductor layer 106 may be a P-GaN layer.

In step S102, etching may be performed from the second semiconductor layer until the first semiconductor layer is exposed, so as to obtain a mesa structure, where the mesa structure includes a plurality of bumps.

According to embodiments of the present disclosure, after the micro LED epitaxial wafer is obtained, it may be etched to obtain a mesa structure for disposing an electrode. Wherein the mesa structure includes a plurality of bosses. Further, the plurality of bosses form an array of bosses and the array of bosses is located at a center of the mesa structure. The plurality of bosses form a boss array such that a chip array can be formed using the boss array, which is centrally located in the mesa structure, facilitating subsequent electrode placement.

Specifically, etching from the second semiconductor layer until the first semiconductor layer is exposed, and obtaining the mesa structure may include: and etching the second semiconductor layer by adopting an inductively coupled plasma etching method until the first semiconductor layer is exposed, so as to obtain the mesa structure.

Referring to fig. 2 a-2 i, fig. 2b illustrates a mesa structure 20 formed after etching the epitaxial wafer 10 illustrated in fig. 2 a. As shown in fig. 2b, the mesa structure 20 includes a plurality of bosses 21. Specifically, a silicon oxide layer may be deposited on the second semiconductor layer 106 of the epitaxial wafer 10 shown in fig. 2a by using a plasma enhanced chemical vapor deposition (Plasma Enhanced Chemical Vapor Deposition, PECVD) method as a hard mask, then photoresist is spin-coated on the hard mask, a mesa pattern is etched by using an inductively coupled plasma etching (ICP) method after removing the photoresist until the first semiconductor layer 104 is exposed, and finally the silicon oxide layer is removed to form the mesa structure 20 shown in fig. 2 b. Of course, any other suitable process may be used to etch the mesa structure.

In step S103, a metal layer may be disposed on the second semiconductor layer of each boss and on the exposed first semiconductor layer, resulting in a first intermediate structure.

According to embodiments of the present disclosure, in order to better dispose the electrodes, a metal layer may be disposed on the second semiconductor layer of each boss and on at least a portion of the exposed first semiconductor layer.

Further, disposing a metal layer on the second semiconductor layer of each boss and on the exposed first semiconductor layer includes: providing a current spreading layer on the second semiconductor layer of each boss and on the exposed first semiconductor layer; and arranging the metal layer on the current expansion layer. Wherein the current spreading layer may include an indium tin oxide layer. The light-emitting efficiency can be improved by arranging the current expansion layer.

Further, disposing the current spreading layer on the second semiconductor layer of each boss and on the exposed first semiconductor layer may include: a current spreading layer is disposed on the second semiconductor layer of each of the lands and on the exposed first semiconductor layer using an electron beam evaporation method and a lift-off process method. Disposing the metal layer on the current spreading layer includes: and arranging the metal layer on the current expansion layer by adopting an electron beam evaporation method and a stripping process method.

Referring to fig. 2 a-2 i, fig. 2c shows a current spreading layer 107 disposed on the second semiconductor layer 106 of each boss 21 and on a portion of the exposed first semiconductor layer 104. Specifically, a current spreading layer 107, such as an indium tin oxide layer, may be deposited on the structure shown in fig. 2b using an electron beam evaporation method, and then the photoresist and excess metal may be removed using a lift-off process to yield the structure shown in fig. 2 c.

Referring to fig. 2 a-2 i, fig. 2d shows a metal layer 108 disposed on the current spreading layer 107. Specifically, a metal layer 108 may be deposited on the structure shown in fig. 2c using an electron beam evaporation method, and then a lift-off (lift-off) process is used to remove the photoresist and the excess metal, resulting in a first intermediate structure as shown in fig. 2 d.

In step S104, a extinction layer may be disposed on the first intermediate structure, and a plurality of contact holes may be formed in the extinction layer to expose the metal layer.

According to an embodiment of the present disclosure, after a metal layer is disposed on the exposed first semiconductor layer in step S103, a first intermediate structure is obtained, whereby a extinction layer may be disposed on the first intermediate structure.

According to a first embodiment of the present disclosure, the extinction layer may include a first extinction portion and an insulation portion, thereby providing the extinction layer on the first intermediate structure, and providing a plurality of contact holes on the extinction layer to expose the metal layer may include: setting a first extinction part on the exposed first semiconductor layer to obtain a second intermediate structure; an insulating part is arranged on the second intermediate structure, and a plurality of contact holes are formed in the insulating part so as to expose the metal layer.

In this embodiment, after the metal layer is disposed on the exposed first semiconductor layer in step S103, a portion of the first semiconductor layer is still exposed, and the first extinction portion may be disposed on the first semiconductor layer that is still exposed, resulting in the second intermediate structure, and then the insulating layer is disposed on the second intermediate structure. The material of the first extinction portion may be an extinction material such as a dark color resistor of a black color resistor or a non-metal layer, and the insulation portion may include an insulation photoresist layer, for example, PFA is used for preparing the insulation photoresist layer, so that the surface of the insulation portion arranged on the second intermediate structure is as flat as possible, and device performance of the micro LED device is improved.

Further, the height of the first extinction portion is flush with the height of the metal layer on the first semiconductor layer. In this embodiment, the height of the first matting section is flush with the height of the metal layer on the first semiconductor layer, meaning that the absolute value of the difference in height between the height of the first matting section and the height of the metal layer on the first semiconductor layer is smaller than a preset threshold value, which facilitates the setting of the matting layer and facilitates the subsequent setting of further layers on the matting layer.

Further, the first extinction portion may include a black resist, and disposing the first extinction portion on the exposed first semiconductor layer may include: disposing the black photoresist on the first intermediate structure to entirely cover the first intermediate structure; and carrying out full-face etching on the black photoresist by dry etching to expose the metal layer. Specifically, a black resist may be spin coated on the first intermediate structure; and etching the black resistor by adopting an inductively coupled plasma etching method until the metal layer on the first semiconductor layer is exposed. In this way, by utilizing the height difference of different positions on the first intermediate structure, black resistors with different thicknesses are formed on different positions of the first intermediate structure, and generally, the lower the height is, the larger the thickness of the black resistor is corresponding to, and then the whole black resistor is etched by dry etching, so that the black resistor at the position with smaller thickness is etched, and the black resistor at the position with larger thickness is reserved.

The inventor of the present application found that, because the black photoresist, especially the thick film black photoresist, has excellent extinction performance, and is difficult to grasp and position mark during exposure, the present application uses the thickness difference of the black photoresist formed by the height difference, and then performs the whole surface dry etching, so that the patterning of the black photoresist can be realized without using the positioning mark, and the precision of the pattern position can be improved, and the improvement effect of optical crosstalk can be improved, and the aperture ratio of the micro LED device can also be improved.

Referring to fig. 2 a-2 i, fig. 2e shows a first matting section 109, such as a black resist, provided on the structure shown in fig. 2 d. As shown in fig. 2e, the first extinction portion 109 may be spin coated over the entire structure shown in fig. 2d, resulting in the structure shown in fig. 2 e.

Referring to fig. 2 a-2 i, fig. 2f illustrates a first matting portion 109 formed on the structure illustrated in fig. 2 e. After the first extinction portion 109 is spin coated, the extinction layer is etched by using an Inductively Coupled Plasma (ICP) etching method until the metal layer 108 on the first semiconductor layer 104 is exposed, at which time the height of the remaining first extinction portion 109 is flush with the metal layer 108 on the first semiconductor layer 104, thereby obtaining the second intermediate structure 30 as shown in fig. 2 f.

Further, forming a plurality of contact holes on the insulating portion to expose the metal layer may include: a plurality of first contact holes and a plurality of second contact holes are formed in the insulating portion, so that each of the plurality of first contact holes exposes the metal layer on the first semiconductor layer and each of the plurality of second contact holes exposes the metal layer on the second semiconductor layer.

An insulating layer such as a PFA layer may be disposed on the second intermediate structure 30, and a contact hole may be opened to the PFA layer to expose the metal layer. Wherein PFA (soluble polytetrafluoroethylene) is an organic photoresist used for preparing an insulating photoresist layer.

Referring to fig. 2 a-2 i, fig. 2g shows an insulating portion 110 with a contact hole. As shown in fig. 2g, an insulating portion 110, such as a PFA layer, may be spin-coated on the second intermediate structure 30 shown in fig. 2f, after spin-coating the insulating portion 110, a first contact hole 1101 and a second contact hole 1102 are etched on the insulating portion using exposure and development, the first contact hole 1101 exposes the metal layer 108 on the first semiconductor layer 104, the second contact hole 1102 exposes the metal layer 108 on the second semiconductor layer 106, and the plurality of second contact holes 1102 form a contact hole array. It is noted that the number of contact holes shown in fig. 2g is only illustrative, and in particular the number of second contact holes 1102 may be determined according to the number of chips (pixels) in the desired micro LED chip array.

By the technical solution of the first embodiment, by disposing the first extinction portion such as black resist on the first semiconductor layer and disposing the insulating portion such as PFA on the first extinction portion, each layer under the insulating portion such as PFA is better protected by the insulating portion while the first extinction portion is capable of absorbing light reflected from the substrate toward the inside of the device.

According to a second embodiment of the present disclosure, the extinction layer may include a second extinction portion, disposing the extinction layer on the first intermediate structure, and forming a plurality of contact holes on the extinction layer to expose the metal layer includes: and a second extinction part is arranged on the first intermediate structure, and a plurality of contact holes are formed in the second extinction part so as to expose the metal layer.

In this second embodiment, a second extinction portion is provided on the first intermediate structure obtained in step S103, and an opening is directly made in this second extinction portion. Wherein the material of the second extinction portion can be extinction material such as black dark color resistance or nonmetal layer

Further, disposing a second extinction portion on the first intermediate structure, and forming a plurality of contact holes on the second extinction portion to expose the metal layer may include: spin coating a second extinction portion on the first intermediate structure; and etching a plurality of contact holes on the second extinction part by adopting exposure and development to expose the metal layer.

Referring to fig. 2 a-2 d and 3 a-3 d, fig. 3a shows a second matting 209 arranged on the structure shown in fig. 2 d. As shown in fig. 3a, the second extinction portion 109 may be spin coated over the entire structure shown in fig. 2d, resulting in the structure shown in fig. 3 a.

Referring to fig. 2 a-2 d and fig. 3 a-3 d, fig. 3b shows a second matting section 209 provided with contact holes. As shown in fig. 3b, a second extinction portion 209, such as a black resist, may be spin-coated on the first intermediate structure shown in fig. 2d, after the spin-coating of the second extinction portion 209, a first contact hole 2091 and a second contact hole 2092 are etched on the second extinction portion 209 using exposure development, the first contact hole 2091 exposes the metal layer 108 on the first semiconductor layer 104, the second contact hole 2092 exposes the metal layer 108 on the second semiconductor layer 106, and the plurality of second contact holes 2092 form a contact hole array. It is noted that the number of contact holes shown in fig. 3b is only illustrative, and in particular the number of second contact holes 2092 may be determined according to the number of chips (pixels) in the desired micro LED chip array.

By the technical solution of the second embodiment, by disposing the second extinction portion such as black resist on the first semiconductor layer for extinction and insulation protection, the disposition of the insulation portion such as PFA on the first extinction portion is reduced, so that while the second extinction portion is capable of absorbing light reflected from the substrate toward the inside of the device, the preparation of the insulation portion can be reduced, thereby reducing the process progress and the process difficulty and reducing the cost.

In step S105, a metal block may be disposed on the exposed metal layer, resulting in a micro LED chip array.

According to embodiments of the present disclosure, in order to complete the fabrication of the micro LED chip array, metal blocks may be disposed on the exposed metal layer so as to bond with other components to achieve corresponding functions. The material of the metal block may comprise indium, which has a low melting point, and is particularly suitable for flip-chip bonding at a relatively low temperature, but may also comprise any suitable metal.

Referring to fig. 2 a-2 i, fig. 2h shows a metal block 111 disposed on the metal layer 108. Specifically, metal may be deposited on the structure shown in fig. 2g by vacuum thermal evaporation, for example, indium is deposited, and wet etching is performed using photoresist as a mask, to obtain the structure shown in fig. 2 h.

Thus, the micro LED chip array is completed, and fig. 2h shows the micro LED chip array 40 completed.

Referring to fig. 2 a-2 d and 3 a-3 d, fig. 3c shows a metal block 211 disposed on metal layer 108. Specifically, a metal may be deposited on the structure shown in fig. 3b by vacuum thermal evaporation, for example, indium is deposited, and wet etching is performed using photoresist as a mask, to obtain the structure shown in fig. 3 c.

Thus, the micro LED chip array is completed, and fig. 3c shows the micro LED chip array 60 completed.

In step S106, the micro LED chip array and the driving substrate may be flip-chip bonded through the metal block, to obtain a micro LED device.

In order to implement a micro LED device according to an embodiment of the present disclosure, it is necessary to bond the prepared micro LED chip array with a driving substrate.

Specifically, reflowing the metal bump to form a metal bump may include: the metal block is placed in a vacuum reflow oven and is in N ₂ And reflowing in a formic acid environment to form the metal bump.

Referring to fig. 2 a-2 i, fig. 2i shows an array of micro LED chips 40 and a drive substrate 50 bonded together. Specifically, the structure shown in fig. 2h is placed in a vacuum reflow oven to reflow the metal block 111, the vacuum reflow oven is first vacuumized to ensure the vacuum state, and then N is introduced into the vacuum reflow oven ₂ And formic acid and heating and refluxing to obtain the metal bump 112 shown in fig. 2 i. Wherein, the initial vacuum environment can avoid the oxidation of metal in the reflow process to generate high-melting-point metal oxide, formic acid can reduce the metal oxide, and N ₂ Metal oxidation can be reduced. The micro LED chip array 40 may then be flipped using a flip-chip bonding station and the micro LED chip array 40 bonded to the drive substrate 50 using the metal bumps 112.

Thus, the micro LED device is completed, and fig. 2i shows the micro LED device 1 completed in manufacturing.

Referring to fig. 2 a-2 d and 3 a-3 d, fig. 3d shows an array of micro LED chips 60 and a drive substrate 50 bonded together. Specifically, the structure shown in fig. 3c is placed in a vacuum reflow oven for metalReflow of block 211, the vacuum reflow oven is first evacuated to ensure a vacuum state, and then N is introduced into the vacuum reflow oven ₂ And formic acid and heating and reflowing to obtain the metal bump 212 as shown in fig. 3 d. Wherein, the initial vacuum environment can avoid the oxidation of metal in the reflow process to generate high-melting-point metal oxide, formic acid can reduce the metal oxide, and N ₂ Metal oxidation can be reduced. The micro LED chip array 60 may then be flipped using a flip-chip bonding station and the micro LED chip array 60 bonded to the drive substrate 50 using the metal bumps 212.

Thus, the micro LED device is completed, and fig. 3d shows the micro LED device 2 completed.

It should be noted that, the inventors of the present disclosure found that, when there is reflection at the interface between the U-GaN layer of the light emitting chip (the lit pixel) of the single-color Micro-LED device of the sapphire substrate and the sapphire substrate, the reflected light enters the unlit pixel or exits from the side of the device, so as to form a light crosstalk phenomenon or a light leakage phenomenon. Meanwhile, when a high-resolution display screen is manufactured, the problem of yield rate occurs in part of the process due to the reduction of the pixel size, and the light crosstalk phenomenon and the light leakage phenomenon are more likely to occur. According to the technical scheme of the disclosure, a mesa structure comprising a plurality of bosses can be obtained by etching an epitaxial wafer, a metal layer is arranged on the mesa structure to form an intermediate structure, a extinction layer is arranged on the intermediate structure, a plurality of contact holes are formed in the extinction layer to expose the metal layer, and a micro LED chip array is formed by arranging a metal block on the exposed metal layer, so that a micro LED device is formed. Each micro LED chip in the micro LED chip array in the micro LED device manufactured in the way is taken as a pixel, the light which is not emitted normally of the pixel can be absorbed through the extinction layer, namely, the light reflected from the substrate to the inside of the device can be absorbed, so that the light crosstalk phenomenon between different pixels can be improved, the phenomenon that the light continuously reflects in the inside of the device and is emitted from the periphery of the device can be improved, in other words, the optical crosstalk phenomenon and the peripheral light leakage problem can be improved while the high resolution is realized, and further the high-efficiency display is realized.

The present disclosure also provides a micro LED device. The miniature LED device can be manufactured by the miniature LED device manufacturing method.

As shown in fig. 2 a-2 i, the micro LED device 1 includes a micro LED chip array 40 and a driving substrate 50. The micro LED chip array 40 includes a first intermediate structure including a mesa structure 20 and a metal layer 108, the mesa structure 20 includes a plurality of mesas 21, each mesa of the plurality of mesas includes a first semiconductor layer 104, a quantum well structure 105, and a second semiconductor layer 106 in sequence, and the metal layer 108 is disposed on the second semiconductor layer 106 and the exposed first semiconductor layer 104 of each mesa: a extinction layer disposed on the first intermediate structure and including a contact hole for exposing the metal layer; and a metal block 111 disposed on the exposed metal layer, wherein the micro LED chip array 40 is flip-chip bonded to the driving substrate 50 through the metal block 111.

According to an embodiment of the present disclosure, the micro LED chip array 40 further includes a current spreading layer 107, the current spreading layer 107 is disposed on the second semiconductor layer 106 and the exposed first semiconductor layer 104 of each boss, and the metal layer 108 is disposed on the current spreading layer 107.

According to an embodiment of the present disclosure, the extinction layer includes a first extinction portion 109 and an insulation portion 110, the first extinction portion 109 is disposed on the exposed first semiconductor layer, the insulation portion 110 is disposed on a first intermediate structure provided with the first extinction portion 109, and the insulation portion 110 is opened with a plurality of contact holes to expose the metal layer. Specifically, the insulating portion 110 is provided with a plurality of first contact holes 1101 and a plurality of second contact holes 1102, each of the plurality of first contact holes 1101 exposing the metal layer 108 on the first semiconductor layer 104 and each of the plurality of second contact holes exposing the metal layer 108 on the second semiconductor layer 106.

According to an embodiment of the present disclosure, the height of the first extinction portion is flush with the height of the metal layer on the first semiconductor layer.

According to an embodiment of the present disclosure, the insulating portion includes an insulating photoresist layer.

As shown in fig. 2 a-2 d and fig. 3 a-3 d, the micro LED device 2 includes a micro LED chip array 60 and a driving substrate 50. The micro LED chip array 60 includes a first intermediate structure including a mesa structure 20 and a metal layer 108, the mesa structure 20 includes a plurality of mesas 21, each mesa of the plurality of mesas includes a first semiconductor layer 104, a quantum well structure 105, and a second semiconductor layer 106 in sequence, and the metal layer 108 is disposed on the second semiconductor layer 106 and the exposed first semiconductor layer 104 of each mesa: a extinction layer disposed on the first intermediate structure and including a contact hole for exposing the metal layer; and a metal block 211 disposed on the exposed metal layer, wherein the micro LED chip array 60 is flip-chip bonded with the driving substrate 50 through the metal block 211.

According to an embodiment of the present disclosure, the micro LED chip array 60 further includes a current spreading layer 107, the current spreading layer 107 is disposed on the second semiconductor layer 106 and the exposed first semiconductor layer 104 of each boss, and the metal layer 108 is disposed on the current spreading layer 107.

According to an embodiment of the present disclosure, the extinction layer includes a second extinction portion 209, the second extinction portion 209 is disposed on the first intermediate structure, and a plurality of first contact holes 2091 and a plurality of second contact holes 2092 are formed on the second extinction portion 209 to expose the metal layer.

It is noted that any of the relevant descriptions (including but not limited to technical features and their roles, explanations, etc.) regarding the micro LED device structure in the above-described micro LED device manufacturing method can be applied to the micro LED device of the present disclosure.

The disclosure also provides a display device. The display device comprises the micro LED device. The display device can be applied to electronic equipment to realize technologies such as augmented Reality (Augmented Reality, AR), virtual Reality (VR), extended Reality (XR), mixed Reality (MR) and the like. For example, the Display device may be a projection portion of an electronic apparatus, such as a projector, head Up Display (HUD), or the like; for another example, the display device may be a display portion of an electronic apparatus, and for example, the electronic apparatus may include: smart phones, smart watches, notebook computers, tablet computers, automobile recorders, navigator, head-mounted devices, and any device having a display screen.

It is noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of exemplary embodiments according to the present application. As used herein, the singular is also intended to include the plural unless the context clearly indicates otherwise, and furthermore, it is to be understood that the terms "comprises" and/or "comprising" when used in this specification are taken to specify the presence of stated features, steps, operations, devices, components, and/or combinations thereof.

It should be noted that the terms "first," "second," and the like in the description and the claims of the present application and the above figures are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate such that embodiments of the application described herein may be capable of being practiced otherwise than as specifically illustrated and described. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.

The foregoing description of the preferred embodiments of the present disclosure is provided only and not intended to limit the disclosure so that various modifications and changes may be made to the present disclosure by those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present disclosure should be included in the protection scope of the present disclosure.

Claims

1. A method of manufacturing a micro LED device, wherein the method comprises:

providing a miniature LED epitaxial wafer, wherein the miniature LED epitaxial wafer sequentially comprises a first semiconductor layer, a multilayer quantum well structure and a second semiconductor layer from bottom to top;

etching is carried out from the second semiconductor layer until the first semiconductor layer is exposed, so that a mesa structure is obtained, wherein the mesa structure comprises a plurality of bosses;

providing a metal layer on the second semiconductor layer of each boss and on the exposed first semiconductor layer to obtain a first intermediate structure;

the first intermediate structure is provided with a extinction layer, and a plurality of contact holes are formed in the extinction layer to expose the metal layer, wherein the extinction layer comprises a first extinction portion and an insulation portion, the first intermediate structure is provided with the extinction layer, and the extinction layer is provided with a plurality of contact holes to expose the metal layer, and the extinction layer comprises: setting a first extinction part on the exposed first semiconductor layer to obtain a second intermediate structure; arranging an insulating part on the second intermediate structure, and arranging a plurality of contact holes on the insulating part to expose the metal layer, wherein the height of the first extinction part is flush with the height of the metal layer on the first semiconductor layer;

arranging a metal block on the exposed metal layer to obtain a micro LED chip array;

and flip-chip bonding the micro LED chip array and the driving substrate through the metal block to obtain the micro LED device.

2. The method of manufacturing a micro LED device of claim 1, wherein the first extinction portion comprises a black resist, and disposing the first extinction portion on the exposed first semiconductor layer comprises:

disposing the black photoresist on the first intermediate structure to entirely cover the first intermediate structure;

and carrying out full-face etching on the black photoresist by dry etching to expose the metal layer.

3. The method of manufacturing a micro LED device of claim 1, wherein the insulating portion comprises an insulating photoresist layer.

4. The method for manufacturing a micro LED device according to claim 1, wherein flip-chip bonding the micro LED chip array and the driving substrate through the metal block to obtain the micro LED device comprises:

reflowing the metal block to form a metal bump;

and the micro LED chip array is in flip-chip bonding with the driving substrate through the metal convex points.

5. The method of manufacturing a micro LED device of any one of claims 1 to 4, wherein disposing a metal layer on the second semiconductor layer of each boss and on the exposed first semiconductor layer comprises:

providing a current spreading layer on the second semiconductor layer of each boss and on the exposed first semiconductor layer;

and arranging the metal layer on the current expansion layer.

6. A micro LED device, wherein the micro LED device comprises a micro LED chip array and a driving substrate,

wherein the micro LED chip array comprises a first intermediate structure, the first intermediate structure comprises a mesa structure and a metal layer, the mesa structure comprises a plurality of bosses, each boss in the plurality of bosses comprises a first semiconductor layer, a quantum well structure and a second semiconductor layer in sequence, the metal layer is arranged on the second semiconductor layer of each boss and on the exposed first semiconductor layer,

and the micro LED chip array further comprises:

a extinction layer disposed on the first intermediate structure and including a contact hole for exposing the metal layer, the extinction layer including a first extinction portion disposed on the exposed first semiconductor layer and an insulation portion disposed on the first intermediate structure provided with the first extinction portion, and the insulation portion being provided with a plurality of contact holes to expose the metal layer, a height of the first extinction portion being flush with a height of the metal layer on the first semiconductor layer;

a metal block disposed on the exposed metal layer,

and the micro LED chip array is in flip-chip bonding with the driving substrate through the metal block.

7. The micro LED device of claim 6, wherein the insulating portion comprises an insulating photoresist layer.

8. The micro LED device of any one of claims 6 to 7, wherein the array of micro LED chips further comprises a current spreading layer disposed on the second semiconductor layer and on the exposed first semiconductor layer of each boss, and the metal layer is disposed on the current spreading layer.

9. A display device, wherein the display device comprises the micro LED device of any one of claims 6 to 8.