CN115912584B - Circuit for reducing PFC loss of high-power charger - Google Patents
Circuit for reducing PFC loss of high-power charger Download PDFInfo
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- CN115912584B CN115912584B CN202211464229.1A CN202211464229A CN115912584B CN 115912584 B CN115912584 B CN 115912584B CN 202211464229 A CN202211464229 A CN 202211464229A CN 115912584 B CN115912584 B CN 115912584B
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
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Abstract
The invention discloses a circuit for reducing PFC loss of a high-power charger, which belongs to the technical field of chargers and comprises: the intelligent power charger comprises a PFC inductor, a resistor R49, a resistor R50, a resistor R51 and a resistor R61, and a triode Q20, wherein the triode Q20 is electrically connected between the resistor R51 and the resistor R61, the BulK voltage vo_PFC of a capacitor EC1, one end of the BulK voltage vo_PFC of the capacitor EC1 is electrically connected with the resistor R1, the resistor R4 and the resistor R5, two groups of FB_PFC, one end of one group of FB_PFC is electrically connected with the resistor R42, and one end of the other group of FB_PFC is electrically connected with the resistor R59, the triode Q20 and the resistor R63.
Description
Technical Field
The invention relates to the technical field of chargers, in particular to a circuit for reducing PFC loss of a high-power charger.
Background
In recent years, with the rapid development of consumer electronic products, devices such as mobile phones, notebooks, IPAD and the like which need to be charged are increasingly increased, and the requirement on charging power is also increasingly increased, when a plurality of devices need to be charged simultaneously, a high-power charger needs to increase a PFC boost circuit to meet the simultaneous charging requirement of a plurality of devices, so that the circuit can cause power loss, and the problems of increasing the heat productivity of the products or increasing the external dimension and the like are directly caused. Therefore, the invention discloses a circuit for reducing PFC loss of a high-power charger.
Disclosure of Invention
The present invention has been made in view of the above and/or problems with existing circuits for reducing PFC losses in high power chargers.
It is therefore an object of the present invention to provide a circuit for reducing PFC losses in a high-power charger that solves the above-mentioned problems.
In order to solve the technical problems, according to one aspect of the present invention, the following technical solutions are provided:
a circuit for reducing PFC losses in a high power charger, comprising:
one end of the PFC inductor front VDC is electrically connected with a resistor R49, a resistor R50, a resistor R51 and a resistor R61;
a triode Q20, wherein the triode Q20 is electrically connected between the resistor R51 and the resistor R61;
one end of the BulK voltage vo_PFC of the capacitor EC1 is electrically connected with a resistor R1, a resistor R4 and a resistor R5;
two groups of FB_PFC, wherein one end of one group of FB_PFC is electrically connected with a resistor R42, and one end of the other group of FB_PFC is electrically connected with a resistor R59, a triode Q20 and a resistor R63;
the U7 MCU, one end of the U7 MCU is electrically connected with an MCU signal pin W/P, and one end of the MCU signal pin W/P is connected with a Uo2B through an optical coupler Uo 2A;
one end of the U7 MCU is electrically connected with the I2C protocol circuit;
the output voltage node VCC_AUX of the auxiliary winding of the transformer;
two groups of PFC switch MOS drive voltage nodes VCC_PFC, one group of PFC switch MOS drive voltage nodes VCC_PFC is connected with an output voltage node VCC_AUX of the auxiliary winding of the transformer through a triode Q17, and one end of the other group of PFC switch MOS drive voltage nodes VCC_PFC is electrically connected with a triode Q1.
As a preferred scheme of the circuit for reducing PFC loss of a high-power charger according to the present invention, the circuit comprises: the PFC inductor front VDC is connected with a resistor R49, a resistor R50, a resistor R51 and a resistor R61 in series.
As a preferred scheme of the circuit for reducing PFC loss of a high-power charger according to the present invention, the circuit comprises: the BulK voltage vo_PFC of the capacitor EC1 is connected in series with the resistor R1, the resistor R4 and the resistor R5.
As a preferred scheme of the circuit for reducing PFC loss of a high-power charger according to the present invention, the circuit comprises: the fb_pfc is connected in series with the resistor R59, the triode Q20, and the resistor R63, and one end of the resistor R61 is electrically connected with one end of the resistor R63.
As a preferred scheme of the circuit for reducing PFC loss of a high-power charger according to the present invention, the circuit comprises: when the input voltage is less than 150Vac, i.e. the DC voltage of VDC before the PFC inductance is less thanIn this case, as shown by calculation of four resistor voltage dividing circuits of the resistor R49, the resistor R50, the resistor R51 and the resistor R61, the driving voltage of the transistor Q20 is smaller than the on value 1V, the transistor Q20 is in the off state, and the voltage dividing relationship of the resistor R1, the resistor R4, the resistor R5 and the resistor R42 calculates the voltage vo_pfc=260 Vdc, which is smaller than the conventional voltage PFC 390Vdc.
As a preferred scheme of the circuit for reducing PFC loss of a high-power charger according to the present invention, the circuit comprises: when the input voltage is greater than 150Vac, i.e. the DC voltage of VDC before the PFC inductance is greater thanAt this time, the driving voltage of the transistor Q20 exceeds the on value 1V of the transistor Q20, the transistor Q20 is turned on, and the sum of the resistor R59 and the resistor R63 is connected in parallel to the fb_pfc lower voltage dividing resistor R42, so that the lower voltage dividing resistor becomes smaller, and the voltage vo_pfc of the capacitor EC1 is adjusted to 390Vdc under the condition that the resistance values of the upper voltage dividing resistor R1, the resistor R4 and the resistor R5 are unchanged.
As a preferred scheme of the circuit for reducing PFC loss of a high-power charger according to the present invention, the circuit comprises: when the U7 MCU detects that the total output power of each port is greater than 30W through an I2C protocol circuit, the MCU signal pin W/P outputs a high level, a W/P high level signal transmits a signal to Uo2B through an optical coupler Uo2A, a triode Q17 is opened, an auxiliary winding output voltage node VCC_AUX of the transformer is connected with a PFC switch MOS driving voltage node VCC_PFC, at the moment, a PFC switch MOS and a triode Q1 are opened, and a PFC circuit is opened;
when the U7 MCU detects that the total output power of each port is no-load or less than 30W light load through the I2C protocol circuit, the MCU signal pin W/P signal is closed, so that the PFC switch MOS and the triode Q1 are closed, and the whole PFC circuit is cut off at the moment.
Compared with the prior art:
aiming at the multi-port high-power charger, the PFC circuit is intelligently switched according to different working modes, so that the power loss of the PFC circuit is reduced, the conversion efficiency of the PFC main circuit is improved, the problems of low conversion efficiency and large heat productivity during simultaneous charging of multiple ports are solved, and the electric energy is further saved.
Drawings
FIG. 1 is a schematic diagram of a circuit structure according to the present invention;
fig. 2 is a schematic diagram of a circuit structure according to the present invention.
In the figure: the PFC inductor front VDC1, the BulK voltage vo_PFC2 of the capacitor EC1, PFC switch MOS driving voltage nodes VCC_PFC3 and FB_PFC4, a transformer auxiliary winding output voltage node VCC_AUX5, MCU signal pins W/P6 and an I2C protocol circuit 7.
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the present invention more apparent, embodiments of the present invention will be described in further detail below with reference to the accompanying drawings.
The invention provides a circuit for reducing PFC loss of a high-power charger, referring to FIGS. 1-2, comprising: the PFC inductor front VDC1, the triode Q20, the BulK voltage vo_PFC2 of the capacitor EC1, two groups of FB_PFC4, U7 MCU, an I2C protocol circuit 7, a transformer auxiliary winding output voltage node VCC_AUX5 and two groups of PFC switch MOS driving voltage nodes VCC_PFC3;
one end electric connection resistance R49 of VDC1 before PFC inductance, resistance R50, resistance R51 and resistance R61, triode Q20 electric connection is between resistance R51 and resistance R61, the one end electric connection resistance R1 of the Bulkvoltage vo_PFC2 of electric capacity EC1, resistance R4 and resistance R5, the one end electric connection resistance R42 of a set of FB_PFC4, the one end electric connection resistance R59 of another set of FB_PFC4, triode Q20 and resistance R63, the one end electric connection MCU signal foot W/P6 of U7 MCU, the one end of MCU signal foot W/P6 passes through opto-coupler Uo2A and connects Uo2B, the one end electric connection I2 PFC protocol circuit 7 of U7 MCU, a set of switch MOS drive voltage node VCC_PFC3 is connected through triode Q17 with transformer auxiliary winding output voltage node VCC_AUX5, the one end electric connection triode Q1 of another set of switch MOS drive voltage node VCC_PFC 3.
The front VDC1 of the PFC inductor is connected in series with a resistor R49, a resistor R50, a resistor R51 and a resistor R61, the BulK voltage vo_PFC2 of the capacitor EC1 is connected in series with the resistor R1, a resistor R4 and a resistor R5, the FB_PFC4 is connected in series with a resistor R59, a triode Q20 and a resistor R63, and one end of the resistor R61 is electrically connected with one end of the resistor R63.
1. The segmented PFC boost circuit reduces power loss during low-voltage boost and improves conversion efficiency;
1.1, when the ac input voltage is 90V-150Vac, that is, when the dc voltage of VDC1 is less than 160V before PFC inductance, the calculation by four resistor voltage dividing circuits of resistor R49, resistor R50, resistor R51 and resistor R61 shows that the driving voltage of triode Q20 (2N 7002T) is less than the on value 1V, and triode Q20 is in the off state, at this time, the voltage dividing relation of resistor R1, resistor R4, resistor R5 and resistor R42 calculates vo_pfc=260 VDC, which is less than the conventional PFC 390VDC buck PFC voltage, so that the boosting span is reduced and the power loss caused by boosting is reduced to the maximum extent; at the low voltage of 90V-150Vac, the voltage of the conventional PFC circuit BulK is fixedly boosted to 390Vdc, the efficiency of two ends of the BulK capacitor is 95%, and the optimized scheme can be improved to 97%;
1.2, when the alternating current input voltage is 150V-264Vac, namely when the direct current voltage of VDC1 is larger than 160V before PFC inductance, the driving voltage of the triode Q20 exceeds the conducting value 1V of the triode Q20, the triode Q20 is conducted, the sum of the resistor R59 and the resistor R63 is connected in parallel to the lower voltage dividing resistor R42 of the FB_PFC4 at the moment, the lower voltage dividing resistor becomes smaller, the BulK voltage vo_PFC2 of the capacitor EC1 can be adjusted to 390VDC along with the constant resistance of the upper voltage dividing resistor R1, the resistance of the resistor R4 and the resistance of the resistor R5, the efficiency of the two ends of the BulK capacitor can reach 97%, compared with the traditional PFC fixed boosting mode, the efficiency after PFC boosting can be intelligently adjusted by the segmented PFC boosting circuit, and the efficiency of the BulK capacitor can reach 97% when the high voltage and the low voltage are input.
2. According to different output loads, the MCU controls the switch PFC circuit, reduces light load loss and improves conversion efficiency;
when the U7 MCU (CSU 38F 20) detects that the total output power of each port is larger than 63W through an I2C protocol circuit 7 (I2C is a standard bidirectional interface, a controller (called a main controller) is used for communicating with slave equipment), the MCU signal pin W/P6 outputs a high level, a W/P high level signal is transmitted to Uo2B through an optical coupler Uo2A, a triode Q17 is opened, an auxiliary winding output voltage node VCC_AUX5 of a transformer is connected with a PFC switch MOS driving voltage node VCC_PFC3, a PFC switch MOS and a triode Q1 are opened at the moment, the PFC circuit is opened, the power loss of current in a lower-level circuit is reduced through PFC boosting when heavy load is output, and the conversion efficiency when heavy load is increased;
when the U7 MCU detects that the total output power of each port is no-load or less than 60W light load through the I2C protocol circuit 7, the MCU signal pin W/P6 signal is closed, so that the PFC switch MOS and the triode Q1 are turned off, and the whole PFC circuit is cut off at the moment, and the PFC circuit also has loss, so that the standby power consumption in no-load and the power loss in light load can be reduced by turning off the PFC circuit when no-load or less than 60W light load is carried out.
Although the invention has been described hereinabove with reference to embodiments, various modifications thereof may be made and equivalents may be substituted for elements thereof without departing from the scope of the invention. In particular, the features of the disclosed embodiments may be combined with each other in any manner as long as there is no structural conflict, and the exhaustive description of these combinations is not given in this specification merely for the sake of omitting the descriptions and saving resources. Therefore, it is intended that the invention not be limited to the particular embodiment disclosed, but that the invention will include all embodiments falling within the scope of the appended claims.
Claims (4)
1. A circuit for reducing PFC losses in a high power charger, comprising:
the PFC inductor comprises a PFC inductor front VDC (1), wherein one end of the PFC inductor front VDC (1) is electrically connected with a resistor R49, a resistor R50, a resistor R51 and a resistor R61;
a triode Q20, wherein the triode Q20 is electrically connected between the resistor R51 and the resistor R61;
one end of the BulK voltage vo_PFC (2) of the capacitor EC1 is electrically connected with a resistor R1, a resistor R4 and a resistor R5;
two groups of FB_PFC (4), one end of one group of FB_PFC (4) is electrically connected with a resistor R42, and one end of the other group of FB_PFC (4) is electrically connected with a resistor R59, a triode Q20 and a resistor R63;
the U7 MCU is electrically connected with the MCU signal pin W/P (6) at one end of the U7 MCU, and one end of the MCU signal pin W/P (6) is connected with the Uo2B through the optical coupler Uo 2A;
an I2C protocol circuit (7), wherein one end of the U7 MCU is electrically connected with the I2C protocol circuit (7);
the output voltage node VCC_AUX (5) of the auxiliary winding of the transformer;
two groups of PFC switch MOS driving voltage nodes VCC_PFC (3), one group of PFC switch MOS driving voltage nodes VCC_PFC (3) is connected with an output voltage node VCC_AUX (5) of the auxiliary winding of the transformer through a triode Q17, and one end of the other group of PFC switch MOS driving voltage nodes VCC_PFC (3) is electrically connected with a triode Q1;
when the input voltage is less than 150Vac, i.e. the DC voltage of the VDC (1) before the PFC inductance is less thanIn the process, as shown by calculation of four resistor voltage dividing circuits of the resistor R49, the resistor R50, the resistor R51 and the resistor R61, the driving voltage of the triode Q20 is smaller than the on value 1V, the triode Q20 is in the off state, and at this time, the voltage division relationship of the resistor R1, the resistor R4, the resistor R5 and the resistor R42 calculates vo_pfc=260 Vdc, which is smaller than the conventional PFC 390Vdc BulK voltage;
when the input voltage is greater than 150Vac, i.e. the DC voltage of the VDC (1) before the PFC inductance is greater thanWhen the driving voltage of the triode Q20 exceeds the conduction value 1V of the triode Q20, the triode Q20 is conducted, and the sum of the resistor R59 and the resistor R63 is connected in parallel to the lower voltage dividing resistor R42 of the FB_PFC (4) at the moment, so that the lower voltage dividing resistor is reduced, and under the condition that the resistance values of the upper voltage dividing resistor R1, the resistor R4 and the resistor R5 are unchanged, the BulK voltage vo_PFC (2) of the capacitor EC1 is adjusted to 390Vdc;
when the U7 MCU detects that the total output power of each port is greater than 30W through an I2C protocol circuit (7), the MCU signal pin W/P (6) outputs a high level, a W/P high level signal transmits a signal to Uo2B through an optical coupler Uo2A, a triode Q17 is opened, an auxiliary winding output voltage node VCC_AUX (5) of the transformer is connected with a PFC switch MOS driving voltage node VCC_PFC (3), a PFC switch MOS and a triode Q1 are started at the moment, and a PFC circuit is opened;
when the U7 MCU detects that the total output power of each port is no-load or less than 30W light load through the I2C protocol circuit (7), the MCU signal pin W/P (6) signal is turned off, so that the PFC switch MOS and the triode Q1 are turned off, and the whole PFC circuit is cut off at the moment.
2. A circuit for reducing PFC losses in a high-power charger according to claim 1, in which the PFC inductor front VDC (1) is connected in series with a resistor R49, a resistor R50, a resistor R51 and a resistor R61.
3. A circuit for reducing PFC losses in a high-power charger according to claim 1, in which the voltage of the capacitor EC1, i.e. the voltage vo_pfc (2), is connected in series with the resistors R1, R4 and R5.
4. The circuit for reducing PFC loss of a high-power charger according to claim 1, wherein the fb_pfc (4) is connected in series with a resistor R59, a transistor Q20, and a resistor R63, and one end of the resistor R61 is electrically connected to one end of the resistor R63.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202211464229.1A CN115912584B (en) | 2022-11-22 | 2022-11-22 | Circuit for reducing PFC loss of high-power charger |
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| CN202211464229.1A CN115912584B (en) | 2022-11-22 | 2022-11-22 | Circuit for reducing PFC loss of high-power charger |
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| CN115912584A CN115912584A (en) | 2023-04-04 |
| CN115912584B true CN115912584B (en) | 2023-10-27 |
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2015196672A1 (en) * | 2014-06-26 | 2015-12-30 | 欧普照明股份有限公司 | Auxiliary power source circuit with power factor correction circuit, and control method and device therefor |
| CN113473674A (en) * | 2021-08-06 | 2021-10-01 | 深圳深川智能有限公司 | LED constant voltage power supply intelligent power PFC boost segmented control circuit |
| CN115149625A (en) * | 2022-06-23 | 2022-10-04 | 惠州市安宝科技有限公司 | Efficiency improving circuit of digital high-power charger |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9065327B2 (en) * | 2011-02-08 | 2015-06-23 | Lear Corporation | Efficiency optimized power converter with dual voltage power factor correction |
| US11463012B1 (en) * | 2021-03-16 | 2022-10-04 | Gan Systems Inc. | Architecture for multi-port AC/DC switching mode power supply |
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- 2022-11-22 CN CN202211464229.1A patent/CN115912584B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2015196672A1 (en) * | 2014-06-26 | 2015-12-30 | 欧普照明股份有限公司 | Auxiliary power source circuit with power factor correction circuit, and control method and device therefor |
| CN113473674A (en) * | 2021-08-06 | 2021-10-01 | 深圳深川智能有限公司 | LED constant voltage power supply intelligent power PFC boost segmented control circuit |
| CN115149625A (en) * | 2022-06-23 | 2022-10-04 | 惠州市安宝科技有限公司 | Efficiency improving circuit of digital high-power charger |
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