CN115905075A - Method and system for realizing SMBus transmission - Google Patents
Method and system for realizing SMBus transmission Download PDFInfo
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- CN115905075A CN115905075A CN202111159977.4A CN202111159977A CN115905075A CN 115905075 A CN115905075 A CN 115905075A CN 202111159977 A CN202111159977 A CN 202111159977A CN 115905075 A CN115905075 A CN 115905075A
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Abstract
A method and system for implementing SMBus transfer between an I2C-only master and an SMBus-enabled slave are provided. The control line and the data line of the master device are connected with the control line and the data line of the slave device, respectively, the master device is provided with an external interrupt pin, and the external interrupt pin is connected with the alarm signal line of the slave device. The method comprises the following steps: in a normal working mode, control lines and data lines of the master device and the slave device output floating through pull-up resistors, and a start mark, an end mark and response are realized through an I2C communication mode; in the alarm mode, the level of an alarm signal line of the slave device is pulled low; the master device initiates access to the alarm address upon detecting a level-down edge at an external interrupt pin; and when the slave device receives the alarm address, the address of the slave device is transmitted back to the master device through an I2C communication mode. The invention enables the main device only supporting I2C to use SMBus to communicate with the auxiliary device, and satisfies the alarm function of SMBus.
Description
Technical Field
The embodiment of the invention relates to the technical field of system management communication, in particular to a method and a system for realizing SMBus transmission.
Background
The System Management Bus (SMbus) was originally proposed by Intel corporation. This specification is now managed and maintained by SBS-IF (Smart Battery System-Implementers Forum). This specification is simplified by an Inter-Integrated Circuit (ic) bus 90 from Philips (Philips). The SMbus is composed of two signal lines. The method is used for communication between equipment with a slower speed on the system and the power management equipment. So that the system can obtain the manufacturer, model, some control information, error information and status of these devices.
These two signal lines are SMBCLK and SMBDATA. This is the same as the Clock line Clock (SCL) and Data line Data (SDA) on I2C.
SMbus: different devices are connected to the same Bus. There is only one Master (Master) on SMbus. All commands are issued by this Master. Other Slave devices (Slave) can only receive commands or reply data sent by the Master to the Master.
SMbus start and end: a command to start an SMbus is indicated when SCL is high and SDA is changed from high to low. A command to end an SMbus is indicated when SCL is high and SDA goes low to high. These two states are unique in Smbus. Neither is it possible to occur when data is generally transmitted. The data that is normally transmitted is determined by the state of the SDA at each rising edge of the SCL. The data includes information for arbitrating, acknowledging, sending data to, or retrieving data from a device.
With respect to the I2C Bus and SMBus, many people rarely talk about and understand the detail difference between the two, and include many foreign brief documents, which are often written together, described in a mixed way and used alternately.
Indeed, under the general application, the I2C Bus and the SMBus have no great difference, and have almost no difference from the physical connection, and even if the two are directly connected, the two can be mutually communicated and operated correctly without error. However, if the actual difference between the two is not obvious to the electronic design engineer, it will be troublesome in the verification and debugging stage of the development design at a later time.
Currently, all devices support the smbus protocol, and some devices support the smbus protocol but the interfaces have vulnerabilities and are difficult to use. The i2c protocol is high in popularity and mature in interface.
Disclosure of Invention
In order to solve the above-mentioned problems in the prior art, in a first aspect, an embodiment of the present invention provides a method of implementing an SMBus transmission performed between a master device supporting only I2C and a slave device supporting SMBus, wherein a control line of the master device is connected to a control line of the slave device, a data line of the master device is connected to a data line of the slave device, the master device is provided with an external interrupt pin, and the external interrupt pin is connected to an alarm signal line of the slave device, the method including:
in the normal mode of operation of the device,
the control line and the data line of the master device and the control line and the data line of the slave device output floating through pull-up resistors, and the master device and the slave device realize a start mark, an end mark and a response through an I2C communication mode;
in the case of the alarm mode, it is,
pulling a level of an alarm signal line of the slave device low, thereby causing a level at the external interrupt pin of the master device to drop;
the master device initiating access to an alarm address upon detecting a level-down edge at the external interrupt pin;
and responding when the slave equipment receives the alarm address, and transmitting the address of the slave equipment back to the master equipment in an I2C communication mode.
In some embodiments, the communication frequency of the master device and the slave device is set to the intersection operating frequency of I2C and SMBus.
In some embodiments, the master device and the slave device communicate at a frequency of 10kHz.
In some embodiments, the method includes in the normal operating mode, after the level of the control line of the master device is lowered, retaining data on the data line of the master device for 300ns.
In a second aspect, embodiments of the present invention propose a system for enabling SMBus transport, the system comprising a master device supporting only I2C and a slave device supporting SMBus. The control line of the master device is connected with the control line of the slave device; the data line of the master device is connected with the data line of the slave device; the master device is equipped with an external interrupt pin that is connected with an alarm signal line of the slave device. The master device is configured to: under a normal working state, a control line and a data line of the main device output floating through a pull-up resistor, and a start mark, an end mark and response are realized through an I2C communication mode; in an alert mode, upon detecting a level-down edge at the external interrupt pin, access to an alert address is initiated and the slave device's address transmitted by the slave device is received via I2C communication. The slave device is to: under a normal working state, a control line and a data line of the slave device output floating through a pull-up resistor, and a start mark, an end mark and response are realized through an I2C communication mode; in an alarm mode, the level of the alarm signal line is pulled down, and when the alarm address sent by the master device is received, the address of the slave device is transmitted back to the master device through an I2C communication mode.
In some embodiments, the communication frequency of the master device with the slave device is set to the intersection operating frequency of I2C and SMBus.
In some embodiments, the master device and the slave device communicate at a frequency of 10kHz.
In some embodiments, the master device is further configured to: in the normal operation mode, after the level of the control line of the master device is lowered, the data on the data line of the master device is continuously retained for 300ns.
The SMBus transmission method and system provided by the embodiment of the invention meet SMBus communication conditions by modifying hardware I2C level high-low determination, current, time sequence, response conditions and the like through software, and then realize an alarm function through an additional connecting line and an additional program, so that a master device only supporting I2C can use the SMBus to communicate with a slave device.
By the method and the system for realizing SMBus transmission, SMBus communication can be completed under the condition that the main equipment does not support SMBus but supports I2C. The complete SMBus protocol is realized on the basis of hardware only supporting an I2C protocol, the I2C protocol is restricted by software to meet the requirements of an SMBus level protocol and the like, and the alarm function of the SMBus is met by writing programs and adding leads.
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The above and other objects, features and advantages of embodiments of the present invention will become readily apparent from the following detailed description read in conjunction with the accompanying drawings. Several embodiments of the invention are illustrated by way of example, and not by way of limitation, in the figures of the accompanying drawings and in which:
FIG. 1 illustrates a flow diagram of a method of implementing SMBus transmission according to an embodiment of the present invention;
fig. 2 shows a schematic diagram of data line retention time in a method of implementing SMBus transmission according to an embodiment of the present invention.
In the drawings, the same or corresponding reference numerals indicate the same or corresponding parts.
Detailed Description
The principles and spirit of the present invention will be described with reference to a number of exemplary embodiments. It is understood that these embodiments are given solely for the purpose of enabling those skilled in the art to better understand and to practice the invention, and are not intended to limit the scope of the invention in any way.
In one aspect, an embodiment of the present invention provides a method of implementing SMBus (System Management Bus) transmission performed between a master device supporting only an I2C (Inter-Integrated Circuit Bus) and a slave device supporting SMBus, wherein a control line of the master device is connected to a control line of the slave device, a data line of the master device is connected to a data line of the slave device, the master device is provided with an external interrupt pin, and the external interrupt pin is connected to an alarm signal line of the slave device.
For example, the master (master) device selects stm32 (supporting only I2C), and the slave (slave) device selects lm73 (supporting SMBus), pca9575 (supporting only I2C). stm32 sets a pin as an external interrupt, scl (control line) and sda (data line) signal lines of lm73 and pca9575 are connected to scl (control line) and sda (data line) signal lines of stm32, and an alert signal line of lm73 is connected to the external interrupt pin of stm32, and then an alert function is implemented through an additional wire and an additional program, so that the master device supporting only I2C can communicate with the slave device using SMBus.
Referring to fig. 1, a flow diagram of a method of implementing SMBus transmission is shown, according to an embodiment of the present invention. As shown in fig. 1, the method comprises the steps of:
in a normal operation mode, the control line and the data line of the master device and the control line and the data line of the slave device output floating through a pull-up resistor, and the master device and the slave device realize a start mark, an end mark and a response through an I2C communication mode.
In the case of the alarm mode, it is,
pulling the level of the alarm signal line of the slave device low, thereby causing the level at the external interrupt pin of the master device to drop;
the master device initiates access to the alarm address upon detecting a level-down edge at an external interrupt pin;
and when the slave device receives the alarm address, responding, and transmitting the address of the slave device back to the master device through the I2C communication mode.
In other words, the most basic data transmission is realized by hardware I2C, the functions of start flag, end flag, response and the like are realized by hardware I2C, the alarm function is realized by software supplementation, a line is added as an ALERT bit, one end of the line is connected to the alarm signal of the slave device (supporting SMBus), the other end of the line is connected to the external interrupt signal of the master device (only I2C is supported), the master device and the slave device output floating on scl and sda signal lines in normal operation, scl and sda signal lines are pulled high by pull-up resistors, when the slave device uses the alarm function, the slave device pin output is strong, the alarm signal conductor level is pulled low, then the master device initiates an access to the alarm address (the address is a fixed address, and only the device which pulls down the alarm signal responds), applies for the device response of the alarm function, and sends the own address back to the master device through the I2C function.
As an embodiment of the invention, the communication frequency of the master device and the slave device is set as the intersection operation frequency of I2C and SMBus.
For the operating frequency, I2C is quite abundant in this respect, with the lowest frequency being up to 0Hz (direct current condition, equal to time pause), up to 100kHz (standard mode), 400kHz (fast mode), or even 3.4MHz (telling the mode, the relative SMBus is very limited, slowest not slower than 10kHz, fastest not faster than 100khz. The intersection of I2C and SMBus operating frequency is between 10kHz and 100kHz.
As a specific example, the communication frequency of the master device and the slave device may be set to 10kHz.
The SMBus maintains the operation frequency above 10kHz, mainly aims at managing and monitoring, and has the other purpose that whether the bus is in Idle (Idle) at present can be easily known as long as parameters are added under the condition of keeping a certain transmission speed for operation, STOP (STOP) signals in the transmission process are omitted from being detected one by one, or STOP detection is continuously kept and is assisted with extra parameter detection, so that the bus can be more effectively and quickly taken again after being Idle.
As an embodiment of the invention, the method includes that in the normal operation mode, after the level of the control line of the main device is lowered, the data on the data line of the main device is continuously reserved for 300ns.
Referring to fig. 2, there is shown a schematic diagram of data line retention time in a method of implementing SMBus transmission according to an embodiment of the present invention.
Since SMBus has a requirement on Data Hold Time (Data Hold Time), it is specified that after the level of the SMBCLK line drops, data on SMBDAT must be kept for 300nS, but I2C has no same mandatory requirement for this. Therefore, the embodiment of the invention meets the requirement of the SMBus by correspondingly setting the data holding time in transmission, and can transmit data with the slave equipment supporting the SMBus.
In a second aspect, embodiments of the present invention provide a system for implementing SMBus transfer, which includes a master device supporting only I2C and a slave device supporting SMBus. The control line of the master device is connected with the control line of the slave device; the data line of the master device is connected with the data line of the slave device; the master device is equipped with an external interrupt pin that is connected with an alarm signal line of the slave device.
The master device may be configured to: under a normal working state, a control line and a data line of the main device output floating through a pull-up resistor, and a start mark, an end mark and response are realized through an I2C communication mode; in the alarm mode, when a level falling edge at an external interrupt pin is detected, initiating access to an alarm address and receiving an address of a slave device transmitted by the slave device through an I2C communication mode;
the slave device may be configured to: under a normal working state, a control line and a data line of the slave device output floating through a pull-up resistor, and a start mark, an end mark and response are realized through an I2C communication mode; in the alarm mode, the level of the alarm signal line is pulled down, and when an alarm address sent by the master device is received, the address of the slave device is transmitted back to the master device through the I2C communication mode.
As an embodiment of the invention, the communication frequency of the master device and the slave device is set as the intersection operation frequency of I2C and SMBus.
As an embodiment of the present invention, the communication frequency of the master device and the slave device is set to 10kHz.
As an embodiment of the present invention, the master device is further configured to: in the normal operation mode, after the level of the control line of the master device is lowered, the data on the data line of the master device is continuously retained for 300ns.
The SMBus transmission method and system provided by the embodiment of the invention meet SMBus communication conditions by modifying hardware I2C level high-low determination, current, time sequence, response conditions and the like through software, and then realize an alarm function through an additional connecting line and an additional program, so that a master device only supporting I2C can use the SMBus to communicate with a slave device.
By the method and the system for realizing SMBus transmission, SMBus communication can be completed under the condition that the main device does not support SMBus but supports I2C. The complete SMBus protocol is realized on the basis of hardware only supporting an I2C protocol, the I2C protocol is restricted by software to meet the requirements of an SMBus level protocol and the like, and the alarm function of the SMBus is met by writing programs and adding leads.
The foregoing description of the embodiments of the invention has been presented for purposes of illustration and description, and is not intended to be exhaustive or to limit the invention to the precise forms disclosed. It will be understood by those skilled in the art that various changes may be made and equivalents may be substituted for elements thereof without departing from the scope of the invention. In addition, many modifications may be made to adapt a particular situation or material to the teachings of the invention without departing from the essential scope thereof. Therefore, it is intended that the invention not be limited to the particular embodiment disclosed as the best mode contemplated for carrying out this invention, but that the invention will include all embodiments falling within the scope of the appended claims.
Claims (8)
1. A method of implementing an SMBus transfer between an I2C only enabled master device and an SMBus enabled slave device, wherein control lines of the master device are connected to control lines of the slave device, data lines of the master device are connected to data lines of the slave device, the master device is equipped with an external interrupt pin, the external interrupt pin is connected to an alarm signal line of the slave device, the method comprising:
in the normal mode of operation of the device,
the control line and the data line of the master device and the control line and the data line of the slave device output floating through pull-up resistors, and the master device and the slave device realize a start mark, an end mark and a response through an I2C communication mode;
in the case of the alarm mode, it is,
pulling a level of an alarm signal line of the slave device low, thereby causing a level at the external interrupt pin of the master device to drop;
the master device initiating access to an alarm address upon detecting a level-down edge at the external interrupt pin;
and when the slave equipment receives the alarm address, responding, and transmitting the address of the slave equipment back to the master equipment in an I2C communication mode.
2. The method of claim 1, wherein a communication frequency of the master device and the slave device is set to an intersection operating frequency of I2C and SMBus.
3. The method of claim 2, wherein the master device and the slave device communicate at a frequency of 10kHz.
4. The method of claim 1, comprising retaining data on the data lines of the master device for 300ns after the level of the control lines of the master device is lowered in the normal operating mode.
5. A system for realizing SMBus transmission, the system comprising a master device supporting only I2C and a slave device supporting SMBus,
the control line of the master device is connected with the control line of the slave device;
the data line of the master device is connected with the data line of the slave device;
the master device is provided with an external interrupt pin which is connected with an alarm signal line of the slave device;
the master device is configured to: under a normal working state, a control line and a data line of the main equipment output floating through a pull-up resistor, and a start mark, an end mark and response are realized through an I2C communication mode; in an alarm mode, upon detecting a level falling edge at the external interrupt pin, initiating access to an alarm address and receiving an address of the slave device transmitted by the slave device through an I2C communication manner;
the slave device is to: under a normal working state, a control line and a data line of the slave device output floating through a pull-up resistor, and a start mark, an end mark and response are realized through an I2C communication mode; in an alarm mode, the level of the alarm signal line is pulled down, and when the alarm address sent by the master device is received, the address of the slave device is transmitted back to the master device through an I2C communication mode.
6. The system of claim 5, wherein the communication frequency of the master device with the slave device is set to the intersection operating frequency of I2C and SMBus.
7. The system of claim 6, wherein the master device and the slave device communicate at a frequency of 10kHz.
8. The system of claim 5, wherein the master device is further configured to: in the normal operation mode, after the level of the control line of the master device is lowered, the data on the data line of the master device is continuously retained for 300ns.
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| CN202111159977.4A CN115905075A (en) | 2021-09-30 | 2021-09-30 | Method and system for realizing SMBus transmission |
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