CN115877651A - Mask plate layout correction method and system and mask plate - Google Patents
Mask plate layout correction method and system and mask plate Download PDFInfo
- Publication number
- CN115877651A CN115877651A CN202211656410.2A CN202211656410A CN115877651A CN 115877651 A CN115877651 A CN 115877651A CN 202211656410 A CN202211656410 A CN 202211656410A CN 115877651 A CN115877651 A CN 115877651A
- Authority
- CN
- China
- Prior art keywords
- graph
- distance
- target main
- value
- auxiliary
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Abstract
The invention provides a method and a system for correcting a mask plate layout and a mask plate, wherein the method comprises the following steps: s1, acquiring technical node information and process level information of a layout to determine a target main graph needing to add an auxiliary graph on an adjacent side; s2, calculating the distance from the target main pattern to the main pattern adjacent to the target main pattern and recording the distance as an initial distance value; calculating the width value of the target main graph; s3, generating an initial auxiliary graph on the adjacent side of the target main graph according to the width value and the initial distance value of the target main graph; s4, calculating the distance from the target main graph to the graph adjacent to the target main graph and recording the distance as a corrected distance value; judging whether the corrected distance value meets the optimization condition; s5, when the correction distance value meets the optimization condition, adjusting the quantity value of the auxiliary graph and/or adjusting the width value of the auxiliary graph, and repeatedly executing the S4 until the correction distance value does not meet the optimization condition any more; and S6, carrying out overexposure check on the auxiliary pattern. The method is used for increasing the photoetching process window of the mask plate.
Description
Technical Field
The invention relates to the technical field of semiconductor manufacturing, in particular to a mask plate layout correction method and system and a mask plate.
Background
With the increase of circuit integration and scale, the size of unit devices in the circuit is continuously reduced, and the requirements on the integrated circuit manufacturing process are continuously increased, for example, the Critical Dimension (CD) is continuously reduced, and the requirements on the lithography resolution in the chip manufacturing are higher and higher.
In order to solve the problem of the resolution limit of the traditional photoetching, the prior art adds a sub-resolution auxiliary pattern which is smaller than the resolution limit around a photoetching pattern. When the auxiliary pattern is added, the auxiliary pattern is usually added on the basis of rules to meet the requirements of the exposure process. The addition of the auxiliary pattern affects the precision and quality of the photolithography process, and further affects the yield of the semiconductor device.
However, in the prior art, after the auxiliary pattern is added around the main pattern, the light intensity distribution around the main pattern is easily uneven, the problem of small photoetching process window exists, the problem of open circuit or short circuit of the device is easily caused, the product yield is low, and the process risk is large. Therefore, a novel method and system for correcting mask layout and a mask are needed to improve the above problems.
Disclosure of Invention
The invention aims to provide a mask plate layout correction method and system and a mask plate, and the method is used for enlarging a photoetching process window of the mask plate.
In a first aspect, the present invention provides a method for correcting a mask layout, which is used for adding an auxiliary pattern between main patterns of the mask layout, and comprises the following steps: s1, acquiring technical node information and process level information of a layout to determine a target main graph needing to add an auxiliary graph on an adjacent side; s2, calculating the distance from the target main graph to the main graph adjacent to the target main graph and recording the distance as an initial distance value; calculating a width value of the target main graph; s3, generating an initial auxiliary graph on the adjacent side of the target main graph according to the width value of the target main graph and the initial distance value; s4, calculating the distance from the target main graph to the graph adjacent to the target main graph and recording the distance as a corrected distance value; judging whether the corrected distance value meets an optimization condition; s5, when the corrected distance value meets the optimization condition, adjusting the quantity value of the auxiliary graph and/or adjusting the width value of the auxiliary graph, and repeatedly executing the S4 until the corrected distance value does not meet the optimization condition any more; s6, carrying out overexposure inspection on the auxiliary graph; and when the overexposure check is unqualified, reducing the width value of the auxiliary graph when the step S5 is executed, and repeatedly executing the steps S4-S5 until the overexposure check is qualified.
The method has the beneficial effects that: the method comprises the steps of determining a target main graph needing to be added with an auxiliary graph on an adjacent side by acquiring technical node information and process level information of a layout; calculating the distance from the target main graph to the main graph adjacent to the target main graph and recording the distance as an initial distance value; calculating a width value of the target main graph; generating an initial auxiliary graph on the adjacent side of the target main graph according to the width value of the target main graph and the initial distance value; calculating the distance from the target main graph to the graph adjacent to the target main graph and recording the distance as a corrected distance value; judging whether the corrected distance value meets an optimization condition; and when the correction distance value meets the optimization condition, adjusting the quantity value of the auxiliary graph and the width value of the auxiliary graph, and repeatedly executing the steps until the correction distance value does not meet the optimization condition any more. The method and the device can improve the light intensity distribution around the main graph, obtain a better exposure profile, are beneficial to increasing the window of the photoetching process, improve the yield of products and reduce the process risk. Because the main pattern and the auxiliary pattern are both positioned on the same mask plate, the material required by the mask plate can be saved, and the production efficiency of the mask plate is improved.
Optionally, step S2 includes calculating a distance from the first edge of the target main pattern to the main pattern adjacent thereto and recording the distance as a first initial distance value; calculating the distance from the second edge of the target main graph to the main graph adjacent to the second edge of the target main graph and recording the distance as a second initial distance value; and calculating the distance from the first edge of the target main graph to the second edge of the target main graph, namely the width value of the target main graph. The method has the advantages that the distance from the two edges of the target main graph to the adjacent main graph is obtained, more detailed main graph distribution information around the target main graph can be obtained, and subsequent graph optimization is facilitated.
Optionally, step S4 includes calculating a distance from the first edge of the target main pattern to the adjacent pattern and recording the distance as a first corrected distance value; and calculating the distance from the second edge of the target main graph to the graph adjacent to the second edge and recording the distance as a second corrected distance value. The method has the advantages that the distance from two sides of the target main graph to the adjacent main graph or auxiliary graph is obtained, distribution information of the main graph or auxiliary graph which is more detailed around the target main graph can be obtained, and subsequent graph optimization is facilitated.
Optionally, the optimization condition is set to satisfy:
wherein L21 is the first corrected distance value, L22 is the second corrected distance value, W is the width value of the target main pattern, and m is a constant greater than zero. The method has the beneficial effects that the optimization condition is provided by the embodiment, so that the target main graph with the distance from two edges to the adjacent main graph or auxiliary graph meeting the optimization condition is screened.
Optionally, step S5 includes increasing the number value of the auxiliary patterns on the basis of satisfying the plate-making rule; or on the basis of meeting the plate-making rule, increasing the width value of the auxiliary graph; or increasing the quantity value and the width value of the auxiliary graph on the basis of meeting the plate making rule. The method has the advantage that the auxiliary graph is corrected to the state that optimization is not needed any more.
Optionally, step S6 includes, on the basis of satisfying the plate-making rule, reducing the width value of the auxiliary pattern; or on the basis of meeting the plate-making rule, increasing the quantity value of the auxiliary graph and reducing the width value of the auxiliary graph. The method has the advantage that the embodiment realizes further correction of the auxiliary pattern so as to enable the overexposure check of the auxiliary pattern to be qualified.
Optionally, in step S6, performing overexposure inspection on the auxiliary pattern, including performing overexposure inspection on a layout region outside the main pattern, where an upper limit of light intensity is set to be a times of an optical exposure threshold, where a is a positive number arbitrarily smaller than 1.
Optionally, step S6 further includes invoking the lithography compound model, performing process window inspection on the process fluctuation bandwidth of the current main pattern, and setting an upper limit of the fluctuation bandwidth to be B times of a key size value of the main pattern, where B is a positive number arbitrarily smaller than 1. The method has the beneficial effects that the process window inspection of the main pattern is realized, so that the size of the process window of the main pattern meets the photoetching requirement.
In a second aspect, the present invention provides a system for correcting a mask layout, which is used in the method of any one of the first aspects, and includes: the processing unit is used for executing the step S1, acquiring technical node information and process level information of the layout to determine a target main graph needing to add the auxiliary graph on the adjacent side; the processing unit is further used for executing the step S2, calculating the distance from the target main pattern to the main pattern adjacent to the target main pattern and recording the distance as an initial distance value; calculating a width value of the target main graph; the processing unit is further configured to perform step S3, and generate an initial auxiliary graph on an adjacent side of the target main graph according to the width value of the target main graph and the initial distance value; the processing unit is further used for executing the step S4, calculating the distance from the target main graph to the graph adjacent to the target main graph and recording the distance as a corrected distance value; judging whether the corrected distance value meets an optimization condition; the processing unit is further configured to execute step S5, when the corrected distance value satisfies the optimization condition, adjust a quantity value of the auxiliary pattern and adjust a width value of the auxiliary pattern, and repeatedly execute step S4 until the corrected distance value no longer satisfies the optimization condition; the processing unit is further used for executing the step S6, calling an optical model and carrying out overexposure inspection on the auxiliary graph; when the overexposure inspection is unqualified, reducing the width value of the auxiliary graph when the step S5 is executed, and repeatedly executing the steps S4-S5 until the overexposure inspection is qualified; and the storage unit is used for storing the initial distance value, the corrected distance value, the width value of the target main graph, the quantity value of the auxiliary graphs and the width value of the auxiliary graphs.
In a third aspect, the present invention provides a reticle formed using the method of any one of the first aspects.
In a fourth aspect, the invention provides an apparatus comprising a memory and a processor, the memory having stored thereon a program executable on the processor, the program, when executed by the processor, causing the apparatus to carry out the method of any one of the first aspects.
In a fifth aspect, the present invention provides a readable storage medium having a program stored therein, which when executed, implements the method of any of the first aspects.
Drawings
Fig. 1 is a schematic flow chart of a method for correcting a mask layout according to the present invention;
FIG. 2 is a schematic structural diagram of an initial auxiliary pattern in a layout according to the present invention;
FIG. 3 is a schematic structural diagram of a corrected auxiliary pattern in a layout according to the present invention;
FIG. 4 is a schematic diagram of a modification system according to the present invention;
fig. 5 is a schematic structural diagram of an apparatus provided in the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention. Unless defined otherwise, technical or scientific terms used herein shall have the ordinary meaning as understood by one of ordinary skill in the art to which this invention belongs. As used herein, the word "comprising" and similar words are intended to mean that the element or item listed before the word covers the element or item listed after the word and its equivalents, but does not exclude other elements or items.
Fig. 1 is a schematic flow chart of a method for correcting a mask layout according to the present invention. Fig. 2 is a schematic structural diagram of an initial auxiliary pattern in a layout according to the present invention.
Aiming at the problems in the prior art, as shown in fig. 1 and 2, the invention provides a method for correcting a mask plate layout, which is used for adding an auxiliary graph between main graphs of the layout and comprises the following steps: s1, obtaining technical node information and process level information of a layout to determine a target main graph needing to be added with an auxiliary graph on an adjacent side. And S2, calculating the distance from the target main graph to the main graph adjacent to the target main graph and recording the distance as an initial distance value. And calculating the width value of the target main graph. And S3, generating an initial auxiliary graph on the adjacent side of the target main graph according to the width value of the target main graph and the initial distance value. And S4, calculating the distance from the target main graph to the graph adjacent to the target main graph and recording the distance as a corrected distance value. And judging whether the corrected distance value meets an optimization condition. And S5, when the corrected distance value meets the optimization condition, adjusting the quantity value of the auxiliary graph and/or adjusting the width value of the auxiliary graph, and repeatedly executing the step S4 until the corrected distance value does not meet the optimization condition any more. And S6, carrying out overexposure inspection on the auxiliary pattern. And when the overexposure check is unqualified, reducing the width value of the auxiliary graph when the step S5 is executed, and repeatedly executing the steps S4-S5 until the overexposure check is qualified.
Referring to fig. 2, specifically, before adding the auxiliary patterns, the layout includes 9 main patterns. The main patterns are square, and a plurality of main patterns are arranged in a matrix shape with 3 rows and 3 columns. Traversing each main graph in the layout to determine a target main graph; the target main pattern is determined by the width of the current main pattern and the distance from the right side E1 of the current main pattern to the main pattern adjacent to the right side E1. The initial auxiliary patterns are 3 rectangles arranged in a column, and each initial auxiliary pattern correspondingly occupies one row of the matrix.
In other specific embodiments, the target main pattern is determined according to the width of the current main pattern and the distance from the left side E2 of the current main pattern to the main pattern adjacent to the left side E2.
It is worth noting that both the main and auxiliary patterns can be any planar geometric pattern that does not violate plate-making rules. Several main patterns may be distributed in any form over the plane of the layout. The present embodiment inserts the auxiliary patterns between the main patterns according to the width of the main patterns and the distance between the main patterns. The basis for determining the target main graph can be the length of the current main graph and the distance from any side of the current main graph to the main graph adjacent to the side.
It should be noted that, in actual tape-out, the process has instability, such as fluctuation of the exposure energy and focus value of the lithography machine, which is difficult to control at a constant correct value, which may cause the dimension deviation of the exposure pattern, especially the main pattern with small process window is more susceptible to exposure. The auxiliary graph is a sub-resolution auxiliary graph which is smaller than the resolution of the photoetching machine, plays a role in scattering light and is used for assisting the exposure of the main graph, and the influence of energy disturbance on the size of the exposed graph is reduced by enabling the light-transmitting graphs around the main graph to be uniformly distributed and increasing the process window of the main graph.
The method has the beneficial effects that: the method determines a target main graph needing to be added with the auxiliary graph on the adjacent side by acquiring the technical node information and the process level information of the layout. And calculating the distance from the target main graph to the main graph adjacent to the target main graph and recording the distance as an initial distance value. And calculating the width value of the target main graph. And generating an initial auxiliary graph on the adjacent side of the target main graph according to the width value of the target main graph and the initial distance value. And calculating the distance from the target main graph to the graph adjacent to the target main graph and recording the distance as a corrected distance value. And judging whether the corrected distance value meets an optimization condition. And when the corrected distance value meets the optimization condition, adjusting the quantity value of the auxiliary graph and the width value of the auxiliary graph, and repeatedly executing the steps until the corrected distance value does not meet the optimization condition any more. The method and the device can improve the light intensity distribution around the main graph, obtain a better exposure profile, are beneficial to increasing the photoetching process window, improve the product yield and reduce the process risk. Because main figure and auxiliary graph all are located same mask version, can practice thrift and make the required material of mask version, promote the production efficiency of mask version.
In some embodiments, step S2 includes calculating and recording as a first initial distance value a distance of a first edge of the target primary graphic to a primary graphic adjacent thereto. The distance from the second edge of the target master pattern to its neighboring master pattern is calculated and recorded as a second initial distance value. And calculating the distance from the first edge of the target main graph to the second edge of the target main graph, namely the width value of the target main graph. The distance from two edges of the target main graph to the adjacent main graph is obtained, more detailed main graph distribution information around the target main graph can be obtained, and subsequent graph optimization is facilitated.
Specifically, the first side of the target main pattern is set as the right side E1 of the target main pattern. The second side of the target main graph is set as the left side E2 of the target main graph. The distance from the right side E1 to the left side E2 is the width W of the target main pattern. The distance from the right side E1 to the adjacent main pattern on the right side of the target main pattern is L11. The distance from the left side E2 to the adjacent main pattern on the left side of the target main pattern is L12.
In other specific embodiments, the first side of the target host pattern is set as the top side E1 of the target host pattern. The second side of the target host pattern is set as the bottom side E2 of the target host pattern. The distance from the top side E1 to the bottom side E2 is the length W of the target main pattern. Top side E1 is a distance L11 from the top side of the target master pattern adjacent to the top side of the master pattern. The distance from the bottom side E2 to the bottom side of the target main pattern is L12.
It should be noted that the first side and the second side of the target main pattern may be set as any sides of the target main pattern as long as the first side and the second side are opposite to each other.
In some embodiments, step S4 includes calculating and recording a distance from a first edge of the target primary graphic to a graphic adjacent thereto as a first revised distance value. And calculating the distance from the second edge of the target main graph to the graph adjacent to the second edge and recording the distance as a second corrected distance value. The distance from two sides of the target main graph to the adjacent main graph or auxiliary graph is obtained, distribution information of the main graph or auxiliary graph which is more detailed around the target main graph can be obtained, and subsequent graph optimization is facilitated.
Specifically, after the auxiliary graph is added to the right side of the target main graph, the first corrected distance value is that the distance from the right side E1 to the adjacent graph on the right side of the target main graph is L21, and L21 is smaller than L11. The second corrected distance value is that the distance from the left side E2 to the adjacent graph on the left side of the target main graph is L22, and L22 is equal to L12.
In other specific embodiments, the auxiliary graphic may be added to the left side of the target main graphic, and the second modified distance value is L22 from the left side E2 to the adjacent graphic on the left side of the target main graphic, where L22 is smaller than L12.
In some embodiments, the optimization condition is set to satisfy:
wherein L21 is the first modified distance value, L22 is the second modified distance value, W is the width value of the target main pattern, and m is a constant greater than zero. The present embodiment provides an optimization condition to screen a target main pattern whose distance from two edges to an adjacent main pattern or auxiliary pattern satisfies the optimization condition.
Specifically, m is set to 8.
It is noted that m may also be any value greater than 0.
Fig. 3 is a schematic structural diagram of a correction auxiliary pattern provided by the present invention in a layout.
As shown in fig. 2 and 3, in some embodiments, step S5 includes increasing the magnitude of the auxiliary pattern on the basis of satisfying the plate-making rule. Or increasing the width value of the auxiliary graph on the basis of meeting the plate-making rule. Or increasing the quantity value and the width value of the auxiliary graph on the basis of meeting the plate making rule. The embodiment realizes the correction of the auxiliary graph to the state that the optimization is not needed any more.
Specifically, after the number value of the auxiliary patterns is increased, 1 column of 3 initial auxiliary patterns is split into 2 columns of 6 auxiliary patterns.
In other specific embodiments, 2 columns of 6 auxiliary patterns are divided into 3 columns of 9 auxiliary patterns on the basis of satisfying the plate-making rules.
In some specific embodiments, on the basis of satisfying the plate-making rule, the width of the initial auxiliary pattern is set as a, and after increasing the width value of the auxiliary pattern, the width of the auxiliary pattern is set as b, b is greater than a, and a is greater than 0.
In still other embodiments, 2 columns of 6 auxiliary graphics are split into 3 columns of 9 auxiliary graphics. Meanwhile, the width of each auxiliary pattern is modified from a to b, b is smaller than a, and a is larger than 0.
In some embodiments, step S6 includes reducing the width value of the auxiliary pattern on the basis of satisfying the plate-making rule. Or on the basis of meeting the plate-making rule, increasing the quantity value of the auxiliary graph and reducing the width value of the auxiliary graph. The embodiment realizes further correction of the auxiliary pattern to enable the overexposure check of the auxiliary pattern to be qualified.
Specifically, on the basis of meeting the plate making rule, the width of the overexposure auxiliary graph is corrected from b to c, wherein b is larger than c, c is larger than a, and a is larger than 0.
In other specific embodiments, 3 columns of 9 auxiliary patterns are divided into 4 columns of 12 auxiliary patterns on the basis of satisfying the plate-making rule. The width of the overexposure auxiliary pattern is corrected from b to c, wherein b is larger than c, c is smaller than a, and a is larger than 0.
In some embodiments, the length of the overexposure assistance pattern is modified from p to q, where p is greater than q and q is greater than 0, based on the plate making rules.
It is noted that the width of each auxiliary pattern may be different and the length of each auxiliary pattern may be different.
In some embodiments, in step S6, performing an overexposure check on the auxiliary pattern includes performing an overexposure check on a region of the layout other than the main pattern, and setting an upper limit of light intensity to be a times of an optical exposure threshold, where a is any positive number less than 1. In the embodiment, the corrected mask plate auxiliary pattern is prevented from imaging on the photoresist by setting the upper light intensity limit.
Specifically, the data required for training the optical model in step S6 includes: the width W of the target main pattern, the main pattern distance L11 from the right side edge E1 to the right side adjacent of the target main pattern, the main pattern distance L12 from the left side edge E2 to the left side adjacent of the target main pattern and the mask plate exposure result size. The a is set to 0.9.
It is worth noting that the data required for training the optical model in step S6 also includes the lithography conditions and the size of a series of main patterns and auxiliary patterns that can ensure the reliability of the model.
In some embodiments, step S6 further includes invoking the photolithography composite model, performing a process window check on the process fluctuation bandwidth of the current main pattern, and setting an upper limit of the fluctuation bandwidth to be B times the critical dimension value of the main pattern, where B is any positive number less than 1. According to the embodiment, the process window of the main pattern is checked, and the fluctuation bandwidth upper limit is set to avoid overlarge influence of process fluctuation on the size of the pattern, so that the process window of the main pattern meets the photoetching requirement.
Specifically, the photolithography composite model is a model in which chemical parameters of the photoresist are substituted. B was set to 5%.
In other specific embodiments, when the first type of photoresist is selected to perform the photolithography process, the chemical parameters corresponding to the first type of photoresist are substituted into the optical model of the first type of photoresist to obtain the first photolithography composite model.
In some specific embodiments, when the type of the photoresist selected to perform the photolithography process is changed from the first type to the second type, the chemical parameter corresponding to the second type of photoresist is substituted into the optical model of the second type of photoresist to obtain a second photolithography compound model.
Fig. 4 is a schematic structural diagram of a correction system according to the present invention.
As shown in fig. 4, the present invention provides a system for correcting a mask layout, which is used in the method in any one of the above embodiments, and includes: and the processing unit 32 is configured to execute step S1, obtain technical node information and process level information of the layout to determine a target main pattern to which an auxiliary pattern needs to be added on an adjacent side. The processing unit is further configured to perform step S2, calculate a distance from the target primary pattern to a primary pattern adjacent thereto and record the distance as an initial distance value. And calculating the width value of the target main graph. The processing unit is further configured to perform step S3, and generate an initial auxiliary graph on an adjacent side of the target main graph according to the width value of the target main graph and the initial distance value. The processing unit is further configured to perform step S4, calculate a distance from the target main pattern to a pattern adjacent thereto and record the distance as a corrected distance value. And judging whether the corrected distance value meets the optimization condition. And the processing unit is further used for executing the step S5, when the corrected distance value meets the optimization condition, adjusting the quantity value of the auxiliary graph and the width value of the auxiliary graph, and repeatedly executing the step S4 until the corrected distance value does not meet the optimization condition any more. And the processing unit is also used for executing the step S6, calling an optical model and carrying out overexposure inspection on the auxiliary graph. And when the overexposure check is unqualified, reducing the width value of the auxiliary graph when the step S5 is executed, and repeatedly executing the steps S4-S5 until the overexposure check is qualified. A storage unit 31 for storing the initial distance value, the corrected distance value, the width value of the target main pattern, the number value of the auxiliary patterns and the width value of the auxiliary patterns.
In particular, the processing unit 32 is configured as a processor. The storage unit 31 is provided as a memory.
The present invention provides a reticle formed using the method of any one of the first aspects.
Fig. 5 is a schematic structural diagram of an apparatus provided in the present invention.
As shown in fig. 5, the present invention provides an apparatus, comprising a memory 41 and a processor 42, wherein the memory 41 stores a program executable on the processor 42, and when the program is executed by the processor 42, the apparatus 4 is enabled to implement the method according to any one of the above embodiments.
In particular, the device 4 further comprises an electron beam writing engine 43. After the processor 42 corrects the layout by executing the above method, the electron beam writer 43 makes the blank mask plate into a corrected mask plate according to the corrected layout.
It should be noted that the processor in the present embodiment may be an image processing chip having a processing capability for an image signal. In implementation, the steps of the above method embodiments may be performed by integrated logic circuits of hardware in a processor or instructions in the form of software. The Processor may be a general purpose Processor, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), an off-the-shelf Programmable Gate Array (FPGA) or other Programmable logic device, discrete Gate or transistor logic device, or discrete hardware components. The methods disclosed in this embodiment may be implemented or performed.
It will be appreciated that the memory in this embodiment can be either volatile memory or nonvolatile memory, or can include both volatile and nonvolatile memory. The non-volatile Memory may be a Read-Only Memory (ROM), a Programmable ROM (PROM), an Erasable PROM (EPROM), an Electrically Erasable PROM (EEPROM), or a flash Memory. The volatile Memory may be a Random Access Memory (RAM) which functions as an external cache. By way of example, but not limitation, many forms of RAM are available, such as Static random access memory (Static RAM, SRAM), dynamic Random Access Memory (DRAM), synchronous Dynamic random access memory (Synchronous DRAM, SDRAM), double Data Rate Synchronous Dynamic random access memory (DDR SDRAM), enhanced Synchronous SDRAM (ESDRAM), synchronous link SDRAM (SLDRAM), and Direct Rambus RAM (DR RAM). It should be noted that the memory of the systems and methods described herein is intended to comprise, without being limited to, these and any other suitable types of memory.
The invention provides a readable storage medium having a program stored therein, which when executed, implements the method of any of the above embodiments.
Although the embodiments of the present invention have been described in detail hereinabove, it is apparent to those skilled in the art that various modifications and variations can be made to these embodiments. However, it is to be understood that such modifications and variations are within the scope and spirit of the present invention as set forth in the following claims. Moreover, the invention as described herein is capable of other embodiments and of being practiced or of being carried out in various ways.
Claims (10)
1. A correction method of a mask plate layout is used for adding an auxiliary graph between main graphs of the mask plate layout, and is characterized by comprising the following steps:
s1, acquiring technical node information and process level information of a layout to determine a target main graph needing to add an auxiliary graph on an adjacent side;
s2, calculating the distance from the target main graph to the main graph adjacent to the target main graph and recording the distance as an initial distance value; calculating a width value of the target main graph;
s3, generating an initial auxiliary graph on the adjacent side of the target main graph according to the width value of the target main graph and the initial distance value;
s4, calculating the distance from the target main graph to the graph adjacent to the target main graph and recording the distance as a corrected distance value; judging whether the corrected distance value meets an optimization condition;
s5, when the correction distance value meets the optimization condition, adjusting the quantity value of the auxiliary graph and/or adjusting the width value of the auxiliary graph, and repeatedly executing the step S4 until the correction distance value does not meet the optimization condition any more;
s6, calling an optical model, and carrying out overexposure inspection on the auxiliary graph; and when the overexposure check is unqualified, reducing the width value of the auxiliary graph when the step S5 is executed, and repeatedly executing the steps S4-S5 until the overexposure check is qualified.
2. The method according to claim 1, wherein step S2 comprises,
calculating the distance from the first edge of the target main graph to the main graph adjacent to the first edge of the target main graph and recording the distance as a first initial distance value;
calculating the distance from the second edge of the target main graph to the main graph adjacent to the second edge of the target main graph and recording the distance as a second initial distance value;
and calculating the distance from the first edge of the target main graph to the second edge of the target main graph, namely the width value of the target main graph.
3. The method according to claim 1, wherein step S4 comprises,
calculating the distance from the first edge of the target main graph to the graph adjacent to the first edge of the target main graph and recording the distance as a first corrected distance value;
and calculating the distance from the second edge of the target main graph to the graph adjacent to the second edge and recording the distance as a second corrected distance value.
4. The method of claim 3, wherein the optimization condition is set to satisfy:
wherein L21 is the first corrected distance value, L22 is the second corrected distance value, W is the width value of the target main pattern, and m is a constant greater than zero.
5. The method according to claim 1, wherein step S5 comprises,
increasing the quantity value of the auxiliary graph on the basis of meeting the plate making rule;
or on the basis of meeting the plate-making rule, increasing the width value of the auxiliary graph;
or increasing the quantity value and the width value of the auxiliary graph on the basis of meeting the plate making rule.
6. The method according to claim 1, wherein step S6 comprises,
on the basis of meeting the plate making rule, reducing the width value of the auxiliary graph;
or on the basis of meeting the plate-making rule, increasing the quantity value of the auxiliary graph and reducing the width value of the auxiliary graph.
7. The method according to claim 1, wherein in step S6, the auxiliary pattern is subjected to an overexposure check, comprising,
and carrying out overexposure inspection on the layout region except the main pattern, and setting the upper limit of light intensity to be A times of the optical exposure threshold, wherein A is any positive number smaller than 1.
8. The method of claim 1, wherein step S6 further comprises invoking the photolithography composite model, performing a process window check on the process fluctuation bandwidth of the current main pattern, and setting the fluctuation bandwidth upper limit to be B times the critical dimension value of the main pattern, where B is any positive number less than 1.
9. A system for correcting a reticle layout, for use in the method according to any one of claims 1 to 8, comprising:
the processing unit is used for executing the step S1, acquiring technical node information and process level information of the layout to determine a target main pattern needing to add the auxiliary pattern on the adjacent side; the processing unit is further used for executing the step S2, calculating the distance from the target main pattern to the main pattern adjacent to the target main pattern and recording the distance as an initial distance value; calculating a width value of the target main graph; the processing unit is further configured to perform step S3, generating an initial auxiliary graph on an adjacent side of the target main graph according to the width value of the target main graph and the initial distance value; the processing unit is further used for executing the step S4, calculating the distance from the target main graph to the graph adjacent to the target main graph and recording the distance as a corrected distance value; judging whether the corrected distance value meets an optimization condition; the processing unit is further configured to execute step S5, when the corrected distance value satisfies the optimization condition, adjust a quantity value of the auxiliary pattern and/or adjust a width value of the auxiliary pattern, and repeatedly execute step S4 until the corrected distance value no longer satisfies the optimization condition; the processing unit is further used for executing the step S6, calling an optical model and carrying out overexposure inspection on the auxiliary graph; when the overexposure inspection is unqualified, reducing the width value of the auxiliary graph when the step S5 is executed, and repeatedly executing the steps S4-S5 until the overexposure inspection is qualified;
and the storage unit is used for storing the initial distance value, the corrected distance value, the width value of the target main graph, the quantity value of the auxiliary graphs and the width value of the auxiliary graphs.
10. A masking plate, characterized in that the masking plate is formed with a method according to any one of claims 1 to 8.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202211656410.2A CN115877651A (en) | 2022-12-22 | 2022-12-22 | Mask plate layout correction method and system and mask plate |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202211656410.2A CN115877651A (en) | 2022-12-22 | 2022-12-22 | Mask plate layout correction method and system and mask plate |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN115877651A true CN115877651A (en) | 2023-03-31 |
Family
ID=85754307
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202211656410.2A Pending CN115877651A (en) | 2022-12-22 | 2022-12-22 | Mask plate layout correction method and system and mask plate |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN115877651A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116224708A (en) * | 2023-05-05 | 2023-06-06 | 合肥晶合集成电路股份有限公司 | Mask pattern correction method and device |
-
2022
- 2022-12-22 CN CN202211656410.2A patent/CN115877651A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116224708A (en) * | 2023-05-05 | 2023-06-06 | 合肥晶合集成电路股份有限公司 | Mask pattern correction method and device |
| CN116224708B (en) * | 2023-05-05 | 2023-09-12 | 合肥晶合集成电路股份有限公司 | Mask pattern correction method and device |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US5994009A (en) | Interlayer method utilizing CAD for process-induced proximity effect correction | |
| US7592103B2 (en) | Electron beam writing method and lithography mask manufacturing method | |
| KR100472267B1 (en) | Method for fabrication of mask, mask fabricated by the method and method for fabrication of semiconductor device using the mask | |
| JP3976597B2 (en) | Mask and method for forming the same | |
| CN115877651A (en) | Mask plate layout correction method and system and mask plate | |
| CN116819898A (en) | Mask pattern correction method and device and semiconductor device | |
| CN113495426A (en) | Optical proximity effect correction method and device | |
| CN114415466B (en) | Method and system for correcting layout graph | |
| US20130149636A1 (en) | Pattern determining method, pattern determining apparatus and storage medium | |
| CN117234030B (en) | Lithographic pattern calibration method, device, medium and product | |
| CN108062010B (en) | Method for reducing grid fluctuation based on optical proximity effect correction | |
| JP3054765B2 (en) | Proximity effect correction method for mask manufacturing | |
| JP3680425B2 (en) | Photomask manufacturing method and method for determining electron beam irradiation correction amount for resist material | |
| CN110058485B (en) | OPC correction method and OPC correction system | |
| CN115933305A (en) | Method, device, equipment and medium for correcting photomask graph | |
| CN115877650A (en) | Scattering strip adding method and mask preparation method | |
| JP5322443B2 (en) | Mask pattern data generation method and semiconductor device manufacturing method | |
| KR100896861B1 (en) | Method for optical proximity correction using pattern segmentation | |
| JP2007250810A (en) | Manufacturing method of semiconductor device having correction process of charged particle beam exposure data | |
| JP2009295893A (en) | Proximity effect correction method and electron beam drawing device using the method | |
| US11599017B2 (en) | Optical proximity correction method and method of fabricating mask including the same | |
| JP2020087957A (en) | Lithographic data creation method for charged multi-beam lithography device | |
| JP2014229662A (en) | Development loading correction program, computer, drawing system, development loading correction method | |
| CN117148689B (en) | Simulation processing method, device, equipment and medium for photoetching process | |
| CN116661236B (en) | Pattern correction method and system and preparation method of photomask |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination |