CN115866156A - Data processing method and device, electronic equipment and storage medium - Google Patents

Data processing method and device, electronic equipment and storage medium Download PDF

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CN115866156A
CN115866156A CN202310187103.2A CN202310187103A CN115866156A CN 115866156 A CN115866156 A CN 115866156A CN 202310187103 A CN202310187103 A CN 202310187103A CN 115866156 A CN115866156 A CN 115866156A
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data
packet
signal
protocol
sub
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CN115866156B (en
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冯超超
谢丽燕
叶巧玉
张昆
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Shanghai Lichi Semiconductor Co ltd
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Shanghai Lichi Semiconductor Co ltd
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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
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Abstract

The present disclosure provides a data processing method, an apparatus, an electronic device, and a storage medium, the method and the apparatus being applied to an image output module for displaying data or transmitting image data, the method including: confirming a protocol corresponding to data to be generated; outputting the data to be generated from a unique target port of the image output module based on a timing control signal and the protocol; the protocol comprises a display serial interface protocol or a camera serial interface protocol; therefore, one module can simultaneously support two protocols, and function repetition and resource waste are avoided.

Description

Data processing method and device, electronic equipment and storage medium
Technical Field
The present disclosure relates to the field of data processing technologies, and in particular, to a data processing method and apparatus, an electronic device, and a storage medium.
Background
A Display Serial Interface (DSI) for displaying, and a Camera Serial Interface (CSI) for transmitting image data, which are not used simultaneously; in order to support the DSI protocol and the CSI protocol, two separate modules need to be developed, resulting in duplication of functions and waste of resources.
Disclosure of Invention
The present disclosure provides a data processing method, an apparatus, an electronic device, and a storage medium, to at least solve the above technical problems in the prior art.
According to a first aspect of the present disclosure, there is provided a data processing method applied to an image output module for displaying data or transmitting image data, the method comprising:
confirming a protocol corresponding to data to be generated;
outputting the data to be generated from a unique target port of the image output module based on a timing control signal and the protocol;
the protocol comprises a display serial interface protocol or a camera serial interface protocol.
According to a second aspect of the present disclosure, there is provided a data processing apparatus including an image output module for displaying data or transmitting image data, the apparatus comprising:
the judging module is used for confirming a protocol corresponding to the data to be generated;
the output module is used for outputting the data to be generated based on a time sequence control signal and the protocol;
the protocol comprises a display serial interface protocol or a camera serial interface protocol.
According to a third aspect of the present disclosure, there is provided an electronic device comprising:
at least one processor; and
a memory communicatively coupled to the at least one processor; wherein the content of the first and second substances,
the memory stores instructions executable by the at least one processor to enable the at least one processor to perform the methods of the present disclosure.
According to a fourth aspect of the present disclosure, there is provided a non-transitory computer readable storage medium having stored thereon computer instructions for causing the computer to perform the method of the present disclosure.
The data processing method is applied to an image output module for displaying data or transmitting image data, and a protocol corresponding to data to be generated is confirmed; outputting the data to be generated based on a time sequence control signal and the protocol; the protocol comprises a display serial interface protocol or a camera serial interface protocol; therefore, one module (namely, the image output module) can simultaneously support two protocols, and the function repetition and the resource waste are avoided.
It should be understood that the statements in this section do not necessarily identify key or critical features of the embodiments of the present disclosure, nor do they limit the scope of the present disclosure. Other features of the present disclosure will become apparent from the following description.
Drawings
The above and other objects, features and advantages of exemplary embodiments of the present disclosure will become readily apparent from the following detailed description read in conjunction with the accompanying drawings. Several embodiments of the present disclosure are illustrated by way of example, and not by way of limitation, in the figures of the accompanying drawings and in which:
in the drawings, the same or corresponding reference numerals indicate the same or corresponding parts.
FIG. 1 is a schematic flow chart diagram illustrating an alternative data processing method provided by an embodiment of the present disclosure;
fig. 2 is a schematic flow chart illustrating another alternative data processing method provided in the embodiment of the present disclosure;
FIG. 3 is a schematic diagram illustrating a module-in-chip configuration provided by an embodiment of the present disclosure;
FIG. 4 is a diagram illustrating a vertical direction data packet generated according to a timing control signal according to an embodiment of the disclosure;
FIG. 5 is a schematic diagram illustrating the generation of a horizontal direction packet according to a timing control signal according to an embodiment of the disclosure;
FIG. 6 is a schematic diagram illustrating an alternative structure of a data processing apparatus provided by an embodiment of the present disclosure;
fig. 7 shows a schematic structural diagram of an electronic device according to an embodiment of the present disclosure.
Detailed Description
In order to make the objects, features and advantages of the present disclosure more apparent and understandable, the technical solutions in the embodiments of the present disclosure will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present disclosure, and it is apparent that the described embodiments are only a part of the embodiments of the present disclosure, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments disclosed herein without making any creative effort, shall fall within the protection scope of the present disclosure.
DSI is used for image output, such as a screen of electronic equipment, and CSI is used for image access, such as an image sensor and a camera; in the related art, the DSI and the CSI are two independent and completely unrelated interfaces, and the implementation needs to configure two D-PHYs (one physical layer) respectively, which is expensive.
Furthermore, since DSI is used for display and CSI is used for transmitting image data to other electronic devices or system on chip (SoC), both are not generally used at the same time, two different modules (IPs) are required to support both protocols, which may cause duplication of functions and waste of resources.
Based on the defects in the related art, the present disclosure provides a data processing method, which enables one module (interface) to simultaneously support two protocols, namely DSI and CSI, so as to solve some or all of the above technical problems.
Fig. 1 shows an alternative flow chart of a data processing method provided in an embodiment of the present disclosure, which will be described according to various steps.
The data processing method provided by the embodiment of the disclosure is applied to an image output module, wherein the image output module is used for displaying data or transmitting image data; specifically, the image output module may output data of a DSI protocol when used for displaying data, and may output data of a CSI protocol when used for transmitting image data.
Step S201, determining a protocol corresponding to data to be generated.
In some embodiments, an execution carrier (hereinafter referred to as an execution carrier) of the data processing method confirms a protocol corresponding to data to be generated based on indication information stored in a register. The indication information is used to indicate a protocol corresponding to data to be generated, and may be at least one of a full chinese name, an english full pinyin, or an abbreviation of the protocol, or may be a symbol indicating the protocol, such as a DSI protocol of 0, a CSI protocol of 1, a DSI protocol of a, a CSI protocol of b, and the like, which is not specifically limited in this disclosure.
In some embodiments, the protocol includes a display serial interface protocol or a camera serial interface protocol, and the device generates the data to be generated corresponding to the protocol after confirming the protocol.
Step S202, based on the time sequence control signal and the protocol, outputting the data to be generated from the only target port of the image output module.
In some embodiments, the timing control signal includes a control signal in a vertical direction and a control signal in a horizontal direction, the vertical direction including a vertical synchronization sub-signal, a vertical synchronization sub-signal leading shoulder, and a vertical resolution sub-signal; the horizontal direction includes a horizontal synchronization sub-signal, a horizontal synchronization sub-signal front shoulder, and a horizontal resolution sub-signal.
In some embodiments, the data to be generated comprises at least one data packet; unlike the related art, the at least one data packet is output from a unique destination port included in the image output module. The specific use of the image output module or the protocol of the data may be determined according to the indication information stored in the register, it should be noted that the use of the image output module is not fixed, and switching may be performed based on the indication information, such as switching from display data to transmission image data, or switching from transmission image data to display data; accordingly, the protocol of the output data is switched from the DSI protocol to the CSI protocol or from the CSI protocol to the DSI protocol.
In some embodiments, the execution carrier outputs the data to be generated based on the target port. Optionally, the execution carrier sends the data to be generated to a bottom layer Protocol layer (Low Level Protocol), and sends the data to be generated to the target port through the bottom layer Protocol layer; wherein the destination port is a physical port.
Therefore, by the data processing method provided by the embodiment of the disclosure, the DSI protocol and the CSI protocol that need to be supported by two modules in the related art are optimized as one module, and when the output data are different, the corresponding protocol of the data can be confirmed based on the indication information in the register, so that the function of the module for outputting the DSI protocol data or the CSI protocol data is realized, and the function repetition and the resource waste are avoided.
FIG. 2 is a schematic flow chart diagram illustrating an alternative data processing method provided by the embodiment of the present disclosure; FIG. 3 is a schematic diagram illustrating a module-in-chip configuration provided by an embodiment of the present disclosure; fig. 4 shows a schematic diagram of generating a vertical direction data packet according to a timing control signal provided by an embodiment of the present disclosure, and fig. 5 shows a schematic diagram of generating a horizontal direction data packet according to a timing control signal provided by an embodiment of the present disclosure.
In some embodiments, as shown in fig. 3, the data processing method provided by the embodiments of the present disclosure is applied to an image output module, which is used for displaying data or transmitting image data; specifically, the image output module may output data of a DSI protocol when used for displaying data, and may output data of a CSI protocol when used for transmitting image data.
Step S301, confirming a protocol corresponding to the data to be generated.
In some embodiments, the execution carrier of the data processing method confirms the protocol corresponding to the data to be generated based on the indication information stored in the register. The indication information is used to indicate a protocol corresponding to data to be generated, and may be at least one of a full chinese name, an english full pinyin, or an abbreviation of the protocol, or may be a symbol indicating the protocol, such as a DSI protocol of 0, a CSI protocol of 1, a DSI protocol of a, a CSI protocol of b, and the like, which is not specifically limited in this disclosure.
In some embodiments, the protocol includes a display serial interface protocol or a camera serial interface protocol, and after the carrier confirmation protocol is executed, if the protocol is a DSI protocol, step S302 is executed, or if the protocol is a CSI protocol, step S303 is executed.
Step S302, outputting data to be generated corresponding to the DSI protocol based on the time sequence control signal.
In some embodiments, as shown in fig. 4 and 5, if the protocol is DSI, the data to be generated includes a vertical data packet and a horizontal data packet; the Vertical DATA packets comprise a Vertical synchronization Start DATA packet (VSS), a Vertical synchronization End DATA packet (VSE), and a second DATA packet (DT and DATA in the Vertical DATA packets); the horizontal packets include a horizontal synchronization start packet (HSS), a horizontal synchronization end packet (HVSE), and a first packet (DT and DATA in the horizontal packet). The vertical direction (vtotal) of the time sequence control signal comprises a vertical synchronization sub-signal (vsync), a vertical synchronization sub-signal front shoulder (vbp), a vertical resolution sub-signal (vactive) and a vertical synchronization sub-signal back shoulder (vfp); the horizontal direction (htotal) includes a horizontal synchronization sub-signal (hsync), a horizontal synchronization sub-signal front shoulder (hbp), a horizontal resolution sub-signal (reactive), and a vertical synchronization sub-signal back shoulder (hfp).
In specific implementation, as shown in fig. 4 and 5, the execution carrier generates a vertical synchronization start packet (VSS) in response to receiving the vertical synchronization sub-signal (vsync); generating a vertical synchronization end packet (VSE) in response to receiving the vertical synchronization sub-signal shoulder (vbp); in response to receiving a vertical resolution sub-signal (vactive), generating a second DATA packet (DT and DATA in a vertical DATA packet) of a resolution corresponding to the vertical resolution sub-signal; in response to receiving the horizontal synchronization sub-signal (hsync), generating a horizontal synchronization start packet (HSS); generating a horizontal synchronization end packet (HSE) in response to receiving the horizontal synchronization sub-signal shoulder (hbp); in response to receiving the horizontal resolution sub-signal (active), a first DATA packet (DT and DATA in a horizontal DATA packet) of a resolution corresponding to the horizontal resolution sub-signal is generated.
In some embodiments, the execution carrier further outputs the vertical synchronization start packet, the vertical synchronization end packet, the horizontal synchronization start packet, the horizontal synchronization end packet, and the first and second packets corresponding to data based on a destination port. Optionally, the execution carrier may output the generated data packet based on the destination port after generating the data packet, or may output the data packet based on the destination port after all the data packets are generated and packed. As shown in fig. 2, the data packet needs to pass through the bottom protocol layer and then be output by the destination port.
Step S303, outputting to-be-generated data corresponding to the CSI protocol based on the timing control signal.
In some embodiments, as shown in fig. 4 and 5, if the protocol is CSI, the data to be generated includes a frame data packet and a row data packet; the Frame DATA packets comprise a Frame synchronization Start DATA packet (FS), a Frame synchronization End DATA packet (FE) and a third DATA packet (DT and DATA in the Frame DATA packets); the row DATA packets include a row synchronization start DATA packet (LS), a row synchronization end DATA packet (LE), and a fourth DATA packet (DT and DATA in the row DATA packet). The vertical direction of the time sequence control signal comprises a vertical synchronization sub-signal (vsync), a vertical synchronization sub-signal front shoulder (vbp), a vertical resolution sub-signal (vactive) and a vertical synchronization sub-signal back shoulder (vfp); the horizontal direction includes a horizontal sync sub-signal (hsync), a horizontal sync sub-signal front shoulder (hbp), a horizontal resolution sub-signal (reactive), and a vertical sync sub-signal back shoulder (hfp).
In a specific implementation, as shown in fig. 4 and 5, the execution bearer generates a frame synchronization end packet (FE) in response to receiving the vertical synchronization sub-signal (vsync); generating a frame sync start packet (FS) in response to receiving the vertical sync sub-signal shoulder (vbp); in response to receiving a vertical resolution sub-signal (vactive), generating a third DATA packet (DT and DATA in a frame DATA packet) of a resolution corresponding to said vertical resolution sub-signal; generating a line synchronization end packet (LE) in response to receiving the horizontal synchronization sub-signal (hsync); generating a line sync start data packet (LS) in response to receiving the horizontal sync sub-signal shoulder (hbp); in response to receiving the horizontal resolution sub-signal (active), a fourth DATA packet (DT and DATA in the horizontal DATA packet) of a resolution corresponding to the horizontal resolution sub-signal is generated.
In some embodiments, the execution carrier further outputs the frame synchronization start packet, the frame synchronization end packet, the line synchronization start packet, the line synchronization end packet, and the third packet and the fourth packet corresponding to data based on a destination port. Optionally, the execution carrier may output the generated data packet based on the destination port after generating the data packet, or may output the data packet based on the destination port after all the data packets are generated and packed. As shown in fig. 2, the data packet needs to pass through the bottom protocol layer and then be output by the destination port.
Therefore, by the data processing method provided by the embodiment of the disclosure, the DSI protocol and the CSI protocol which need to be supported by two modules respectively in the related art are optimized to be supported by one module, and the function of the module for outputting the DSI protocol data or the CSI protocol data is realized based on the indication information confirmation protocol in the register, thereby avoiding the function repetition and the resource waste.
Fig. 6 shows an alternative structural diagram of a data processing apparatus provided in an embodiment of the present disclosure, which will be described according to various parts.
In some embodiments, the data processing apparatus 700 comprises an image output module 703; the data processing apparatus 700 further comprises a determining module 701 and an outputting module 702.
A determining module 701, configured to determine a protocol corresponding to data to be generated;
an output module 702, configured to output the data to be generated from a unique target port of the image output module 703 based on a timing control signal and the protocol;
the protocol comprises a display serial interface protocol or a camera serial interface protocol.
The determining module 701 is specifically configured to determine, based on the indication information stored in the register, a protocol corresponding to the data to be generated.
The data to be generated includes at least one data packet, and the output module 702 is specifically configured to output, based on the timing control signal, a vertical synchronization start data packet, a vertical synchronization end data packet, a horizontal synchronization start data packet, a horizontal synchronization end data packet, and a first data packet and a second data packet corresponding to the data from a unique target port of the image output module 703 if the protocol is a display serial interface protocol.
The output module 702 is specifically configured to generate a vertical synchronization start data packet in response to receiving the vertical synchronization sub-signal;
generating a vertical synchronization end packet in response to receiving the vertical synchronization sub-signal shoulder;
in response to receiving a vertical resolution sub-signal, generating a second data packet of a resolution corresponding to the vertical resolution sub-signal;
generating a horizontal synchronization start packet in response to receiving the horizontal synchronization sub-signal;
generating a horizontal synchronization end packet in response to receiving the horizontal synchronization sub-signal shoulder;
in response to receiving a horizontal resolution sub-signal, generating a first data packet of a resolution corresponding to the horizontal resolution sub-signal;
outputting the vertical synchronization start packet, the vertical synchronization end packet, the horizontal synchronization start packet, the horizontal synchronization end packet, and the first packet and the second packet corresponding to data based on a destination port.
The data to be generated includes at least one data packet, and the output module 702 is specifically configured to output, based on the timing control signal, a frame synchronization start data packet, a frame synchronization end data packet, a line synchronization start data packet, a line synchronization end data packet, and a third data packet and a fourth data packet corresponding to the data to be generated if the protocol is a camera serial interface protocol.
The output module 702 is specifically configured to generate a frame synchronization end packet in response to receiving the vertical synchronization sub-signal;
generating a frame synchronization start packet in response to receiving the vertical synchronization sub-signal preamble;
in response to receiving the vertical resolution sub-signal, generating a third data packet of a resolution corresponding to the vertical resolution sub-signal;
generating a horizontal synchronization end packet in response to receiving the horizontal synchronization sub-signal;
generating a line synchronization start packet in response to receiving the horizontal synchronization sub-signal shoulder;
in response to receiving the horizontal resolution sub-signal, generating a fourth data packet of a resolution corresponding to the horizontal resolution sub-signal;
and outputting a frame synchronization starting data packet, a frame synchronization ending data packet, a line synchronization starting data packet, a line synchronization ending data packet and a third data packet and a fourth data packet corresponding to the data to be generated from a target port based on the time sequence control signal.
According to an embodiment of the present disclosure, the present disclosure also provides an electronic device and a readable storage medium.
Fig. 7 illustrates a schematic block diagram of an example electronic device 800 that can be used to implement embodiments of the present disclosure. Electronic devices are intended to represent various forms of digital computers, such as laptops, desktops, workstations, personal digital assistants, servers, blade servers, mainframes, and other appropriate computers. The electronic device may also represent various forms of mobile devices, such as personal digital processing, cellular phones, smart phones, wearable devices, and other similar computing devices. The components shown herein, their connections and relationships, and their functions, are meant to be examples only, and are not meant to limit implementations of the disclosure described and/or claimed herein.
As shown in fig. 7, the electronic device 800 includes a computing unit 801 that can perform various appropriate actions and processes according to a computer program stored in a Read Only Memory (ROM) 802 or a computer program loaded from a storage unit 808 into a Random Access Memory (RAM) 803. In the RAM803, various programs and data necessary for the operation of the electronic apparatus 800 can also be stored. The calculation unit 801, the ROM802, and the RAM803 are connected to each other by a bus 804. An input/output (I/O) interface 805 is also connected to bus 804.
A number of components in the electronic device 800 are connected to the I/O interface 805, including: an input unit 806, such as a keyboard, a mouse, or the like; an output module 807 such as various types of displays, speakers, and the like; a storage unit 808, such as a magnetic disk, optical disk, or the like; and a communication unit 809 such as a network card, modem, wireless communication transceiver, etc. The communication unit 809 allows the electronic device 800 to exchange information/data with other devices through a computer network such as the internet and/or various telecommunication networks.
Computing unit 801 may be a variety of general and/or special purpose processing components with processing and computing capabilities. Some examples of the computing unit 801 include, but are not limited to, a Central Processing Unit (CPU), a Graphics Processing Unit (GPU), various dedicated Artificial Intelligence (AI) computing chips, various computing units running machine learning model algorithms, a Digital Signal Processor (DSP), and any suitable processor, controller, microcontroller, and the like. The calculation unit 801 executes the respective methods and processes described above, such as the data processing method. For example, in some embodiments, the data processing method may be implemented as a computer software program tangibly embodied in a machine-readable medium, such as storage unit 808. In some embodiments, part or all of the computer program can be loaded and/or installed onto the electronic device 800 via the ROM802 and/or the communication unit 809. When loaded into RAM803 and executed by the computing unit 801, a computer program may perform one or more steps of the data processing method described above. Alternatively, in other embodiments, the computing unit 801 may be configured to perform the data processing method by any other suitable means (e.g., by means of firmware).
Various implementations of the systems and techniques described here above may be implemented in digital electronic circuitry, integrated circuitry, field Programmable Gate Arrays (FPGAs), application Specific Integrated Circuits (ASICs), application Specific Standard Products (ASSPs), system on a chip (SOCs), load programmable logic devices (CPLDs), computer hardware, firmware, software, and/or combinations thereof. These various embodiments may include: implemented in one or more computer programs that are executable and/or interpretable on a programmable system including at least one programmable processor, which may be special or general purpose, receiving data and instructions from, and transmitting data and instructions to, a storage system, at least one input device, and at least one output device.
Program code for implementing the methods of the present disclosure may be written in any combination of one or more programming languages. These program codes may be provided to a processor or controller of a general purpose computer, special purpose computer, or other programmable data processing apparatus, such that the program codes, when executed by the processor or controller, cause the functions/operations specified in the flowchart and/or block diagram to be performed. The program code may execute entirely on the machine, partly on the machine, as a stand-alone software package partly on the machine and partly on a remote machine or entirely on the remote machine or server.
In the context of this disclosure, a machine-readable medium may be a tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device. The machine-readable medium may be a machine-readable signal medium or a machine-readable storage medium. A machine-readable medium may include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. More specific examples of a machine-readable storage medium would include an electrical connection based on one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.
To provide for interaction with a user, the systems and techniques described here can be implemented on a computer having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to a user; and a keyboard and a pointing device (e.g., a mouse or a trackball) by which a user can provide input to the computer. Other kinds of devices may also be used to provide for interaction with a user; for example, feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user may be received in any form, including acoustic, speech, or tactile input.
The systems and techniques described here can be implemented in a computing system that includes a back-end component (e.g., as a data server), or that includes a middleware component (e.g., an application server), or that includes a front-end component (e.g., a user computer having a graphical user interface or a web browser through which a user can interact with an implementation of the systems and techniques described here), or any combination of such back-end, middleware, or front-end components. The components of the system can be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: local Area Networks (LANs), wide Area Networks (WANs), and the Internet.
The computer system may include clients and servers. A client and server are generally remote from each other and typically interact through a communication network. The relationship of client and server arises by virtue of computer programs running on the respective computers and having a client-server relationship to each other. The server may be a cloud server, a server of a distributed system, or a server with a combined blockchain.
It should be understood that various forms of the flows shown above may be used, with steps reordered, added, or deleted. For example, the steps described in the present disclosure may be executed in parallel, sequentially, or in different orders, as long as the desired results of the technical solutions disclosed in the present disclosure can be achieved, and the present disclosure is not limited herein.
Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In the description of the present disclosure, "a plurality" means two or more unless specifically limited otherwise.
The above description is only for the specific embodiments of the present disclosure, but the scope of the present disclosure is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present disclosure, and all the changes or substitutions should be covered within the scope of the present disclosure. Therefore, the protection scope of the present disclosure shall be subject to the protection scope of the claims.

Claims (10)

1. A data processing method applied to an image output module for displaying data or transmitting image data, the method comprising:
confirming a protocol corresponding to data to be generated;
outputting the data to be generated from a unique target port of the image output module based on a timing control signal and the protocol;
the protocol comprises a display serial interface protocol or a camera serial interface protocol.
2. The method according to claim 1, wherein the confirming a protocol corresponding to the data to be generated comprises:
and confirming a protocol corresponding to the data to be generated based on the indication information stored in the register.
3. The method according to claim 1, wherein outputting the data to be generated from a unique target port of the image output module based on the timing control signal and the protocol comprises:
and if the protocol is a display serial interface protocol, outputting a vertical synchronization start data packet, a vertical synchronization end data packet, a horizontal synchronization start data packet, a horizontal synchronization end data packet, and a first data packet and a second data packet corresponding to the data from a unique target port of the image output module based on the timing control signal.
4. The method according to claim 3, wherein the timing control signal comprises a vertical synchronization sub-signal, a horizontal synchronization sub-signal, a vertical synchronization sub-signal shoulder, a horizontal synchronization sub-signal shoulder, a vertical resolution sub-signal, and a horizontal resolution sub-signal, and the outputting a vertical synchronization start packet, a vertical synchronization end packet, a horizontal synchronization start packet, a horizontal synchronization end packet, and a first data packet and a second data packet corresponding to data from a unique destination port of the image output module based on the timing control signal comprises:
generating a vertical synchronization start packet in response to receiving the vertical synchronization sub-signal;
generating a vertical synchronization end data packet in response to receiving the vertical synchronization sub-signal predecessor;
in response to receiving a vertical resolution sub-signal, generating a second data packet of a resolution corresponding to the vertical resolution sub-signal;
generating a horizontal synchronization start packet in response to receiving the horizontal synchronization sub-signal;
generating a horizontal synchronization end packet in response to receiving the horizontal synchronization sub-signal shoulder;
in response to receiving a horizontal resolution sub-signal, generating a first data packet of a resolution corresponding to the horizontal resolution sub-signal;
outputting the vertical synchronization start packet, the vertical synchronization end packet, the horizontal synchronization start packet, the horizontal synchronization end packet, and the first packet and the second packet corresponding to data based on a destination port.
5. The method according to claim 1, wherein outputting the data to be generated from a unique target port of the image output module based on the timing control signal and the protocol comprises:
and if the protocol is a camera serial interface protocol, outputting a frame synchronization start data packet, a frame synchronization end data packet, a line synchronization start data packet, a line synchronization end data packet, a third data packet and a fourth data packet corresponding to the data to be generated from a unique target port of the image output module based on the timing control signal.
6. The method according to claim 5, wherein the timing control signal comprises a vertical synchronization sub-signal, a horizontal synchronization sub-signal, a vertical resolution sub-signal, and a horizontal resolution sub-signal, and the outputting a frame synchronization start packet, a frame synchronization end packet, a line synchronization start packet, a line synchronization end packet, and third and fourth data packets corresponding to data from a unique destination port of the image output module based on the timing control signal comprises:
generating a frame synchronization end packet in response to receiving the vertical synchronization sub-signal;
generating a frame synchronization start packet in response to receiving the vertical synchronization sub-signal preamble;
in response to receiving the vertical resolution sub-signal, generating a third data packet of a resolution corresponding to the vertical resolution sub-signal;
generating a horizontal synchronization end packet in response to receiving the horizontal synchronization sub-signal;
generating a line synchronization start packet in response to receiving the horizontal synchronization sub-signal shoulder;
in response to receiving the horizontal resolution sub-signal, generating a fourth data packet of a resolution corresponding to the horizontal resolution sub-signal;
and outputting a frame synchronization start data packet, a frame synchronization end data packet, a line synchronization start data packet, a line synchronization end data packet and a third data packet and a fourth data packet corresponding to the data to be generated from a target port based on the time sequence control signal.
7. A data processing apparatus comprising an image output module for displaying data or transmitting image data, the apparatus further comprising:
the judging module is used for confirming a protocol corresponding to the data to be generated;
the output module is used for outputting the data to be generated from the only target port of the image output module based on a time sequence control signal and the protocol;
the protocol comprises a display serial interface protocol or a camera serial interface protocol.
8. The apparatus of claim 7, wherein the determining module is specifically configured to:
and confirming the protocol corresponding to the data to be generated based on the indication information stored in the register.
9. An electronic device, comprising:
at least one processor; and
a memory communicatively coupled to the at least one processor; wherein the content of the first and second substances,
the memory stores instructions executable by the at least one processor to enable the at least one processor to perform the method of any one of claims 1-6.
10. A non-transitory computer readable storage medium having stored thereon computer instructions for causing a computer to perform the method of any one of claims 1-6.
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