CN115865006A - Amplifier structure, analog front-end circuit and signal processing device - Google Patents
Amplifier structure, analog front-end circuit and signal processing device Download PDFInfo
- Publication number
- CN115865006A CN115865006A CN202211707313.1A CN202211707313A CN115865006A CN 115865006 A CN115865006 A CN 115865006A CN 202211707313 A CN202211707313 A CN 202211707313A CN 115865006 A CN115865006 A CN 115865006A
- Authority
- CN
- China
- Prior art keywords
- open
- amplifier
- loop
- voltage
- bias
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000012545 processing Methods 0.000 title claims abstract description 11
- 238000001514 detection method Methods 0.000 claims description 3
- 230000004044 response Effects 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 10
- 230000008859 change Effects 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 2
- HEZMWWAKWCSUCB-PHDIDXHHSA-N (3R,4R)-3,4-dihydroxycyclohexa-1,5-diene-1-carboxylic acid Chemical compound O[C@@H]1C=CC(C(O)=O)=C[C@H]1O HEZMWWAKWCSUCB-PHDIDXHHSA-N 0.000 description 1
- 238000013459 approach Methods 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 230000008707 rearrangement Effects 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
Images
Landscapes
- Amplifiers (AREA)
Abstract
The embodiment of the invention discloses an amplifier structure, an analog front-end circuit and a signal processing device. The amplifier structure includes: a power supply circuit, an open loop amplifier and a bias circuit; the input end of the power supply circuit inputs voltage, the output end of the power supply circuit is electrically connected with the first voltage end of the open-loop amplifier, and the second voltage end of the open-loop amplifier is electrically connected with the output end of the bias circuit; the open-loop amplifier includes a pair of differential inputs and at least one pair of differential outputs. The amplifier structure, the analog front-end circuit and the signal processing device provided by the embodiment of the invention can ensure stable gain and stable output common mode.
Description
Technical Field
Embodiments of the present invention relate to communications technologies, and in particular, to an amplifier structure, an analog front end circuit, and a signal processing apparatus.
Background
Amplifiers, which are devices for amplifying input voltage or power, are composed of electron tubes or transistors, power transformers, and other electrical components, and are widely used in various devices such as communications, broadcasting, radar, television, and automatic control.
At present, a closed-loop structure is usually used in an existing amplifier, the closed structure has the problem of low bandwidth, and compared with the closed-loop structure, the open-loop structure has the problems of large gain fluctuation and large output common-mode change under the condition of temperature change.
Disclosure of Invention
The embodiment of the invention provides an amplifier structure, an analog front-end circuit and a signal processing device, which are used for ensuring stable gain and stable output common mode.
In a first aspect, an embodiment of the present invention provides an amplifier structure, including: a power supply circuit, an open loop amplifier and a bias circuit;
the input end of the power supply circuit inputs voltage, the output end of the power supply circuit is electrically connected with the first voltage end of the open-loop amplifier, and the second voltage end of the open-loop amplifier is electrically connected with the output end of the bias circuit; the open-loop amplifier comprises a pair of differential input ends and at least one pair of differential output ends, and the sum of signals input by the two input ends of the open-loop amplifier is unchanged.
Optionally, the number of the power supply circuits, the number of the open-loop amplifiers and the number of the bias circuits are the same and are at least one, the open-loop amplifiers are cascaded, and the power supply circuits, the open-loop amplifiers and the bias circuits are in one-to-one correspondence.
Optionally, the number of the open-loop amplifiers is at least one, the number of the power supply circuit and the number of the bias circuit are both one, the output end of the power supply circuit is electrically connected to the first voltage end of each open-loop amplifier, and the output end of the bias circuit is electrically connected to the second voltage end of each open-loop amplifier.
Optionally, the number of the open-loop amplifiers is at least one, the number of the power supply circuits is the same as that of the open-loop amplifiers, and the number of the bias circuits is one; or the number of the open-loop amplifiers is at least one, the number of the bias circuits is the same as that of the open-loop amplifiers, and the number of the power supply circuits is one.
Optionally, the open-loop amplifier is one of a common-source amplifier, a common-gate amplifier, a cascode amplifier, and a common-emitter amplifier.
Optionally, the power supply circuit has a common mode voltage detection function, and is configured to detect a difference between a common mode voltage output by the open-loop amplifier and a set value.
Optionally, the power supply circuit has a power supply voltage feedback adjustment function, and is configured to adjust the output power supply voltage according to a difference between the common-mode voltage output by the open-loop amplifier and a set value, so that the common-mode voltage output by the open-loop amplifier is within a preset range.
Optionally, the bias circuit is a current/voltage generating circuit, and is configured to provide a bias voltage and a bias current for the open-loop amplifier, where the bias voltage and the bias current have preset temperature characteristics and are used to compensate for characteristic differences of the open-loop amplifier at different temperatures, so that the open-loop amplifier has a relatively constant gain characteristic or frequency response characteristic at different operating temperatures.
In a second aspect, an embodiment of the present invention further provides an analog front-end circuit, including the amplifier structure according to the first aspect.
In a third aspect, an embodiment of the present invention further provides a signal processing apparatus, including the analog front-end circuit according to the third aspect.
The amplifier structure, the analog front-end circuit and the signal processing device provided by the embodiment of the invention comprise: a power supply circuit, an open loop amplifier and a bias circuit; the input end of the power supply circuit inputs voltage, the output end of the power supply circuit is electrically connected with the first voltage end of the open-loop amplifier, and the second voltage end of the open-loop amplifier is electrically connected with the output end of the bias circuit; the open-loop amplifier includes a pair of differential inputs and at least one pair of differential outputs. According to the amplifier structure, the analog front-end circuit and the signal processing device provided by the embodiment of the invention, the power supply circuit provides power supply voltage for the open-loop amplifier, and the bias circuit provides bias voltage for the open-loop amplifier, so that the common mode of the open-loop amplifier can be adjusted, and the open-loop amplifier can ensure stable gain and stable output common mode when the temperature changes.
Drawings
Fig. 1 is a schematic diagram of an amplifier structure according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of another amplifier configuration provided by embodiments of the present invention;
FIG. 3 is a schematic diagram of another amplifier configuration provided by embodiments of the present invention;
FIG. 4 is a schematic diagram of another amplifier configuration provided by embodiments of the present invention;
fig. 5 is a schematic diagram of another amplifier structure provided by the embodiment of the invention.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not to be construed as limiting the invention. It should be further noted that, for the convenience of description, only some of the structures related to the present invention are shown in the drawings, not all of the structures.
Fig. 1 is a schematic diagram of an amplifier structure according to an embodiment of the present invention. Referring to fig. 1, an amplifier structure includes: a power supply circuit 10, an open loop amplifier 20 and a bias circuit 30.
Wherein, the input end of the power supply circuit 10 inputs voltage, the output end of the power supply circuit 10 is electrically connected with the first voltage end of the open-loop amplifier 20, and the second voltage end of the open-loop amplifier 20 is electrically connected with the output end of the bias circuit 30; the open-loop amplifier 20 includes a pair of differential inputs and at least one pair of differential outputs.
Specifically, the sum of the signal vip input at one input end of the open-loop amplifier 20 and the signal vin input at the other input end is not changed, the input voltage com of the power supply circuit 10 is adjustable, and the output voltage, that is, the supply voltage transmitted to the first voltage end of the open-loop amplifier 20, can be controlled by adjusting the input voltage com of the power supply circuit 10, so as to achieve the common-mode adjustment of the open-loop amplifier 20. The bias circuit 30 provides a bias voltage for the open-loop amplifier 20, the output terminal of the bias circuit 30 outputs the bias voltage to the second voltage terminal of the open-loop amplifier 20, and the bias voltage can compensate the gain temperature drift of the open-loop amplifier 20, so that the open-loop amplifier 20 can ensure stable gain and stable output common mode when the temperature changes.
The amplifier structure provided by the embodiment comprises: a power supply circuit, an open loop amplifier and a bias circuit; the input end of the power supply circuit inputs voltage, the output end of the power supply circuit is electrically connected with the first voltage end of the open-loop amplifier, and the second voltage end of the open-loop amplifier is electrically connected with the output end of the bias circuit; the open-loop amplifier comprises two input ends and two output ends, and the sum of signals input by the two input ends of the open-loop amplifier is unchanged. According to the amplifier structure provided by the embodiment, the power supply circuit provides power supply voltage for the open-loop amplifier, and the bias circuit provides bias voltage for the open-loop amplifier, so that the common mode of the open-loop amplifier can be adjusted, and the open-loop amplifier can ensure stable gain and stable output common mode when the temperature changes.
Optionally, the number of the power supply circuits 10, the number of the open-loop amplifiers 20, and the number of the bias circuits 30 are the same and are all at least one, each open-loop amplifier 20 is cascaded, and the power supply circuits 10, the open-loop amplifiers 20, and the bias circuits 30 are in one-to-one correspondence.
Wherein, each open-loop amplifier 20 is cascaded, two output terminals of the previous open-loop amplifier 20 are electrically connected with two input terminals of the next open-loop amplifier 20, respectively, and signals output by the two output terminals of the previous open-loop amplifier 20 are respectively used as signals input by the two input terminals of the next open-loop amplifier 20. The power supply circuit 10 provides a power supply voltage for the corresponding open-loop amplifier 20, the bias circuit 30 provides a bias voltage for the corresponding open-loop amplifier 20, and each open-loop amplifier 20 has the corresponding power supply circuit 10 and the bias circuit 30, so as to meet actual requirements of different power supply voltages and different bias voltages of the open-loop amplifiers 20.
The magnitude of the power supply voltage provided by each power supply circuit 10 and the magnitude of the bias voltage provided by each bias circuit 30 may be set according to actual requirements of the open-loop amplifier 20, and are not limited herein.
Optionally, the number of the open-loop amplifiers 20 is at least one, the number of the power supply circuit 10 and the number of the bias circuit 30 are both one, the output end of the power supply circuit 10 is electrically connected to the first voltage end of each open-loop amplifier 20, and the output end of the bias circuit 30 is electrically connected to the second voltage end of each open-loop amplifier 20.
Specifically, each of the open-loop amplifiers 20 is cascaded, two output terminals of the previous-stage open-loop amplifier 20 are electrically connected to two input terminals of the next-stage open-loop amplifier 20, respectively, and signals output from the two output terminals of the previous-stage open-loop amplifier 20 are used as signals input from the two input terminals of the next-stage open-loop amplifier 20, respectively. The power supply circuit 10 provides power supply voltage for the open-loop amplifiers 20, the power supply voltage of each open-loop amplifier 20 is the same, the bias circuit 30 provides bias voltage for each open-loop amplifier 20, the bias voltage of each open-loop amplifier 20 is the same, and on the basis of meeting the actual requirements that the power supply voltage of each open-loop amplifier 20 is the same and the bias voltage is the same, the setting cost of the power supply circuit 10 and the bias circuit 30 is saved.
Optionally, the number of the open-loop amplifiers 20 is at least one, the number of the power supply circuits 10 is the same as that of the open-loop amplifiers 20, and the number of the bias circuits 30 is one; alternatively, the number of open-loop amplifiers 20 is at least one, the number of bias circuits 30 is the same as the number of open-loop amplifiers 20, and the number of power supply circuits 10 is one.
Illustratively, fig. 2 is a schematic diagram of another amplifier structure provided by the embodiment of the present invention. Referring to fig. 2, the number of open-loop amplifiers 20 is plural, the number of power supply circuits 10 is one, and the number of bias circuits 30 is the same as the number of open-loop amplifiers 20. The power supply circuit 10 provides power supply voltage for each open-loop amplifier 20, the power supply voltage of each open-loop amplifier 20 is the same, the bias circuit 30 provides bias voltage for the corresponding open-loop amplifier 20, the bias voltage of each open-loop amplifier 20 can be different, and on the basis of meeting the actual requirements that the power supply voltage of each open-loop amplifier 20 is the same and the bias voltage is different, the setting cost of the power supply circuit 10 is saved.
In addition, the number of the open-loop amplifiers 20 is at least one, the number of the power supply circuits 10 is the same as that of the open-loop amplifiers 20, the number of the bias circuits 30 is one, the bias voltages of the open-loop amplifiers 20 are the same, the power supply voltages can be different, and on the basis of meeting the actual requirements that the power supply voltages of the open-loop amplifiers 20 are different and the bias voltages are the same, the setting of the power supply circuits 10 is saved.
It should be noted that the number of the power supply circuit 10 and the bias circuit 30 is only schematic illustration, and may be specifically set according to the actual requirement of the gain temperature drift of the open-loop amplifier 20, and is not limited herein.
Optionally, the open-loop amplifier 20 is one of a common-source amplifier, a common-gate amplifier, a cascode amplifier, and a common-emitter amplifier. It should be noted that the type of the open-loop amplifier 20 is only an illustrative example, and may be set according to actual circuit requirements, and is not limited herein.
Optionally, the open-loop amplifier 20 is a common source amplifier.
The common-source amplifier is an amplifier using a transistor, has high gain and common-mode rejection ratio and high anti-interference capability, and is suitable for scenes with certain requirements on anti-interference capability.
Optionally, the common-source amplifier includes a first triode Q1, a second triode Q2, a first resistor R1 and a second resistor R2, one end of the first resistor R1 is used as a first voltage end of the open-loop amplifier 20, the other end of the first resistor R1 is electrically connected with a first pole of the first triode Q1, a base of the first triode Q1 is used as an input end of the open-loop amplifier 20, a second pole of the first triode Q1 is electrically connected with a first pole of the second triode Q2, a base of the second triode Q2 is used as a second voltage end of the open-loop amplifier 20, a second pole of the second triode Q2 is grounded through the second resistor R2, and a first pole of the first triode Q1 is used as an output end of the open-loop amplifier 20.
Illustratively, fig. 3 is a schematic diagram of another amplifier structure provided by the embodiment of the present invention. Referring to fig. 3, the gain of the open-loop amplifier 20 is mainly determined by the ratio of the resistance values of R1, R2 and R5/2, and the gm of the transistors Q1, Q3, wherein the ratio of the resistance values is relatively constant with temperature, and the gm varies greatly with temperature. The gm of the first triode Q1 is related to the flowing bias current, and the gm is compensated by adjusting the bias voltage temperature drift output by the bias circuit 30, so that the gm tends to be constant along with the temperature variation trend, and the gain of the open-loop amplifier is relatively stable. Illustratively, if the temperature is 55 ℃, the current flowing through the first resistor R1 is 10mA, the resistance of the first resistor R1 is 50 ohms, vcc-com =10 × 50=0 · 5V, if the input voltage com of the power supply circuit 10 is 1V, the output voltage vcc of the power supply circuit 10 is 1.5V, if the input voltage com of the power supply circuit 10 is 1.5V, the output voltage vcc of the power supply circuit 10 is 2V, that is, the voltage vcc output from the power supply circuit 10 to the open-loop amplifier 20 is controlled by adjusting the voltage com input by the power supply circuit 10, so as to realize common mode adjustability. If the first pole of the first triode Q1 is used as an output end outp of the open-loop amplifier 20 to output the common-mode voltage of 1V, and the current flowing through the load resistor, i.e., the first resistor R1, is 10mA, the voltage vcc output by the power supply circuit 10 at this time is 1.5V; if the bias voltage bias output by the bias circuit 30 is increased along with the temperature change, the current flowing through the first resistor R1 is 20mA, the output common-mode voltage output by the output terminal outp of the open-loop amplifier 20 is 1V, and then vcc is 2V, so that the bias voltage bias output by the bias circuit 30 compensates the gain temperature drift, the open-loop amplifier 20 ensures the gain stability during the temperature change, and the output common-mode of the open-loop amplifier 20 is stabilized by the output voltage adjustment of the power supply circuit 10.
Optionally, the common-source amplifier includes a third triode Q3, a fourth triode Q4, a third resistor R3 and a fourth resistor R4, the other end of the third resistor R3 is electrically connected to the first pole of the third triode Q3, the base of the third triode Q3 is used as another input end of the open-loop amplifier 20, the second pole of the third triode Q3 is electrically connected to the first pole of the fourth triode Q4, the base of the fourth triode Q4 is used as the second voltage end of the open-loop amplifier 20, the second pole of the fourth triode Q4 is grounded through the fourth resistor R4, and the first pole of the third triode Q3 is used as another output end of the open-loop amplifier 20.
Specifically, referring to fig. 3, a first pole of the third transistor Q3 is used as the other output end outn of the open-loop amplifier 20, and similarly to the analysis process when the first pole of the first transistor Q1 is used as one output end outp of the open-loop amplifier 20, the voltage vcc output from the power supply circuit 10 to the open-loop amplifier 20 can be controlled by adjusting the voltage com input by the power supply circuit 10, so as to achieve common mode adjustability, and compensate gain temperature drift by the bias voltage bias output by the bias circuit 30, so that the open-loop amplifier 20 ensures stable gain and stable output common mode when the temperature changes, and specific reference may be made to the description of the first pole of the first transistor Q1 as one output end outp of the open-loop amplifier 20, which is not repeated herein.
Optionally, the power supply circuit 10 has a common mode voltage detection function, and is configured to detect a difference between a common mode voltage output by the open-loop amplifier and a set value.
Optionally, the power supply circuit 10 has a power supply voltage feedback adjustment function, and is configured to adjust the output power supply voltage according to a difference between the common-mode voltage output by the open-loop amplifier and a set value, so that the common-mode voltage output by the open-loop amplifier is within a preset range.
The preset range of the voltage value of the common mode voltage is the set value ± adjustable value of the common mode voltage, wherein the specific value of the adjustable value can be determined according to specific needs and is not limited. In one embodiment, the adjustable value may be ± 1V, but is not limited thereto.
Specifically, the power supply circuit 10 may detect a difference between the output common-mode voltage of the open-loop amplifier 20 and a set value and determine a difference value, so as to adjust the power supply voltage according to the difference value, so that the output common-mode voltage value of the open-loop amplifier 20 reaches or approaches the set value. The specific value of the set value can be set according to the actual adjustment requirement, and is not limited herein.
Further, in an embodiment, the predetermined range of the voltage value of the common mode voltage is 0-1.8V, wherein the set value is 0.9V, and the adjustable value is ± 0.9V. In yet another embodiment, the predetermined range of the voltage value of the common mode voltage is-0.5V to 0.5V, wherein the set value is 0V, and the adjustable value is ± 0.5V. In another embodiment, the predetermined range of the common mode voltage is 0.5-1.5V, wherein the set value is 1V, and the adjustable value is ± 0.5V. The above examples are merely illustrative and not restrictive, and the specific selection of the set value and the adjustable value is determined according to actual needs and is not restrictive.
Optionally, the power supply circuit 10 includes at least one of a voltage regulator and a dc voltage converter. By the arrangement, the supply voltage of the open-loop amplifier 20 can be ensured to be stable, and the actual size requirement of the supply voltage of the open-loop amplifier 20 is met.
Optionally, the bias circuit 30 is a current/voltage generating circuit, configured to provide a bias voltage and a bias current for the open-loop amplifier 20, where the bias voltage and the bias current have preset temperature characteristics, and are used to compensate for characteristic differences of the open-loop amplifier at different temperatures, so that the open-loop amplifier has a relatively constant gain characteristic or frequency response characteristic at different operating temperatures.
The current generation circuit can transmit a voltage to the open-loop amplifier 20, and the voltage transmitted to the open-loop amplifier 20 is used as a bias voltage to compensate the gain temperature drift of the open-loop amplifier 20. Illustratively, the bias circuit includes one of a bandgap circuit, a ptat circuit, and a ctat current generating circuit. The supply voltage generating circuit includes: LDO circuit, DCDC circuit and other circuit structure capable of providing voltage source.
Specifically, referring to fig. 3, a difference vcc-com between a voltage vcc output from the output terminal of the power supply circuit 10 and a voltage com input from the input terminal is a product of a current flowing through the first resistor R1 and the first resistor R1, and the voltage vcc output from the power supply circuit 10 to the open-loop amplifier 20 can be controlled by adjusting the voltage com input from the power supply circuit 10, so as to realize common mode adjustability.
In one implementation, fig. 4 is a schematic diagram of another amplifier structure provided in an embodiment of the invention. Referring to fig. 4, the amplifier structure further includes an input buffer module 40 and an output buffer module 50 connected to the amplifier, the input buffer module 40 and the output buffer module 50 also have corresponding bias circuits 30, and the input buffer module 40 and the output buffer module 50 can perform impedance matching and perform gain compensation. Fig. 5 is a schematic diagram of another amplifier structure according to an embodiment of the present invention, referring to fig. 5, there are at least two output buffer modules 50, and the output buffer modules 50 are powered by the power supply circuit 10, and each output buffer module 50 may share one power supply circuit 10 or may be configured with the power supply circuit 10 separately according to the output common mode requirement of the output buffer modules 50.
The amplifier structure provided by the embodiment comprises: a power supply circuit, an open loop amplifier and a bias circuit; the input end of the power supply circuit inputs voltage, the output end of the power supply circuit is electrically connected with the first voltage end of the open-loop amplifier, and the second voltage end of the open-loop amplifier is electrically connected with the output end of the bias circuit; the open-loop amplifier includes a pair of differential inputs and at least one pair of differential outputs. According to the amplifier structure provided by the embodiment, the power supply circuit provides power supply voltage for the open-loop amplifier, and the bias circuit provides bias voltage for the open-loop amplifier, so that the common mode of the open-loop amplifier can be adjusted, and the open-loop amplifier can ensure stable gain and stable output common mode when the temperature changes.
The present embodiment further provides an analog front-end circuit, which includes the amplifier structure according to any embodiment of the present invention, and thus has corresponding advantages of the amplifier structure.
The present embodiment further provides a signal processing apparatus, which includes the analog front-end circuit according to any embodiment of the present invention, and thus has corresponding beneficial effects of the analog front-end circuit.
It is to be noted that the foregoing description is only exemplary of the invention and that the principles of the technology may be employed. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious modifications, rearrangements, combinations and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in some detail by the above embodiments, the invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the spirit of the invention, and the scope of the invention is determined by the scope of the appended claims.
Claims (10)
1. An amplifier structure, comprising: a power supply circuit, an open loop amplifier and a bias circuit;
the input end of the power supply circuit inputs voltage, the output end of the power supply circuit is electrically connected with the first voltage end of the open-loop amplifier, and the second voltage end of the open-loop amplifier is electrically connected with the output end of the bias circuit; the open loop amplifier includes a pair of differential inputs and at least one pair of differential outputs.
2. The amplifier structure of claim 1, wherein the number of the supply circuits, the number of the open-loop amplifiers, and the number of the bias circuits are the same and are all at least one, and wherein the supply circuits, the open-loop amplifiers, and the bias circuits are in one-to-one correspondence for each of the open-loop amplifiers in cascade.
3. The amplifier structure of claim 1, wherein the number of the open-loop amplifiers is at least one, the number of the supply circuit and the number of the bias circuit are both one, the output terminal of the supply circuit is electrically connected to the first voltage terminal of each of the open-loop amplifiers, and the output terminal of the bias circuit is electrically connected to the second voltage terminal of each of the open-loop amplifiers.
4. The amplifier architecture of claim 1, wherein the number of open loop amplifiers is at least one, the number of supply circuits is the same as the number of open loop amplifiers, the number of bias circuits is one; or the number of the open-loop amplifiers is at least one, the number of the bias circuits is the same as that of the open-loop amplifiers, and the number of the power supply circuits is one.
5. The amplifier structure of claim 1, wherein the open loop amplifier comprises one of a common-source amplifier, a common-gate amplifier, a cascode stage amplifier, and a common-emitter amplifier.
6. The amplifier structure according to claim 1, wherein the power supply circuit has a common mode voltage detection function for detecting a difference between a common mode voltage outputted from the open loop amplifier and a set value.
7. The amplifier structure according to claim 1, wherein the power supply circuit has a supply voltage feedback adjustment function, and is configured to adjust the output supply voltage according to a difference value between the common-mode voltage output by the open-loop amplifier and a set value, so that the common-mode voltage output by the open-loop amplifier is within a preset range.
8. The amplifier structure of claim 1, wherein the bias circuit is a current/voltage generating circuit for providing a bias voltage and a bias current for the open-loop amplifier, the bias voltage and the bias current having preset temperature characteristics for compensating for characteristic differences of the open-loop amplifier at different temperatures, so that the open-loop amplifier has a relatively constant gain characteristic or frequency response characteristic at different operating temperatures.
9. An analog front-end circuit comprising an amplifier structure according to any of claims 1 to 8.
10. A signal processing apparatus comprising the analog front-end circuit of claim 9.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202211707313.1A CN115865006A (en) | 2022-12-29 | 2022-12-29 | Amplifier structure, analog front-end circuit and signal processing device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202211707313.1A CN115865006A (en) | 2022-12-29 | 2022-12-29 | Amplifier structure, analog front-end circuit and signal processing device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN115865006A true CN115865006A (en) | 2023-03-28 |
Family
ID=85655906
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202211707313.1A Pending CN115865006A (en) | 2022-12-29 | 2022-12-29 | Amplifier structure, analog front-end circuit and signal processing device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN115865006A (en) |
-
2022
- 2022-12-29 CN CN202211707313.1A patent/CN115865006A/en active Pending
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US7253686B2 (en) | Differential amplifiers with enhanced gain and dynamic range | |
| US7750738B2 (en) | Process, voltage and temperature control for high-speed, low-power fixed and variable gain amplifiers based on MOSFET resistors | |
| US9553548B2 (en) | Low drop out voltage regulator and method therefor | |
| US5381114A (en) | Continuous time common mode feedback amplifier | |
| US4959623A (en) | Low impedance buffer circuit | |
| JP2002510888A (en) | Wide dynamic range variable gain amplifier | |
| CN110808714B (en) | Radio frequency power amplifier for realizing multi-band switching and anti-saturation | |
| CN110995169B (en) | On-chip variable gain temperature compensation amplifier | |
| US5283535A (en) | Differential amplifier arrangement | |
| CN114546014A (en) | Wide-bandwidth LDO trimming control circuit, wide-bandwidth LDO and control method | |
| CN110808721B (en) | Anti-saturation current-mode control radio frequency power amplifier | |
| CN110808720B (en) | Anti-saturation radio frequency power amplifier | |
| CN114679040B (en) | Current-limiting protection circuit | |
| CN116700418A (en) | Accurate adjustable circuit of clamp voltage | |
| JP2011229073A (en) | Gain variation compensator | |
| US8890612B2 (en) | Dynamically biased output structure | |
| US6788143B1 (en) | Cascode stage for an operational amplifier | |
| US10574200B2 (en) | Transconductance amplifier | |
| CN113507270A (en) | Variable gain amplifier | |
| CN106953605B (en) | High-performance operational amplifier with JFET input | |
| CN110808718B (en) | High-stability radio frequency power amplifier | |
| US10122337B2 (en) | Programmable gain amplifier | |
| CN111552341A (en) | Margin-adjustable output voltage margin generation circuit | |
| US10003304B2 (en) | Operational amplifier and method for reducing offset voltage of operational amplifier | |
| CN115865006A (en) | Amplifier structure, analog front-end circuit and signal processing device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| CB02 | Change of applicant information | ||
| CB02 | Change of applicant information |
Address after: Room 708-1, Building 1, Northwest District, Suzhou Nano City, No. 99, Jinjihu Avenue, Suzhou Industrial Park, Suzhou Area, China (Jiangsu) Pilot Free Trade Zone, Suzhou City, Jiangsu Province, 215121 Applicant after: Xunxin Microelectronics (Suzhou) Co.,Ltd. Address before: Room 708-1, Building 1, Northwest District, Suzhou Nano City, No. 99, Jinjihu Avenue, Suzhou Industrial Park, Suzhou Area, China (Jiangsu) Pilot Free Trade Zone, Suzhou City, Jiangsu Province, 215121 Applicant before: ACELA MICRO CO.,LTD. |