CN115841804B

CN115841804B - Resolution real-time switching control method and device

Info

Publication number: CN115841804B
Application number: CN202310139122.8A
Authority: CN
Inventors: 周成梅; 陈曦; 师广涛
Original assignee: Shenzhen Xihua Technology Co Ltd
Current assignee: Shenzhen Xihua Technology Co Ltd
Priority date: 2023-02-21
Filing date: 2023-02-21
Publication date: 2023-06-06
Anticipated expiration: 2043-02-21
Also published as: CN115841804A

Abstract

The embodiment of the application provides a resolution real-time switching control method and device, wherein the method comprises the following steps: receiving a resolution switching instruction, stopping hardware TE, and reconfiguring a RXBR, DSC, VIDC module; starting an RX module to wait for the AP to send display data, and receiving the display data sent by the AP; judging whether LCDC_LINE_STS is larger than gen_te_line, if the value of LCDC_LINE_STS is larger than or equal to VBP+VACT, making TXPower Down, and waiting for RXBR Frame End signal without outputting the next Frame data; after receiving RXBR Frame End signal, TX, LCDC and MEMC reset re-initiate the configuration of resolution, display is restarted, and software TE is switched into hardware TE mode. The method has the technical effect of avoiding splash screens.

Description

Resolution real-time switching control method and device

Technical Field

The present disclosure relates to the field of display and chip, and in particular, to a method and apparatus for controlling resolution real-time switching.

Background

The display resolution is the resolution of the display screen when displaying an image, the resolution is measured by dots, and the "dot" on the display screen is referred to as pixels; another aspect of high resolution is that the maximum pixel point that can be achieved by the display screen in terms of horizontal and vertical display is typically 320×240, 640×480, 1024×568, 1280×1024, and the like, and the resolution of 1600×1280 can be achieved by good large-screen color display.

When the resolution ratio of the existing display screen is switched in real time, a splash screen can appear, and the experience of a user when the resolution ratio is switched is affected.

Disclosure of Invention

The embodiment of the application discloses a resolution real-time switching control method and device, which can reduce the splash screen for switching the resolution of a display screen and improve the experience of a user in switching the resolution.

In a first aspect, a real-resolution real-time switching control method is provided, and the method includes the following steps:

receiving a resolution switching instruction, stopping hardware TE, and reconfiguring a RXBR, DSC, VIDC module; starting an RX module to wait for AP to send display data, and receiving the AP to send the display data, wherein the AP to send the display data is a received RXBR Frame Start signal;

judging whether LCDC_LINE_STS is larger than gen_te_line, if so, generating software TE according to the LCDC_LINE_STS, continuously judging the value of the LCDC_LINE_STS, if the value of the LCDC_LINE_STS is larger than or equal to VBP+VACT, making TXPower Down, and if not, outputting the next Frame data, and waiting for RXBR Frame End signals;

after receiving RXBR Frame End signal, TX, LCDC and MEMC reset re-initiate the configuration of resolution, display is restarted, and software TE is switched into hardware TE mode.

In a second aspect, there is provided a resolution real-time switching control apparatus, the apparatus comprising:

the receiving unit is used for receiving the resolution switching instruction and stopping hardware TE;

a configuration starting unit for reconfiguring RXBR, DSC, VIDC modules; starting an RX module to wait for the AP to send display data;

the receiving unit is further configured to receive AP transmission display data, where the AP transmission display data is a received RXBR Frame Start signal;

a judging and processing unit, configured to judge whether the lcdc_line_sts is greater than gen_te_line, if the lcdc_line_sts is greater than gen_te_line, generate software TE according to the lcdc_line_sts, continuously judge a value of the lcdc_line_sts, and if the value of the lcdc_line_sts is greater than or equal to vbp+vact, make TXPower Down, and not output the next Frame data, and wait for RXBR Frame End signal; after the receiving unit receives RXBR Frame End signals, TX, LCDC and MEMC reset are used for resetting the configuration of the initial resolution, display is restarted, and software TE is switched into a hardware TE mode.

In a third aspect, a chip is provided, the chip comprising an apparatus for real-time input resolution switching as provided in the second aspect.

In a fourth aspect, there is provided an electronic device comprising a processor, a memory, a communication interface, and one or more programs stored in the memory and configured to be executed by the processor, the programs comprising instructions for performing the steps in the method of the first aspect.

In a fifth aspect, a computer-readable storage medium is provided, storing a computer program for electronic data exchange, wherein the computer program causes a computer to perform the method of the first aspect.

In a sixth aspect, a computer program product is provided, wherein the computer program product comprises a non-transitory computer readable storage medium storing a computer program, the computer program being operable to cause a computer to perform some or all of the steps as described in the first aspect of the embodiments of the present application. The computer program product may be a software installation package.

The technical scheme provided by the application receives the resolution switching instruction, stops hardware TE and reconfigures RXBR, DSC, VIDC modules; starting an RX module to wait for the AP to send display data, and receiving the AP to send the display data (namely receiving an RXBR Frame Start signal); judging whether LCDC_LINE_STS is larger than gen_te_line, if so, generating software TE according to the LCDC_LINE_STS, continuously judging the value of LCDC_LINE_STS, and when the value of LCDC_LINE_STS is larger than or equal to VBP+VACT, making TXPower Down, and waiting for RXBR Frame End signal without outputting the next Frame data; after receiving RXBR Frame End signal, TX, LCDC and MEMC reset re-initiate the configuration of resolution, display is restarted, and software TE is switched into hardware TE mode. According to the technical scheme, when the software TE is generated, the LCDC_LINE_STS is required to be larger than the gen_te_line, so that the splash screen is avoided, and the switching resolution experience of the user display screen is improved.

Drawings

The drawings used in the embodiments of the present application are described below.

FIG. 1 is a block diagram of an application of chips provided herein;

FIG. 2 is a schematic diagram of a chip display data path provided herein;

fig. 3 is a flow chart of a resolution real-time switching control method provided in the present application;

fig. 4 is a schematic structural diagram of a resolution real-time switching control device provided in the present application;

fig. 5 is a schematic structural diagram of an electronic device provided in the present application.

Detailed Description

Embodiments of the present application are described below with reference to the accompanying drawings in the embodiments of the present application.

The term "and/or" in this application is merely an association relation describing an associated object, and indicates that three relations may exist, for example, a and/or B may indicate: a exists alone, A and B exist together, and B exists alone. In this context, the character "/" indicates that the front and rear associated objects are an "or" relationship.

The term "plurality" as used in the embodiments herein refers to two or more. The first, second, etc. descriptions in the embodiments of the present application are only used for illustrating and distinguishing the description objects, and no order division is used, nor does it indicate that the number of the devices in the embodiments of the present application is particularly limited, and no limitation on the embodiments of the present application should be construed. The "connection" in the embodiments of the present application refers to various connection manners such as direct connection or indirect connection, so as to implement communication between devices, which is not limited in any way in the embodiments of the present application.

MIPI (mobile industry processor interface ) is an open standard established for mobile application processors by the MIPI alliance, including ARM, samsung, intel, etc. companies. The bridge chip converts the input signal into the MIPI timing interface signal through an internal conversion mechanism in the image VIDEO mode or COMMAND mode.

The TE signal is a signal generated by the chip for preventing a tearing problem at the time of refreshing a picture in the image display process. When the next frame of image is ready to be refreshed, the chip generates a TE signal, and optionally, the AP monitors the rising edge of the TE signal or sends the next frame of image data to the chip after detecting that the TE signal is in a high level state.

VSYNC is a frame synchronization signal-vertical synchronization signal of an image mode, and is between one frame of picture and one frame of picture, and triggers the signal; the reason for the vertical synchronization signal is to solve the problem of tearing the picture, and if the vertical synchronization signal is not present, when the frame data rendered by the engine is relatively fast, the display screen cannot keep up (for example, a frame is rendered for 10ms, the display refresh period of the display screen is 16ms, the display screen is within the 16ms display duration range, the GPU has rendered 1.6 frames of image data, which results in that the previous frame of image is covered by the next frame of image data to cause tearing phenomenon), and it may happen that a certain frame is currently displayed, and another frame is triggered to be displayed on the display screen.

Referring to fig. 1, fig. 1 provides a block diagram of a chip application, which includes an AP, a chip, and an LCD, as shown in fig. 1, wherein the AP is connected to the chip (e.g., LCDC), and the chip is connected to the LCD.

As shown in fig. 1, the chip 100 includes a mobile industry processor interface receiving MIPI RX (receiving) module 101, a Video preprocessing VPRE module 102, an image processing VIDC module 103, an image display processing module LCDC module 104, and a MIPI TX (transmitting) module 105, where the MIPI RX module 101 is connected to the VPRE module 102, the VPRE module 102 is connected to the VIDC module 103, the VIDC module 103 is connected to the LCDC module 104, the LCDC module 104 is connected to the MIPI TX module 105, and the Video mode means that the output mode of the chip is a Video mode. In the Video mode, the VIDC module informs the LCDC module of carrying out data synchronous transmission through a frame start signal, and the LCDC module finishes data processing and informs the MIPI TX module of carrying out data synchronous transmission through an output end frame synchronization Vsync_out signal.

Tearing effect: a teoring Effect, TE;

RXBR: the (MIPIRX Bridge) module is used for realizing the Bridge connection of MIPI DSI Device Controller IP with the video processing module (DSC/VIDC) and the Microprocessor (MCU); DSC: display Stream Compression Standard, herein referred to as a module for processing DSC data;

VICC: video controller, image processing module;

LCDC, LCD Controller, image display processing module;

horizon front porch, horizontal anterior shoulder;

HBP Horizon back porch, horizontal posterior shoulder;

VFP Vertical front porch, vertical front shoulder;

VBP Vertical back porch, vertical back shoulder;

VACT, vertical Active, vertical activity;

HACT, horizontalin Active, horizon activity;

lcdc_line_sts, LCDC LINE STATUS, the LINE number currently displayed by LCDC;

gen_te_line: generating a line number position of TE;

MEMC, memory control, and frame buffer input/output control module.

RXBR Frame Start, RXBR Frame Start;

RXBR Frame End, RXBR Frame End;

MEMC reset: MEMC reset;

TX Power Down: and sending power failure.

Referring to fig. 3, fig. 3 provides a resolution real-time switching control method, which is performed under the structure of a chip display data path as shown in fig. 2, and which includes the steps of:

step S301, receiving a resolution switching instruction, stopping hardware TE, and reconfiguring a RXBR, DSC, VIDC module; starting an RX module to wait for the AP to send display data, and receiving the AP to send the display data (namely receiving an RXBR Frame Start signal);

step S302, judging whether the LCDC_LINE_STS is larger than gen_te_line, if the LCDC_LINE_STS is larger than gen_te_line, generating software TE according to the LCDC_LINE_STS, continuously judging the value of the LCDC_LINE_STS, if the value of the LCDC_LINE_STS is larger than or equal to VBP+VACT, making TX Power Down, and not outputting the next Frame data, and waiting for RXBR Frame End signals;

in step S303, after receiving the RXBR Frame End signal, the TX, LCDC, MEMC reset re-initiate the configuration of the resolution, and then re-start the display, and the software TE is switched to the hardware TE mode.

For example, the method may further include:

if the lcdc_line_sts is smaller than the gen_te_line, then a set time (e.g., 15 ms or 10ms, etc.) is delayed to determine if the lcdc_line_sts is larger than the gen_te_line, and if the lcdc_line_sts is larger than the gen_te_line, software TE is generated according to the lcdc_line_sts.

For example, the method may further include, before steps S302 and S303:

if TXPower Down action is not performed after the RXBR Frame End signal is received, the position of the gen_te_line is adjusted, after the TXPower Down action is performed, the display is restarted after the configuration of the initial resolution of TX, LCDC and MEMC reset is restarted, and the software TE is switched into a hardware TE mode.

Because for the AP, if the TX Power Down action is not performed after the RXBR frame end signal is received, it indicates that the AP writing catches up with the LCDC reading in time, a splash screen phenomenon can occur, and therefore the position of the gen_te_line needs to be adjusted, so that the AP writing is prevented from occurring on the splash screen after the LCDC reading time.

For example, the adjusting the gen_te_line position may specifically include:

advancing the gen_te_line position forward by a set time;

or the gen_te_line position is adjusted forward step by step until the lcdc_line_sts is greater than gen_te_line.

Referring to fig. 4, fig. 4 is a resolution real-time switching control device, which includes:

By way of example only, the present invention is directed to a method of,

the judging and processing unit is further configured to judge whether the lcdc_line_sts is greater than the gen_te_line after a set time is delayed if the lcdc_line_sts is less than the gen_te_line, and generate the software TE according to the lcdc_line_sts if the lcdc_line_sts is greater than the gen_te_line.

By way of example only, the present invention is directed to a method of,

the judging and processing unit is further configured to, if the receiving unit receives the RXBR Frame End signal and does not do TX Power Down action yet, adjust the gen_te_line position and do TX Power Down action, restart display after the TX, LCDC, MEMC reset re-initiate resolution configuration, and switch the software TE to the hardware TE mode.

It will be appreciated that the apparatus, in order to achieve the above-described functions, comprises corresponding hardware and/or software modules for performing the respective functions. The steps of an algorithm for each example described in connection with the embodiments disclosed herein may be embodied in hardware or a combination of hardware and computer software. Whether a function is implemented as hardware or computer software driven hardware depends upon the particular application and design constraints imposed on the solution. Those skilled in the art may implement the described functionality using different approaches for each particular application in conjunction with the embodiments, but such implementation is not to be considered as outside the scope of this application.

The present embodiment may divide the functional modules of the electronic device according to the above method example, for example, each functional module may be divided corresponding to each function, or two or more functions may be integrated into one processing module. The integrated modules described above may be implemented in hardware. It should be noted that, in this embodiment, the division of the modules is schematic, only one logic function is divided, and another division manner may be implemented in actual implementation.

It should be noted that, all relevant contents of each step related to the above method embodiment may be cited to the functional description of the corresponding functional module, which is not described herein.

In case an integrated unit is employed, the user equipment may comprise a processing module and a storage module. The processing module may be configured to control and manage actions of the user equipment, for example, may be configured to support the electronic device to execute the steps executed by the acquiring unit, the communication unit, and the processing unit. The memory module may be used to support the electronic device to execute stored program code, data, etc.

Wherein the processing module may be a processor or a controller. Which may implement or perform the various exemplary logic blocks, modules, and circuits described in connection with this disclosure. A processor may also be a combination that performs computing functions, e.g., including one or more microprocessors, digital signal processing (digital signal processing, DSP) and microprocessor combinations, and the like. The memory module may be a memory. The communication module can be a radio frequency circuit, a Bluetooth chip, a Wi-Fi chip and other equipment which interact with other electronic equipment.

It should be understood that the connection relationship between the modules illustrated in the embodiments of the present application is only illustrative, and does not limit the structure of the user equipment. In other embodiments of the present application, the ue may also use different interfacing manners in the foregoing embodiments, or a combination of multiple interfacing manners.

Referring to fig. 5, fig. 5 is an electronic device 50 (specifically may be an intelligent vehicle-mounted system of an automobile) provided in an embodiment of the present application, where the electronic device 50 includes a processor 501, a memory 502, and a communication interface 503, where the processor 501, the memory 502, and the communication interface 503 are connected to each other by a bus, and the electronic device may further include: a display screen, which may be connected to the processor 501 via a bus.

Memory 502 includes, but is not limited to, random access memory (randomaccess memory, RAM), read-only memory (ROM), erasable programmable read-only memory (erasable programmable read only memory, EPROM), or portable read-only memory (compact disc read-only memory, CD-ROM), with memory 502 for associated computer programs and data. The communication interface 503 is used to receive and transmit data.

The processor 501 may be one or more central processing units (centralprocessing unit, CPU), and in the case where the processor 501 is a CPU, the CPU may be a single-core CPU or a multi-core CPU.

The processor 501 may include one or more processing units, such as: the processing units may include an application processor (application processor, AP), a modem processor, a graphics processor (graphics processing unit, GPU), an image signal processor (imagesignal processor, ISP), a controller, a video codec, a digital signal processor (digital signal processor, DSP), a baseband processor, and/or a neural network processor (neural-networkprocessing unit, NPU), etc. Wherein the different processing units may be separate components or may be integrated in one or more processors. In some embodiments, the user equipment may also include one or more processing units. The controller can generate operation control signals according to the instruction operation codes and the time sequence signals to finish the control of instruction fetching and instruction execution. In other embodiments, memory may also be provided in the processing unit for storing instructions and data. The memory in the processing unit may be a cache memory, for example. The memory may hold instructions or data that the processing unit has just used or recycled. If the processing unit needs to reuse the instruction or data, it can be called directly from the memory. In this way, repeated accesses are avoided, and the latency of the processing unit is reduced, thereby improving the efficiency of the user equipment in processing data or executing instructions.

In some embodiments, processor 501 may include one or more interfaces. The interfaces may include inter-integrated circuit (inter-integrated circuit, I2C) interfaces, inter-integrated circuit audio (inter-integrated circuit sound, I2S) interfaces, pulse code modulation (pulsecode modulation, PCM) interfaces, universal asynchronous receiver transmitter (universal asynchronous receiver/transmitter, UART) interfaces, mobile industry processor interfaces (mobileindustry processor interface, MIPI), general-purpose input/output (GPIO) interfaces, SIM card interfaces, and/or USB interfaces, among others. The USB interface is an interface conforming to the USB standard specification, and specifically may be a Mini USB interface, a micro USB interface, a USB Type C interface, or the like. The USB interface can be used for connecting a charger to charge the user equipment and can also be used for transmitting data between the user equipment and the peripheral equipment. The USB interface can also be used for connecting with a headset, and playing audio through the headset.

If the electronic device 50 is an intelligent terminal device, such as a mobile phone, an intelligent vehicle-mounted device, a tablet computer, etc., the processor 501 in the electronic device 50 is configured to read the computer program code stored in the memory 502, and control the intelligent terminal device to perform the following operations:

By way of example only, the present invention is directed to a method of,

if the LCDC_LINE_STS is smaller than the gen_te_line, judging whether the LCDC_LINE_STS is larger than the gen_te_line after delaying for a set time, and generating software TE according to the LCDC_LINE_STS if the LCDC_LINE_STS is larger than the gen_te_line.

By way of example only, the present invention is directed to a method of,

Illustratively, adjusting the gen_te_line position specifically includes:

advancing the gen_te_line position forward by a set time;

All relevant contents of each scenario related to the above method embodiment may be cited to the functional description of the corresponding functional module, which is not described herein.

Embodiments of the present application also provide a computer readable storage medium having a computer program stored therein, which when run on a network device, implements the method flow shown in fig. 3.

Embodiments of the present application also provide a computer program product, which when run on a terminal, implements the method flow shown in fig. 3.

The foregoing description of the embodiments of the present application has been presented primarily in terms of a method-side implementation. It will be appreciated that the electronic device, in order to achieve the above-described functions, includes corresponding hardware structures and/or software templates for performing the respective functions. Those of skill in the art will readily appreciate that the elements and algorithm steps described in connection with the embodiments disclosed herein may be embodied as hardware or a combination of hardware and computer software. Whether a function is implemented as hardware or computer software driven hardware depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.

The embodiment of the application may divide the functional units of the electronic device according to the above method example, for example, each functional unit may be divided corresponding to each function, or two or more functions may be integrated in one processing unit. The integrated units may be implemented in hardware or in software functional units. It should be noted that, in the embodiment of the present application, the division of the units is schematic, which is merely a logic function division, and other division manners may be implemented in actual practice.

It should be noted that, for simplicity of description, the foregoing method embodiments are all expressed as a series of action combinations, but it should be understood by those skilled in the art that the present application is not limited by the order of actions described, as some steps may be performed in other order or simultaneously in accordance with the present application. Further, those skilled in the art will also appreciate that the embodiments described in the specification are all of the preferred embodiments, and that the acts and templates referred to are not necessarily required for the present application.

In the foregoing embodiments, the descriptions of the embodiments are emphasized, and for parts of one embodiment that are not described in detail, reference may be made to related descriptions of other embodiments.

In the several embodiments provided in this application, it should be understood that the disclosed apparatus may be implemented in other ways. For example, the above-described apparatus embodiments are merely illustrative, such as the above-described division of units, merely a division of logic functions, and there may be additional manners of dividing in actual implementation, such as multiple units or components may be combined or integrated into another system, or some features may be omitted, or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be an indirect coupling or communication connection via some interfaces, devices or units, or may be in electrical or other forms.

The units described above as separate components may or may not be physically separate, and components shown as units may or may not be physical units, may be located in one place, or may be distributed over a plurality of network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

In addition, each functional unit in each embodiment of the present application may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit. The integrated units may be implemented in hardware or in software functional units.

The integrated units described above, if implemented in the form of software functional units and sold or used as stand-alone products, may be stored in a computer readable memory. Based on such understanding, the technical solution of the present application may be embodied in essence or a part contributing to the prior art or all or part of the technical solution in the form of a software product stored in a memory, including several instructions for causing a computer device (which may be a personal computer, a server or a network device, etc.) to perform all or part of the steps of the above-mentioned method of the various embodiments of the present application. And the aforementioned memory includes: a U-disk, a Read-Only Memory (ROM), a random access Memory (RAM, random Access Memory), a removable hard disk, a magnetic disk, or an optical disk, or other various media capable of storing program codes.

Those of ordinary skill in the art will appreciate that all or a portion of the steps in the various methods of the above embodiments may be implemented by a program that instructs associated hardware, and the program may be stored in a computer readable memory, which may include: flash disk, read-Only Memory (ROM), random access Memory (RandomAccess Memory, RAM), magnetic disk or optical disk.

Claims

1. The resolution real-time switching control method is characterized by comprising the following steps of:

receiving a resolution switching instruction, stopping hardware TE, and reconfiguring a bridge module RXBR, a data module DSC and an image processing module VICC; starting a receiving module RX to wait for an application processor AP to send display data, and receiving the AP to send the display data, wherein the received AP to send the display data is a received Frame starting RXBR Frame Start signal; the TE is a tearing effect;

judging whether the current display LINE number LCDC_LINE_STS is larger than the TE LINE number gen_te_line, if the LCDC_LINE_STS is larger than the gen_te_line, generating software TE according to the LCDC_LINE_STS, continuously judging the value of the LCDC_LINE_STS, if the value of the LCDC_LINE_STS is larger than or equal to the vertical back shoulder VBP+vertical activity VACT, transmitting Power Down TX Power Down, not outputting next Frame data, and waiting for RXBR Frame End signals;

after receiving the Frame End signal RXBR Frame End, the transmitting module TX, the chip LCDC, and the memory control reset MEMC reset restart the configuration of the initial resolution, restart the display, and switch the software TE to the hardware TE mode.

2. The resolution real-time switching control method according to claim 1, characterized in that the method further comprises:

3. The resolution real-time switching control method according to claim 1, further comprising, after receiving the RXBR Frame End signal:

if the TX Power Down action is not performed after the RXBR Frame End signal is received, the gen_te_line position is adjusted, the TX Power Down action is performed, the TX, LCDC and MEMC reset are restarted to display after the configuration of the initial resolution is restarted, and the software TE is switched into a hardware TE mode.

4. The method for controlling real-time switching of resolution according to claim 3, wherein the adjusting the gen_te_line position specifically comprises:

advancing the gen_te_line position forward by a set time;

5. A resolution real-time switching control device, characterized in that the device comprises:

the receiving unit is used for receiving the resolution switching instruction and stopping hardware TE; the TE is a tearing effect;

the configuration starting unit is used for reconfiguring the bridge module RXBR, the data module DSC and the image processing module VICC; starting a receiving module RX to wait for an application processor AP to send display data;

the receiving unit is further configured to receive AP transmission display data, where the received AP transmission display data is a received RXBR Frame Start signal;

the judging and processing unit is used for judging whether the LCDC_LINE_STS is larger than the gen_te_line, if the LCDC_LINE_STS is larger than the gen_te_line, generating software TE according to the LCDC_LINE_STS, continuously judging the value of the LCDC_LINE_STS, if the value of the LCDC_LINE_STS is larger than or equal to VBP+VACT, making TX Power Down, not outputting the next Frame data, and waiting for RXBR Frame End signals; after the receiving unit receives the RXBR Frame End signal, the transmitting module TX, the chip LCDC and the MEMC reset restart the configuration of the initial resolution, and then display is restarted, and the software TE is switched into a hardware TE mode.

6. The resolution real-time switching control apparatus according to claim 5, wherein,

7. The resolution real-time switching control apparatus according to claim 5, wherein,

8. A chip comprising a resolution real-time switching control device according to any one of claims 5-7.

9. An electronic device comprising a processor, a memory, a communication interface, and one or more programs, wherein the one or more programs are stored in the memory and configured to be executed by the processor, the programs comprising instructions for performing the steps of the method of any of claims 1-4.

10. A computer readable storage medium having stored therein a computer program, which when run on a computer device performs the method of any of claims 1-4.