CN115794562B - Safety module for solid state disk - Google Patents

Safety module for solid state disk Download PDF

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CN115794562B
CN115794562B CN202211706036.2A CN202211706036A CN115794562B CN 115794562 B CN115794562 B CN 115794562B CN 202211706036 A CN202211706036 A CN 202211706036A CN 115794562 B CN115794562 B CN 115794562B
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solid state
state disk
value
abnormality
defect
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CN115794562A (en
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庞仁东
张涛
赵坤
武恒基
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Hongqin Beijing Technology Co ltd
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Abstract

The invention provides a safety module for a solid state disk, which comprises: the safety warning lamp is connected with each first interface of the solid state disk; the state monitor is connected with each operation component of the solid state disk and is used for monitoring and obtaining the current operation information of the solid state disk when the solid state disk is tested based on the test case; the processing center is used for carrying out safety analysis on the running information, locking a second interface matched with the test case and configuring a safety analysis result on the corresponding second interface; the processing center is further used for analyzing the safety analysis result of each second interface, determining the safety state, setting a safety warning lamp to each interface of the solid state disk and setting a state monitor to each operation assembly, so that the abnormal problems of the solid state disk under different tests can be effectively obtained, the problem of faults of the corresponding solid state disk can be conveniently and timely solved, and the data loss can be avoided.

Description

Safety module for solid state disk
Technical Field
The invention relates to the technical field of safety detection, in particular to a safety module for a solid state disk.
Background
Solid State Disk (Solid State Disk or Solid State Drive, SSD for short), also called Solid State drive, is a hard Disk made of Solid State electronic memory chip array.
Before the solid state disk is used daily, the safety and usability of the solid state disk are required to be ensured, and the problems of the failure of elements of certain circuits in the solid state disk and the like are avoided, so that the loss of data to be stored or called data and the like are caused in the process of using the solid state disk.
Therefore, the invention provides a safety module for a solid state disk.
Disclosure of Invention
The invention provides a safety module for a solid state disk, which is used for conveniently and effectively obtaining abnormal problems of the solid state disk under different tests by arranging a safety warning lamp on each interface of the solid state disk and arranging a state monitor on each operation assembly, and conveniently and timely solving the fault problems of the corresponding solid state disk and avoiding data loss by flashing the warning lamp.
The invention provides a safety module for a solid state disk, which comprises:
the safety warning lamps are connected with each first interface of the solid state disk, and the safety warning lamps carry out safety warning with different frequencies in different safety states;
the state monitor is connected with each operation component of the solid state disk and is used for monitoring and obtaining the current operation information of the solid state disk when the solid state disk is tested based on the test case;
the processing center is used for carrying out safety analysis on the current operation information, locking a second interface matched with the test case and configuring a safety analysis result on the corresponding second interface;
the processing center is further used for analyzing the safety analysis result of each second interface, determining the safety state and controlling the safety warning lamps matched with the second interfaces to flash according to the corresponding safety frequency.
Preferably, the processing center includes:
the circuit determining module is used for acquiring a standard test circuit of the test case based on the solid state disk, and simultaneously, when the solid state disk is tested based on the test case, starting all state detectors to perform state detection on the matched operation components to obtain an actual test circuit;
the alignment processing module is used for performing alignment processing on the standard test circuit and the actual test circuit based on the test input assembly and the test output assembly and judging whether the standard test circuit is completely consistent with the actual test circuit;
if the test results are consistent, comparing the standard test result of each operation component in the standard test line with the actual test result of each operation component in the actual test line to construct a comparison array;
the column analysis module is used for analyzing a matched column and a non-matched column in the comparison array, acquiring a breakpoint matched column and a first position of the breakpoint matched column based on a standard test line from the non-matched column, and acquiring an abnormal point matched column and a second position of the abnormal point matched column based on the standard test line from the non-matched column, wherein the breakpoint matched column refers to that an actual test result in the corresponding non-matched column is 0, and the abnormal point matched column refers to that the result abnormality of the actual test result and the standard test result is larger than a preset abnormality;
the mapping table establishing module is used for establishing a first abnormal mapping table based on the first circuit setting condition and the third circuit setting condition of the running component at the third position of the matching column and the second abnormal mapping table based on the second circuit setting condition and the third circuit condition from the historical database according to the first circuit setting condition of the running component at the first position and the second circuit setting condition of the running component at the second position;
the first exception obtaining module is used for matching the first sequence of the breakpoint matching column with a first exception mapping table to obtain a first exception;
the second abnormality acquisition module is used for matching the second sequence of the abnormal point matching column with a second abnormality mapping table to acquire a second abnormality;
the mutual exclusion analysis module is used for analyzing the mutual exclusion of the first abnormality and the second abnormality;
when the mutual exclusivity is extremely large, overlapping the first abnormality and the second abnormality, and sending an abnormality overlapping instruction to a safety warning lamp matched with the test output assembly to flash;
and when the mutual exclusivity is extremely small, carrying out exception screening on the first exception and the second exception to obtain a third exception, and sending a third exception instruction to a safety warning lamp matched with the test output assembly to flash.
Preferably, the mutual exclusion analysis module includes:
a value determining unit configured to determine a first factor set of the first abnormality and a first value of each first factor, and determine a second factor set of the second abnormality and a second value of each second factor at the same time;
the first calculation unit is used for establishing a sub-mutex table of each first factor and all second factors according to the mutex relation table, and calculating a first mutex value corresponding to the sub-mutex table based on the sub-mutex table, a first value of the first factor in the sub-mutex table and a second value of each second factor;
Figure BDA0004024684490000031
wherein D1 represents a first mutex value of the corresponding sub-mutex table; y is max Representing a maximum mutual exclusion factor acquired based on the corresponding sub-mutual exclusion table; y (d 1, d 2) i ) Representing a first value d1 of a first factor and a second value d2 of an ith second factor corresponding to the first factor in the sub mutual exclusion table i Mutual exclusion factor of (2);
Figure BDA0004024684490000032
representing an average mutual exclusion factor; n1 represents the total number of the second factors existing in the corresponding sub mutex table;
the second calculation unit is used for calculating a second exclusive value D2 of the first exception and the second exception based on all the first exclusive values;
Figure BDA0004024684490000033
wherein max represents the maximum function; D1D 1 j Representing a j-th first mutex value;
Figure BDA0004024684490000034
representing a weight corresponding to the first mutex value; n2 represents the total number of the first mutex values present;
and the value mapping unit is used for performing value mapping on the second mutex value D2 to obtain mutex.
Preferably, the mutual exclusion analysis module further includes:
a flicker processing unit configured to match a first flicker frequency associated with the first anomaly and a second flicker frequency associated with the second anomaly from an anomaly-flicker database when the mutual exclusivity is a maximum mutual exclusivity;
an anomaly screening unit for selecting the anomaly from
Figure BDA0004024684490000041
and />
Figure BDA0004024684490000042
Figure BDA0004024684490000043
Middle screening the maximum value and locking the main abnormality matched with the maximum value;
a time length and frequency determining unit for determining the time length and frequency according to
Figure BDA0004024684490000044
Determining a first scintillation period, a first scintillation frequency, and a second scintillation period, a second scintillation frequency, of the primary anomaly, wherein D2 j1 Representing a mutual exclusion value corresponding to the second value of the corresponding second factor and the first value of the j1 th first factor; />
Figure BDA0004024684490000045
A weight representing a mutually exclusive value corresponding to the second value of the corresponding second factor and the first value of the j1 st first factor; n3 represents the total number of mutex values determined for the second factor as a main;
the instruction setting unit is used for setting the first flicker duration, the second flicker duration, the first flicker frequency and the second flicker frequency and sending an abnormal superposition instruction to the corresponding safety warning lamp.
Preferably, the duration and frequency determining unit includes:
if it is
Figure BDA0004024684490000046
Judging the first abnormality as a main abnormality and the second abnormality as a secondary abnormality;
if it is
Figure BDA0004024684490000047
Determining the first anomaly as a secondary anomaly and the second anomaly as a primary anomaly;
if it is
Figure BDA0004024684490000048
One anomaly is randomly screened as a primary anomaly and the other anomaly as a secondary anomaly.
Preferably, the processing center further includes:
the duration matching module is used for obtaining the total set duration of the safety warning lamp matched with the test output assembly from the attribute-duration table according to the test attribute of the test case;
the cumulative sum of the first flicker duration and the second flicker duration corresponding to the flicker warning lamp is the total set duration.
Preferably, the alignment processing module includes:
the component judging unit is used for judging whether the component is missing or redundant when the standard test circuit is not completely consistent with the actual test circuit;
the first display unit is used for determining a missing component based on the standard test circuit when the missing component exists, inputting the missing component into a defect analysis model according to the missing position in the actual test circuit, obtaining a first defect of the solid state disk, and outputting the first defect to a display screen connected with the solid state disk for first reminding display;
the analysis unit is used for inputting the redundant components into a defect analysis model to obtain a second defect of the solid state disk when the redundant components exist, simultaneously, respectively acquiring a simple circuit formed by each redundant component, inputting circuit information of the simple circuit into the defect analysis model, and respectively acquiring a third defect aiming at each simple circuit;
and the second display unit is used for establishing the second defect and all the third defects, acquiring the fourth defect of the solid state disk, and outputting the fourth defect to a display screen connected with the solid state disk for second reminding display.
Preferably, the second display unit includes:
the comparison analysis block is used for carrying out comparison analysis on the second defects and each third defect, when the comparison analysis result meets the comparison analysis standard, the corresponding third defects are reserved, and otherwise, the corresponding third defects are regarded as undetermined;
and the defect combination block is used for carrying out first combination on the third defect to be determined to obtain a fifth defect, and carrying out second combination on the fifth defect and the second defect to obtain a fourth defect.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims thereof as well as the appended drawings.
The technical scheme of the invention is further described in detail through the drawings and the embodiments.
Drawings
The accompanying drawings are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate the invention and together with the embodiments of the invention, serve to explain the invention. In the drawings:
fig. 1 is a structural diagram of a security module for a solid state disk according to an embodiment of the present invention.
Detailed Description
The preferred embodiments of the present invention will be described below with reference to the accompanying drawings, it being understood that the preferred embodiments described herein are for illustration and explanation of the present invention only, and are not intended to limit the present invention.
The invention provides a safety module for a solid state disk, as shown in fig. 1, comprising:
the safety warning lamps are connected with each first interface of the solid state disk, and the safety warning lamps carry out safety warning with different frequencies in different safety states;
the state monitor is connected with each operation component of the solid state disk and is used for monitoring and obtaining the current operation information of the solid state disk when the solid state disk is tested based on the test case;
the processing center is used for carrying out safety analysis on the current operation information, locking a second interface matched with the test case and configuring a safety analysis result on the corresponding second interface;
the processing center is further used for analyzing the safety analysis result of each second interface, determining the safety state and controlling the safety warning lamps matched with the second interfaces to flash according to the corresponding safety frequency.
In this embodiment, the first interface of the solid state disk is a communication interface, a power interface, a data processing interface, etc., that is, a safety warning lamp is set for each interface, mainly for realizing abnormal warning based on the safety warning lamp when the line corresponding to the corresponding interface is abnormal, and the safety warning lamp is an LED lamp (composed of a plurality of lamp sheets).
In this embodiment, the status monitor refers to a device that can detect the current, voltage, resistance, etc. of the corresponding component to perform analysis of the corresponding component.
In this embodiment, for example, the test case is stored in the hard disk by acquiring the storage path of the test case, that is, the standard test line.
In this embodiment, since the solid state disk includes a plurality of electronic memory chips, each memory chip may be regarded as a corresponding component.
In this embodiment, for example, the solid state disk has interfaces 1, 2, and 3, and when testing based on the test case, the solid state disk is matched with interface 2, and at this time, interface 2 is regarded as a second interface.
In this embodiment, the purpose of configuring the security analysis results to the respective second interfaces is to link the security analysis results to the second interfaces, in order to determine the faults present in the second interfaces.
In this embodiment, the safety state refers to that there is an abnormality at the position a on the line corresponding to the storage path, and the existing fault can be clarified, so that the lamp connected with the second interface can be controlled to flash conveniently.
In this embodiment, the current operation information refers to acquiring related storage information during the storage test performed by the test case, that is, the current operation condition of each element (component) in the storage test path, including current, voltage, resistance, and the like, and also includes corresponding stored content and the like, where the stored content is consistent with the test case.
The beneficial effects of the technical scheme are as follows: through setting up safety warning light to every interface of solid state disk and setting up status monitor to every operation subassembly, be convenient for effectually obtain the solid state disk and exist unusual problem under different tests, and twinkle through the warning light, be convenient for in time know the trouble problem that corresponds solid state disk and exist, the convenience is in time solved, avoids the data loss.
The invention provides a safety module for a solid state disk, which comprises a processing center, a control center and a control center, wherein the processing center comprises:
the circuit determining module is used for acquiring a standard test circuit of the test case based on the solid state disk, and simultaneously, when the solid state disk is tested based on the test case, starting all state detectors to perform state detection on the matched operation components to obtain an actual test circuit;
the alignment processing module is used for performing alignment processing on the standard test circuit and the actual test circuit based on the test input assembly and the test output assembly and judging whether the standard test circuit is completely consistent with the actual test circuit;
if the test results are consistent, comparing the standard test result of each operation component in the standard test line with the actual test result of each operation component in the actual test line to construct a comparison array;
the column analysis module is used for analyzing a matched column and a non-matched column in the comparison array, acquiring a breakpoint matched column and a first position of the breakpoint matched column based on a standard test line from the non-matched column, and acquiring an abnormal point matched column and a second position of the abnormal point matched column based on the standard test line from the non-matched column, wherein the breakpoint matched column refers to that an actual test result in the corresponding non-matched column is 0, and the abnormal point matched column refers to that the result abnormality of the actual test result and the standard test result is larger than a preset abnormality;
the mapping table establishing module is used for establishing a first abnormal mapping table based on the first circuit setting condition and the third circuit setting condition of the running component at the third position of the matching column and the second abnormal mapping table based on the second circuit setting condition and the third circuit condition from the historical database according to the first circuit setting condition of the running component at the first position and the second circuit setting condition of the running component at the second position;
the first exception obtaining module is used for matching the first sequence of the breakpoint matching column with a first exception mapping table to obtain a first exception;
the second abnormality acquisition module is used for matching the second sequence of the abnormal point matching column with a second abnormality mapping table to acquire a second abnormality;
the mutual exclusion analysis module is used for analyzing the mutual exclusion of the first abnormality and the second abnormality;
when the mutual exclusivity is extremely large, overlapping the first abnormality and the second abnormality, and sending an abnormality overlapping instruction to a safety warning lamp matched with the test output assembly to flash;
and when the mutual exclusivity is extremely small, carrying out exception screening on the first exception and the second exception to obtain a third exception, and sending a third exception instruction to a safety warning lamp matched with the test output assembly to flash.
In this embodiment, for example: standard test line: component 1-component 3-component 5-component 6 (the elements stored on the line, the elements being determined in sequence according to the line through which the test case is flowing), such as: the actual test line is also: component 1-component 3-component 5-component 6.
In this embodiment, the alignment process refers to:
aligning the component 1 in the standard test line with the component 1 in the actual test line, and aligning the component 6 in the standard test line with the component 6 in the actual test line, if the two lines are identical, to construct a comparative array, as follows:
Figure BDA0004024684490000091
standard test results are shown in the marks 1, 2, 3 and 4;
actual test results are shown in real 1, real 2, real 3 and real 4.
In this embodiment, the matching column refers to that the actual information under the same component is substantially identical to the standard information.
The non-matching columns refer to actual information under the same component that is inconsistent with standard information.
In this embodiment, for example, the breakpoint match column pair corresponds to 1 and 1, there are 4 columns in the comparison array, and the non-match columns and the match columns are determined by the 4 columns.
The preset anomaly refers to that the actual test result and the standard test result in the same column are abnormal, for example, the current of the actual test result is 1A, the current of the standard test result is 0.3A, the difference is 0.7A, but the difference is greater than 0.2A, at this time, the result anomaly is considered to be greater than the preset anomaly, and the corresponding column is considered to be the abnormal point matching column.
In this embodiment, the history database includes possible anomalies of the solid state disk obtained by testing after various tests are performed on the solid state disk, and the determination of the anomalies is implemented based on different circuits in the solid state disk and positions where the circuits are located, so that the anomalies of the operating components in the first position can be obtained by matching the third circuit setting condition of the operating components in the third position with the corresponding first circuit condition.
In this embodiment, for example, the current actual circuit setting of the component 1 at the first position is a1, the first circuit setting based on the standard test line is a2, the third circuit setting is also obtained based on the standard test line and is a3, and finally, the obtained abnormality map is that the abnormality of the abnormal component corresponding to the first position can be obtained, for example, the comparison of a2, a3 and a1, the obtained abnormality is that of the current, the resistance, the voltage, etc., for example, the abnormality caused by the disconnection, the short circuit, etc. of the line.
In this embodiment, the first circuit setting condition refers to a circuit connection condition of the operation component at the first position, and since each circuit in the solid state disk is preset, the circuit connection condition of the operation component at the first position can be directly obtained, and the second circuit setting condition is similar to the first circuit setting condition, which is not described herein again.
In this embodiment, the first sequence includes [ the actual and standard comparison information of the breakpoint match column 1 and the actual and standard comparison information of the breakpoint match column 2. ], so the first anomaly mapping table includes different sequences and anomalies matched with the sequences, and therefore, the first anomaly can be obtained based on the first sequence, and the second anomaly is similar to the first anomaly in terms of the acquisition principle, which is not repeated here.
In this embodiment, mutual exclusivity refers to mutual exclusion of the first anomaly and the second anomaly, and the more mutually exclusive is the mutual exclusion of the first anomaly and the second anomaly, the less correlation is indicated between the first anomaly and the second anomaly, and the more independent is the obtained anomaly.
The beneficial effects of the technical scheme are as follows: through obtaining standard test circuit and actual test circuit to construct the contrast array, the back is through the analysis to the row, confirms the position that different situation are listed as and is located, and then obtains assorted unusual, and through carrying out mutual exclusion analysis to unusual, obtain the effective control instruction of warning light, be convenient for in time know the trouble problem that corresponds solid state disk to exist, the convenient in time solves, avoids data loss.
The invention provides a safety module for a solid state disk, which comprises:
a value determining unit configured to determine a first factor set of the first abnormality and a first value of each first factor, and determine a second factor set of the second abnormality and a second value of each second factor at the same time;
the first calculation unit is used for establishing a sub-mutex table of each first factor and all second factors according to the mutex relation table, and calculating a first mutex value corresponding to the sub-mutex table based on the sub-mutex table, a first value of the first factor in the sub-mutex table and a second value of each second factor;
Figure BDA0004024684490000101
wherein D1 represents a first mutex value of the corresponding sub-mutex table; y is max Representing a maximum mutual exclusion factor acquired based on the corresponding sub-mutual exclusion table; y (d 1, d 2) i ) Representing a first value d1 of a first factor and a second value d2 of an ith second factor corresponding to the first factor in the sub mutual exclusion table i Mutual exclusion factor of (2);
Figure BDA0004024684490000102
representing an average mutual exclusion factor; n1 represents the total number of the second factors existing in the corresponding sub mutex table;
the second calculation unit is used for calculating a second exclusive value D2 of the first exception and the second exception based on all the first exclusive values;
Figure BDA0004024684490000111
wherein max represents the maximum function; D1D 1 j Representing a j-th first mutex value;
Figure BDA0004024684490000112
representing a weight corresponding to the first mutex value; n2 represents the total number of the first mutex values present;
and the value mapping unit is used for performing value mapping on the second mutex value D2 to obtain mutex.
In this embodiment, the first set of factors is obtained by matching the first anomaly with an anomaly factor database that includes factors of different anomalies and anomaly matching, because the factors play different roles in anomalies, and therefore the factor values are different.
In this embodiment, the mutex relation table includes two different mutex factors, for example, the first factor set includes factors 1, 2, and 3, the second factor set includes factors 01 and 02, and the factors 1 and 01 and 02 form a corresponding sub-mutex table to calculate the first mutex value.
In this embodiment, the value range of the mutual exclusion factor is [0,1], where the sub mutual exclusion table may include mutual exclusion results corresponding to different factors and values, so that the mutual exclusion factor may be obtained.
In this embodiment, the value mapping refers to mapping D2 with maximum mutual exclusion and minimum mutual exclusion to obtain mutual exclusion, and the larger the value corresponding to D2, the more likely the value is the maximum mutual exclusion, otherwise the value is the minimum mutual exclusion.
The beneficial effects of the technical scheme are as follows: the sub-mutex table is constructed according to the mutex relation table by determining different abnormal factor sets, so that the first mutex value of each sub-mutex table is conveniently calculated, the second mutex value is obtained by calculating all the first mutex values, the mutex is obtained by value mapping, the flicker frequency and the flicker duration of the lamp are conveniently controlled, and data loss is avoided.
The invention provides a security module for a solid state disk, which comprises:
a flicker processing unit configured to match a first flicker frequency associated with the first anomaly and a second flicker frequency associated with the second anomaly from an anomaly-flicker database when the mutual exclusivity is a maximum mutual exclusivity;
an anomaly screening unit for selecting the anomaly from
Figure BDA0004024684490000113
and />
Figure BDA0004024684490000114
Figure BDA0004024684490000115
Middle screening the maximum value and locking the main abnormality matched with the maximum value; />
A time length and frequency determining unit for determining the time length and frequency according to
Figure BDA0004024684490000121
Determining a first scintillation period, a first scintillation frequency, and a second scintillation period, a second scintillation frequency, of the primary anomaly, wherein D2 j1 Representing a mutual exclusion value corresponding to the second value of the corresponding second factor and the first value of the j1 th first factor; />
Figure BDA0004024684490000122
A weight representing a mutually exclusive value corresponding to the second value of the corresponding second factor and the first value of the j1 st first factor; n3 represents the total number of mutex values determined for the second factor as a main;
the instruction setting unit is used for setting the first flicker duration, the second flicker duration, the first flicker frequency and the second flicker frequency and sending an abnormal superposition instruction to the corresponding safety warning lamp.
Preferably, the duration and frequency determining unit includes:
if it is
Figure BDA0004024684490000123
Judging the first abnormality as a main abnormality and the second abnormality as a secondary abnormality;
if it is
Figure BDA0004024684490000124
Determining the first anomaly as a secondary anomaly and the second anomaly as a primary anomaly;
if it is
Figure BDA0004024684490000125
One anomaly is randomly screened as a primary anomaly and the other anomaly as a secondary anomaly.
In this example, D2 j1 The calculation mode of (2) is similar to that of D1, except that the related parameters have different meanings, and are not repeated here.
In this embodiment, the primary abnormal flicker time length is longer than the secondary abnormal flicker time length, and when the time length is required to be described, the longer the primary abnormal flicker time length is, the shorter the corresponding secondary abnormal flicker time length is.
In this embodiment, the corresponding blinking time period is: total duration of
Figure BDA0004024684490000126
And get a first scintillation duration for the first anomaly, a second scintillation duration = total duration T-first scintillation duration.
In this embodiment, the anomaly-flicker database is pre-set, including different anomalies and flicker frequencies that match the anomalies.
In this embodiment, when
Figure BDA0004024684490000127
Figure BDA0004024684490000131
When the corresponding first blinking time period is the same as the second blinking time period.
The beneficial effects of the technical scheme are as follows: the main abnormality and the abnormal abnormality are effectively determined by determining the corresponding frequency of the abnormality according to the database and comparing the two maximum values, a basis is provided for the flicker duration, the rationality of the flicker of the lamplight is ensured, the prompt is convenient, and the data loss is avoided.
The invention provides a safety module for a solid state disk, which comprises a processing center and also comprises:
the duration matching module is used for obtaining the total set duration of the safety warning lamp matched with the test output assembly from the attribute-duration table according to the test attribute of the test case;
the cumulative sum of the first flicker duration and the second flicker duration corresponding to the flicker warning lamp is the total set duration.
In this embodiment, the attribute-duration table is preset, and includes different test attributes, such as storing test attributes, etc., to obtain the total set duration.
The beneficial effects of the technical scheme are as follows: the attribute-duration table is convenient for effectively matching the total set duration, and provides a basis for lamplight flickering.
The invention provides a safety module for a solid state disk, which comprises:
the component judging unit is used for judging whether the component is missing or redundant when the standard test circuit is not completely consistent with the actual test circuit;
the first display unit is used for determining a missing component based on the standard test circuit when the missing component exists, inputting the missing component into a defect analysis model according to the missing position in the actual test circuit, obtaining a first defect of the solid state disk, and outputting the first defect to a display screen connected with the solid state disk for first reminding display;
the analysis unit is used for inputting the redundant components into a defect analysis model to obtain a second defect of the solid state disk when the redundant components exist, simultaneously, respectively acquiring a simple circuit formed by each redundant component, inputting circuit information of the simple circuit into the defect analysis model, and respectively acquiring a third defect aiming at each simple circuit;
and the second display unit is used for establishing the second defect and all the third defects, acquiring the fourth defect of the solid state disk, and outputting the fourth defect to a display screen connected with the solid state disk for second reminding display.
In this embodiment, for example, standard test lines: component 1-component 3-component 4-component 5, actual test line: component 1-component 8-component 9-component 3-component 4-component 5, where component 8 and component 9 are redundant components if the line is actually tested: component 1-component 4-component 5, wherein component 3 is the missing component.
In this embodiment, the defect analysis model is trained in advance, and is based on the missing information corresponding to the missing components and the line defect matched with the missing information, and the redundant information corresponding to the redundant components and the line defect matched with the redundant information, which are obtained by training samples, so that the existing defect can be obtained, and therefore, the defect existing in the solid state disk can be determined by analyzing the component condition in the actual test line, for example, if the circuits of two components existing in the actual line are shorted, the two components may be used as the missing components in the test process, so as to analyze the line defect caused by the circuit shorting.
In this embodiment, various components, such as resistors, inductors, etc., are also included in the simple circuit, for example, in series or in parallel, so that the defects of the corresponding circuit can be obtained by analysis of the defect analysis model.
In this embodiment, the second drawback is: defect A1, a third defect of simple circuit 1 is: b1, a third drawback of the simple circuit 2 is: b2, at this time, the defect A1 is matched with the defect b1, and the defect A1 is not matched with the defect b2, that is, the defect existing in the corresponding simple circuit 2 has an influence on the actual test circuit.
The beneficial effects of the technical scheme are as follows: and analyzing the corresponding information of the component based on the defect analysis model by analyzing the redundancy or the deficiency of the component, and obtaining the defect by combining with the auxiliary analysis of a simple circuit, outputting and displaying the defect, so that the defect is timely processed, and the data deficiency is avoided.
The invention provides a safety module for a solid state disk, wherein the second display unit comprises:
the comparison analysis block is used for carrying out comparison analysis on the second defects and each third defect, when the comparison analysis result meets the comparison analysis standard, the corresponding third defects are reserved, and otherwise, the corresponding third defects are regarded as undetermined;
and the defect combination block is used for carrying out first combination on the third defect to be determined to obtain a fifth defect, and carrying out second combination on the fifth defect and the second defect to obtain a fourth defect.
In this embodiment, the second drawback is: defect A1, a third defect of simple circuit 1 is: b1, a third drawback of the simple circuit 2 is: b2, at this time, the defect A1 is matched with the defect b1, and the defect A1 is not matched with the defect b2, that is, the defect existing in the corresponding simple circuit 2 has an influence on the actual test circuit.
Then the third defect to be determined is defect b2, and at this time, the fifth defect combined is: the third defect b2, the fourth defect is: b2 and A1.
The beneficial effects of the technical scheme are as follows: and the third defect to be determined is obtained by comparing and analyzing the defects, and the third defect is combined with the second defect to obtain the fourth defect, so that the timely treatment of the defects is ensured, and the data loss is avoided.
It will be apparent to those skilled in the art that various modifications and variations can be made to the present invention without departing from the spirit or scope of the invention. Thus, it is intended that the present invention also include such modifications and alterations insofar as they come within the scope of the appended claims or the equivalents thereof.

Claims (7)

1. The utility model provides a safe module for solid state disk which characterized in that includes:
the safety warning lamps are connected with each first interface of the solid state disk, and the safety warning lamps carry out safety warning with different frequencies in different safety states;
the state monitor is connected with each operation component of the solid state disk and is used for monitoring and obtaining the current operation information of the solid state disk when the solid state disk is tested based on the test case;
the processing center is used for carrying out safety analysis on the current operation information, locking a second interface matched with the test case and configuring a safety analysis result on the corresponding second interface;
the processing center is also used for analyzing the safety analysis result of each second interface, determining the safety state and controlling the safety warning lamps matched with the second interfaces to flash according to the corresponding safety frequency;
wherein, the processing center includes:
the circuit determining module is used for acquiring a standard test circuit of the test case based on the solid state disk, and simultaneously, when the solid state disk is tested based on the test case, starting all state detectors to perform state detection on the matched operation components to obtain an actual test circuit;
the alignment processing module is used for performing alignment processing on the standard test circuit and the actual test circuit based on the test input assembly and the test output assembly and judging whether the standard test circuit is completely consistent with the actual test circuit;
if the test results are consistent, comparing the standard test result of each operation component in the standard test line with the actual test result of each operation component in the actual test line to construct a comparison array;
the column analysis module is used for analyzing a matched column and a non-matched column in the comparison array, acquiring a breakpoint matched column and a first position of the breakpoint matched column based on a standard test line from the non-matched column, and acquiring an abnormal point matched column and a second position of the abnormal point matched column based on the standard test line from the non-matched column, wherein the breakpoint matched column refers to that an actual test result in the corresponding non-matched column is 0, and the abnormal point matched column refers to that the result abnormality of the actual test result and the standard test result is larger than a preset abnormality;
the mapping table establishing module is used for establishing a first abnormal mapping table based on the first circuit setting condition and the third circuit setting condition of the running component at the third position of the matching column and the second abnormal mapping table based on the second circuit setting condition and the third circuit condition from the historical database according to the first circuit setting condition of the running component at the first position and the second circuit setting condition of the running component at the second position;
the first exception obtaining module is used for matching the first sequence of the breakpoint matching column with a first exception mapping table to obtain a first exception;
the second abnormality acquisition module is used for matching the second sequence of the abnormal point matching column with a second abnormality mapping table to acquire a second abnormality;
the mutual exclusion analysis module is used for analyzing the mutual exclusion of the first abnormality and the second abnormality;
when the mutual exclusivity is extremely large, overlapping the first abnormality and the second abnormality, and sending an abnormality overlapping instruction to a safety warning lamp matched with the test output assembly to flash;
and when the mutual exclusivity is extremely small, carrying out exception screening on the first exception and the second exception to obtain a third exception, and sending a third exception instruction to a safety warning lamp matched with the test output assembly to flash.
2. The security module for a solid state disk of claim 1, wherein the mutual exclusivity analysis module comprises:
a value determining unit configured to determine a first factor set of the first abnormality and a first value of each first factor, and determine a second factor set of the second abnormality and a second value of each second factor at the same time;
the first calculation unit is used for establishing a sub-mutex table of each first factor and all second factors according to the mutex relation table, and calculating a first mutex value corresponding to the sub-mutex table based on the sub-mutex table, a first value of the first factor in the sub-mutex table and a second value of each second factor;
Figure QLYQS_1
; wherein ,/>
Figure QLYQS_2
A first mutex value representing a corresponding sub-mutex table; />
Figure QLYQS_3
Representing a maximum mutual exclusion factor acquired based on the corresponding sub-mutual exclusion table;
Figure QLYQS_4
first value representing first factor corresponding to sub mutual exclusion table +.>
Figure QLYQS_5
Second value +.>
Figure QLYQS_6
Mutual exclusion factor of (2); />
Figure QLYQS_7
Representing an average mutual exclusion factor; n1 represents the total number of the second factors existing in the corresponding sub mutex table;
a second calculation unit for calculating a second exclusive value of the first exception and the second exception based on all the first exclusive values
Figure QLYQS_8
Figure QLYQS_9
; wherein ,
Figure QLYQS_10
representing a maximum function; />
Figure QLYQS_11
Representing a j-th first mutex value; />
Figure QLYQS_12
Representing a weight corresponding to the first mutex value; />
Figure QLYQS_13
Representing the total number of the existing first mutex values;
a value mapping unit for mapping the second mutually exclusive value
Figure QLYQS_14
And performing value mapping to obtain mutual exclusivity.
3. The security module for a solid state disk of claim 1, wherein the mutual exclusivity analysis module further comprises:
a flicker processing unit configured to match a first flicker frequency associated with the first anomaly and a second flicker frequency associated with the second anomaly from an anomaly-flicker database when the mutual exclusivity is a maximum mutual exclusivity;
an anomaly screening unit for selecting the anomaly from
Figure QLYQS_15
and
Figure QLYQS_16
Middle screening the maximum value and locking the main abnormality matched with the maximum value;
a time length and frequency determining unit for determining the time length and frequency according to
Figure QLYQS_17
Determining a first scintillation period, a first scintillation frequency, and a second scintillation period, a second scintillation frequency of the primary anomaly, of the secondary anomaly, wherein->
Figure QLYQS_18
Representing a mutual exclusion value corresponding to the second value of the corresponding second factor and the first value of the j1 th first factor; />
Figure QLYQS_19
A weight representing a mutually exclusive value corresponding to the second value of the corresponding second factor and the first value of the j1 st first factor; n3 represents for the secondThe factor is the total number of mutex values determined by the main; />
Figure QLYQS_20
Representing a maximum function; />
Figure QLYQS_21
Representing a j-th first mutex value; />
Figure QLYQS_22
Representing a weight corresponding to the first mutex value; />
Figure QLYQS_23
Representing the total number of the existing first mutex values;
the instruction setting unit is used for setting the first flicker duration, the second flicker duration, the first flicker frequency and the second flicker frequency and sending an abnormal superposition instruction to the corresponding safety warning lamp.
4. The security module for a solid state disk of claim 3, wherein the duration and frequency determining unit comprises:
if it is
Figure QLYQS_24
Judging the first abnormality as a main abnormality and the second abnormality as a secondary abnormality;
if it is
Figure QLYQS_25
Judging the first abnormality as a secondary abnormality and the second abnormality as a primary abnormality;
if it is
Figure QLYQS_26
One anomaly is randomly screened as a primary anomaly and the other anomaly as a secondary anomaly.
5. The security module for a solid state disk of claim 3, wherein the processing center further comprises:
the duration matching module is used for obtaining the total set duration of the safety warning lamp matched with the test output assembly from the attribute-duration table according to the test attribute of the test case;
the cumulative sum of the first flicker duration and the second flicker duration corresponding to the flicker warning lamp is the total set duration.
6. The security module for a solid state disk of claim 1, wherein the alignment processing module comprises:
the component judging unit is used for judging whether the component is missing or redundant when the standard test circuit is not completely consistent with the actual test circuit;
the first display unit is used for determining a missing component based on the standard test circuit when the missing component exists, inputting the missing component into a defect analysis model according to the missing position in the actual test circuit, obtaining a first defect of the solid state disk, and outputting the first defect to a display screen connected with the solid state disk for first reminding display;
the analysis unit is used for inputting the redundant components into a defect analysis model to obtain a second defect of the solid state disk when the redundant components exist, simultaneously, respectively acquiring a simple circuit formed by each redundant component, inputting circuit information of the simple circuit into the defect analysis model, and respectively acquiring a third defect aiming at each simple circuit;
and the second display unit is used for establishing the second defect and all the third defects, acquiring the fourth defect of the solid state disk, and outputting the fourth defect to a display screen connected with the solid state disk for second reminding display.
7. The security module for a solid state disk of claim 6, wherein the second display unit comprises:
the comparison analysis block is used for carrying out comparison analysis on the second defects and each third defect, when the comparison analysis result meets the comparison analysis standard, the corresponding third defects are reserved, and otherwise, the corresponding third defects are regarded as undetermined;
and the defect combination block is used for carrying out first combination on the third defect to be determined to obtain a fifth defect, and carrying out second combination on the fifth defect and the second defect to obtain a fourth defect.
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Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114398213A (en) * 2021-12-28 2022-04-26 山东云海国创云计算装备产业创新中心有限公司 Method, device and equipment for testing functions of solid state disk and storage medium

Family Cites Families (5)

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Publication number Priority date Publication date Assignee Title
CN106294084A (en) * 2016-09-12 2017-01-04 恒为科技(上海)股份有限公司 A kind of monitoring hard-disk status system
KR102469564B1 (en) * 2017-03-24 2022-11-22 삼성전자주식회사 Method and apparatus for controlling external device according to state of electronic device
CN107656857A (en) * 2017-10-12 2018-02-02 郑州云海信息技术有限公司 A kind of NVMeSSD hard disks ignition method and device
CN107943652B (en) * 2017-11-22 2020-08-25 苏州浪潮智能科技有限公司 Hard disk control method and device in storage system and readable storage medium
CN109918283A (en) * 2019-03-20 2019-06-21 浪潮商用机器有限公司 Solid state hard disk service life method for visualizing, device, electronic equipment and medium

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114398213A (en) * 2021-12-28 2022-04-26 山东云海国创云计算装备产业创新中心有限公司 Method, device and equipment for testing functions of solid state disk and storage medium

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