CN115729294A - High-precision voltage trimming circuit and current trimming circuit - Google Patents
High-precision voltage trimming circuit and current trimming circuit Download PDFInfo
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- CN115729294A CN115729294A CN202110980835.8A CN202110980835A CN115729294A CN 115729294 A CN115729294 A CN 115729294A CN 202110980835 A CN202110980835 A CN 202110980835A CN 115729294 A CN115729294 A CN 115729294A
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Abstract
The utility model provides a high accuracy voltage trimming circuit which characterized in that: the circuit comprises a current source, a basic resistor, a plurality of trimming branches and a deviation judgment unit; the current source, the basic resistor and the trimming resistors in the trimming branches are connected end to end, and voltage division of the trimming resistors and generation of reference voltage are realized based on stable current generated by the current source; the plurality of trimming branches are connected with the deviation judging unit and used for receiving a plurality of trimming bit information output by the deviation judging unit to realize trimming of the trimming resistor; the deviation judgment unit is respectively connected with the basic resistor and the plurality of trimming branches, generates a plurality of trimming bit information based on the measurement of the reference voltage, and inputs one trimming bit information into each trimming branch. The circuit of the invention has simple structure and good modulation effect, and realizes the trimming of the voltages in the positive and negative directions under the condition of not additionally increasing trimming branches.
Description
Technical Field
The invention relates to the field of integrated circuits, in particular to a high-precision voltage trimming circuit and a high-precision current trimming circuit.
Background
At present, due to the limitation of the chip manufacturing process, for most of high-precision chips, before the chips are manufactured to leave the factory, the output parameters of the chips are usually measured, and the chips are trimmed to a certain extent based on the deviation between the output parameters and the design parameters, so that the chips leaving the factory have a sufficiently high output precision.
In the prior art, the performance of a chip is usually modified by modifying a resistor or a thermal fuse. Specifically, the trimming method is widely varied, but most of the trimming methods are based on short-circuiting and accessing a plurality of trimming resistors connected in parallel or in series to change the overall resistance value, and accordingly, the voltage or current value output in the trimming circuit is changed to trim the chip output parameters.
However, in the trimming method adopted in the prior art, in order to improve the trimming accuracy, a larger number of resistors with a larger area are generally required, which not only increases the area of the chip, but also increases the manufacturing difficulty and the manufacturing cost of the chip. In addition, although the reserved trimming bits in the chip are usually between 4 and 8 bits, the trimming method in the related art can usually use only about 3 bits of information, and it is not always possible to achieve the highest precision trimming for the chip by fully utilizing all data in the trimming bits.
Therefore, a new high-precision trimming circuit is needed.
Disclosure of Invention
In order to solve the defects in the prior art, the invention aims to provide a novel high-precision voltage and current trimming circuit, which adopts a phase inverter and an MOS tube to form a trimming branch circuit and realizes trimming of resistance values of resistors or current values of current sources according to trimming position information, thereby realizing high-precision trimming of the circuit.
The invention adopts the following technical scheme.
The invention relates to a high-precision voltage trimming circuit, which comprises a current source, a basic resistor, a plurality of trimming branches and a deviation judgment unit, wherein the current source is connected with the basic resistor; the current source, the basic resistor and the trimming resistors in the trimming branches are connected end to end, and voltage division of the trimming resistors and generation of reference voltage are realized on the basis of stable current generated by the current source; the plurality of trimming branches are connected with the deviation judging unit and used for receiving a plurality of trimming bit information output by the deviation judging unit to realize trimming of the trimming resistor; and the deviation judgment unit is respectively connected with the basic resistor and the plurality of trimming branches, generates a plurality of trimming bit information based on the measurement of the reference voltage, and inputs one piece of trimming bit information into each trimming branch.
Preferably, the trimming branch comprises an inverting unit, an MOS (metal oxide semiconductor) tube and a trimming resistor; the input end of the reversing unit is connected with one of the plurality of trimming bit information, and the output end of the reversing unit is connected with the grid electrode of the MOS tube; the drain electrode of the MOS tube is connected with the high-voltage end of the trimming resistor, and the source electrode of the MOS tube is connected with the low-voltage end of the trimming resistor.
Preferably, the plurality of trimming resistors in the trimming branch are connected end to end, and the source and drain electrodes of the plurality of MOS tubes are connected with each other; the low-voltage end of the trimming resistor in the first trimming branch is grounded, and the high-voltage end of the trimming resistor in the last trimming branch is connected with one end of the basic resistor.
Preferably, the other end of the base resistor is connected to a current source and serves as an output terminal for the reference voltage.
The second aspect of the invention relates to a high-precision current trimming circuit, wherein the circuit comprises a basic current source, a plurality of trimming branches and a deviation judgment unit; the basic current source is respectively connected with the plurality of trimming branches in parallel and used for generating and outputting reference current; the plurality of trimming branches are connected with the deviation judging unit and used for receiving a plurality of trimming bit information output by the deviation judging unit to realize trimming of the trimming current source; and the deviation judgment unit is respectively connected with the basic current source and the plurality of trimming branches and used for generating a plurality of trimming bit information based on the measurement of the reference current and inputting one trimming bit information into each trimming branch.
Preferably, the trimming branch comprises a reverse unit, an MOS (metal oxide semiconductor) tube and a trimming current source; the input end of the reverse unit is connected with one of the trimming bit information, and the output end of the reverse unit is connected with the grid electrode of the MOS tube; the drain electrode of the MOS tube is connected with the output end of the reference current, and the source electrode of the MOS tube is connected with the trimming current source; the trimming current source is in proportional mirror relationship with the base current source.
According to a high-precision voltage trimming circuit in the first aspect of the present invention or a high-precision current trimming circuit in the second aspect of the present invention, the inverting unit is one inverter or two cascaded inverters; the source electrodes of PMOS transistors of the phase inverter are all connected with the regulating voltage V reg And the source electrodes of the NMOS tubes are grounded.
Preferably, the number of inverters in the inversion unit of the first trimming branch is different from the number of inverters in the other trimming branches.
Preferably, the number of inverters in the inversion unit of the first trimming branch is 2, and the number of inverters in the other trimming branches is 1.
Preferably, the resistance value of the trimming resistor or the current value of the trimming current source in the last trimming branch is the smallest, and the resistance value of the trimming resistor or the current value of the trimming current source in the first trimming branch is the largest; from the first trimming branch to the last trimming branch, the resistance value of the trimming resistor or the current value of the trimming current source is reduced in sequence; and the ratio of the resistance value of the trimming resistor or the current value of the trimming current source in two adjacent trimming branches is 2.
Preferably, the ratio of the resistance value of the trimming resistor of the last trimming branch or the current value of the trimming current source to the resistance value of the initial resistor or the current value of the initial current source is 2a%; the ratio of the resistance value of the basic resistor or the current value of the basic current source to the initial resistance value or the current value of the initial current source is 1- (2) n -2) a%; the initial resistance value is the sum of the resistance values of the basic resistor and the first trimming branch, the resistance values of the other trimming branches, the current value of the initial current source is the sum of the current value of the basic current source and the current value of the trimming current source in the other trimming branches, a% is the trimming precision of the circuit, and n is the number of the trimming branches in the circuit.
Preferably, the trimming range of the circuit is (-2) n ·a％，+2 n ·a％)。
Compared with the prior art, the high-precision voltage and current trimming circuit has the advantages that the inverter and the MOS tube are adopted to form a trimming branch, trimming on the resistance value of a resistor or the current value of a current source is realized according to trimming information, and the trimming bit number is efficiently utilized to realize high-precision trimming on the circuit. The circuit has simple structure and good modulation effect, replaces the problems of large chip area and the like caused by adopting a plurality of resistors, and simultaneously adopts a mode of cascading a plurality of inverters to realize the adjustment of voltage and current parameters in the positive direction and the negative direction under the condition of not additionally increasing adjustment branches.
The beneficial effects of the invention also include:
1. the invention can simply and conveniently adjust the number of the trimming branches according to the required trimming precision, thereby realizing the trimming of different trimming precisions.
2. In the method, the input of the trimming information is realized through the phase inverter, so that the problems of error codes, interference and the like caused by data transmission of the trimming information can be solved, and the trimming result is not accurate enough. Therefore, the method of the invention can accurately control the MOS tube to receive the trimming bit information, thereby realizing short circuit and access to the responding trimming resistor.
3. In most chips, the voltage value for carrying the trimming bit information is generated by adopting the power supply voltage, so that the noise is high, and if the voltage value is directly connected to the grid electrode of the MOS tube, the size of the source-drain conducting current of the MOS tube can be influenced, so that the reference voltage has no accuracy in the original output. In order to make the trimming process have sufficient significance, the inverters are driven by stable adjusting voltage, so that the interference of trimming bit information is shielded, and the circuit performance is improved.
4. The trimming branch circuit can realize the trimming of the reference voltage in a series mode of the trimming resistors and can also realize the trimming of the reference current in a parallel mode of the trimming current sources. Therefore, the method has wider application range.
Drawings
FIG. 1 is a schematic diagram of a high-precision trimming circuit according to the present invention;
fig. 2 is a schematic structural diagram of a high-precision trimming circuit according to the present invention.
Detailed Description
The present application is further described below with reference to the accompanying drawings. The following examples are only used to illustrate the technical solutions of the present invention more clearly, and the protection scope of the present application is not limited thereby.
Fig. 1 is a schematic structural diagram of a high-precision trimming circuit according to the present invention. As shown in fig. 1, a first aspect of the present invention relates to a high-precision voltage trimming circuit, wherein the circuit includes a current source I, a base resistor rsc, a plurality of trimming branches, and a deviation determining unit; the current source I, the basic resistor Rbsc and the trimming resistors R1 to R5 in the trimming branches are connected end to end, and the voltage division of the trimming resistors and the generation of reference voltage are realized on the basis of the stable current generated by the current source; the plurality of trimming branches are connected with the deviation judging unit and used for receiving a plurality of trimming bit information output by the deviation judging unit to realize trimming of the trimming resistor; and the deviation judgment unit is respectively connected with the basic resistor and the plurality of trimming branches, generates a plurality of trimming bit information based on the measurement of the reference voltage, and inputs one piece of trimming bit information into each trimming branch.
The adjustment of multiple precision levels can be realized through the trimming circuit in the invention. In the invention, a plurality of trimming branches are connected in series through resistors, and the reference voltage Vref is acquired through the action of a basic resistor Rbsc and a constant current source I.
Preferably, the trimming branch comprises an inverting unit, an MOS (metal oxide semiconductor) tube and a trimming resistor; the input end of the inverting unit is connected with one of the plurality of trimming bit information, and the output end of the inverting unit is connected with the grid electrode of the MOS tube; the drain electrode of the MOS tube is connected with the high-voltage end of the trimming resistor, and the source electrode of the MOS tube is connected with the low-voltage end of the trimming resistor.
It can be understood that the present invention may include a certain number of trimming branches set as required, and the inverter in the inversion unit may not only determine the trimming direction, but also stabilize the received voltage as trimming bit information and remove noise and glitch. Therefore, the trimming bit information obtained by the inverse unit may be sufficiently accurate, thereby fulfilling the requirement of high accuracy.
In addition, compared with the circuit trimming by the fuse blowing method, the trimming of the reference voltages in the forward and reverse directions cannot be simultaneously performed, or if the trimming in the forward and reverse directions is desired, a more complicated circuit structure is required. In the method, the short circuit of the trimming resistor is realized through the MOS tube, so that the resistor can be easily trimmed.
Because the MOS tube is used for trimming, compared with the condition that the fuse is difficult to recover after being blown, the on-off state of the MOS tube can be changed at any time according to the state of the circuit, therefore, the method can be repeatedly used for many times, and the re-trimming can still be realized after the internal environment of the chip is changed.
Preferably, the plurality of trimming resistors in the trimming branch are connected end to end, and the source and drain electrodes of the plurality of MOS tubes are connected with each other; the low-voltage end of the trimming resistor in the first trimming branch is grounded, and the high-voltage end of the trimming resistor in the last trimming branch is connected with one end of the basic resistor.
It can be understood that, in the invention, a plurality of trimming resistors in the trimming branch can be connected end to end, and together with the basic resistor, by connecting between the power supply voltage and the ground potential, voltage division of different proportions of the circuit can be realized.
Preferably, the other end of the base resistor is connected to a current source and serves as an output terminal for the reference voltage.
Generally speaking, the other end of the current source in the present invention can be connected to a reference voltage, or connected to a power supply voltage or other voltage in the circuit to generate a more stable current. Since the current generated by the current source varies slightly with the influence of the entire circuit, the output of the current source needs to be modified.
The second aspect of the present invention relates to a high-precision current trimming circuit. Fig. 2 is a schematic structural diagram of a high-precision trimming circuit according to the present invention. As shown in fig. 2, the circuit includes a basic current source, a plurality of trimming branches, and a deviation determination unit; the basic current source is respectively connected with the plurality of trimming branches in parallel and used for generating and outputting reference current; the plurality of trimming branches are connected with the deviation judging unit and used for receiving a plurality of trimming bit information output by the deviation judging unit to realize trimming of the trimming current source; and the deviation judgment unit is respectively connected with the basic current source and the plurality of trimming branches and used for generating a plurality of trimming bit information based on the measurement of the reference current and inputting one trimming bit information into each trimming branch.
In the invention, similar ideas are adopted, and the method can be applied to the adjustment of the reference current by changing the circuit structure. It can be understood that the plurality of trimming branches are connected in parallel with each other and are also connected in parallel with the basic current source, and the current output of the trimming current source is realized through the opening and closing of the MOS tube. Finally, the generated reference current should be the sum of the current of the trimming current source and the current of the base current source, which can be output individually.
Preferably, the trimming branch comprises a reverse unit, an MOS (metal oxide semiconductor) tube and a trimming current source; the input end of the reverse unit is connected with one of the trimming bit information, and the output end of the reverse unit is connected with the grid electrode of the MOS tube; the drain electrode of the MOS tube is connected with the output end of the reference current, and the source electrode of the MOS tube is connected with the trimming current source; the trimming current source is in proportional mirror relation with the basic current source.
In the invention, because the trimming current sources and the basic current source are connected in parallel, in order to realize accurate trimming, a plurality of trimming current sources and the basic current source need to be arranged in the circuit in a fixed proportion, so that a trimming branch where the trimming current sources are located and a branch where the basic current source is located have a mirror image relationship with a set proportion.
By adopting the method, different reversing units are used for simultaneously trimming the reference current in the positive direction and the negative direction. In addition, the output of the inversion unit controls the grid of the MOS tube, and the source and drain of the MOS tube are connected with each trimming current source in series, so that the output or the disconnection of the current value of the trimming current source is realized.
Preferably, the inverting unit is one inverter or two cascaded inverters; wherein, the source electrodes of PMOS transistors of the phase inverter are all connected with the regulating voltage V reg And the source electrodes of the NMOS tubes are grounded.
As shown in FIG. 1 or FIG. 2, the reversing units in the present invention may be similar or identicalAnd (4) setting the mode. To ensure the turn-on of the inverter, a regulation voltage V may be used reg The driving of the inverter is realized. In most chips, the voltage value for carrying the trimming bit information is generated by adopting the power supply voltage, so that the noise is high, and if the voltage value is directly connected to the grid electrode of the MOS tube, the size of the source-drain conducting current of the MOS tube can be influenced, so that the reference voltage has no accuracy in the original output. In order to make the trimming process have sufficient significance, the inverters are driven by adopting stable adjusting voltage, so that the interference of trimming bit information is shielded, and the circuit performance is improved.
Preferably, the number of inverters in the inversion unit of the first trimming branch is different from the number of inverters in the other trimming branches. The number of inverters in the inversion unit of the first trimming branch is 2, and the number of inverters in the other trimming branches is 1.
It is understood that, in the present invention, the inverting unit of the first trimming branch may have two inverters, and the other trimming branch may have one inverter. In this way, the first trimming branch circuit with the largest occupied voltage or power supply proportion can fully realize the full reversal of the trimming range. It can be understood that, since the proportion of the voltage or current controlled in the first trimming circuit is slightly larger than the sum of the values for the voltage or current proportion control in all other trimming branches, the trimming range of all other branches can be expanded by a factor of two.
Preferably, the resistance value of the trimming resistor or the current value of the trimming current source in the last trimming branch is the smallest, and the resistance value of the trimming resistor or the current value of the trimming current source in the first trimming branch is the largest; from the first trimming branch to the last trimming branch, the resistance value of the trimming resistor or the current value of the trimming current source is reduced in sequence; and the ratio of the resistance value of the trimming resistor or the current value of the trimming current source in two adjacent trimming branches is 2.
It can be understood that, in the present invention, since the ratio of the value of the trimming resistor or the trimming current in each trimming branch to the corresponding value in the adjacent branch is 2 times or 1/2 times, the method in the present invention can ensure that the trimming range is doubled every time one trimming branch is added. By the method, very large-range and high-precision trimming can be realized by using very few trimming resistors or trimming current sources.
Preferably, the ratio of the resistance value of the trimming resistor of the last trimming branch or the current value of the trimming current source to the resistance value of the initial resistor or the current value of the initial current source is 2a%; the ratio of the resistance value of the basic resistor or the current value of the basic current source to the initial resistance value or the current value of the initial current source is 1- (2) n -2) a%; the initial resistance value is the sum of the resistance values of the basic resistor and the first trimming branch, the resistance values of the other trimming branches, the current value of the initial current source is the sum of the current value of the basic current source and the current value of the trimming current source in the other trimming branches, a% is the trimming precision of the circuit, and n is the number of the trimming branches in the circuit.
It will be appreciated that, in general, the chip may set the number of trimming branches according to the desired accuracy, and adaptively set the number of bits of the trimming bit information. In addition, since the resistance value of the trimming resistor in the trimming branch at the tail end and the current value of the trimming current source are the minimum in all the branches, the trimming precision is determined by the value. In prior art practice, the values of the corresponding parameters in the circuit can be determined according to the expected or designed trimming precision.
Since the trimming bit is set to the default value at the initial stage before the trimming of the chip, for example, in an embodiment of the present invention, the 4-bit trimming bit is 1111. In this initial case, the total initial resistance value formed by the trimming resistor and the base resistor may be the sum of the trimming resistors and the base resistor, and the trimming resistors herein do not include the trimming resistor in the first branch, because the first branch is added with one more inverter.
Similarly, for current modification, the current value of the initial current source may be the sum of a plurality of modified current sources and the base current source. And the plurality of trimming current sources also do not include the trimming current source in the first branch.
In addition, due to the determination of the chip trimming precision and the number of the trimming branches in the chip, the maximum achievable trimming range of the trimming circuit can be further determined. Because each trimming branch is one time of the trimming value of the last trimming branch, the trimming range of the circuit can be calculated according to the geometric progression.
Since the trimming range and the trimming precision are essentially the most important parameters for the trimming circuit to realize the trimming function, the trimming circuit in the invention can be reasonably designed according to the requirements of the two data. Compared with the trimming circuit in the invention, the trimming circuit in the prior art with the same complexity realizes better circuit effect by adopting fewer elements and simpler circuit structure.
Preferably, the trimming range of the circuit is (-2) n ·a％，+2 n ·a％)。
Because the proportion of the basic resistance and the basic current source in the circuit to the total circuit is calculated, the trimming range of the circuit can be obtained by calculation.
Preferably, the trimming bit information includes 4-bit information, and the number of trimming branches in the circuit is 4.
It can be understood that, in an embodiment of the present invention, the trimming bit information is 4 bits, and the number of branches is 4. In order to fully utilize the byte where the trimming bit information is located, the trimming bit information can be reasonably set to be 4 bits or 8 bits and the like. In addition, since the data of each bit corresponds to one trimming branch, and each trimming branch can double the trimming range, or in other words can reduce the trimming precision to 1/2 times, the trimming range and the trimming precision are enough to realize the expected precision of the chip for 4-bit and 8-bit data.
Preferably, the trimming precision is 0.25%, and the trimming range is (-4%, + 4%).
When the trimming bit information is 4 bits long, the resistance value of the basic resistor and the resistance values of the trimming resistors can be reasonably selected, so that the trimming precision is set to be 0.25%, and the trimming range is set to be (-4%, + 4%).
Referring to FIG. 1, in one embodiment of the present invention, the trimming range is (-4%, + 4%). Then in the circuit the content of the initial trim bit information of the circuit can be set to 1111, i.e. the voltages of Vbit1 to Vbit4 are all high. At this time, according to the logic of the inverter, M1 is turned on, and M2 to M4 are turned off, thereby achieving the short circuit of the resistor R1. At this time, the value of the generated initial reference voltage may be Vref _ pre = I (R2 + R3+ R4+ Rbsc). In the actual design process, the resistor R1 accounts for 4% of the total resistance, so that R2, R3 and R4 may account for 2%, 1% and 0.5%, respectively.
For example, in an embodiment of the present invention, the value of the constant current source may be designed to be 10 μ a, the values of the resistors R1 to R4 may be 4Kohm, 2Kohm, 1Kohm, and 0.5Kohm, respectively, and in order to achieve higher trimming accuracy, the value of the base resistor may be 96.5Kohm. In the present invention, it is assumed that the output of the reference voltage Vref is desired to be obtained at 1V, and therefore, when the value of the output initial reference voltage Vref _ pre is not at 1V, for example, is higher, the initial reference voltage Vref _ pre can be used to reduce the resistance value, and thus, the trimming of the reference voltage is realized.
Assuming that the initial reference voltage Vref _ pre is 1.01V, is higher than the predetermined 1V, and has a 1% offset in the embodiment of the present invention, in order to obtain a reference voltage of 1V, the resistor R3 divided by 1% of the total voltage may be subjected to a short-circuit operation. This implementation may be performed according to a deviation determination unit in the chip for implementing the trimming operation. That is, if the deviation determination unit modifies the trimming bit information of 1111, which is originally output, to 1101, the third bit is changed, so that the MOS transistor in the third trimming branch realizes the short circuit of the resistor R3, and the total resistance is modified from 100Kohm to 99Kohm, so that the reference voltage Vref can be reduced to 99% of the initial reference voltage Vref _ pre, and thus a very high-precision 1V Vref voltage can be obtained.
Compared with the prior art, the high-precision voltage and current trimming circuit has the advantages that the phase inverter and the MOS tube are adopted to form a trimming branch circuit, trimming of the resistance value of the resistor or the current value of the current source is realized according to trimming information, and the trimming bit number is efficiently utilized to realize high-precision trimming of the circuit. The circuit has simple structure and good modulation effect, replaces the problems of large chip area and the like caused by adopting a plurality of resistors, and simultaneously adopts a mode of cascading a plurality of inverters to realize the trimming of current parameters in the positive direction and the negative direction under the condition of not additionally increasing trimming branches.
The present applicant has described and illustrated embodiments of the present invention in detail with reference to the accompanying drawings, but it should be understood by those skilled in the art that the above embodiments are merely preferred embodiments of the present invention, and the detailed description is only for the purpose of helping the reader to better understand the spirit of the present invention, and not for limiting the scope of the present invention, and on the contrary, any improvement or modification made based on the spirit of the present invention should fall within the scope of the present invention.
Claims (12)
1. The utility model provides a high accuracy voltage trimming circuit which characterized in that:
the circuit comprises a current source, a basic resistor, a plurality of trimming branches and a deviation judgment unit; wherein the content of the first and second substances,
the current source, the basic resistor and the trimming resistors in the trimming branches are connected end to end, and voltage division of the trimming resistors and generation of reference voltage are realized based on stable current generated by the current source;
the plurality of trimming branches are connected with the deviation judging unit and used for receiving a plurality of trimming bit information output by the deviation judging unit to realize trimming of the trimming resistor;
the deviation judgment unit is respectively connected with the basic resistor and the plurality of trimming branches, generates a plurality of trimming bit information based on the measurement of the reference voltage, and inputs one trimming bit information into each trimming branch.
2. A high accuracy voltage trimming circuit as claimed in claim 1, wherein:
the trimming branch comprises a reverse unit, an MOS (metal oxide semiconductor) tube and a trimming resistor; wherein the content of the first and second substances,
the input end of the reverse unit is connected with one of the plurality of trimming bit information, and the output end of the reverse unit is connected with the grid electrode of the MOS tube;
the drain electrode of the MOS tube is connected with the high-voltage end of the trimming resistor, and the source electrode of the MOS tube is connected with the low-voltage end of the trimming resistor.
3. A high accuracy voltage trimming circuit as claimed in claim 2, wherein:
a plurality of trimming resistors in the trimming branch are connected end to end, and the source and drain electrodes of a plurality of MOS tubes are connected with each other; wherein the content of the first and second substances,
the low-voltage end of the trimming resistor in the first trimming branch is grounded, and the high-voltage end of the trimming resistor in the last trimming branch is connected with one end of the basic resistor.
4. A high accuracy voltage trimming circuit as claimed in claim 3, wherein:
and the other end of the basic resistor is connected with a current source and is used as an output end of the reference voltage.
5. The utility model provides a high accuracy current trimming circuit which characterized in that:
the circuit comprises a basic current source, a plurality of trimming branches and a deviation judgment unit; wherein the content of the first and second substances,
the basic current source is respectively connected with the plurality of trimming branches in parallel and is used for generating and outputting reference current;
the plurality of trimming branches are connected with the deviation judging unit and receive a plurality of trimming bit information output by the deviation judging unit to realize trimming of the trimming current source;
and the deviation judgment unit is respectively connected with the basic current source and the plurality of trimming branches, and is used for generating a plurality of trimming bit information based on the measurement of the reference current and inputting one trimming bit information into each trimming branch.
6. A high accuracy current trimming circuit as defined in claim 5 wherein:
the trimming branch comprises a reverse unit, an MOS (metal oxide semiconductor) tube and a trimming current source; wherein the content of the first and second substances,
the input end of the reverse unit is connected with one of the trimming bit information, and the output end of the reverse unit is connected with the grid electrode of the MOS tube;
the drain electrode of the MOS tube is connected with the output end of the reference current, and the source electrode of the MOS tube is connected with the trimming current source;
the trimming current source is in proportional mirror image relation with the basic current source.
7. A high precision voltage trimming circuit according to any one of claims 1 to 4 or a high precision current trimming circuit according to any one of claims 5 to 6, wherein:
the reverse unit is one inverter or two cascaded inverters; wherein, the first and the second end of the pipe are connected with each other,
the source electrodes of PMOS tubes of the phase inverter are all connected with a regulating voltage V reg And the source electrodes of the NMOS tubes are grounded.
8. A high precision voltage trimming circuit or current trimming circuit as claimed in claim 7, wherein:
the number of inverters in the inversion unit of the first trimming branch is different from the number of inverters in other trimming branches.
9. A high accuracy voltage trimming circuit as defined in claim 8 wherein:
the number of inverters in the reverse unit of the first trimming branch is 2, and the number of inverters in other trimming branches is 1.
10. A high accuracy voltage trimming circuit as defined in claim 9, wherein:
the resistance value of the trimming resistor or the current value of the trimming current source in the last trimming branch is minimum, and the resistance value of the trimming resistor or the current value of the trimming current source in the first trimming branch is maximum;
from the first trimming branch to the last trimming branch, the resistance value of the trimming resistor or the current value of the trimming current source is reduced in sequence; and the number of the first and second electrodes,
the ratio of the resistance value of the trimming resistor or the current value of the trimming current source in two adjacent trimming branches is 2.
11. A high accuracy voltage trimming circuit as defined in claim 10 wherein:
the proportion of the resistance value of the trimming resistor or the current value of the trimming current source of the last trimming branch to the resistance value of the initial resistor or the current value of the initial current source is 2a%;
the ratio of the resistance value of the basic resistor or the current value of the basic current source to the initial resistance value or the current value of the initial current source is 1- (2) n -2)·a％；
Wherein the initial resistance value is the sum of the resistance values of the basic resistor and the resistors in the other trimming branches except the first trimming branch,
the current value of the initial current source is the sum of the current value of the basic current source and the current value of the trimming current source in the other trimming branches except the first trimming branch,
a% is the trimming accuracy of the circuit,
n is the number of trimming branches in the circuit.
12. A high accuracy voltage trimming circuit as defined in claim 11 wherein:
the trimming range of the circuit is (-2) n ·a％，+2 n ·a％)。
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| CN202110980835.8A CN115729294A (en) | 2021-08-25 | 2021-08-25 | High-precision voltage trimming circuit and current trimming circuit |
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| CN202110980835.8A CN115729294A (en) | 2021-08-25 | 2021-08-25 | High-precision voltage trimming circuit and current trimming circuit |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116578155A (en) * | 2023-07-14 | 2023-08-11 | 上海英联电子科技有限公司 | Adjustment method and system for trimming circuit |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116578155A (en) * | 2023-07-14 | 2023-08-11 | 上海英联电子科技有限公司 | Adjustment method and system for trimming circuit |
| CN116578155B (en) * | 2023-07-14 | 2023-09-15 | 上海英联电子科技有限公司 | Adjustment method and system for trimming circuit |
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