CN115665581A

CN115665581A - Serial port isolation module

Info

Publication number: CN115665581A
Application number: CN202211406324.6A
Authority: CN
Inventors: 梅佳威
Original assignee: Shenzhen Demingli Electronics Co Ltd
Current assignee: Zhuhai Hongpeihan Electronic Technology Co ltd
Priority date: 2022-11-10
Filing date: 2022-11-10
Publication date: 2023-01-31

Abstract

The application discloses serial ports isolation module includes: the signal conversion circuit is used for acquiring a USB data signal and converting the USB data signal into a first serial port data signal; the signal isolation circuit receives the first serial port data signal and outputs an isolated second serial port data signal; the voltage regulating circuit comprises a voltage stabilizer and an adjustable resistance unit, wherein the adjustable resistance unit is connected to the output end of the voltage stabilizer, the output end of the voltage stabilizer outputs an adjustable voltage signal according to the adjustable resistance unit, and the voltage of the adjustable voltage signal is the same as the serial port communication level of the MCU chip; and the bidirectional level conversion circuit receives the second serial port data signal and the adjustable voltage signal and outputs a third serial port data signal corresponding to the second serial port data signal, wherein the third serial port data signal has the same voltage as the adjustable voltage signal. The serial port isolation module can support various communication levels.

Description

Serial port isolation module

Technical Field

The application relates to the field of electronic circuits, in particular to a serial port isolation module supporting multiple communication levels.

Background

Each type of control chip has a certain communication level when communicating with an external device (such as a host), chips of different manufacturers and different specifications may have different communication levels, and the same chip may support multiple different communication levels. For example, the touch chip usually supports more than one communication mode to transmit the generated data to the outside, the touch chip TW3106 of this product supports a serial UART and I2C interface, and in the touch chip TW3106, the communication voltages of the UART and I2C are adjusted using the same register, and two different communication levels, TTL 1.8V (low level 0V, high level 1.8V) and TTL3.3V (low level 0V, high level 3.3V), can be set. When the touch chip is debugged, the touch chip is usually connected to a debugging host through a serial port isolation module containing a serial port chip, and the debugging host acquires log data of the touch chip through the serial port chip. However, a common serial port isolation module in the market only supports TTL3.3V (low level 0V, high level 3.3V) levels, and cannot meet serial port communication of a touch chip with 1.8V communication voltage UART such as TW3106 or an MCU chip supporting a touch function, so that log data of an IC cannot be acquired through the serial port chip during debugging, and the current serial port isolation module cannot isolate noise in the operation of the touch chip, and therefore, the serial port isolation module in the prior art supports a single communication level, and cannot meet testing of chips with different communication level specifications.

Disclosure of Invention

An object of the embodiment of the application is to provide a serial port isolation module to solve the technical problem that in the prior art, the serial port isolation module supports a single communication level and cannot meet different test requirements.

An embodiment provides a serial port isolation module, which is connected between a host and an MCU chip, comprising:

a USB interface connected to a host;

the voltage isolation circuit is connected to the USB interface and acquires a first system power supply signal, the first system power supply signal has a first voltage, and the voltage isolation circuit outputs a second system power supply signal;

the signal conversion circuit is connected to the USB interface, acquires a USB data signal, converts the USB data signal into a first serial port data signal and outputs the first serial port data signal;

the signal isolation circuit is connected to the signal conversion circuit and receives the first serial port data signal, the signal isolation circuit is also connected to the voltage isolation circuit to receive a second system power supply signal, the first serial port data signal is isolated by the signal isolation circuit and then outputs a corresponding second serial port data signal, and the second serial port data signal has the same voltage as the second system power supply signal;

the voltage regulating circuit comprises a voltage stabilizer and an adjustable resistance unit, wherein the voltage stabilizer receives a second system power supply signal, the adjustable resistance unit is connected to the output end of the voltage stabilizer, the output end of the voltage stabilizer outputs an adjustable voltage signal according to the adjustable resistance unit, and the voltage of the adjustable voltage signal is the same as the serial port communication level of the MCU chip; and

and the bidirectional level conversion circuit is connected to the signal isolation circuit and the voltage regulation circuit, receives the second serial port data signal and the adjustable voltage signal and outputs a third serial port data signal corresponding to the second serial port data signal, and the third serial port data signal has the same voltage as the adjustable voltage signal.

Optionally, the first system power supply signal is provided by a power pin of the USB interface.

Optionally, the signal conversion circuit receives the first system power supply signal as one of the input power supplies.

Optionally, the serial port isolation module further includes a power supply circuit, where the power supply circuit is connected to the USB interface and converts the first system power supply signal into a first system power supply conversion signal, the first system power supply conversion signal has a second voltage different from the first voltage, and the signal conversion circuit receives the first system power supply conversion signal as one of the input power supplies.

Optionally, the voltage of the second system power supply signal is the same as the voltage of the first system power supply signal.

Optionally, the signal isolation circuit is further connected to the USB interface and receives the first system power supply signal.

Optionally, the voltage regulator includes an input pin, an output pin, and an adjustable pin, the adjustable resistance unit includes a first resistor, a selectable resistor array, and a switch array, the input pin receives a power supply signal of the second system, the adjustable pin is connected to the ground terminal via the first resistor, the selectable resistor array includes at least two resistors, and the selectable resistor array is selectively connected between the output pin and the first resistor via the switch array.

Optionally, the selectable resistor array includes 4 resistors with different resistance values.

Optionally, a resistance of one of the resistors in the selectable resistor array is the same as a resistance of the first resistor.

Optionally, the resistances of the 4 resistors with different resistance values are 54.9 ohms, 124 ohms, 205 ohms and 374 ohms, respectively, and the resistance value of the first resistor is 124 ohms.

Optionally, the bidirectional level shift circuit is further connected to the voltage isolation module and receives the second system power supply signal

Optionally, the serial port isolation module further includes a power supply indicating circuit, the power supply indicating circuit includes a light emitting diode, and the power supply indicating circuit is connected to the USB interface and receives the first system power supply signal.

Optionally, the serial port isolation module further includes a data transmission indicating circuit, the data transmission indicating circuit is connected to the signal conversion circuit and receives the first serial port data signal, and the data transmission indicating circuit includes a light emitting diode.

Optionally, the serial port isolation module further includes a chip interface, and the chip interface is used for connecting the bidirectional level conversion circuit and the MCU chip, and transmitting the third serial port data signal to the MCU chip.

According to the serial port isolation module provided by the embodiment of the invention, a USB data signal received from a USB interface is converted into a first serial port data signal through the signal conversion circuit, meanwhile, a first system power supply signal from a host side is subjected to power noise isolation through the voltage isolation module and then is output to the signal isolation circuit and the voltage regulation circuit as a second system power supply signal, so that the signal isolation circuit outputs an adjustable voltage signal through the voltage regulation circuit after the second system power supply signal is used as an input power supply and the received first serial port data signal is subjected to signal noise isolation and then is output as a second serial port data signal, serial port data subjected to power supply and signal noise isolation are obtained, in addition, the adjustable voltage signal is output through the voltage regulation circuit and is matched with the bidirectional level conversion circuit to convert the second serial port data signal into a third serial port data signal with an MCU chip serial port communication level, therefore, the voltage of the serial port data can be consistent with the communication level of a currently connected MCU chip, smooth transmission of the data is realized, and the adjustable voltage signal can be adjusted to be consistent with the communication levels of various MCU chips, therefore, the serial port isolation module can not only isolate noise of communication between the host and the MCU chips, but also can support various communication levels between the host chips.

Drawings

In order to more clearly illustrate the solution of the present application, the drawings needed for describing the embodiments of the present application will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present application, and that other drawings can be obtained by those skilled in the art without inventive effort.

FIG. 1 shows a schematic block diagram of a serial port isolation module according to an embodiment of the present invention;

FIG. 2 illustrates a first portion of a circuit schematic of a serial port isolation module according to an embodiment of the present invention;

fig. 3 shows a second part of the circuit schematic connected to the first part of the circuit schematic of fig. 2.

Detailed Description

Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs; the terminology used in the description of the application herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application; the terms "including" and "having," and any variations thereof, in the description and claims of this application and the description of the above figures are intended to cover non-exclusive inclusions. The terms "first", "second", and the like in the description and claims of this application or in the above-described drawings are used for distinguishing between different objects and not for describing a particular order or technical meaning. The term "connected" and "coupled" when used in this application, unless otherwise indicated, includes both direct and indirect connections (couplings).

Furthermore, the features, operations, or characteristics described in the specification may be combined in any suitable manner to form various embodiments. Also, the various steps or actions in the method descriptions may be transposed or transposed in order, as will be apparent to one of ordinary skill in the art. Thus, the various sequences in the specification and drawings are for the purpose of describing certain embodiments only and are not intended to imply a required sequence unless otherwise indicated where such sequence must be followed.

The present invention will be described in further detail with reference to the following detailed description and accompanying drawings. In the following description, numerous details are set forth in order to provide a better understanding of the present application. However, those skilled in the art will readily recognize that some of the features may be omitted or replaced with other elements, materials, methods in different instances. In some instances, certain operations related to the present application have not been shown or described in detail in order to avoid obscuring the core of the present application from excessive description, and it is not necessary for those skilled in the art to describe these operations in detail, so that they may be fully understood from the description in the specification and the general knowledge in the art.

Fig. 1 is a schematic block diagram of a serial port isolation module 20 according to an embodiment of the present invention. For convenience of understanding, taking the application of the serial port isolation module 20 in the MCU chip test and debug scenario as an example, fig. 1 also shows the connection relationship between the serial port isolation module 20, the host 10, and the MCU chip 40 in this scenario. The serial communication isolation module 20 can be used as a bridge for communication between the host 10 and the MCU chip 40 and plays roles of power isolation and data isolation, so that in a communication system consisting of the host 10, the serial communication isolation module 20 and the MCU chip 40, the host 10 can realize normal data exchange between different voltage domain systems through serial communication and the MCU chip 40, and can isolate noise to reduce signal interference of serial communication, and meanwhile, the power isolation can protect the power safety of the system.

The serial port isolation module 20 comprises a USB interface 201, a power supply circuit 202, a power supply indicating circuit 203, a signal conversion circuit 204, a data transmission indicating circuit 205, a voltage isolation circuit 211, a signal isolation circuit 212, a voltage regulating circuit 221, a two-way level conversion circuit 222 and a chip interface 223.

The USB interface 201 is connected to a USB interface (not shown) corresponding to the host 10, specifically, the USB interface 201 may be a USB male port, and correspondingly connected to a USB female port of the host 10, and data and power signals between the host and the serial port isolation module 20 may be communicated through the USB interface 201.

The serial port isolation module 20 may be implemented in the form of a printed circuit board, on which the aforementioned plurality of circuit functional units are integrated. The USB power signal VIN1 with the first voltage obtained from the USB interface bus may be provided to the power supply circuit 202, the power supply indication circuit 203, the signal conversion circuit 204, the data transmission indication circuit 205, the voltage isolation circuit 211, and the signal isolation circuit 212 for power supply. The power supply circuit 302 may convert the USB power signal VIN1 obtained from the USB interface 201 into a power supply voltage required by the signal conversion circuit 204 according to different requirements of the model selected by the signal conversion circuit 204 or the selection of the operating voltage. For example, the USB power signal VIN1 of 5V is obtained from the USB interface 201, the power supply circuit 202 may convert the USB power signal VIN1 of 5V into the first system power conversion signal VIN2 of 3.3V and output the first system power conversion signal VIN2 to the signal conversion circuit 204, and the signal conversion circuit 204 receives the USB power signal VIN1 of 5V and the first system power conversion signal VIN2 of 3.3V as the power supply voltage, where the first system power conversion signal VIN2 has a second voltage different from the first voltage. Of course, in some other embodiments, the USB power signal VIN1 input by the circuits such as the voltage isolation circuit 211, the signal isolation circuit 212, etc. may also be replaced by the first system power conversion signal VIN2 according to different selected chip specifications, and the voltage of VIN2 is not limited to 3.3V; or the power supply circuit 202 may not be needed, and the signal conversion circuit 204 only needs to access the USB power signal VIN1. The power supply indicating circuit 203 is connected to the USB interface, and outputs an indicating signal when receiving the normal USB power signal VIN1, so as to prompt the user that the power connection between the serial port isolation module 20 and the host is in a normal state. The indication signal may be a light signal, a sound signal, for example, a light emitting diode to indicate whether the power supply state is normal.

The signal conversion circuit 204 may select a serial chip as a core component, and be equipped with appropriate peripheral circuits such as decoupling circuits and filtering circuits. The signal conversion circuit 204 is connected to the USB interface 201, receives the USB power signal VIN1 output by the USB interface 201 and the first system power conversion signal VIN2 output by the power supply circuit 202 as power supplies, and the signal conversion circuit 204 also receives the USB DATA signal USB _ D output by the USB interface 201 and converts the USB DATA signal USB _ D into the first serial port DATA signal DATA1. The first serial DATA signal DATA1 carries DATA corresponding to the USB DATA signal USB _ D and has a first communication level equal to the level of the USB power signal VIN1, and the first serial DATA signal DATA1 is provided to the DATA transmission indicating circuit 205, and indicates the current DATA transmission status of the user through sound and light, such as indicating whether DATA is being transmitted, whether the DATA transmission direction is uplink or downlink, and so on. On the other hand, the first serial DATA signal DATA1 is isolated by the signal isolation circuit 212 and then transmitted to the MCU chip. In the communication system shown in fig. 1, the USB interface 201, the signal conversion circuit 204, the power supply circuit 202, the power supply indication circuit 203, and the data transmission indication circuit 205 connected to the host 10 all belong to a first system category on the host 10 side, the USB data signal USB _ D received and transmitted by the USB interface belongs to a first system category, and the MCU chip 40 is a second system in a different system category from the host. After the first serial DATA signal DATA1 is isolated by the signal isolation circuit 212, the noise from the first system is removed, and a second serial DATA signal DATA2 corresponding to the first serial DATA signal DATA1 is output.

The voltage isolation circuit 211 may be a DC-DC power supply module, and is configured to isolate and reduce the noise of the USB power signal VIN1 from the host 10 side, that is, the first system, so as to reduce the influence of common mode interference on one side of the MCU chip 40, so that the circuit (including the MCU chip 40) on one side of the MCU chip 40 can stably operate. In this application, the USB power signal VIN1 may also be referred to as a first system power supply signal VIN1, which is derived from the host 10 and is not isolated. In one example, the voltage isolation circuit 211 may employ a 5V-5V DC-DC power supply chip, and the stable second system power supply signal VD may be output to the signal isolation circuit 212, the voltage regulation circuit 221, and the bidirectional level conversion circuit 222 through the voltage isolation circuit 211. In this example, the voltage isolation circuit 211 does not convert the voltage of the input first system power supply signal VIN1, that is, the first system power supply signal VIN1 and the second system power supply signal VD keep the same voltage, both are 5V, and are consistent with the power supply signal of the USB interface 201, and there is no need to switch between different voltages, so the structures of these circuits on the host side are relatively simpler.

The signal isolation circuit 212 receives the first system power supply signal VIN1 as a power supply source on an input side and receives the first serial DATA signal DATA1. The signal isolation circuit 212 receives the second system power supply signal VD as a power supply at an output side and outputs a second serial DATA signal DATA2 having the same communication level as the voltage of the second system power supply signal VD, in this example, the second serial DATA signal DATA2 has the same communication level as the first serial DATA signal DATA1, that is, the first communication level, which may be 5V. Therefore, the signal isolation circuit 212 functions to isolate the serial data signal from the first system (host side) from noise and output the serial data signal to the second system (MCU chip side).

The voltage adjusting circuit 221 receives the second system power supply signal VD, and the second system power supply signal VD having the first voltage is adjusted by the voltage adjusting circuit 221 to output an adjustable voltage signal VADJ having a voltage equal to a current serial communication level (referred to as an MCU communication level herein) of the connected MCU chip 40. In a specific example, the voltage regulating circuit 221 includes a voltage regulator and an adjustable resistor unit, the voltage regulator is connected to the resistors with different resistance values through the adjustable resistor unit to output an adjustable voltage signal, and the resistors with different resistance values are connected to output different output voltages, so as to correspond to different MCU communication levels. In one example, the adjustable resistance may be controlled by a communication level of the MCU chip.

The input side of the bidirectional level conversion circuit 222 receives the second system power supply signal VD having the first voltage as input power, and receives the second serial DATA signal DATA2 having the first communication level as input DATA; the output side of the bidirectional level shifter 222 receives the adjustable voltage signal VADJ as an input power, and outputs a third serial DATA signal DATA3 corresponding to the second serial DATA signal DATA2 and having the same communication level as the voltage of the adjustable voltage signal VADJ. In one example, the voltage of the adjustable voltage signal VADJ may be 3.3V, and the communication level of the MCU chip is also 3.3V, unlike the first voltage (5V). In some other embodiments, the voltage of the adjustable voltage signal VADJ may be 1.8V, 2.5V, 5V, etc., so that the voltage of the adjustable voltage signal VADJ output by the voltage adjusting circuit 221 may be controlled to be the same as the MCU communication level according to the different communication levels of the MCU chip 40 connected thereto, and no matter what communication level the second serial DATA signal DATA2 received by the bidirectional level converting circuit 22 from the host side has, the third serial DATA signal DATA3 having the MCU communication level may be obtained through the bidirectional level converting circuit 222, thereby implementing the serial DATA communication with the MCU chip 40.

The chip interface 223 receives the adjustable voltage signal VADJ and switches it to the connected MCU chip 40, while switching the third serial DATA signal DATA3 having the MCU communication level to the connected MCU chip 40. The chip interface 223 provided in the serial isolation module 20 may facilitate convenient connection of different MCU chips 40 to the serial isolation module 20 when testing the chips.

The serial port isolation module 20 of the embodiment of the application, transmit to the MCU chip side after isolating the USB power signal VIN1 from the host side through the voltage isolation circuit 211, and the USB data signal passes through the conversion of the signal conversion circuit 204, the noise of the signal isolation circuit 212 is isolated and then output to the MCU chip side, realize the power signal of communication between the host side and the MCU chip side, the data signal is double isolated, and output the adjustable voltage signal VADJ with the same voltage as the MCU communication level through the voltage adjustment circuit 221, control the bidirectional level conversion circuit 222 to convert the received serial data signal with the first communication level into the serial data signal with the MCU communication level, and realize the communication support to the MCU chips with multiple communication levels.

Referring to fig. 2 and fig. 3, fig. 2 is a first part of a schematic circuit diagram of a serial port isolation module according to an embodiment of the present invention, fig. 3 is a second part of the schematic circuit diagram, and the schematic circuit diagram of the serial port isolation module formed by fig. 2 and fig. 3 together is a detailed scheme based on the block diagram of fig. 1, so that functional modules the same as those in fig. 1 are labeled similarly. The serial port isolation module comprises a USB interface 501, a power supply circuit 502, a power supply indicating circuit 503, a signal conversion circuit 504, a data transmission indicating circuit 505, a voltage isolation circuit 511, a signal isolation circuit 512, a voltage regulating circuit 521, a two-way level conversion circuit 522 and a chip interface 523. The USB power signal VIN — 5V having the first voltage (5V) obtained from the power pin VCC of the USB interface 501 may be provided to the power supply circuit 502, the power supply indication circuit 503, the signal conversion circuit 504, the data transmission indication circuit 505, the voltage isolation circuit 511, and the signal isolation circuit 512. The USB data signal USB _ D output by the USB interface 512 specifically includes a pair of differential data USB D + and USB D-.

The power supply indicating circuit 503 includes a fourteenth resistor R14 and a sixth diode D6 connected in series, where the sixth diode D6 is a light emitting diode, and the fourteenth resistor R14 and the sixth diode D6 are connected in series between the power supply pin VCC of the USB interface and the first ground terminal VGND. When the circuit USB interface 501 is connected to a USB interface of a host to normally take power, the sixth diode D6 is turned on to emit light, so as to prompt a user that the current serial port isolation module 50 successfully obtains power supply from the USB interface.

The power supply circuit 502 includes a serial power supply chip U9, and the serial power supply chip U9 may be a chip of a type SE8733X2-HF in a specific example. An input pin VIN of the serial power supply chip U9 is connected to a power supply pin VCC of the USB interface to obtain a USB power supply signal VIN _5V as an input power supply, and a power supply output pin VIN of the serial power supply chip U9 is further connected to the first ground terminal VGND through a twenty-second capacitor C22 and a twenty-third capacitor C23 which are connected in parallel. An output pin VOUT of the serial power supply chip U9 outputs a converted first system power supply conversion signal V _3V with a second voltage (3V). The output pin VOUT is further connected to the first ground terminal VGND through a twentieth capacitor C20 and a twenty-first capacitor C21 connected in parallel. The signal conversion circuit 504 includes a serial chip U11, and in a specific example, the serial chip U11 may be a chip with a model CH 340B. The power pin VCC of the serial chip U11 is connected to the power pin VCC of the USB interface 501 to obtain the USB power signal VIN _5V as an input power, and the power pin VCC of the serial chip U11 is further connected to the first ground terminal VGND through the twenty-fifth capacitor C25. In addition, the first system power supply conversion signal V _3V output by the power supply circuit 202 is connected to the internal power supply pin V3 of the serial port chip U11, the internal power supply pin V3 is connected to the first ground terminal VGND through the twenty-fourth capacitor C24, where the twenty-fourth capacitor C24 is used as a decoupling capacitor. USB data pins UD + and UD-of the serial port chip U11 are used for receiving or sending USB data signals USB _ D, and the USB data signals USB _ D comprise differential data USB D + and USBD-. Taking the DATA-down behavior example (host- > MCU chip), the signal conversion circuit 504 converts the USB DATA differential signal differential DATA USB D + and USB D-into the first serial port DATA signal DATA1. The first serial DATA signal DATA1 carries serial DATA USB _ TXD corresponding to the USB DATA signal USB _ D and has a first communication level equal to the level of the USB power signal VIN _5V, and the first serial DATA signal DATA1 is provided to the DATA transmission indicating circuit 505 through the serial DATA transmission pin TXD. Similarly, if the serial data receiving pin RXD is in an uplink data transmission state, the serial data receiving pin RXD may receive serial data from the MCU chip side. The data transmission indicating circuit 505 includes two parallel indicating circuits, wherein one of the parallel indicating circuits includes a sixteenth resistor R16 and a seventh diode D7 connected in series, the sixteenth resistor R16 and the seventh diode D7 are connected between the power supply pin VCC and the serial data transmitting pin TXD of the USB interface 501, and the current data transmission state of the user is reminded to perform downlink data transmission through the light emitting indication of the seventh diode D7. The other path includes a twenty-first resistor R21 and an eighth diode D8 connected in series, the twenty-first resistor R21 and the eighth diode D8 are connected between a power pin VCC of the USB interface 501 and a serial data receiving terminal RXD, and the current data transmission state of the user is prompted to be the uplink data transmission state through a light emitting indication of the eighth diode D8.

The voltage isolation circuit 511 may be a DC-DC power supply module, and is configured to isolate and reduce noise of the USB power supply signal from the host 10 side, i.e., the first system, so as to reduce the influence of common mode interference on one side of the MCU chip, so that the circuit (including the MCU chip 40) on one side of the MCU chip can stably operate. The voltage isolation circuit 511 includes a voltage isolation chip U8, in a specific example, the voltage isolation chip U8 may be a 5V-5V (DC-DC) power chip with a model B0505S-1W, an input positive pin Vin of the voltage isolation chip U8 is connected to a power pin VCC of the USB interface 501, and receives a first system power supply signal Vin _5V, the first system power supply signal Vin _5V is received via the USB interface, and is originated from the host 10 and is not isolated, and a stable second system power supply signal D _5V may be output via an output positive pin Vo of the voltage isolation chip U8 to be provided to the signal isolation circuit 512, the voltage adjustment circuit 521 and the bidirectional level conversion circuit 522. In addition, the input positive pin Vin of the voltage isolation chip U8 is connected to the first ground terminal VGND through the fifth diode D5, the sixteenth capacitor C16, the seventeenth capacitor C17 and the fourth polarity capacitor CT4, which are connected in parallel. The fifth diode D5 is a reverse zener diode. The anode of the fourth polarity capacitor CT4 is connected to the input pin Vin. The input negative pin GND of the voltage isolation chip U8 is connected to the first ground VGND. The output positive pin Vo of the voltage isolation chip U8 is connected to the second ground terminal DGND through the ninth resistor R9 and the fifth polarity capacitor CT5, the eighteenth capacitor C18, and the nineteenth capacitor C19 connected in parallel. The anode of the fifth polarity capacitor CT5 is connected to the ninth resistor R9, and the cathode is connected to the second ground DGND. The output negative pin 0V of the voltage isolation chip U8 is connected to the second ground DGND. It can be seen that the signals at the input side of the voltage isolation circuit 511 all belong to the first system category, and include the first system power supply signal VIN _5V and the ground signal provided by the first ground terminal VGND; the signals at the output side of the voltage isolation circuit 511 belong to the category of the second system, and include the power supply signal D _5V of the second system and the ground signal provided by the second ground terminal DGND, so that the power supply signals of the first system and the second system can be isolated from each other, so that they do not interfere with each other.

The signal isolation circuit 512 includes a signal isolation chip U12, and the signal isolation chip U12 may select a chip of pi 121M31 in a specific example, and receive a first system power supply signal VIN _5V as an input power through a first power supply pin VDD1 on a first system side, and receive a second system power supply signal D _5V as an input power through a second power supply pin VDD2 on a second system side. The first power supply pin VDD1 is connected to the first ground terminal VGND through a twenty-sixth capacitor C26, and the second power supply pin VDD2 is connected to the second ground terminal DGND through a twenty-seventh capacitor C27. The first ground pin GND1 of the signal isolation chip U12 on the first system side is connected to the first ground terminal VGND, and the second ground pin GND2 on the second system side is connected to the second ground terminal DGND. The first input pin VIA of the signal isolation chip U12 on the first system side is connected to the serial DATA transmitting pin TXD through a seventeenth resistor R17 to receive the first serial DATA signal DATA1 output by the signal conversion circuit 504. The first serial DATA signal DATA1 is isolated by the signal isolation chip U12 and then outputs a corresponding second serial DATA signal DATA2 through the first output pin VOA of the second system side. The second serial DATA signal DATA2 has the same communication level as the voltage of the second system power supply signal D _5V, and in this example, the second serial DATA signal DATA2 has the same communication level as the first serial DATA signal DATA1, i.e., the first communication level of 5V. The information contained in the second serial DATA signal DATA2 is still consistent with the information contained in the first serial DATA signal DATA1, and both serial DATA signals contain serial DATA USB _ txd, but the second serial DATA signal DATA2 isolates the noise from the first system (i.e., the host side) contained in the first serial DATA signal DATA1. In addition, the signal isolation chip U12 further includes a second input pin VIB located on the second system side, and is configured to receive serial data from the MCU chip from the second system side, and output the serial data after isolation from a second output pin VOB on the first system side to the signal conversion circuit 504 through a nineteenth resistor R19.

The voltage regulating circuit 521 includes a voltage regulator chip U10 and an adjustable resistor unit 550, where the voltage regulator chip U10 may be a linear voltage regulator chip of model AMS1117-ADJ, an input pin VIN of the voltage regulator chip U10 receives a second system power supply signal D _5V, and the input pin VIN is connected to a second ground terminal DGND through a first polarity capacitor CT1, where an anode of the first polarity capacitor CT1 is connected to the input pin VIN. The adjustable resistance unit 550 includes a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, and a switch array SW2. The adjustable pin ADJ of the regulator chip U10 is connected to the second ground DGND through the first resistor R1. One end of the second resistor R2 is connected to an output pin VOUT of the regulator chip U10, and the other end is connected between the adjustable pin ADJ and the first resistor R1 via the switch array SW2. Similarly, one end of the third resistor R3 is connected to the output pin VOUT of the regulator chip U10, the other end is connected between the adjustable pin ADJ and the first resistor R1 via the switch array SW2, one end of the fourth resistor R4 is connected to the output pin VOUT of the regulator chip U10, the other end is connected between the adjustable pin ADJ and the first resistor R1 via the switch array SW2, one end of the fifth resistor R5 is connected to the output pin VOUT of the regulator chip U10, and the other end is connected between the adjustable pin ADJ and the first resistor R1 via the switch array SW2. The switch array SW2 includes a plurality of switches, and in this example includes four switches, each of which is in one-to-one correspondence with the second resistor R2, the third resistor R3, the fourth resistor R4, and the fifth resistor R5, that is, the four switches are respectively connected in series between the first resistor R1 and the second resistor R2, the third resistor R3, the fourth resistor R4, or the fifth resistor R5. The second resistor R2, the third resistor R3, the fourth resistor R4, and the fifth resistor R5 are equivalent to form a selectable resistor array in this example, and when switches corresponding to the second resistor R2, the third resistor R3, the fourth resistor R4, and the fifth resistor R5 are closed, the corresponding resistors in the selectable resistor array are equivalent to selectively connect between the output pin VOUT and the adjustable pin ADJ, so that the selectively connected selectable resistors and the first resistor R1 form a voltage divider circuit connected in series between the output pin VOUT and the second ground terminal DGND. Since the output terminal VOUT has a reference voltage difference VREF, such as VREF =1.25V, between the adjustable terminal ADJ and the output terminal VOUT, the voltage of the adjustable voltage signal D _ VoltageADJ of the output terminal VOUT can be obtained according to the following formula (1):

D_VoltageADJ＝VREF*(1+R ₁ /R ₂ )+Iadj*R ₁ (1)

wherein D _ VoltageADJ represents a voltage magnitude of the tunable voltage signal D _ VoltageADJ, R ₁ Represents the resistance of the pull-down resistor, i.e., the resistance of the first resistor R1; r ₂ The resistance value of the pull-up resistor is represented, and the resistance value of the resistor in the resistor array connected into the circuit through the switch array SW2 can be selected; iadj represents the current from the adjustable pin ADJ to the second ground DGND, typically a few microamperes to a few milliamperes. In the case where the resistance value of the first resistor R1 is small, the formula (1) can be reduced to about the formula (2):

D_VoltageADJ≈VREF*(1+R ₁ /R ₂ )(2)

therefore, by selecting the resistance R of the pull-up resistor to be connected ₂ Instead, the magnitude of the output voltage D _ VoltageADJ may be changed. In one example, the first resistor R1 has a resistance of 124 ohms (Ω), the second resistor R2 has a resistance of 54.9 ohms, the third resistor R3 has a resistance of 124 ohms, the fourth resistor R4 has a resistance of 205 ohms, and the fifth resistor R5 has a resistance of 374 ohms. For example, when only the third resistor R3 of the optional resistor array is connected as a pull-up resistor, the voltage D _ VoltageADJ output by the output pin VOUT is equal to about 1.25 × 1+124/124 volts, i.e., about 2.5 volts (V). Similarly, when the second resistor R2 is selected as the pull-up resistor, D _ VoltageADJ is approximately 4 volts. In addition, the output pin VOUT of the regulator chip U10 is also connected to the second ground terminal DGND through the second polarity capacitor CT 2.

The bidirectional level shifter 522 includes a level shifter U13, and the level shifter U13 can be selected from the chips with the model RS0102YH 8. The level conversion chip U13 has a first power input pin VCCA connected to an output pin VOUT of the voltage regulator chip U10 to receive the adjustable voltage signal D _ voltagesadj, a second power output pin VCCA to input a second system power supply signal D _5V, a first DATA receiving pin B1 of the voltage regulator chip U10 to receive a second serial DATA signal DATA2 having a first communication level, and a third serial DATA signal DATA3 (TX) output through a first DATA output pin A1 corresponding to the first DATA receiving pin B1, the third serial DATA signal DATA3 corresponding to the second serial DATA signal DATA2 and having a communication level identical to that of the adjustable voltage signal D _ voltagesadj, and since the voltage of the adjustable voltage signal D _ voltagadaj is adjusted and matched according to the serial communication level of the MCU chip, the third serial DATA signal DATA3 has a level identical to that of the MCU receiving chip, and the third serial DATA signal DATA is converted from the USB DATA signal, and thus the serial DATA signal included in the isolation module 50 can be converted into a serial signal having a noise which is mutually isolated from the host system host computer system.

In other variable embodiments, some changes may be made to the above embodiments, for example, the number of selectable resistors connected as pull-up resistors may not only be one of the second resistor R2 to the fifth resistor R5, but also be connected to more than 2 resistors at the same time, and the obtained effect is that more than two resistors are connected in parallel as pull-up resistors, and then the resistance value R of the pull-up resistor is connected in parallel as a pull-up resistor ₂ Equal to the equivalent resistance value of more than two selectable resistors connected in parallel, in which case, the resistance values of the resistors in the selectable resistor array can be designed according to the needs, and will not be illustrated in detail here. The number of the resistors in the selectable resistor array is not limited to 4 selected in the embodiment, and may be 2, 3, 5 or more, and the like, and more than 2 resistors in the selectable resistor array are selectively connected between the output pin and the first resistor through the switch array, so as to change the resistance value of the pull-up resistor, and further influence the output voltage to change. Although the embodiment has been described with the pull-up resistor being changeable, the pull-down resistor may be changeable, for example, the pull-down resistor is replaced by an optional resistor array, or the pull-up resistor and the pull-down resistor may be changeable at the same time. The method and the device can support more than two TTL communication levels, and can obtain adjustable voltage with higher adjustment precision through various combined changes of the resistance values, so that richer TTL communication levels can be supported, and the method and the device are not limited to 2-3 communication levels.

It should also be understood that the foregoing embodiment is described as an example under data, however, the serial port isolation module also supports data uplink, and is not described in detail here.

According to the serial port isolation module provided by the embodiment of the invention, a USB data signal received from a USB interface is converted into a first serial port data signal through the signal conversion circuit, meanwhile, a first system power supply signal from a host side is subjected to power noise isolation through the voltage isolation module and then is output to the signal isolation circuit and the voltage regulation circuit as a second system power supply signal, so that the signal isolation circuit takes the second system power supply signal as an input power supply and outputs the received first serial port data signal as a second serial port data signal after the signal noise isolation, serial port data subjected to power and signal noise isolation are obtained, in addition, an adjustable voltage signal is output through the voltage regulation circuit, the second serial port data signal is converted into a third serial port data signal with an MCU chip serial port communication level through the bidirectional level conversion circuit, therefore, the voltage of the serial port data can be consistent with the communication level of a currently connected MCU chip, smooth transmission of the data is realized, and the adjustable voltage signal can be adjusted to be consistent with the communication levels of various MCU chips, therefore, besides the noise of the communication between the host and the MCU chips is isolated, and various communication levels of the serial port isolation module can be supported.

It should be understood that, although the steps in the flowcharts of the figures are shown in order as indicated by the arrows, the steps are not necessarily performed in order as indicated by the arrows. The steps are not performed in the exact order shown and may be performed in other orders unless explicitly stated herein. Moreover, at least a portion of the steps in the flow chart of the figure may include multiple sub-steps or multiple stages, which are not necessarily performed at the same time, but may be performed at different times, which are not necessarily performed in sequence, but may be performed alternately or alternately with other steps or at least a portion of the sub-steps or stages of other steps.

Reference is made herein to various exemplary embodiments. However, those skilled in the art will recognize that changes and modifications may be made to the exemplary embodiments without departing from the scope hereof. For example, the various operational steps, as well as the components used to perform the operational steps, may be implemented in differing ways depending upon the particular application or consideration of any number of cost functions associated with operation of the system (e.g., one or more steps may be deleted, modified or incorporated into other steps).

While the principles herein have been illustrated in various embodiments, many modifications of structure, arrangement, proportions, elements, materials, and components particularly adapted to specific environments and operative requirements may be employed without departing from the principles and scope of the present disclosure. The above modifications and other changes or modifications are intended to be included within the scope of this document.

The foregoing detailed description has been described with reference to various embodiments. However, one skilled in the art will recognize that various modifications and changes may be made without departing from the scope of the present disclosure. Accordingly, the disclosure is to be considered in all respects as illustrative and not restrictive, and all such modifications are intended to be included within the scope thereof. Also, advantages, other advantages, and solutions to problems have been described above with regard to various embodiments. However, the benefits, advantages, solutions to problems, and any element(s) that may cause any element(s) to occur or become more pronounced are not to be construed as a critical, required, or essential feature or element of any or all the claims. As used herein, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, system, article, or apparatus. Furthermore, the term "coupled," and any other variation thereof, as used herein, refers to a physical connection, an electrical connection, a magnetic connection, an optical connection, a communicative connection, a functional connection, and/or any other connection.

Those skilled in the art will recognize that many changes may be made to the details of the above-described embodiments without departing from the underlying principles of the invention. Accordingly, the scope of the invention should be determined from the following claims.

Claims

1. The utility model provides a serial ports isolation module connects between host computer and MCU chip, its characterized in that includes:

a USB interface connected to a host;

the signal isolation circuit is connected to the signal conversion circuit and receives the first serial port data signal, the signal isolation circuit is further connected to the voltage isolation circuit to receive the second system power supply signal, the first serial port data signal is isolated by the signal isolation circuit and then outputs a corresponding second serial port data signal, and the second serial port data signal has the same voltage as the second system power supply signal;

the voltage regulating circuit comprises a voltage stabilizer and an adjustable resistance unit, the voltage stabilizer receives the power supply signal of the second system, the adjustable resistance unit is connected to the output end of the voltage stabilizer, the output end of the voltage stabilizer outputs an adjustable voltage signal according to the adjustable resistance unit, and the voltage of the adjustable voltage signal is the same as the serial port communication level of the MCU chip; and

2. The serial port isolation module of claim 1, wherein the first system power supply signal is provided by a power pin of the USB interface.

3. The serial port isolation module of claim 2, wherein the signal conversion circuit receives the first system power supply signal as one of the input power supplies.

4. The serial port isolation module of claim 3, further comprising a power supply circuit connected to the USB interface and converting the first system power supply signal into a first system power supply conversion signal, the first system power supply conversion signal having a second voltage different from the first voltage, the signal conversion circuit receiving the first system power supply conversion signal as one of the input power supplies.

5. The serial port isolation module of claim 1, wherein the voltage of the second system power supply signal is the same as the voltage of the first system power supply signal.

6. The serial port isolation module of claim 1, wherein the signal isolation circuit is further coupled to the USB interface and receives the first system power supply signal.

7. The serial port isolation module according to claim 1, wherein the voltage regulator includes an input pin, an output pin, and an adjustable pin, the adjustable resistance unit includes a first resistor, a selectable resistor array, and a switch array, the input pin receives the second system power supply signal, the adjustable pin is connected to a ground terminal through the first resistor, the selectable resistor array includes at least two resistors, and the selectable resistor array is selectively connected between the output pin and the first resistor through the switch array.

8. The serial port isolation module of claim 7, wherein the selectable array of resistors comprises 4 resistors of different values.

9. The serial port isolation module of claim 8, wherein one of the resistors in the selectable array has the same resistance as the first resistor.

10. The serial port isolation module according to claim 8, wherein the resistors with 4 different resistance values are 54.9 ohms, 124 ohms, 205 ohms and 374 ohms respectively, and the first resistor has a resistance value of 124 ohms.

11. The serial port isolation module of claim 1, wherein the bi-directional level shift circuit is further coupled to the voltage isolation module and receives the second system power supply signal.

12. The serial port isolation module of claim 1, further comprising a power indication circuit comprising a light emitting diode, the power indication circuit being connected to the USB interface and receiving the first system power signal.

13. The serial port isolation module of claim 1, further comprising a data transmission indicating circuit connected to the signal conversion circuit and receiving the first serial port data signal, the data transmission indicating circuit comprising a light emitting diode.

14. The serial port isolation module of claim 1, further comprising a chip interface, the chip interface being configured to connect the bidirectional level shift circuit and the MCU chip and transmit the third serial port data signal to the MCU chip.