CN115663596A - Semiconductor quantum well structure for inhibiting lateral diffusion of current carrier and preparation method - Google Patents
Semiconductor quantum well structure for inhibiting lateral diffusion of current carrier and preparation method Download PDFInfo
- Publication number
- CN115663596A CN115663596A CN202211229143.0A CN202211229143A CN115663596A CN 115663596 A CN115663596 A CN 115663596A CN 202211229143 A CN202211229143 A CN 202211229143A CN 115663596 A CN115663596 A CN 115663596A
- Authority
- CN
- China
- Prior art keywords
- quantum well
- nucleation
- barrier layer
- semiconductor
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Landscapes
- Recrystallisation Techniques (AREA)
Abstract
The invention provides a semiconductor quantum well structure for inhibiting lateral diffusion of a carrier and a preparation method thereof. The structure comprises a lower barrier layer, a quantum well layer, a nucleation structure and an upper barrier layer which are sequentially stacked; the appearance of the nucleation structure is in an island shape and/or a groove shape, and the nucleation structure does not completely cover the quantum well layer; the bandgap width of the nucleation structure is not equal to the bandgap width of the upper barrier layer. The invention can reduce the lateral diffusion of the current carrier in the quantum well, thereby reducing the non-radiative recombination of the current carrier in a dislocation region in the quantum well structure and improving the luminescence property of the quantum well structure. The tolerance of the laser adopting the quantum well structure as an active region to dislocation is obviously improved, and particularly the III-V group semiconductor quantum well laser grown by silicon-based heteroepitaxy is adopted. The invention is feasible, provides a brand new scheme for the growth of the semiconductor quantum well structure, and promotes the application of the corresponding semiconductor quantum well laser in the silicon-based photoelectric integrated chip.
Description
Technical Field
The invention relates to the technical field of semiconductor laser and photoelectric integration, in particular to a semiconductor quantum well structure for inhibiting lateral diffusion of carriers and a preparation method thereof.
Background
In recent years, integrated photonics has found widespread use in integrated circuits of commercial integrated platforms due to its advantages in terms of volume, capacity, cost, and power consumption. Silicon-based photonics, among other things, can utilize mature CMOS equipment to produce high quality, low cost photonic components and can provide low loss, high refractive index waveguides for iii-v devices. Currently, heterogeneous integration by means of bonding has become a main technical means for obtaining on-chip iii-v light sources in silicon-based photonics, but direct epitaxial growth has gained favor of many electronic chip manufacturers and scientific research institutions in the world as a next generation heterogeneous integration scheme. Epitaxial growth of group iii-v semiconductor device structures directly on silicon incurs high densities of defects due to the crystalline differences between silicon and group iii-v materials, where defects typified by thermal cracks, inversion domains, and threading dislocations can significantly degrade active device performance. Although the thermal cracking, anti-phase domain problem has been solved well over the two decades of research, it is at 10 6 /cm 2 The magnitude of threading dislocation density still restricts the development of group iii-v active devices, especially silicon-based quantum well lasers, directly epitaxial on silicon.
Because the quantum well is of a layered structure, the conventional quantum well structure cannot provide three-dimensional limitation on carriers in an active region like a quantum dot structure, namely, only the limitation of an epitaxial direction is realized, and the limitation of a transverse direction is not realized, so that transversely diffused electrons and holes can more easily enter a dislocation region to carry out non-radiative recombination. Therefore, the silicon-based quantum well laser grown by direct epitaxial growth has large threshold current, poor high-temperature stability and extremely short service life. Today, the technical means for reducing the threading dislocation density is close to the bottleneck, a novel quantum well structure is urgently needed to inhibit the lateral diffusion of carriers and reduce the probability of the carriers reaching a dislocation region, so that the probability of non-radiative recombination in an active region is reduced, the tolerance of the quantum well structure to dislocation is improved, and the performance of a semiconductor quantum well device comprising a silicon-based direct epitaxial growth quantum well laser can be improved. Meanwhile, the structure is different from a quantum dot structure, and the gain region of the structure is still a two-dimensional layered structure rather than a three-dimensional island structure like the quantum dot structure.
Disclosure of Invention
In order to solve the technical problems, the invention provides a semiconductor quantum well structure for inhibiting the lateral diffusion of carriers and a preparation method thereof.
In a first aspect, the semiconductor quantum well structure for inhibiting carrier lateral diffusion provided in the embodiments of the present invention includes a lower barrier layer, a quantum well layer, a nucleation structure, and an upper barrier layer, which are sequentially stacked; wherein the morphology of the nucleation structure is island-shaped and/or groove-shaped, and the nucleation structure does not completely cover the quantum well layer; the nucleation structure has a bandgap width that is not equal to the bandgap width of the upper barrier layer.
The III-V family semiconductor quantum well structure for inhibiting the lateral diffusion of the current carrier and the epitaxial growth method thereof can obviously reduce the lateral diffusion length of the current carrier in a quantum well plane, inhibit the lateral diffusion of the current carrier, further reduce the probability of non-radiative recombination and improve the tolerance of the quantum well structure to dislocation, which obviously improves the performance of a laser adopting the quantum well structure as an active region, especially prolongs the service life of a device of an III-V family semiconductor quantum well laser directly epitaxially grown on silicon; the epitaxial growth method of the structure is simple, and the complexity of the post process of the device is not increased, so that the structure is suitable for being used as an active region of a high-performance III-V group semiconductor quantum well laser, in particular to a III-V group semiconductor quantum well laser directly epitaxially grown on silicon.
Preferably, the morphologies are island-shaped nucleation structures and/or trench-shaped nucleation structures that are not all contiguous, i.e., the nucleation structures do not completely cover the quantum well layer.
Further preferably, the band gap widths of the quantum well layer are smaller than the band gap widths of the lower barrier layer, the nucleation structure, and the upper barrier layer. The carriers in the quantum well layer are limited by the quantum dots of the lower barrier layer, the nucleation structure and the upper barrier layer.
More preferably, the thickness of the lower barrier layer is 5nm to 1000nm; the thickness of the quantum well layer is 2 nm-30 nm; the height of the nucleation structure is 0.1 nm-30 nm; the thickness of the upper barrier layer is 5 nm-1000 nm. The lower barrier layer, the nucleation structure, and the upper barrier layer collectively confine carriers in the quantum well layer.
Further preferably, the semiconductor quantum well structure is a III-V group semiconductor multi-quantum well structure; preferably, in the semiconductor quantum well structure, the lower barrier layer, the quantum well layer, the nucleation structure and the upper barrier layer are repeated as a whole to form a multi-period quantum well structure, and the repeated stacking sequence is the lower barrier layer, the quantum well layer, the nucleation structure and the upper barrier layer. The quantum well layer is subjected to quantum confinement by the lower barrier layer below the quantum well layer, the nucleation structure above the quantum well layer and the upper barrier layer in each period.
Preferably, the lower barrier layer, the quantum well layer, the nucleation structure and the upper barrier layer are all made of III-V semiconductor materials; the III-V semiconductor material comprises one or more of GaP series, gaAs series, inP series and GaSb series materials, preferably GaAs series and InP series materials. In the present invention, the III-V semiconductor material includes, but is not limited to, binary compounds such as AlP, gaP, alAs, gaAs, inP, gaSb, etc., ternary compounds such as GaAsP, inGaAs, alGaAs, inGaP, gaAsSb, etc., quaternary compounds such as InAlGaAs, alGaAsP, inGaAsP, inGaAsSb, etc. The structure of the invention needs to meet the requirements that the band gap width of the nucleation structure is not equal to the band gap width of the upper barrier layer and the band gap of the quantum well layer is minimum, and the specific material type is not specifically limited.
Further preferably, the lateral diffusion of carriers in the semiconductor quantum well structure in the quantum well plane is suppressed. According to the invention, the transverse diffusion of the carriers in the quantum well structure in the quantum well plane is inhibited, and the probability of the carriers transversely diffusing to the dislocation region is reduced, so that the probability of non-radiative recombination of the dislocation region of the carriers in the quantum well is reduced, and the tolerance of the quantum well structure to dislocation is improved.
In a second aspect, the method for manufacturing the semiconductor quantum well structure for inhibiting lateral diffusion of carriers provided by the embodiments of the present invention adopts Metal Organic Chemical Vapor Deposition (MOCVD) and/or Molecular Beam Epitaxy (MBE) for growth, and includes the following steps:
a) Growing a lower barrier layer;
b) Growing a quantum well layer;
c) Growing a nucleation structure;
d) And growing an upper barrier layer.
Further preferably, the nucleation structure is grown in step C) on the quantum well (001) plane.
Preferably, the semiconductor quantum well structure adopts a multi-quantum well structure; preferably, step a, step B, step C and step D are repeated as a whole, and the sequence of step a, step B, step C and step D is kept unchanged during each repetition, and the repetition number is not more than 10 times, preferably 2 times.
Preferably, the quantum well structure is directly grown on the substrate, or other structures are grown on the substrate, and then the quantum well structure is grown; after the quantum well structure is grown, other structures can be grown continuously.
Preferably, the substrate is grown on a Si (001) substrate, a GaAs (001) substrate, or an InP (001) substrate, and the epitaxial surface of the substrate is an off-angle (001) plane or an off-angle (001) plane.
Preferably, in the step C, the grown nucleation structure has an island-like and/or trench-like shape; preferably, the nucleation structure is a nucleation island and/or a nucleation groove, and each nucleation island and/or nucleation groove is not connected with each other; the growth height of the nucleation structure is 0.1 nm-30 nm, the band gap width of the nucleation structure is not equal to the band gap width of the quantum well layer, and the band gap width of the nucleation structure is not equal to the band gap width of the upper barrier layer.
Further preferably, the laser adopting the III-V group semiconductor quantum well structure as the active region can reduce the lateral diffusion of the current carrier in the plane of the active region of the quantum well and reduce the probability of non-radiative recombination of the current carrier in a dislocation region, thereby improving the lasing performance of the device.
In a third aspect, the semiconductor quantum well device provided by the embodiment of the present invention includes the semiconductor quantum well structure for inhibiting the lateral diffusion of carriers or the semiconductor quantum well structure prepared by the method for preparing the semiconductor quantum well structure for inhibiting the lateral diffusion of carriers; the semiconductor quantum well device includes: quantum well laser, quantum well superradiance light emitting diode, quantum well optical amplifier, quantum well light detector.
The invention has the beneficial effects that: the material of the group iii-v nucleation structure differs in band gap width from the material of the upper barrier layer, and the nucleation structure does not completely cover the quantum well layer, i.e., the upper barrier layer also contacts the quantum well layer. Therefore, regions with different barrier heights are divided on the quantum well plane, and in the regions with different barrier heights, the quantum confinement effect provided by the barriers is different, namely the quantum confinement effect on carriers is different. Thus, a barrier difference exists between the different regions partitioned in the quantum well, and carriers are inhibited, i.e., suppressed, by the barrier when moving laterally (in the plane of the quantum well). When the lateral diffusion of carriers in the quantum well is suppressed, the probability of non-radiative recombination occurring when they reach the dislocation region will be reduced. Therefore, compared with the traditional III-V group semiconductor quantum well structure, the quantum well structure provided by the invention has higher contraposition dislocation tolerance, the performance of a semiconductor device adopting the quantum well structure is obviously improved, particularly for a silicon III-V group semiconductor quantum well laser grown by heteroepitaxy, the service life of the device is greatly prolonged, meanwhile, the structure is different from a quantum dot structure, a gain region of the structure is still a two-dimensional layered structure instead of a three-dimensional island structure like a quantum dot, and the band gap width of the quantum well layer in the structure is the minimum and is different from the band gap width of the quantum dot in the quantum dot structure.
Drawings
In order to more clearly illustrate embodiments of the present invention or prior art solutions, reference will now be made briefly to the drawings, which are used in the description of embodiments or prior art, and in which like elements or portions are generally identified by like reference numerals throughout the several views. In the drawings, elements or portions are not necessarily drawn to scale. It is obvious that the drawings in the following description are only some embodiments of the invention, and that for a person skilled in the art, other drawings can also be derived from them without inventive effort.
FIG. 1 is a schematic diagram of a III-V semiconductor quantum well structure for suppressing lateral diffusion of carriers on a GaAs substrate according to an embodiment of the present invention;
FIG. 2 is an Atomic Force Microscope (AFM) scanning profile of an AlGaAs nucleation structure on the InGaAs quantum well (001) plane with scanning dimensions of 1 μm × 1 μm provided by an embodiment of the present invention;
fig. 3 is a schematic structural view of a silicon-on hetero-epitaxial III-V group semiconductor quantum well laser using the III-V group semiconductor quantum well structure for suppressing lateral diffusion of carriers as an active region according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention clearer, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings, and it is obvious that the described embodiments are some, but not all embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The examples do not show the specific techniques or conditions, according to the technical or conditions described in the literature in the field, or according to the product specifications. The instruments and the like are conventional products which are purchased by normal distributors and are not indicated by manufacturers. The process is conventional unless otherwise specified, and the starting materials are commercially available from the open literature. The examples do not show the specific techniques or conditions, according to the technical or conditions described in the literature in the field, or according to the product specifications.
The following examples are intended to illustrate the invention but are not intended to limit the scope of the invention.
In the description of the present invention, unless otherwise specified, the terms "upper", "lower", "inside", "outside", and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, and are only for convenience in describing the present invention and simplifying the description, but do not indicate or imply that the system or element referred to must have a specific orientation, be constructed in a specific orientation, and be operated, and thus, should not be construed as limiting the present invention.
Example 1
In this embodiment, a GaAs buffer layer is epitaxially grown on a GaAs substrate, and then a quantum well structure including a nucleation structure is grown. By the growth scheme of the III-V group semiconductor quantum well structure on the GaAs substrate, the lateral diffusion of carriers in the quantum well can be remarkably inhibited. In this embodiment, a (001) substrate is used As the GaAs substrate, MBE is used As the epitaxial apparatus, group iii sources are Al, ga and In, and group v sources are As.
As shown in fig. 1, the growth scheme of the iii-v group semiconductor quantum well structure on the GaAs substrate provided in this embodiment includes the following specific steps:
s101, heating and degassing a GaAs substrate, then placing the GaAs substrate into a growth chamber, and heating the substrate in an As atmosphere to perform deoxidation treatment;
s102, growing a 300nm GaAs layer, namely a GaAs buffer layer, by using As As a group V source and Ga As a group III source;
s103, growing a 50nm AlGaAs lower barrier layer by using As As a group V source and Al and Ga As a group III source, wherein the Al has a composition of 0.2;
s104, growing a 10nm InGaAs quantum well layer by using As As a group V source and In and Ga As a group III source, wherein the In component is 0.2;
s105, growing an AlGaAs nucleating layer with the equivalent thickness of 1nm by using As As a group V source and Al and Ga As a group III source, wherein the Al has the composition of not less than 0.95, and the height of the AlGaAs nucleating layer is greater than the equivalent thickness because the nucleating layer does not completely cover the quantum well layer;
s106, growing a 50nm AlGaAs upper barrier layer using As As group V source and Al, ga As group III source, wherein Al has a composition of 0.2.
As shown in FIG. 2, the UID-Al is grown on the InGaAs quantum well (001) plane 0.95 Ga 0.05 The AFM topography of the As nucleation structure can obviously find that island-shaped and groove-shaped nucleation structures are randomly distributed on a plane, and each nucleation island and each nucleation groove are not connected with each other, so that the surface topography can effectively play a regional quantum confinement effect on a quantum well.
Example 2
The embodiment is a silicon-on-direct epitaxial III-V group semiconductor quantum well laser which adopts the semiconductor III-V group quantum well structure for inhibiting the lateral diffusion of carriers as an active region. And epitaxially growing a GaAs buffer layer on the pretreated silicon substrate, and then sequentially growing an N-type GaAs contact layer, an N-type AlGaAs limiting layer, a semiconductor III-V group quantum well structure for inhibiting the lateral diffusion of carriers, a P-type AlGaAs limiting layer and a P-type GaAs contact layer. According to the growth scheme for directly epitaxially growing the III-V group semiconductor quantum well laser structure on the silicon, provided by the embodiment, the transverse diffusion of carriers in an active region can be obviously inhibited, so that the performance of the device prepared by the method is improved. In this embodiment, the Si (001) substrate with a [110] off-angle of 4 ° is used As the Si substrate, MBE is used As the epitaxial device, al, ga, and In are group iii sources, as is a group v source, and Si and Be are doping sources In the growth chamber.
As shown in fig. 3, the growth scheme for directly epitaxially growing the iii-v group semiconductor quantum well laser structure on silicon provided in this embodiment includes the following specific steps:
s201, degassing the cleaned silicon substrate, placing the silicon substrate into a cavity, and performing high-temperature deoxidation treatment on the silicon substrate in an As atmosphere;
s202, growing a GaAs buffer layer structure on a silicon substrate using As group v source and Ga As group III source, comprising: growing a 30nm GaAs layer at 300 ℃; growing a 100nm GaAs layer at 350 ℃; growing a 150nm GaAs layer at 500 ℃; growing a 1000nm GaAs layer at 560 ℃;
s203, growing a 500nm N-type GaAs contact layer by using As As a group V source, ga As a group III source and Si As a doping source, wherein the doping concentration is 4 multiplied by 10 18 /cm 3 ；
S204, growing 1500nm N-type Al by using As As group V source, al and Ga As group III source and Si As doping source 0.4 Ga 0.6 A lower As limiting layer with a doping concentration of 1 × 10 18 /cm 3 ；
S205, growing 100nm Al by using As As group V source and Al and Ga As group III source 0.2 Ga 0.8 An As lower barrier layer;
s206, using As As group V source and In and Ga As group III source, growing 10nm In 0.2 Ga 0.83 An As quantum well;
s207, growing Al with the equivalent thickness of 1nm by using As As group V source and Al and Ga As group III source 0.95 Ga 0.05 An As nucleation structure;
s208, growing 100nm of Al by using As As group V source and Al and Ga As group III source 0.2 Ga 0.8 An As upper barrier layer;
s209, growing 1500nm of P-type Al by using As As group V source, al and Ga As group III source and Be As doping source 0.4 Ga 0.6 An As upper limiting layer with a doping concentration of 1 × 10 18 /cm 3 ；
S210, growing a 200nm P-type GaAs contact layer by using As As a group V source, ga As a group III source and Be As a doping source and having a doping concentration of 2 x 10 19 /cm 3 。
Although the invention has been described in detail hereinabove with respect to a general description and specific embodiments thereof, it will be apparent to those skilled in the art that modifications or improvements may be made thereto based on the invention. Accordingly, such modifications and improvements are intended to be within the scope of the invention as claimed.
Claims (10)
1. A semiconductor quantum well structure for inhibiting the lateral diffusion of carriers is characterized by comprising a lower barrier layer, a quantum well layer, a nucleation structure and an upper barrier layer which are sequentially stacked; the appearance of the nucleation structure is in an island shape and/or a groove shape, and the nucleation structure does not completely cover the quantum well layer; the nucleation structure has a bandgap width that is not equal to the bandgap width of the upper barrier layer.
2. The semiconductor quantum well structure of claim 1, wherein the quantum well layer has a smaller bandgap width than the lower barrier layer, the nucleation structure, and the upper barrier layer.
3. The semiconductor quantum well structure of claim 2, wherein the thickness of the lower barrier layer is 5nm to 1000nm; the thickness of the quantum well layer is 2 nm-30 nm; the height of the nucleation structure is 0.1 nm-30 nm; the thickness of the upper barrier layer is 5 nm-1000 nm.
4. The semiconductor quantum well structure for suppressing lateral diffusion of carriers of any of claims 1 to 3, wherein the semiconductor quantum well structure is a group III-V semiconductor multiple quantum well structure; preferably, in the semiconductor quantum well structure, the lower barrier layer, the quantum well layer, the nucleation structure and the upper barrier layer are repeated as a whole to form a multi-period quantum well structure, and the repeated stacking sequence is the lower barrier layer, the quantum well layer, the nucleation structure and the upper barrier layer.
5. The semiconductor quantum well structure for inhibiting lateral diffusion of carriers of claim 1, wherein the lower barrier layer, the quantum well layer, the nucleation structure and the upper barrier layer are all made of III-V semiconductor materials; the III-V semiconductor material comprises one or more of GaP series, gaAs series, inP series and GaSb series materials, preferably GaAs series and InP series materials.
6. A semiconductor quantum well structure with lateral diffusion of carriers suppressed according to any of claims 1-5, wherein the lateral diffusion of carriers in the semiconductor quantum well structure in the quantum well plane is suppressed.
7. A method of fabricating a semiconductor quantum well structure with lateral diffusion of charge carriers suppressed according to any of claims 1 to 6, characterized in that the growth is carried out by metal organic chemical vapor deposition and/or molecular beam epitaxy, comprising the steps of:
a) Growing a lower barrier layer;
b) Growing a quantum well layer;
c) Growing a nucleation structure;
d) And growing an upper barrier layer.
8. The method for manufacturing a semiconductor quantum well structure for suppressing lateral diffusion of carriers according to claim 7, wherein the semiconductor quantum well structure is a multiple quantum well structure; preferably, step a), step B), step C) and step D) are repeated as a whole, and the sequence of step a), step B), step C) and step D) is kept unchanged during each repetition, and the repetition frequency is not more than 10 times, preferably 2 times.
9. The method according to claim 7 or 8, wherein the morphology of the nucleation structure grown in step C) is island-shaped and/or trench-shaped; preferably, the nucleation structure is a nucleation island and/or a nucleation groove, and each nucleation island and/or nucleation groove is not connected with each other; the growth height of the nucleation structure is 0.1 nm-30 nm, the band gap width of the nucleation structure is not equal to the band gap width of the quantum well layer, and the band gap width of the nucleation structure is not equal to the band gap width of the upper barrier layer.
10. A semiconductor quantum well device, comprising the semiconductor quantum well structure for inhibiting lateral diffusion of carriers according to any one of claims 1 to 6 or the semiconductor quantum well structure prepared by the method for preparing the semiconductor quantum well structure for inhibiting lateral diffusion of carriers according to any one of claims 7 to 9; the semiconductor quantum well device includes: quantum well laser, quantum well superradiance emitting diode, quantum well optical amplifier, quantum well optical detector.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202211229143.0A CN115663596A (en) | 2022-10-09 | 2022-10-09 | Semiconductor quantum well structure for inhibiting lateral diffusion of current carrier and preparation method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202211229143.0A CN115663596A (en) | 2022-10-09 | 2022-10-09 | Semiconductor quantum well structure for inhibiting lateral diffusion of current carrier and preparation method |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN115663596A true CN115663596A (en) | 2023-01-31 |
Family
ID=84986698
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202211229143.0A Pending CN115663596A (en) | 2022-10-09 | 2022-10-09 | Semiconductor quantum well structure for inhibiting lateral diffusion of current carrier and preparation method |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN115663596A (en) |
-
2022
- 2022-10-09 CN CN202211229143.0A patent/CN115663596A/en active Pending
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP5829598B2 (en) | Optical device | |
| US7101444B2 (en) | Defect-free semiconductor templates for epitaxial growth | |
| EP2509119B1 (en) | Light emitting element and method for manufacturing same | |
| US8410523B2 (en) | Misfit dislocation forming interfacial self-assembly for growth of highly-mismatched III-SB alloys | |
| JP3623713B2 (en) | Nitride semiconductor light emitting device | |
| Shi et al. | 1.55-μm lasers epitaxially grown on silicon | |
| JP2007128925A (en) | Growth of group iii light-emitting device on textured substrate | |
| CN106785919B (en) | InGaN/GaN quantum well laser and manufacturing method thereof | |
| WO2021212597A1 (en) | Quaternary system tensile strain semiconductor laser epitaxial wafer and preparation method therefor | |
| US20070160100A1 (en) | Misfit dislocation forming interfacial self-assembly for growth of highly-mismatched III-Sb alloys | |
| JP2010225870A (en) | Semiconductor element | |
| JP2001093837A (en) | Structure of semiconductor thin film and manufacturing method therefor | |
| CN111564756B (en) | Silicon-based non-phosphorus laser and preparation method thereof | |
| US9401404B2 (en) | Semiconductor device and fabrication method | |
| US5075742A (en) | Semiconductor structure for optoelectronic components with inclusions | |
| CN107611780A (en) | Si doping InAs/GaAs quantum dot lasers and preparation method thereof | |
| CN114024210B (en) | Silicon-based vertical cavity surface emitting laser | |
| CN115663596A (en) | Semiconductor quantum well structure for inhibiting lateral diffusion of current carrier and preparation method | |
| Hu et al. | Electrically-pumped 1.31 μm MQW lasers by direct epitaxy on wafer-bonded InP-on-SOI substrate | |
| CN210040877U (en) | Vertical cavity surface emitting laser with horizontal air column current injection aperture structure | |
| US20070215904A1 (en) | Semiconductor optical device | |
| JP2002076518A (en) | Semiconductor laser, semiconductor device and production method therefor | |
| JP4086465B2 (en) | Quantum dot structure and method for forming the same, and semiconductor device device having the quantum dot structure | |
| JPH1084131A (en) | Semiconductor light emitting element | |
| Bhat et al. | Low pressure OMCVD growth of GaAs on InP for FET and quantum well laser fabrication |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination |