CN115639712B - Pixel structure, array substrate and electronic paper - Google Patents
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- 239000002184 metal Substances 0.000 claims description 46
- 239000010409 thin film Substances 0.000 claims description 22
- 239000010408 film Substances 0.000 claims description 19
- 238000001962 electrophoresis Methods 0.000 claims description 4
- 230000000149 penetrating effect Effects 0.000 claims description 3
- 238000006243 chemical reaction Methods 0.000 claims description 2
- 230000009467 reduction Effects 0.000 abstract description 4
- 238000001652 electrophoretic deposition Methods 0.000 description 12
- 229920001345 ε-poly-D-lysine Polymers 0.000 description 12
- 238000010586 diagram Methods 0.000 description 7
- 230000000694 effects Effects 0.000 description 7
- 238000000034 method Methods 0.000 description 7
- 241001270131 Agaricus moelleri Species 0.000 description 5
- 230000009471 action Effects 0.000 description 4
- 230000009286 beneficial effect Effects 0.000 description 3
- 230000008569 process Effects 0.000 description 3
- 239000003086 colorant Substances 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 238000003475 lamination Methods 0.000 description 1
- 239000003094 microcapsule Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
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Abstract
The application relates to a pixel structure, an array substrate and electronic paper, wherein the pixel structure comprises: the display device comprises a first switch unit, a second switch unit, a step-down switch unit, a first pixel unit and a second pixel unit, wherein the input ends of the first switch unit and the second switch unit are electrically connected with a data line, the control ends of the first switch unit, the second switch unit and the step-down switch unit are electrically connected with a scanning line, the output end of the first switch unit is electrically connected with a pixel electrode of the first pixel unit, the output end of the second switch unit is respectively electrically connected with a pixel electrode of the second pixel unit and the input end of the step-down switch unit, and the output end of the step-down switch unit is electrically connected with a public electrode line. According to the application, the voltage difference between the first pixel unit and the second pixel unit is increased by the voltage reduction of the voltage reduction switch unit, so that the gray level layers of the two pixel units are different, the voltage supplied by the circuit is not required to be excessively low to display the middle gray level, and the capacitance interference of the adjacent pixels is reduced.
Description
Technical Field
The present application relates to the field of display technologies, and in particular, to a pixel structure, an array substrate, and electronic paper.
Background
Electronic Paper (EPD) is a paper-like display whose principle of operation is to rely on the negative charged black electronic ink and the positive charged white electronic ink in microcapsules to generate electrophoresis under the action of voltage, thereby forming black and white colors and having the characteristic of low power consumption.
In the related art, the gray-scale display method of the electronic paper is different from the conventional LCD or LED display; gray scale display of the prior art mainly uses RGB three colors to form gray scales of different stages by different brightness combinations; but the EPD is displayed by black and white electronic ink; the grayscale mode of EPD is mainly formed by the following two ways: one is to rely on continuous positive voltage input, firstly, disperse black and white two kinds of electronic ink; the black electronic ink is all positioned above, the white ink is all positioned below, and then the electric pulse particles reach the required picture by controlling the reverse electrifying time; the other is to record the pulse condition and preset the voltage of different gray-scale stages to make the voltage reach the required voltage directly.
In the related art, when the gray scale is displayed, the EPD needs to use all voltages from negative high voltage to positive high voltage to completely display all the gray scales, the EPD depends on the voltage to drive the electronic ink to move to display the picture, and when the gray scale is displayed, the voltage of the corresponding pixel unit is given to the data line to determine the gray scale, but the metal area of the EPD is larger, the picture is easy to be uneven and the crosstalk of the adjacent pixels is easy to occur when the data line with low voltage is conveyed, that is, the middle gray scale corresponding to the voltage near zero voltage cannot be effectively displayed when the data line is conveyed, and therefore, the complete display of all the gray scales cannot be ensured.
Aiming at the problem that EPDs in the related art cannot effectively display middle gray scales corresponding to the voltage near zero voltage when the data line is used for conveying the voltage, no better technical scheme exists yet.
Disclosure of Invention
The application provides a pixel structure, an array substrate and electronic paper, which at least solve the problem that EPDs in the related art cannot effectively display middle gray scales corresponding to when data lines transmit voltages near zero voltage.
In a first aspect, the present application provides a pixel structure, including a first switch unit, a second switch unit, a buck switch unit, a first pixel unit and a second pixel unit, where input ends of the first switch unit and the second switch unit are electrically connected to a data line extending along a first preset direction, control ends of the first switch unit, the second switch unit and the buck switch unit are electrically connected to a scan line extending along a second preset direction, an output end of the first switch unit is electrically connected to a pixel electrode of the first pixel unit, an output end of the second switch unit is electrically connected to a pixel electrode of the second pixel unit and an input end of the buck switch unit, and an output end of the buck switch unit is electrically connected to a common electrode line extending along the first preset direction, where the first switch unit is used to convey a voltage of the data line to the first pixel unit; the second switch unit is used for transmitting the voltage of the data line to the second pixel unit; the step-down switch unit is used for pulling down the voltage transmitted to the second pixel unit by the second switch unit to a preset value, so that the pixel structure generates preset gray scale through the voltage difference of the preset voltage value formed between the first pixel unit and the second pixel unit.
In some embodiments, when the scan line is turned on and the signal voltage on the data line is a first preset low voltage, the first switch unit transmits the first preset low voltage to the first pixel unit; the step-down switch unit steps down the first preset low voltage which is transmitted to the second pixel unit by the second switch unit to a first set voltage; the first pixel unit is charged based on the first preset low voltage, and a first picture is displayed; the second pixel unit is charged based on the first set voltage and displays a first gray-scale picture; the pixel structure is displayed in a set gray scale; wherein the first preset low voltage comprises one of the following: the first picture is one of a white picture and a black picture.
In some embodiments, when the scan line is turned on and the signal voltage on the data line is a first preset high voltage, the first switch unit transmits the first preset high voltage to the first pixel unit; the step-down switch unit is used for reducing the first preset high voltage which is transmitted to the second pixel unit by the second switch unit to a second set voltage; the first pixel unit is charged based on the first preset high voltage, the second pixel unit is charged based on the second preset voltage, and the first pixel unit and the second pixel unit are displayed in a second picture with the same color; wherein the first preset high voltage includes one of the following: and the second picture is one of a white picture and a black picture.
In some embodiments, the first switch unit, the second switch unit, and the buck switch unit each include a controlled switch including an input port, a control port, and an output port, the input ports of the first switch unit and the second switch unit are each electrically connected to the data line, the control port is electrically connected to the scan line, the output port of the first switch unit is electrically connected to a pixel electrode of the first pixel unit, the output port of the second switch unit is electrically connected to a pixel electrode of the second pixel unit and the input port of the buck switch unit, respectively, the output port of the buck switch unit is also electrically connected to the common electrode line,
the controlled switch is used for controlling the on-off of the input port and the output port according to the signals received by the control port.
In some of these embodiments, the controlled switch comprises a thin film transistor with a source electrode interfacing the input port, a gate electrode interfacing the control port, and a drain electrode interfacing the output port.
In a second aspect, the present application provides an array substrate, including a substrate and the pixel structure according to the first aspect, where the substrate is formed with: the first metal layer forms a scanning line, a control end of the first switch unit, a control end of the second switch unit and a control end of the step-down switch unit; the first insulating layer is arranged on the first metal layer; the second metal layer is arranged on the first insulating layer, and forms the data line, the input end and the output end of the first switch unit, the input end and the output end of the second switch unit and the input end and the output end of the step-down switch unit; and the second insulating layer is arranged on the second metal layer.
In some embodiments, the output terminal of the first switch unit is connected to the pixel electrode of the first pixel unit through a first connection trace, the output terminal of the second switch unit is connected to the pixel electrode of the second pixel unit through a second connection trace, wherein,
the first connection wiring comprises a first metal wiring section formed on the second metal layer and a first PV layer transferring hole which is arranged between the ITO film layer and the first metal wiring section and penetrates through the second insulating layer, and the first PV layer transferring hole is also arranged on a pixel electrode of the first pixel unit;
the second connecting wire comprises a second metal wire section formed on the second metal layer, and a second PV layer transferring hole which is arranged between the ITO film layer and the second metal wire section and penetrates through the second insulating layer, and the second PV layer transferring hole is also arranged on the pixel electrode of the second pixel unit.
In some embodiments, the output end of the buck switch unit is connected with the common electrode line through a third connection wire.
In some embodiments, the third connection trace includes a third metal trace segment formed on the second metal layer, an ITO film trace segment formed on the ITO film layer, and a third PV transition hole disposed between the ITO film trace segment and the third metal trace segment and penetrating the second insulating layer.
In a third aspect, an electronic paper is provided, including an array substrate and a cover plate that are disposed opposite to each other, and an electrophoresis layer disposed between the array substrate and the cover plate, where the array substrate is the array substrate in the second aspect.
Compared with the related art, the embodiment provides a pixel structure, an array substrate and electronic paper, wherein the pixel structure is characterized in that a first switch unit connected with a first pixel unit, a second switch unit connected with a second pixel unit and a step-down switch unit are arranged, and when the voltage is low, the step-down switch unit reduces the charging effect of the second pixel unit in a charging non-full state, and the voltage difference between the first pixel unit and the second pixel unit is increased, so that the gray level layers of the two pixel units are greatly different; meanwhile, the voltage difference between the first pixel unit and the second pixel unit is fixed by adjusting the sizes of the voltage-reducing switch unit and the pixel unit, so that fixed gray level difference is formed, the voltage reduction of the voltage-reducing switch unit is realized, the voltage supplied by a circuit does not need to be excessively low to display middle gray level, the capacitance interference of adjacent pixels is reduced, the picture display effect is improved, the problem that the EPD in the related art cannot effectively display the middle gray level corresponding to the voltage near zero voltage when the data line transmits the voltage is solved, the display of multiple gray levels is completed without affecting the aperture ratio, the display of the full gray level can be completed without using more low voltage, and the beneficial effect of improving the uneven phenomenon at the edge position of the pixel when the single pixel gray level display voltage is zero is achieved.
The details of one or more embodiments of the application are set forth in the accompanying drawings and the description below to provide a more thorough understanding of the other features, objects, and advantages of the application.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the application and together with the description, serve to explain the principles of the application.
In order to more clearly illustrate the embodiments of the application or the technical solutions of the prior art, the drawings which are used in the description of the embodiments or the prior art will be briefly described, and it will be obvious to a person skilled in the art that other drawings can be obtained from these drawings without inventive effort.
FIG. 1 is a logic block diagram of a pixel structure according to an embodiment of the present application;
fig. 2 is a schematic circuit equivalent diagram of a pixel structure according to an embodiment of the present application;
fig. 3 is a schematic cross-sectional view of a buck switch unit on an array substrate according to an embodiment of the present application;
fig. 4 is a schematic diagram of an electronic paper according to an embodiment of the present application.
Reference numerals and signs
100. A first switching unit; 200. a second switching unit; 300. a step-down switching unit; 400. a first pixel unit; 500. a second pixel unit;
31. a first metal layer; 32. a second metal layer; 33. a gate; 34. a source electrode; 35. a drain electrode; 36. a third PV layering hole;
41. an array substrate; 42. a cover plate; 43. an electrophoretic layer;
d1, a data line;
s1, scanning lines;
G. a common electrode line.
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the embodiments of the present application more apparent, the technical solutions of the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application, and it is apparent that the described embodiments are some embodiments of the present application, but not all embodiments of the present application. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.
The technical solutions in the embodiments of the present application will be described below with reference to the accompanying drawings in the embodiments of the present application.
Fig. 1 is a logic block diagram of a pixel structure according to an embodiment of the present application, fig. 2 is a circuit equivalent schematic diagram of a pixel structure according to an embodiment of the present application, and the pixel structure shown in fig. 1 and fig. 2 is applied to electronic paper, and by reducing voltage of a voltage reducing switch unit 300, a voltage supplied by a line does not need to be excessively low to display a middle gray level, and capacitance interference of adjacent pixels is reduced, so that a picture display effect is improved, and a problem that an EPD in the related art cannot effectively display a middle gray level corresponding to a voltage near zero voltage when the data line transmits is solved.
Referring to fig. 1 and 2, the pixel structure provided in the embodiment of the application includes a first switch unit 100, a second switch unit 200, a buck switch unit 300, a first pixel unit 400 and a second pixel unit 500, wherein the input ends of the first switch unit 100 and the second switch unit 200 are electrically connected to a data line D1 extending along a first preset direction, the control ends of the first switch unit 100, the second switch unit 200 and the buck switch unit 300 are electrically connected to a scan line S1 extending along a second preset direction, the output end of the first switch unit 100 is electrically connected to a pixel electrode (corresponding voltage access end) of the first pixel unit 400, the output end of the second switch unit 200 is electrically connected to a pixel electrode of the second pixel unit 500 and an input end of the buck switch unit 300, respectively, the output end of the buck switch unit 300 is electrically connected to a common electrode line G extending along the first preset direction,
the first switching unit 100 is configured to transmit the voltage of the data line D1 to the first pixel unit 400.
In this embodiment, when the pixel structure works, the data line D1 and the scan line S1 are turned on at the same time, the control end of the first switch unit 100 receives the control signal sent by the scan line S1, and the input end and the output end of the first switch unit 100 are connected, so as to send the voltage on the data line D1 to the first pixel unit 400, where the voltage on the data line D1 corresponds to the gray-scale voltage that makes the pixel structure form the gray scale, and the voltage on the data line D1 is set according to the display requirement; in this embodiment, the gray scale voltage is set to be all voltages between the negative high voltage value and the positive high voltage value, and the corresponding pixel unit will display a pure white picture by negative high voltage display and a pure black picture by positive high voltage display.
The second switching unit 200 is used for transmitting the voltage of the data line D1 to the second pixel unit 500.
The step-down switch unit 300 is configured to pull down the voltage supplied from the second switch unit 200 to the second pixel unit 500 to a preset value, so that the pixel structure generates a preset gray level by a voltage difference of the preset voltage value formed between the first pixel unit 400 and the second pixel unit 500.
In this embodiment, when the data line D1 and the scan line S1 are simultaneously turned on, the control end of the second switch unit 200 receives the control signal transmitted by the scan line S1, the input end of the second switch unit 200 is connected to the output end, and the voltage on the data line D2 is further output along the output end, and the voltage is identical to the gray scale voltage output by the output end of the first switch unit 100, and simultaneously, the control end of the buck switch unit 300 also synchronously receives the control signal transmitted by the scan line S1, so that the input end of the buck switch unit 300 is connected to the output end, and the input end of the buck switch unit 300 is electrically connected to the pixel electrode of the second pixel unit 500 and the output end of the second switch unit 200, and the output end of the buck switch unit 300 is electrically connected to the common electrode line G, the common electrode line G is a low voltage circuit, so that the charging current of the second pixel unit 500 is conducted to the common electrode line G by the buck switch unit 300, so as to divide the voltage of the second pixel unit 500 and the voltage of the first pixel unit 400, thereby reducing the gray-scale voltage on the data line D1 transmitted by the second switch unit 200 to a preset value by the buck switch unit 300, so as to increase the voltage difference between the first pixel unit 400 and the second pixel unit 500, and at the same time, the preset value is a voltage lower than the gray-scale voltage received by the pixel electrode of the first pixel unit 400, and the voltage difference between the preset value and the gray-scale voltage received by the pixel electrode of the first pixel unit 400 is a fixed value, for example: when the gray scale voltage received by the pixel electrode of the first pixel unit 400 is x v and the voltage-reducing switch unit 300 reduces the voltage x v output by the second switch unit 200 to y v, x-y=a (a is a fixed value), the gray scale levels of the two pixel units are greatly different due to the voltage difference of the preset voltage value formed between the first pixel unit 400 and the second pixel unit 500.
In this embodiment, when the data line D1 and the scan line S1 are turned on, the first switch unit 100 operates to supply a voltage to the pixel electrode of the first pixel unit 400, and the output voltage of the first switch unit 100 does not affect the voltage of the first pixel unit 400 and can maintain the initial voltage; the second switching unit 200 performs a synchronous switching operation and supplies a voltage to the pixel electrode of the second pixel unit 500, but the output voltage of the second switching unit 200 is lower than the output voltage of the first switching unit 100 because the step-down switching unit 300 and the second switching unit 200 are connected in series to form a partial voltage division; the degree of the electronic ink when driven to move is different; the difference can achieve different difference ratios by allocating the channel size of the switching tube inside the buck switching unit 300 and the difference of the pixel electrodes of the first pixel unit 400 and the second pixel unit 500; in this embodiment, when the pixel structure displays a picture; under the condition of high black and white voltage, the first pixel unit 400 and the second pixel unit 500 are fully charged, when the two pixel units display the same color picture (for example, pure black or pure white) and the gray level is displayed, the gray level or the low gray state can form a gray level picture by charging the second pixel unit 500 to the unsaturated state, and the first pixel unit 400 maintains the pure white/black picture; forming a high or low gray level by a color combination of the first pixel unit 400 and the second pixel unit 500; when the middle-layer multi-level gray scale is displayed; when the voltage of the data line D1 is not 0 through the corresponding switch and pixel size adjustment, the second pixel unit 500 is not charged enough to display a picture with a voltage of 0 and a corresponding lower voltage.
It should be noted that, when the voltage difference between the preset voltage values formed between the first pixel unit 400 and the second pixel unit 500 is required to be displayed in the middle gray scale, compared with the existing middle gray scale display which can be realized only by adopting the low voltage near the zero voltage, the voltage difference is realized without inputting the excessively low voltage into the data line D1, for example: when the complete gray level is set to 0-256 levels and the middle gray level of 129 levels is required (the low voltage of the corresponding data line D1 is set to m v), the existing pixel structure is adopted, the voltage of the data line D1 is set to m, at this time, the pixel edge position is uneven, the adjacent pixel crosstalk is high, and the display effect is poor, in this embodiment, the voltage of the data line D1 is set to m+i, where i is the value reduced by the voltage reducing switch unit 300, so that the complete gray level display can be achieved without using more low voltage, the uneven phenomenon of the pixel edge position when the single pixel gray level display voltage is zero can be improved, and the interference of the peripheral pixels to the corresponding pixels when the low voltage is reduced.
In the above pixel structure, by providing the first switching unit 100 connected to the first pixel unit 400 and the second switching unit 200 and the step-down switching unit 300 connected to the second pixel unit 500, and by reducing the voltage of the step-down switching unit 300 at the time of low voltage, the charging effect of the second pixel unit 500 in the state of not full charge is reduced, and the voltage difference between the first pixel unit 400 and the second pixel unit 500 is increased, so that the gray level levels of the two pixel units are greatly different; meanwhile, the voltage difference between the first pixel unit 400 and the second pixel unit 500 is fixed by adjusting the sizes of the step-down switch unit 300 and the pixel unit, so that a fixed gray level difference is formed, the step-down of the step-down switch unit 300 is realized, the voltage supplied by a circuit does not need to be excessively low to display middle gray levels, the capacitance interference of adjacent pixels is reduced, the picture display effect is improved, the problem that the EPD in the related art cannot effectively display the middle gray levels corresponding to the situation that the data line transmits the voltage near zero voltage is solved, the display of multiple gray levels is completed without affecting the aperture ratio, the display of the full gray levels can be completed without using more low voltages, and the beneficial effect of improving the uneven phenomenon at the edge position of the pixel when the single pixel gray level display voltage is zero is achieved.
In some embodiments, when the scan line S1 is turned on and the signal voltage on the data line D1 is the first preset low voltage, the first switch unit 100 sends the first preset low voltage to the first pixel unit 400; the step-down switching unit 300 steps down the first preset low voltage supplied from the second switching unit 200 to the second pixel unit 500 to a first set voltage (a voltage having a fixed voltage difference from the first preset low voltage); the first pixel unit 400 performs charging based on a first preset low voltage and displays a first picture; the second pixel unit 500 charges based on the first set voltage and displays a first gray-scale image; the pixel structure is displayed in a set gray scale; the first preset low voltage comprises one of the following components: the first picture is one of a white picture and a black picture.
In this embodiment, when the scan line S1 is turned on and the signal voltage on the data line D1 is the first preset low voltage, the gray-scale or low gray state can be formed by charging the second pixel unit 500 to the unsaturated state to form a gray-scale image, and the first pixel unit 400 maintains a pure white/black image; the high or low gray scale is formed by the color combination of the first pixel unit 400 and the second pixel unit 500.
In some embodiments, when the scan line S1 is turned on and the signal voltage on the data line D1 is the first preset high voltage, the first switch unit 100 sends the first preset high voltage to the first pixel unit 400; the step-down switching unit 300 steps down the first preset high voltage supplied from the second switching unit 200 to the second pixel unit 500 to a second set voltage (a voltage having a fixed voltage difference from the first preset high voltage); the first pixel unit 400 is charged based on a first preset high voltage, the second pixel unit 500 is charged based on a second preset voltage, and the first pixel unit 400 and the second pixel unit 500 are displayed in a second picture with the same color; wherein the first preset high voltage comprises one of the following: the second picture is one of a white picture and a black picture.
In the present embodiment, the scan line S1 is turned on, and the signal voltage on the data line D1 is the first preset high voltage corresponding to the black-white high voltage condition, and the first pixel unit 400 and the second pixel unit 500 are fully charged, and the two pixel units display the same color picture (e.g. pure black or pure white).
In some embodiments, referring to fig. 2, each of the first switching unit 100, the second switching unit 200, and the buck switching unit 300 includes a controlled switch (referring to T1, T2, and T3 in fig. 2, respectively), the controlled switch includes an input port, a control port, and an output port, the input ports (drains of T1 and T2, respectively) of the first switching unit 100 and the second switching unit 200 are each electrically connected to the data line D1, the control port (gates of T1, T2, and T3, respectively) is electrically connected to the scan line S1, the output port (source of T1, respectively) of the first switching unit 100 is electrically connected to the pixel electrode of the first pixel unit 400, the output port (source of T2, respectively) of the second switching unit 200 is electrically connected to the pixel electrode of the second pixel unit 500 and the input port (drain of T3, source of T3, respectively) of the buck switching unit 300 is also electrically connected to the common electrode line G,
and the controlled switch is used for controlling the on-off of the input port and the output port of the corresponding controlled switch according to the signal received by the control port.
In this embodiment, when the pixel structure works, the data line D1 and the scan line S1 are turned on at the same time, and the control port of the corresponding controlled switch receives the control signal sent by the scan line S1, and the input end and the output end of the corresponding controlled switch are connected.
In some of these embodiments, the controlled switch comprises a thin film transistor, a source of the thin film transistor interfacing with an input port, a gate of the thin film transistor interfacing with a control port, and a drain of the thin film transistor interfacing with an output port.
The embodiment of the application provides an array substrate, which comprises a substrate and a pixel structure in the embodiment, wherein the substrate is provided with:
a first metal layer forming a scan line, a control terminal of the first switching unit (corresponding to a gate electrode of the thin film transistor), a control terminal of the second switching unit (corresponding to a gate electrode of the thin film transistor), and a control terminal of the step-down switching unit (corresponding to a gate electrode of the thin film transistor);
the first insulating layer is arranged on the first metal layer;
the second metal layer is arranged on the first insulating layer, and forms a data line, an input end (corresponding to a drain electrode of the thin film transistor) and an output end (corresponding to a source electrode of the thin film transistor) of the first switch unit, an input end (corresponding to a drain electrode of the thin film transistor) and an output end (corresponding to a source electrode of the thin film transistor) of the second switch unit, and an input end (corresponding to a drain electrode of the thin film transistor) and an output end (corresponding to a source electrode of the thin film transistor) of the step-down switch unit;
the second insulating layer is arranged on the second metal layer;
an ITO film layer (transparent conductive film layer) respectively forming a pixel electrode of the first pixel unit, a pixel electrode of the second pixel unit, and a common electrode line.
In some embodiments, the output end of the first switch unit is connected with the pixel electrode of the first pixel unit through a first connection wire, the output end of the second switch unit is connected with the pixel electrode of the second pixel unit through a second connection wire, wherein the first connection wire comprises a first metal wire segment formed on the second metal layer, and a first PV transfer layer hole which is arranged between the ITO film layer and the first metal wire segment and penetrates through the second insulation layer, and the first PV transfer layer hole is also arranged on the pixel electrode of the first pixel unit; the second connecting wire comprises a second metal wire section formed on the second metal layer, and a second PV layer transferring hole which is arranged between the ITO film layer and the second metal wire section and penetrates through the second insulating layer, and the second PV layer transferring hole is also arranged on the pixel electrode of the second pixel unit.
In some embodiments, the output terminal of the buck switch unit is connected to the common electrode line through a third connection trace.
In some embodiments, the third connection trace includes a third metal trace segment formed on the second metal layer, an ITO film trace segment formed on the ITO film layer, and a third PV conversion layer hole disposed between the ITO film trace segment and the third metal trace segment and penetrating the second insulating layer.
In this embodiment, the drain electrode of the thin film transistor T3 corresponding to the buck switch unit and the common electrode line G may be electrically connected to each other through the lamination holes; fig. 3 is a schematic layer diagram of a cross-sectional view of a buck switch unit on an array substrate according to an embodiment of the present application, as shown in fig. 3, a gate 33 of a thin film transistor T3 is disposed on a first metal layer 31, a source 34 and a drain 35 of the thin film transistor T3 are disposed on a second metal layer 32, a data line D1 is further disposed on the second metal layer 32, and a third PV layer transfer hole 36 is formed on the second metal layer 32, so that the drain 35 of the thin film transistor T3 is electrically connected to a common electrode line G through the third PV layer transfer hole 36 and an ITO film line segment.
Fig. 4 is a schematic diagram of an electronic paper according to an embodiment of the present application, and referring to fig. 4, an electronic paper according to an embodiment of the present application includes an array substrate 41 and a cover plate 42 that are disposed opposite to each other, and an electrophoresis layer 43 disposed between the array substrate 41 and the cover plate 42, where the array substrate 41 is an array substrate in the above embodiment.
According to the electronic paper, the array substrate with the pixel structure in the embodiment is arranged, so that the electronic paper can realize that the voltage difference between the first pixel unit and the second pixel unit is fixed through adjusting the sizes of the voltage-reducing switch unit and the pixel unit, a fixed gray level difference is formed, the voltage reduction of the voltage-reducing switch unit is realized, the voltage supplied by a circuit does not need to be excessively low to display middle gray level, the capacitance interference of adjacent pixels is reduced, the picture display effect is improved, the problem that the EPD in the related art cannot effectively display the middle gray level corresponding to the voltage near zero voltage when the data line transmits the voltage is solved, the display of multiple gray levels is completed under the condition that the aperture ratio is not influenced, the display of the complete gray level can be completed without using more low voltage, and the beneficial effects of improving the uneven phenomenon at the pixel edge position when the single pixel gray level display voltage is zero are achieved.
It should be noted that in this document, relational terms such as "first" and "second" and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include others that are expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
The foregoing is only a specific embodiment of the application to enable those skilled in the art to understand or practice the application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the application. Thus, the present application is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (9)
1. The pixel structure is characterized by comprising a first switch unit, a second switch unit, a voltage-reducing switch unit, a first pixel unit and a second pixel unit, wherein the input ends of the first switch unit and the second switch unit are electrically connected with a data line extending along a first preset direction, the control ends of the first switch unit, the second switch unit and the voltage-reducing switch unit are electrically connected with a scanning line extending along a second preset direction, the output end of the first switch unit is electrically connected with a pixel electrode of the first pixel unit, the output end of the second switch unit is respectively electrically connected with a pixel electrode of the second pixel unit and the input end of the voltage-reducing switch unit, the output end of the voltage-reducing switch unit is electrically connected with a public electrode line extending along the first preset direction,
the first switch unit is used for transmitting the voltage of the data line to the first pixel unit;
the second switch unit is used for transmitting the voltage of the data line to the second pixel unit;
the step-down switch unit is used for pulling down the voltage transmitted to the second pixel unit by the second switch unit to a preset value, so that the pixel structure generates preset gray scale through the voltage difference of the preset voltage value formed between the first pixel unit and the second pixel unit;
wherein the first switch unit, the second switch unit and the step-down switch unit each comprise a controlled switch, the controlled switch comprises an input port, a control port and an output port, the input ports corresponding to the first switch unit and the second switch unit are electrically connected with the data line, the control port is electrically connected with the scanning line, the output end corresponding to the first switch unit is electrically connected with the pixel electrode of the first pixel unit, the output port corresponding to the second switch unit is respectively electrically connected with the pixel electrode of the second pixel unit and the input port corresponding to the step-down switch unit, the output port corresponding to the step-down switch unit is also electrically connected with the common electrode line, wherein,
the controlled switch is used for controlling the on-off of the input port and the output port according to the signals received by the control port;
the data line and the scanning line are simultaneously opened, so that the control ends of the controlled switches of the first switch unit, the second switch unit and the step-down switch unit simultaneously receive control signals, and the input port is communicated with the output port.
2. The pixel structure of claim 1, wherein when the scan line is turned on and the signal voltage on the data line is a first predetermined low voltage,
the first switch unit transmits the first preset low voltage to the first pixel unit; the step-down switch unit steps down the first preset low voltage which is transmitted to the second pixel unit by the second switch unit to a first set voltage; the first pixel unit is charged based on the first preset low voltage, and a first picture is displayed; the second pixel unit is charged based on the first set voltage and displays a first gray-scale picture; the pixel structure is displayed in a set gray scale; wherein,,
the first preset low voltage comprises one of the following: the first picture is one of a white picture and a black picture.
3. The pixel structure of claim 1, wherein when the scan line is turned on and the signal voltage on the data line is a first predetermined high voltage,
the first switch unit transmits the first preset high voltage to the first pixel unit; the step-down switch unit is used for reducing the first preset high voltage which is transmitted to the second pixel unit by the second switch unit to a second set voltage; the first pixel unit is charged based on the first preset high voltage, the second pixel unit is charged based on the second preset voltage, and the first pixel unit and the second pixel unit are displayed in a second picture with the same color; wherein,,
the first preset high voltage comprises one of the following: and the second picture is one of a white picture and a black picture.
4. The pixel structure of claim 1, wherein the controlled switch comprises a thin film transistor, a source of the thin film transistor interfacing the input port, a gate of the thin film transistor interfacing the control port, and a drain of the thin film transistor interfacing the output port.
5. An array substrate, comprising a substrate and the pixel structure of claim 4, wherein the substrate has:
the first metal layer forms a scanning line, a control end of the first switch unit, a control end of the second switch unit and a control end of the step-down switch unit;
the first insulating layer is arranged on the first metal layer;
the second metal layer is arranged on the first insulating layer, and forms the data line, the input end and the output end of the first switch unit, the input end and the output end of the second switch unit and the input end and the output end of the step-down switch unit;
the second insulating layer is arranged on the second metal layer;
and the ITO film layer is used for respectively forming the pixel electrode of the first pixel unit, the pixel electrode of the second pixel unit and the common electrode line.
6. The array substrate of claim 5, wherein the output terminal of the first switching unit is connected to the pixel electrode of the first pixel unit through a first connection trace, the output terminal of the second switching unit is connected to the pixel electrode of the second pixel unit through a second connection trace, wherein,
the first connection wiring comprises a first metal wiring section formed on the second metal layer and a first PV layer transferring hole which is arranged between the ITO film layer and the first metal wiring section and penetrates through the second insulating layer, and the first PV layer transferring hole is also arranged on a pixel electrode of the first pixel unit;
the second connecting wire comprises a second metal wire section formed on the second metal layer, and a second PV layer transferring hole which is arranged between the ITO film layer and the second metal wire section and penetrates through the second insulating layer, and the second PV layer transferring hole is also arranged on the pixel electrode of the second pixel unit.
7. The substrate according to claim 6, wherein an output terminal of the step-down switching unit is connected to the common electrode line through a third connection trace.
8. The substrate of claim 7, wherein the third connection trace comprises a third metal trace segment formed on the second metal layer, an ITO film trace segment formed on the ITO film layer, and a third PV conversion layer hole disposed between the ITO film trace segment and the third metal trace segment and penetrating the second insulating layer.
9. An electronic paper, comprising an array substrate and a cover plate which are oppositely arranged, and an electrophoresis layer positioned between the array substrate and the cover plate, wherein the array substrate is the array substrate of any one of claims 5 to 8.
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