CN115617321A - Automatic code generation method and device - Google Patents

Abstract

The invention discloses a code automatic generation method and a code automatic generation device. Wherein, the device includes: embedding an initialization code of at least one chip in a software program of the upper computer; acquiring a code generation instruction of a user aiming at a target IP module through a software interface in an upper computer; and generating a code of the target IP module according to the code generation instruction and the initialization code of the at least one chip. According to the invention, at least one chip initialization code is embedded in the software program of the upper computer, so that developers can automatically generate the initialization driving code of the target IP module through simple configuration and operation, and the problems of difficult entry and development of embedded software are solved.

Description

Automatic code generation method and device

Technical Field

The embodiment of the invention relates to the technical field of computers, in particular to a code automatic generation method and a code automatic generation device.

Background

A Micro Control Unit (MCU), also called a Single Chip Microcomputer (Single Chip Microcomputer) or a Single Chip Microcomputer, properly reduces the frequency and specification of a Central Processing Unit (CPU), and integrates peripheral interfaces such as a memory (memory), a Timer (Timer), a USB, an a/D converter, a UART, a PLC, a DMA, and the like, even an LCD driving circuit, on a Single Chip to form a Chip-level computer, which performs different combination control for different application occasions. Such as mobile phones, PC peripherals, remote controls, even automotive electronics, industrial stepper motors, robotic arm controls, etc., can see the silhouette of the MCU.

Digital Signal Processing (DSP) is an emerging discipline that involves many disciplines and is widely used in many fields. With the rapid development of computer and information technology since the 60 s of the 20 th century, digital signal processing technology has come to work and has been rapidly developed. Digital signal processing has been used extensively in communications and the like over the last two decades. The digital signal processing is to use a computer or a special processing device to acquire, transform, filter, estimate, enhance, compress, identify and the like the signals in a digital form so as to obtain a signal form meeting the needs of people.

The embedded software and the embedded system are inseparable, and the embedded system generally consists of 4 parts of an embedded microprocessor, peripheral hardware equipment, an embedded operating system and an application program of a user and is used for realizing the functions of controlling, monitoring or managing other equipment and the like. The embedded software is designed based on the embedded system, is one kind of computer software, is composed of programs and documents, and is an important component of the embedded system

Whether MCU programming or DSP programming is adopted, registers of related IPs need to be configured or standard libraries or HAL libraries of the related IPs need to be called, and for a user, a certain period of familiarity process is needed, so that the period of project development and the difficulty of the project development are greatly increased.

Currently, many researches are made on embedded software and related tool development, such as "a method, device, electronic device and storage medium for automatically generating codes" with patent No. CN202210297521.2, "a simple and efficient code generation method" with patent No. CN202210294286.3, "a method and device for generating software engineering codes" with patent No. CN202011560788.3, "a method and device for generating codes" with patent No. N201811294064.1, "a method and device for generating target codes" with patent No. CN 2022103977342.6, "a method and device for automatically generating codes" with patent No. CN202210047291.4, and so on. For example, the patents and papers relate to various automatic generation of software codes, but the patents and papers do not have good universality, poor portability and complex use modes, such as papers written in Lezhi Cheng and the like, "ST language code generation and verification based on a soft PLC model", papers written in high-grade issues and the like, "Verilog HDL requirement consistency verification tool based on STM", and the like.

Disclosure of Invention

The invention provides a code automatic generation method and a device, which can automatically generate the code of a target IP module by simply configuring and operating a developer by presetting the IP code of a circuit in a program, thereby solving the problems of difficult entry and development of embedded software.

In a first aspect, an embodiment of the present invention provides an automatic code generation method, including:

embedding an initialization code of at least one chip in a software program of an upper computer;

acquiring a code generation instruction of a user aiming at a target IP module through a software interface in an upper computer;

and generating a code of the target IP module according to the code generation instruction and the initialization code of the at least one chip.

Optionally, the obtaining, through a software interface in the upper computer, a code generation instruction of the user for the target IP module includes:

acquiring a target IP module corresponding to a target chip selected by a user through a software interface in an upper computer;

and acquiring the configuration operation of a target IP module by a user, and triggering a code generation instruction of the code target IP module of the software interface by the user.

Optionally, the operation of configuring the target IP module by the user includes:

and selecting a corresponding clock configuration requirement and a corresponding software configuration requirement for the target IP module.

Optionally, the software interface is provided with a menu bar for selecting different chips and different IP modules.

In a second aspect, an embodiment of the present invention further provides an automatic code generation apparatus, including:

the initialization module is used for embedding initialization codes of at least one chip in a software program of the upper computer;

the instruction acquisition module is used for acquiring a code generation instruction of a user aiming at the target IP module through a software interface in the upper computer;

and the code generation module is used for generating a code of the target IP module according to the code generation instruction and the initialization code of the at least one chip.

The invention has the beneficial effects that:

according to the code automatic generation method, the initialization code of at least one chip is embedded into the software program of the upper computer, the code generation instruction of a user aiming at the target IP module is obtained through the software interface in the upper computer, and the code of the target IP module is generated according to the code generation instruction and the initialization code of the at least one chip. According to the invention, by embedding the initialization code of at least one chip in the software program of the upper computer, developers can automatically generate the code of the target IP module through simple configuration and operation, and the problems of difficult entry and development of the embedded software are solved; meanwhile, the invention can integrate a plurality of different chips, is convenient to use, has clear code annotation, is convenient to use and maintain, and can greatly save the time of software development.

Drawings

Fig. 1 is a flowchart of an automatic code generation method according to an embodiment of the present invention;

FIG. 2 is a schematic diagram of a software interface of a software program according to an embodiment of the present invention;

fig. 3 is a code logic flow chart of upper computer software.

Detailed Description

The present invention will be described in further detail with reference to the accompanying drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting of the invention. It should be further noted that, for the convenience of description, only some of the structures related to the present invention are shown in the drawings, not all of the structures.

Examples

The invention designs a special circuit code generator which is convenient for users to carry out different application settings by presetting the IP code of a circuit in a program and leaving corresponding interface buttons by utilizing an embedded mode so as to meet different requirements.

Referring to fig. 1, fig. 1 is a flowchart of an automatic code generation method provided by an embodiment of the present invention, which specifically includes the following steps:

s1, embedding an initialization code of at least one chip in a software program of an upper computer.

And S2, acquiring a code generation instruction of a user aiming at the target IP module through a software interface in the upper computer.

And S3, generating a code of the target IP module according to the code generation instruction and the initialization code of the at least one chip.

Referring further to fig. 2, fig. 2 is a schematic diagram of a software interface of a software program according to an embodiment of the present invention.

The main interface of the upper computer is basic information of the use environment, power supply voltage, developers and the like of the circuit, and different chips can be selected through a menu bar, so that the whole software can be switched into the upper computer software configuration environment of a special chip. After entering different configuration modules, the whole interface is divided into 2 parts, one part displays the structure of the module, and the other part displays various software requirement configurations of the circuit, and the generation of the code is completed through a 'code generation' button.

Because the chip has more modules and complex configuration, different menu bars are arranged on a software interface, different IP modules are selected through the menu bars, and different software configuration requirements are set after the IP modules are accessed. After the codes are generated, the upper computer software can complete basic software configuration, an interface is reserved, a user can write own codes conveniently, and the target functions are achieved.

Further, the upper computer interface in this embodiment may be a customized name for a certain chip, or may be a software name integrating multiple chips. Under the condition of integrating a plurality of chips, selecting a corresponding chip, wherein a main interface of a menu bar mainly displays an architecture diagram of the chip, and the architecture diagram comprises a kernel, a bus, a clock tree and peripheral equipment hung on the corresponding bus; the rest is used for switching to different peripherals for configuring different peripheral programs. When the 'generate code' button is clicked, a new control is popped up to display the configured code.

With further reference to fig. 3, fig. 3 is a code logic flow chart of the upper computer software, which specifically includes the following contents:

(1) The chip code is automatically generated by the upper computer by embedding the chip initialization code in the software program of the upper computer;

(2) The software can be oriented to a certain special chip by selecting the corresponding chip;

(3) Selecting different clock frequencies or internal and external clocks according to requirements;

(4) And selecting different initialization software requirements according to actual requirements, and generating corresponding initialization codes.

The automatic code generation method provided by the invention has the advantages that the IP codes of the circuit are preset in the program, the corresponding interface buttons are reserved, different application settings are convenient for a user to carry out, the automatic code generation method can effectively help the developer to complete the configuration of the basic codes of the chip, the developer only needs to add the logic and the state machine required by the system software on the basis of the codes generated by the generator, and the automatic code generation method is an extremely effective and convenient embedded auxiliary development tool.

An embodiment of the present invention further provides an automatic code generation apparatus, including:

the initialization module is used for embedding initialization codes of at least one chip in a software program of the upper computer;

the instruction acquisition module is used for acquiring a code generation instruction of a user aiming at the target IP module through a software interface in the upper computer;

and the code generation module is used for generating a code of the target IP module according to the code generation instruction and the initialization code of the at least one chip.

The instruction acquisition module is specifically used for: acquiring a target IP module corresponding to a target chip selected by a user through a software interface in an upper computer;

and acquiring the configuration operation of a user on the target IP module, and generating the code of the target IP module by triggering the code of the software interface by the user.

The configuration operation of the user on the target IP module comprises the following steps:

and selecting a corresponding clock configuration requirement and a corresponding software configuration requirement for the target IP module.

The software interface is provided with a menu bar for selecting different chips and different IP modules.

The automatic code generation device provided by the embodiment of the invention can execute the automatic code generation method provided by any embodiment of the invention, has corresponding functional modules and beneficial effects of the execution method, and is not repeated.

It is to be noted that the foregoing description is only exemplary of the invention and that the principles of the technology may be employed. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention.

Therefore, although the present invention has been described in greater detail by the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the spirit of the present invention, and the scope of the present invention is determined by the scope of the appended claims.

Claims (5)

1. An automatic code generation method, comprising:

embedding an initialization code of at least one chip in a software program of an upper computer;

acquiring a code generation instruction of a user for a target IP module through a software interface in an upper computer;

and generating a code of the target IP module according to the code generation instruction and the initialization code of the at least one chip.

2. The method of claim 1, wherein obtaining a code generation instruction of a user for the target IP module through a software interface in the upper computer comprises:

acquiring a target IP module corresponding to a target chip selected by a user through a software interface in an upper computer;

and acquiring the configuration operation of a user on the target IP module, and generating a code generation instruction of the target IP module by triggering the code of the software interface by the user.

3. The method of claim 2, wherein the user operation of configuring the target IP module comprises:

and selecting a corresponding clock configuration requirement and a corresponding software configuration requirement for the target IP module.

4. The method of claim 1, wherein the software interface is provided with a menu bar for selecting different chips and selecting different IP modules.

5. An automatic code generation apparatus, comprising:

the initialization module is used for embedding initialization codes of at least one chip in a software program of the upper computer;

the instruction acquisition module is used for acquiring a code generation instruction of a user aiming at the target IP module through a software interface in the upper computer;

and the code generation module is used for generating a code of the target IP module according to the code generation instruction and the initialization code of the at least one chip.

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