CN115579363A

CN115579363A - Display substrate, detection method thereof and display device

Info

Publication number: CN115579363A
Application number: CN202211288544.3A
Authority: CN
Inventors: 李诗琪; 张静; 王志强; 何海舟; 石明; 李明星; 王家秋; 董旺; 胡国仁; 李旭伟
Original assignee: BOE Technology Group Co Ltd; Mianyang BOE Optoelectronics Technology Co Ltd
Current assignee: BOE Technology Group Co Ltd; Mianyang BOE Optoelectronics Technology Co Ltd
Priority date: 2022-10-20
Filing date: 2022-10-20
Publication date: 2023-01-06

Abstract

The embodiment of the disclosure provides a display substrate, a detection method thereof and a display device. The display substrate comprises a display area, a plurality of pixel circuits and a test module, wherein the display area comprises a first sub-display area and a second sub-display area, the first sub-display area is provided with a plurality of luminous pixels, first electrodes of the luminous pixels are electrically connected with the pixel circuits outside the first sub-display area through transparent signal wiring, the test module comprises a first test unit, a second test unit and a third test unit, the first test unit and the second test unit are respectively coupled with two ends of the first transparent signal wiring, the third test unit is coupled with the second transparent signal wiring, the first test unit is used for providing test signals for the first transparent signal wiring, the second test unit is used for outputting feedback signals of the first transparent signal wiring, and the third test unit is used for outputting feedback signals of the second transparent signal wiring. The technical scheme of the disclosure can detect the abnormal condition of the transparent signal wiring of the display substrate and improve the product quality.

Description

Display substrate, detection method thereof and display device

Technical Field

The disclosure relates to the technical field of display, and in particular to a display substrate, a detection method thereof and a display device.

Background

Organic Light-Emitting diodes (OLEDs) have the advantages of simple structure, high contrast, fast response speed, low power consumption, etc., and have been widely used in the display fields of mobile phones, flat panels, televisions, etc. With the development of consumer electronics products such as display panels and cameras of display devices, full-screen displays with a high screen ratio are becoming more popular.

In the OLED under-screen image pickup technology, an anode of an under-screen image pickup area is connected with a pixel driving circuit through a transparent signal wire to realize light emission control. But the transparent signal routing is inconvenient to detect, and the problem of mass yield loss is easily caused.

Disclosure of Invention

The embodiment of the disclosure provides a display substrate, a detection method thereof and a display device, so as to solve or alleviate one or more technical problems in the prior art.

As a first aspect of the embodiments of the present disclosure, an embodiment of the present disclosure provides a display substrate, including a display area, a plurality of pixel circuits, and a test module, where the display area includes a first sub-display area and a second sub-display area, the second sub-display area at least partially surrounds the first sub-display area, the first sub-display area is provided with a plurality of light-emitting pixels, and each light-emitting pixel includes a first electrode, a light-emitting layer, and a second electrode that are sequentially stacked; the plurality of pixel circuits are positioned in the area outside the first sub-display area, the first electrodes of the light-emitting pixels are electrically connected with the pixel circuits through transparent signal wires, and the transparent signal wires at least comprise first transparent signal wires and second transparent signal wires; the test module comprises a first test unit, a second test unit and a third test unit, wherein the first test unit and the second test unit are respectively coupled with two ends of the first transparent signal wiring, the third test unit is coupled with the second transparent signal wiring, the first test unit is configured to provide a test signal for the first transparent signal wiring under the control of a signal of the first signal wiring, the second test unit is configured to output a feedback signal of the first transparent signal wiring under the control of a signal of the second signal wiring, and the third test unit is configured to output a feedback signal of the second transparent signal wiring under the control of a signal of the third signal wiring.

In some of the possible implementations of the present invention,

the first test unit comprises a first transistor, the grid electrode of the first transistor is connected with the first signal wire, the first pole of the first transistor is used for receiving a test signal, and the second pole of the first transistor is coupled with the first end of the first transparent signal wire; and/or the presence of a gas in the gas,

the second testing unit comprises a second transistor, the grid electrode of the second transistor is coupled with a second signal wire, the first pole of the second transistor is coupled with the second end of the first transparent signal wire, and the second pole of the second transistor is used for outputting the output signal of the first transparent signal wire; and/or the presence of a gas in the atmosphere,

the third test unit comprises a third transistor, a grid electrode of the third transistor is coupled with a third signal wire, a first pole of the third transistor is coupled with the second transparent signal wire, and a second pole of the third transistor is used for outputting an output signal of the second transparent signal wire.

In some possible implementation manners, the display substrate further includes a frame area, the frame area is located outside the display area, and the test module is disposed in the frame area.

In some possible implementations, the first signal line, the second signal line, and the third signal line are all located in the bezel area;

the first signal line and the second signal line have the same signal, and/or the first signal line and the third signal line have the same signal.

In some possible implementations, the plurality of transparent signal traces are divided into two groups of transparent signal traces, two ends of each transparent signal trace in one group of transparent signal traces are respectively coupled to the first test unit and the second test unit, and each transparent signal trace in the other group of transparent signal traces is coupled to the third test unit.

In some possible implementation manners, the plurality of transparent signal traces are sequentially arranged, the two sets of transparent signal traces include a first set of transparent signal traces and a second set of transparent signal traces, the first set of transparent signal traces includes transparent signal traces located at odd bits, and the second set of transparent signal traces includes transparent signal traces located at even bits.

In some possible implementation manners, each test unit is connected with a transparent signal wire through a signal outgoing line, the display substrate comprises a thin film transistor located in the display area, and the signal outgoing line and a source electrode or a drain electrode of the thin film transistor are located in the same layer.

In some possible implementation manners, the display device further includes a test pad group, where the test pad group includes a first pad, a second pad, and a third pad, the first pad is coupled to the first test unit, the second pad is coupled to the second test unit, and the third pad is coupled to the third test unit, the first pad is used to receive an externally input test signal, the second pad is used to provide a feedback signal of the first transparent signal trace to the outside, the third pad is used to provide a feedback signal of the second transparent signal trace to the outside, and the test pad group is located in a frame region of the display substrate.

In some possible implementations, the first sub-display area is divided into at least two sub-areas, each sub-area is symmetrically arranged with respect to a center of the first sub-display area, and each sub-area has a corresponding test module.

As a second aspect of the embodiments of the present disclosure, an embodiment of the present disclosure provides a method for detecting a display substrate, which is applied to the display substrate of any one of the first to fourth embodiments, and the method includes:

providing an effective level signal to the first signal line, and providing a test signal to the first transparent signal wire through the first test unit;

providing an effective level signal to the second signal line, and detecting a feedback signal of the first transparent signal routing through the second test unit;

and providing an effective level signal for the third signal line, and detecting a feedback signal of the second transparent signal routing through the third test unit.

In some of the possible implementations of the present invention,

determining that a disconnection point exists in the first transparent signal wire under the condition that the feedback signal of the first transparent signal wire does not correspond to the test signal;

and determining that a short-circuit point exists between the second transparent signal wire and the first transparent signal wire under the condition that the feedback signal of the second transparent signal wire corresponds to the test signal.

As a third aspect of the embodiments of the present disclosure, an embodiment of the present disclosure provides a display device, including the display substrate of any one of the first aspect, and a photosensitive sensor, where an orthogonal projection of the photosensitive sensor on the display substrate at least partially overlaps with the first sub-display area.

The technical scheme of the embodiment of the disclosure can obtain the following beneficial effects: whether the transparent signal wiring in the camera shooting area under the screen is abnormal or not can be detected, the product quality is improved, and yield loss is avoided.

The foregoing summary is provided for the purpose of description only and is not intended to be limiting in any way. In addition to the illustrative aspects, embodiments, and features described above, further aspects, embodiments, and features of the present disclosure will be readily apparent by reference to the drawings and following detailed description.

Drawings

In the drawings, like reference characters designate like or similar parts or elements throughout the several views unless otherwise specified. The figures are not necessarily to scale. It is appreciated that these drawings depict only some embodiments in accordance with the disclosure and are not to be considered limiting of its scope.

FIG. 1 is a schematic plan view of a display substrate according to the related art;

FIG. 2 is a schematic plan view illustrating a display substrate according to an embodiment of the present disclosure;

FIG. 3 is a schematic view of a transparent signal trace grouping and partition detection plane structure of a display substrate according to an embodiment of the disclosure;

FIG. 4 is a schematic view of a transparent signal routing grouping and partition detection plane structure of a display substrate according to yet another embodiment of the present disclosure;

fig. 5 is a schematic flow chart illustrating a method for inspecting a display substrate according to an embodiment of the disclosure.

Description of reference numerals:

10. a display substrate;

100. a display area; 110. a first sub-display area; 111 light emitting pixels; 120. a second sub-display area; 130. a frame region;

200. a pixel circuit;

300. transparent signal routing; 310. a first transparent signal trace; 320. a second transparent signal trace;

410. a first test unit; 411. a first transistor; 420. a second test unit; 421. a second transistor; 430. a third test unit; 431. a third transistor;

510. a first pad; 520. a second bonding pad; 530. a third pad;

610. a first signal line; 620. a second signal line; 630. a third signal line;

700. and a signal leading-out wire.

Detailed Description

In the following, only certain exemplary embodiments are briefly described. As those skilled in the art would realize, the described embodiments may be modified in various different ways, all without departing from the spirit or scope of the present disclosure. Accordingly, the drawings and description are to be regarded as illustrative in nature, and not as restrictive.

The transistors used in all embodiments of the present disclosure may be thin film transistors or field effect transistors or other devices having the same characteristics, and the transistors used in the embodiments of the present disclosure are mainly switching transistors according to the role in the circuit. Since the source and drain of the switching transistor used herein are symmetrical, the source and drain thereof may be interchanged. In the embodiments of the present disclosure, the source is referred to as a first pole and the drain is referred to as a second pole, or the drain may be referred to as the first pole and the source as the second pole. The form of the transistor in the drawing is defined as a gate in the middle, a source at a signal input terminal, and a drain at a signal output terminal. The transistors used in the embodiments of the present disclosure may be P-type transistors that are turned on when the gate is at a low level and turned off when the gate is at a high level, or N-type transistors that are turned on when the gate is at a high level and turned off when the gate is at a low level.

Fig. 1 is a schematic plan view of a display substrate in the related art. As shown in fig. 1, the display substrate 10 adopts an off-screen camera technology, and the display substrate 10 may include a display area 100, where the display area 100 includes a first sub-display area 110 and a second sub-display area 120, and the second sub-display area 120 at least partially surrounds the first sub-display area 110. The first sub-display area 110 is used for installing an under-screen photosensitive sensor, such as a camera, the transmittance of the first sub-display area 110 is required to be high, and in order to maximally maintain the photosensitive level of the photosensitive sensor of the first sub-display area 110, the transmittance of the first sub-display area 110 should be increased as much as possible. The first sub-display region 110 is provided with a plurality of light emitting pixels 111, and the light emitting pixels 111 include a first electrode, a light emitting layer, and a second electrode, which are sequentially stacked, and the light emitting layer emits light when driven by the first electrode and the second electrode.

The plurality of pixel circuits 200 are located in the region outside the first sub-display region 110, each pixel circuit 200 corresponds to each light-emitting pixel 111 one by one, and the first electrode of the light-emitting pixel 111 is electrically connected to the pixel circuit 200 through the transparent signal trace 300. It is to be understood that the pixel circuit may include a plurality of thin film transistors and storage capacitors, and the pixel circuit may adopt a 3T1C, 4T1C, 5T1C, 7T1C, or the like structure. Compared with the connection mode through metal wires, the connection mode through the transparent signal wires to connect the pixel circuit 200 and the light emitting pixels 111 can improve the transmittance of the first sub-display area 110.

However, the transparent signal routing process cannot be monitored, which becomes the most technologically risky risk of the OLED full-screen product. The detection of the transparent signal wiring in the related art has defects and cannot meet the requirement of a production line. Illustratively, the transparent signal traces are detected by an optical microscope, and when the transparent signal traces coincide with metal traces located below the transparent signal traces, the optical microscope cannot detect whether the transparent signal traces are abnormal.

For example, the related art production line device can only detect the defect of the single-layer transparent signal trace in the under-screen image pickup area, i.e. the first sub-display area 110, and all the abnormalities of the transparent signal trace need to be detected in the lighting test stage, so as to determine whether the transparent signal trace has the defect through the actual lighting effect. If the transparent signal wiring is short-circuited, the transparent signal wiring is a bright point when the lamp is lighted, and if the transparent signal wiring is open-circuited, the transparent signal wiring is a dark point when the lamp is lighted. When the pixels and the transparent signal wires are arranged side by side, the lighting test cannot detect whether the transparent signal wires are abnormal or not, so that a factory cannot timely detect the abnormity of the transparent signal wires and feed back the abnormal condition, and the large-batch yield loss of products is caused.

In order to solve the problem of the detection of the transparent signal trace, the embodiment of the present disclosure provides a display substrate. The technical scheme of the present disclosure is described in detail by the following embodiments.

Fig. 2 is a schematic view of a display substrate according to an embodiment of the disclosure. In one embodiment, as shown in fig. 2, the display substrate 10 includes a display area 100, a plurality of pixel circuits 200, and a test module. The display area 100 includes a first sub-display area 110 and a second sub-display area 120, the first sub-display area 110 is used for mounting a photosensitive sensor such as a camera, the second sub-display area 120 at least partially surrounds the first sub-display area 110, the first sub-display area 110 is provided with a plurality of light-emitting pixels 111, and the light-emitting pixels 111 include a first electrode, a light-emitting layer and a second electrode which are sequentially stacked, and the light-emitting layer emits light under the driving of the first electrode and the second electrode. The plurality of pixel circuits 200 are located in a region outside the first sub-display region 110, and the first electrode of the light emitting pixel 111 is electrically connected to the pixel circuits 200 through the transparent signal trace 300. The number of the transparent signal traces 300 is multiple, and the multiple transparent signal traces 300 at least include a first transparent signal trace 310 and a second transparent signal trace 320. The "plurality" is two or more.

The test module includes a first test unit 410, a second test unit 420, and a third test unit 430. The first test unit 410 and the second test unit 420 are coupled to two ends of the first transparent signal trace 310, respectively, and the third test unit 430 is coupled to the second transparent signal trace 320. The first test unit 410 is configured to provide a test signal to the first transparent signal trace 310 under control of a signal of the first signal line 610, and the second test unit 420 is configured to output a feedback signal of the first transparent signal trace 310 under control of a signal of the second signal line 620. The third test unit 430 is configured to output a feedback signal of the second transparent signal trace 320 under the control of a signal of the third signal line 630. The first test unit 410, the second test unit 420 and the third test unit 430 are used to detect an abnormal condition of the first transparent signal trace 310 and the second transparent signal trace 320.

It is understood that the first sub display area 110 and the second sub display area 120 may be positioned in such a manner that at least a partial edge of the first sub display area 110 coincides with at least a partial edge of the second sub display area 120 and the remaining portion of the first sub display area 110 is surrounded by the second sub display area 120, so that the first sub display area 110 may be disposed at an edge of the display area 100 of the display panel. For example, the position relationship between the second sub-display area 120 and the first sub-display area 110 may also be that the second sub-display area 120 surrounds the first sub-display area 110, so that the first sub-display area 110 may be disposed inside the display panel display area. Of course, in practical applications, the specific location of the first sub-display area 110 may be determined according to the practical application environment design of the display panel, and is not limited herein. In a specific implementation, the shape of the first sub-display section 110 may be set to a regular shape, such as a rectangle, a circle, or a trapezoid. The shape of the first sub-display section 110 may also be set to an irregular shape, such as a drop shape. Of course, in practical applications, the shape of the first sub-display area 110 may be designed according to the shape of the elements disposed in the first sub-display area 110, and is not limited herein. Illustratively, the area of the first sub-display section 110 is smaller than the area of the second sub-display section 120. Of course, in practical applications, the design may be performed according to the elements in the first sub-display area 110, and is not limited herein.

Illustratively, the plurality of transparent signal traces 300 may be tin-doped Indium Trioxide (ITO), aluminum-doped zinc oxide (AZO), indium Zinc Oxide (IZO), or the like.

It should be noted that the display substrate 10 provided in the embodiment of the present disclosure is suitable for a display device that needs to dispose a photosensitive sensor under a screen, where the photosensitive sensor may be a camera, and the photosensitive sensor is hereinafter described as a camera as an example, and since an aperture of the camera for receiving light rays is generally set to be circular, the first sub-display area 110 is set to be circular exemplarily.

It should be noted that the photosensitive sensor may be entirely located in the first sub-display area, or a partial area of the photosensitive sensor is located in the first sub-display area, and a partial area of the photosensitive sensor is located outside the first display area, and the photosensitive sensor may be set according to an actual use requirement of the photosensitive sensor, which is not limited herein.

In the display substrate 10 of the embodiment of the disclosure, the first testing unit 410 sends the testing signal to the first transparent signal trace 310 under the control of the first signal line 610, and the second testing unit 420 outputs the feedback signal of the first transparent signal trace 310 under the control of the second signal line 620. Under the condition that the feedback signal of the first transparent signal trace 310 corresponds to the test signal (for example, the feedback signal is the same as the test signal), it indicates that two ends of the first transparent signal trace 310 are conducted, and the first transparent signal trace 310 has no abnormal open circuit; under the condition that the feedback signal of the first transparent signal wire 310 does not correspond to the test signal, it is determined that the first transparent signal wire 310 is open-circuited. The third testing unit 430 outputs the feedback signal of the second transparent signal trace 320 under the control of the third signal line 630, and under the condition that the feedback signal of the second transparent signal trace 320 does not correspond to the testing signal, it indicates that the second transparent signal trace 320 is disconnected from the first transparent signal trace 310; in the case where the feedback signal of the second transparent signal trace 320 corresponds to the test signal, a short circuit between the first transparent signal trace 310 and the second transparent signal 220 is determined. Therefore, by adopting the display substrate provided by the embodiment of the disclosure, the abnormal condition of the transparent signal wiring 300 can be detected through the substrate testing equipment at the production line stage, the detection result is fed back to adjust and repair the abnormal process in time, the lighting test stage is not needed, the abnormal risk of the transparent signal wiring is preposed, and the yield loss is avoided.

In the detection stage, the display substrate of the embodiment of the disclosure can provide effective signals to the first signal line, the second signal line and the third signal line respectively, so that the corresponding first test unit, the corresponding second test unit and the corresponding third test unit are all conducted, and the open circuit and the short circuit of the transparent signal routing are detected conveniently; in the non-detection stage, the invalid signals can be respectively provided for the first signal line, the second signal line and the third signal line, so that the corresponding first test unit, the corresponding second test unit and the corresponding third test unit are all disconnected, and the display of the display substrate is prevented from being influenced.

Referring to fig. 2, in one embodiment thereof, the first test unit 410 includes a first transistor 411, a gate of the first transistor 411 is connected to the first signal line 610, a first pole of the first transistor 411 is used for receiving a test signal, and a second pole of the first transistor 411 is coupled to a first end of the first transparent signal trace 310. The first test unit 410 having such a structure is simple in structure, and is easily and directly formed on the display substrate 10, thereby reducing the cost.

Referring to fig. 2, in one embodiment, the second testing unit 420 includes a second transistor 421, a gate of the second transistor 421 is coupled to the second signal line 620, a first pole of the second transistor 421 is coupled to the second end of the first transparent signal trace 310, and a second pole of the second transistor 421 is used for outputting the output signal of the first transparent signal trace 310. The second test unit 420 having such a structure is simple in structure, and is easily and directly formed on the display substrate 10, thereby reducing the cost.

Referring to fig. 2, in one embodiment, the third test unit 430 includes a third transistor 431, a gate of the third transistor 431 is coupled to a third signal line 332, a first pole of the third transistor 431 is coupled to the second transparent signal trace 320, and a second pole of the third transistor 431 is used for outputting an output signal of the second transparent signal trace 320. The third test unit structure 430 having such a structure is simple and easy to be directly formed on the display substrate 10, thereby reducing the cost.

It should be noted that fig. 2 schematically shows the structures of the first test unit 410, the second test unit 420, and the third test unit 430. It is to be understood that the first test unit 410, the second test unit 420, and the third test unit 430 are not limited to the structure shown in fig. 2, but may be other circuit structures as long as functions thereof can be implemented.

In one embodiment, as shown in fig. 2, the first transparent signal trace 310 and the second transparent signal trace 320 are adjacent to each other, that is, the first transparent signal trace 310 and the second transparent signal trace 320 are adjacent transparent signal traces. Illustratively, in the wiring of the display substrate, a plurality of transparent signal traces 300 are arranged in sequence, and short circuits are more easily generated between adjacent transparent signal traces 300. The first transparent signal trace 310 and the second transparent signal trace 320 are disposed adjacent to each other, so that whether a short circuit exists can be detected more efficiently, and the detection efficiency is improved.

In one embodiment, as shown in fig. 2, the display substrate 10 further includes a frame region 130, the frame region 130 is located outside the display region 110, and the test module is disposed in the frame region 130. That is, the first test unit 410, the second test unit 420, and the third test unit 430 are located in the border area 130. Therefore, the test module does not occupy the display area 110 and does not affect the resolution of the display substrate 10.

It should be noted that, in other embodiments, the first test unit 410, the second test unit 420, or the third test unit 430 is not limited to the border area 130, for example, all three test units may be disposed in the display area 110, or one or two of the first test unit 410, the second test unit 420, and the third test unit 430 are disposed in the border area 130, and the other is disposed in the display area 110.

In one embodiment, the first signal line 610, the second signal line 620, and the third signal line 630 are all located in the bezel area 130. In this way, the display area 110 is not affected. It should be noted that, in other embodiments, the first test unit 410, the second test unit 420, or the third test unit 430 is not limited to the frame area 130, for example, the first signal line 610, the second signal line 620, and the third signal line 630 may be disposed in the display area 110, or one of the first signal line 610, the second signal line 620, and the third signal line 630 is disposed in the frame area 130, and the other two are disposed in the display area 110, or two of the first signal line 610, the second signal line 620, and the third signal line 630 are disposed in the frame area 130, and the other one is disposed in the display area 110.

In one embodiment, the first signal line 610 has the same signal as the second signal line 620. It should be noted that, when detecting whether the first transparent signal trace 310 is open, the first test unit 410 and the second test unit 420 need to be turned on simultaneously. In addition, signals of the first signal line 610 and the second signal line 620 are set to be the same, so that the first signal line 610 and the second signal line 620 can share one signal line, and the number of signal lines is reduced.

In one embodiment, the signals of the first signal line 610 and the third signal line 630 are the same. It should be noted that, when detecting whether the first transparent signal trace 310 and the second transparent signal trace 320 are short-circuited, the first test unit 410 and the third test unit 430 need to be turned on simultaneously, and therefore, the signals of the first signal line 610 and the third signal line 630 are the same, which is beneficial to implementing the simultaneous turning on of the first test unit 410 and the third test unit 430. In addition, signals of the first signal line 610 and the third signal line 630 are set to be the same, so that the first signal line 610 and the third signal line 630 can share one signal line, and the number of signal lines is reduced.

In one embodiment, the signals of the first signal line 610, the second signal line 620, and the third signal line 630 may be the same. Therefore, the first test unit 410, the second test unit 420 and the third test unit 430 are simultaneously turned on, and whether the first transparent signal trace 310 is open-circuited or not and whether the first transparent signal trace 310 and the second transparent signal trace 320 are short-circuited or not can be simultaneously detected, so that the detection efficiency is improved. Also, the first signal line 610, the second signal line 620, and the third signal line 630 may share one signal line, further reducing the number of signal lines.

Fig. 3 is a schematic diagram illustrating a transparent signal trace grouping and partition detecting plane structure of a display substrate according to an embodiment of the disclosure, referring to fig. 3, in one embodiment, a plurality of transparent signal traces 300 are divided into two groups of transparent signal traces, two ends of each transparent signal trace 300 in one group of transparent signal traces are respectively coupled to a first testing unit 410 and a second testing unit 420, and each transparent signal trace 300 in the other group of transparent signal traces is coupled to a third testing unit 430. For example, the two sets of transparent signal traces are divided into a first set of transparent signal traces and a second set of transparent signal traces, two ends of each transparent signal trace 300 in the first set of transparent signal traces are respectively coupled to the first test unit 410 and the second test unit 420, and each transparent signal trace 300 in the second set of transparent signal traces is coupled to the third test unit 430. In such a way, whether each transparent signal wire in the first group of transparent signal wires is broken or not can be detected at the same time, and whether each transparent signal wire in the second group of transparent signal wires is short-circuited with the first group of transparent signal wires or not can be detected, so that the detection efficiency is further improved. In this way, the number of the first test unit 410, the second test unit 420, and the third test unit 430 may also be reduced, which is beneficial to implementing a narrow bezel.

As shown in fig. 3, in one embodiment, a plurality of transparent signal traces 300 are sequentially arranged, and two sets of transparent signal traces include a first set of transparent signal traces I and a second set of transparent signal traces II, where the first set of transparent signal traces I includes odd-numbered transparent signal traces D1, D3, \8230;, and the second set of transparent signal traces II includes even-numbered transparent signal traces D2, D4, \8230;. The odd-numbered transparent signal traces D1, D3, and 8230are coupled to the first test unit 410 and the second test unit 420, respectively, and the even-numbered transparent signal traces D2, D4, and 8230are coupled to the third test unit 430. First, first transparent signal is walked line D1 and is walked line D2, first transparent signal is walked line D3 and second transparent signal and is walked line D4 and set up to adjacent to each other, can detect out more high-efficiently whether there is the short circuit, improves detection efficiency. Secondly, such a mode can detect whether each transparent signal line, for example, D1 and D3, in the odd-numbered transparent signal lines is open-circuited, and detect whether each transparent signal line, for example, D2 and D4, in the even-numbered transparent signal lines and each transparent signal line, for example, D1 and D3, in the odd-numbered transparent signal lines are short-circuited, so as to further improve the detection efficiency. Finally, this way can also reduce the number of the first test unit 410, the second test unit 420 and the third test unit 430, which is beneficial to realizing a narrow bezel.

The first test unit 410 and the second test unit 420 coupled at both ends of each transparent signal trace are shown in fig. 3. It should be noted that, as shown in fig. 3, the test units respectively coupling the transparent signal traces D1, D2, D3 and D4 are identified as a, b, c and D, and in the case of detecting whether the transparent signal traces D1 and D3 are open-circuited and whether the transparent signal traces D1 and D3 are short-circuited with the transparent signal traces D2 and D4, the test units a and b may be a first test unit and a second test unit, respectively, and the test unit c or D may be a third test unit; in the case of detecting whether the transparent signal traces D2 and D4 are open-circuited, and whether the transparent signal traces D2 and D4 are short-circuited with the transparent signal traces D1 and D3, the test units c and D may be a first test unit and a second test unit, respectively, and the test unit a or b may be a third test unit.

In one embodiment, as shown in fig. 3, the first test unit may include a plurality of first transistors, the second test unit may include a plurality of second transistors, the number of the first transistors is the same as the number of the second transistors, and the number of the first transistors and the number of the second transistors are the same as the number of the transparent signal traces in the corresponding group of transparent signal traces. For example, the first group of transparent signal traces includes m transparent signal traces, the first test unit includes m first transistors, and the second test unit includes m second transistors. Each transparent signal wire in the first group of transparent signal wires corresponds to a pair of the first transistor and the second transistor, one end of each transparent signal wire is coupled with the corresponding first transistor, and the other end of each transparent signal wire is coupled with the corresponding second transistor. For example, in fig. 3, two ends of the transparent signal trace D1 are respectively coupled to the corresponding first transistor and the second transistor, and two ends of the transparent signal trace D3 are respectively coupled to the corresponding first transistor and the second transistor. Therefore, the transparent signal wiring with the open circuit can be more definitely determined through the feedback signal of each second transistor, so that the transparent signal wiring with the fault is locked, and the detection efficiency and the maintenance efficiency are improved.

Illustratively, the third test unit may include a plurality of third transistors, the number of the third transistors being the same as the number of the transparent signal traces in the corresponding group of transparent signal traces. For example, the second group of transparent signal traces includes n transparent signal traces, and the third test unit includes n third transistors. The n transparent signal wires in the second group of transparent signal wires correspond to the n third transistors one by one, and each transparent signal wire is coupled with the corresponding third transistor. For example, in fig. 3, the transparent signal trace D2 is coupled to the corresponding third transistor, and the transparent signal trace D4 is coupled to the corresponding third transistor. Therefore, the transparent signal wiring with short circuit can be determined more clearly through the feedback signal of each third transistor, so that the transparent signal wiring with fault is locked, and the detection efficiency and the maintenance efficiency are improved.

It should be noted that the number of odd-numbered transparent signal traces and even-numbered transparent signal traces is schematically shown in fig. 3. It is to be understood that the number of the odd-numbered and even-numbered transparent signal traces is not limited to the number shown in fig. 3, but may be other numbers.

In one embodiment, as shown in fig. 2, each test unit is connected to the transparent signal trace 300 through a signal outgoing line 700, the display substrate 10 includes a thin film transistor located in the display area 110, and the signal outgoing line 700 and a source electrode or a drain electrode of the thin film transistor are located on the same layer. In this way, the signal lead-out lines 700 can be formed simultaneously in the process of forming the thin film transistor, thereby simplifying the process of the display substrate.

For example, the first transistor, the second transistor, and the third transistor may be disposed at the same layer as the thin film transistor of the display region. That is, the gates of the first transistor, the second transistor, and the third transistor are disposed at the same layer as the gate of the thin film transistor of the display region, and the sources and the drains of the first transistor, the second transistor, and the third transistor are disposed at the same layer as the source and the drain of the thin film transistor of the display region; the active layers of the first transistor, the second transistor and the third transistor are arranged at the same layer as the active layer of the thin film transistor in the display area.

In one embodiment thereof, referring to fig. 2, the display substrate further includes a test pad group including a first pad 510, a second pad 520, and a third pad 530, the first pad 510 being coupled to the first testing unit 410, the second pad 520 being coupled to the second testing unit 420, and the third pad 530 being coupled to the third testing unit 430. The first pad 510 is used for receiving an externally input test signal, the second pad 520 is used for providing a feedback signal of the first transparent signal trace 310 to the outside, and the third pad 530 is used for providing a feedback signal of the second transparent signal trace 320 to the outside. Illustratively, the first pad 510, the second pad 520, and the third pad 530 are structures for inputting a test signal or receiving a feedback signal, which are provided on a base of the display substrate 10, and may be one or more metal layers provided on the base in a sheet shape. For example, the first pad 510, the second pad 520, and the third pad 530 may be structures for bonding connection with a flexible printed circuit board or a driver chip, so that signals from the flexible printed circuit board or the driver chip may be acquired.

In one embodiment, the first pad 510, the second pad 520, and the third pad 530 are located in the frame region 130 of the display substrate 10, so as not to affect the display region. It should be noted that, in other embodiments, the first pad 510, the second pad 520, or the third pad 530 is not limited to the frame region 130, for example, the first pad 510, the second pad 520, or the third pad 530 may be disposed in the display region 110, or one of the first pad 510, the second pad 520, or the third pad 530 is disposed in the frame region 130, and the other two pads are disposed in the display region 110.

In one embodiment, as shown in fig. 3, when the first test unit includes a plurality of first transistors, the plurality of first transistors may be coupled to the same first pad 510, so that the plurality of transparent signal traces may be simultaneously provided with the test signal through the first pad 510.

In one embodiment, as shown in fig. 3, when the second testing unit includes a plurality of second transistors, the plurality of second transistors may be coupled to the same second pad 520, so that there may be an open circuit in the surface transparent signal trace as long as a feedback signal not corresponding to the testing signal is detected through the second pad 520. For example, the second transistors may be coupled with the second pads 520 in a one-to-one correspondence, so that when the second pads detect a feedback signal that does not correspond to the test signal, the transparent signal traces coupled with the second pads may be locked for an open circuit.

In one embodiment, as shown in fig. 3, when the third testing unit includes a plurality of third transistors, the plurality of third transistors may be coupled to the same third pad 530, so that a short circuit may exist in the surface transparent signal trace as long as the feedback signal corresponding to the testing signal is detected through the third pad 530. Illustratively, the plurality of third transistors may be coupled with the plurality of third pads 530 in a one-to-one correspondence, so that when the third pads detect the feedback signals corresponding to the test signals, the transparent signal traces coupled with the third pads may be locked for a short circuit.

In one embodiment, the first sub-display area 110 is divided into at least two sub-areas, each sub-area is symmetrically disposed with respect to the center of the first sub-display area 110, each sub-area is provided with a plurality of light emitting pixels, each sub-area has a plurality of corresponding transparent signal traces 300, and each sub-area has a corresponding test module. Therefore, the test module can test the abnormal condition of the transparent signal trace 300 in each sub-area, so as to accurately locate the sub-area where the transparent signal trace 300 is short-circuited or broken-circuited.

As shown in fig. 3, for example, the first sub-display area 110 is divided into two sub-areas a and B along the vertical direction of the transparent signal trace 300, the two sub-areas a and B are symmetrically disposed with respect to the central position of the first sub-display area 110, so that the two sub-areas a and B can be precisely positioned in 1/2 area of the transparent signal trace 300, the transparent signal traces located in the sub-areas a and B can be divided into two groups, and the two groups of transparent signal traces are respectively odd-numbered transparent signal traces and even-numbered transparent signal traces.

Fig. 4 is a schematic view of a grouping and partition detection plane structure of transparent signal traces of a display substrate according to still another embodiment of the disclosure, as shown in fig. 4, exemplarily, the first sub-display area 110 may be divided into four sub-areas a, B, C, and D along a direction perpendicular to the transparent signal traces 300 and a direction parallel to the transparent signal traces 300, the four sub-areas a, B, C, and D have the same size, and the four sub-areas a, B, C, and D are symmetrically disposed relative to a center position of the first sub-display area 110, so that a 1/4 area of the transparent signal traces may be precisely located.

It should be noted that the number, size, and shape of the sub-regions of the first sub-display region 110 may be set according to actual use requirements, for example, the first sub-display region 110 may be further divided into three or five sub-regions, and the dividing manner and number of the first sub-display region are not limited herein.

Fig. 5 is a schematic flow chart illustrating a method for inspecting a display substrate according to an embodiment of the disclosure. Another embodiment of the present disclosure provides a method for detecting a display substrate, which is applied to the display substrate according to any one of the first to third embodiments, and the method includes steps S10 to S30:

in step S10, an active level signal is provided to the first signal line 610, and a test signal is provided to the first transparent signal trace 310 through the first test unit 410. The first signal line 610 controls the first test unit 410 to send the test signal to the first transparent signal trace 310 by receiving the active level signal.

In step S20, an active level signal is provided to the second signal line 620, and a feedback signal of the first transparent signal trace 310 is detected through the second test unit 420. The second signal line 620 controls the second testing unit 420 to detect the feedback signal of the first transparent signal trace 310 by receiving the active level signal.

In step S30, an active level signal is provided to the third signal line 630, and a feedback signal of the second transparent signal trace 320 is detected by the third testing unit 430. The third signal line 630 controls the third testing unit 440 to detect the feedback signal of the second transparent signal trace 320 by receiving the active level signal.

It should be noted that the active level signal may be an active low level signal or an active high level signal. The effective level signals of the first signal line 610, the second signal line 620, and the third signal line 630 may all be effective low level signals, or the effective level signals of the first signal line 610 and the second signal line 620 are effective low level signals, and the signal of the third signal line 630 is an effective high level signal, which may be set according to actual use requirements, and is not limited herein.

The order of step S20 and step S30 is not limited herein, and step S20 may be performed first, or step S30 may be performed first.

By adopting the detection method of the display substrate of the embodiment of the disclosure, the abnormal condition of the transparent signal wiring 300 can be detected by the substrate test equipment in the production line stage, the feedback detection structure can timely adjust and repair the abnormal process, the lighting test stage is not needed, the abnormal risk of the transparent signal wiring 300 is advanced, and the yield loss is avoided.

The technical solution of the embodiment of the present disclosure is further described below by using a method for detecting open circuit and short circuit of a display substrate in an embodiment of the present disclosure.

In the case that the feedback signal of the first transparent signal trace 310 does not correspond to the test signal, it is determined that the disconnection point of the first transparent signal trace 310 exists. Illustratively, the first signal line 610 receives an active low signal, the first signal line 610 controls the first testing unit 410 to send a voltage signal for testing to the first transparent signal trace 310, the second signal line 620 receives an active low signal, and the second testing unit 420 controls the second signal line 620 to detect a feedback signal of the first transparent signal trace 310. If the feedback signal is a current signal corresponding to the voltage signal, it indicates that both ends of the first transparent signal trace 310 are grounded, it is determined that the first transparent signal trace 310 does not have a disconnection point, and if the feedback signal of the first transparent signal trace 310 is not a current signal corresponding to the voltage signal, it indicates that both ends of the first transparent signal trace 310 are grounded, it is determined that the first transparent signal trace 310 has a disconnection point.

In a case where the feedback signal of the second transparent signal trace 320 corresponds to the test signal, it is determined that a short-circuit point exists between the second transparent signal trace 320 and the first transparent signal trace 310. Illustratively, the first signal line 610 receives an active low signal, the first signal line 610 controls the first testing unit 410 to send a voltage signal for testing to the first transparent signal trace 310, the third signal line 630 receives an active low signal, and the third signal line 630 controls the third testing unit 430 to detect a feedback signal of the second transparent signal trace 310. If the feedback signal is a ground current signal corresponding to the voltage signal, it indicates that the first transparent signal trace 310 and the second transparent signal trace 320 are grounded, it is determined that the first transparent signal trace and the second transparent signal trace 320 are short-circuited, and if the feedback signal is not a ground current signal corresponding to the voltage signal, it indicates that the first transparent signal trace 310 and the second transparent signal trace 320 are disconnected, and there is no short-circuit between the first transparent signal trace 310 and the second transparent signal trace 320.

In another embodiment of the present disclosure, a display device includes the display substrate and the photosensitive sensor according to any embodiment of the present disclosure, and an orthographic projection of the photosensitive sensor on the display substrate at least partially overlaps with the first sub-display area. The display device provided by the embodiment of the present disclosure may be any product or component having display and touch functions, such as a smart phone, a wearable smart watch, smart glasses, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator, an in-vehicle display, an electronic book, a biological recognition device such as a smart skin device, a soft robot, and a biomedical device.

According to the display device provided by the embodiment of the application, by adopting the display substrate, the transparent signal wiring of the first sub-display area of the display substrate can be detected in a production line, so that the abnormal process can be adjusted in time, and the yield loss is avoided.

Other configurations of the display substrate and the display device of the above embodiments can be adopted by various technical solutions known by those skilled in the art now and in the future, and will not be described in detail here.

In the description of the present specification, it is to be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential", and the like, are used based on the orientations and positional relationships shown in the drawings, and are used merely for convenience of description and simplicity of description, but do not indicate or imply that the device or element referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore should not be considered as limiting the present disclosure.

Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the present disclosure, "a plurality" means two or more unless specifically limited otherwise.

In the present disclosure, unless otherwise explicitly stated or limited, the terms "mounted," "connected," "secured," and the like are to be construed broadly, e.g., as meaning fixedly connected, detachably connected, or integral with; the connection can be mechanical connection, electrical connection or communication; either directly or indirectly through intervening media, either internally or in any other relationship. The specific meaning of the above terms in the present disclosure can be understood by those of ordinary skill in the art as appropriate.

In the present disclosure, unless expressly stated or limited otherwise, the first feature "on" or "under" the second feature may comprise the first and second features being in direct contact, or may comprise the first and second features being in contact, not directly, but via another feature in between. Also, the first feature "on," "above" and "over" the second feature may include the first feature being directly above and obliquely above the second feature, or simply indicating that the first feature is at a higher level than the second feature. The first feature being "under," "beneath," and "under" the second feature includes the first feature being directly above and obliquely above the second feature, or simply meaning that the first feature is at a lesser level than the second feature.

The above disclosure provides many different embodiments, or examples, for implementing different features of the disclosure. The components and arrangements of specific examples are described above to simplify the present disclosure. Of course, they are merely examples and are not intended to limit the present disclosure. Moreover, the present disclosure may repeat reference numerals and/or reference letters in the various examples, which have been repeated for purposes of simplicity and clarity and do not in themselves dictate a relationship between the various embodiments and/or arrangements discussed.

While the present disclosure has been described with reference to specific embodiments, it will be understood by those skilled in the art that various changes and modifications may be made without departing from the spirit and scope of the disclosure. Therefore, the protection scope of the present disclosure shall be subject to the protection scope of the claims.

Claims

1. A display substrate is characterized by comprising a display area, wherein the display area comprises a first sub-display area and a second sub-display area, the second sub-display area at least partially surrounds the first sub-display area, the first sub-display area is provided with a plurality of light-emitting pixels, and the light-emitting pixels comprise a first electrode, a light-emitting layer and a second electrode which are sequentially stacked;

the pixel circuits are positioned in the area outside the first sub-display area, the first poles of the light-emitting pixels are electrically connected with the pixel circuits through transparent signal wires, and the transparent signal wires at least comprise first transparent signal wires and second transparent signal wires;

the display substrate further includes a test module, where the test module includes a first test unit, a second test unit, and a third test unit, the first test unit and the second test unit are respectively coupled to two ends of the first transparent signal trace, the third test unit is coupled to the second transparent signal trace, the first test unit is configured to provide a test signal to the first transparent signal trace under control of a signal of a first signal line, the second test unit is configured to output a feedback signal of the first transparent signal trace under control of a signal of a second signal line, and the third test unit is configured to output a feedback signal of the second transparent signal trace under control of a signal of a third signal line.

2. The display substrate of claim 1,

the first test unit comprises a first transistor, the grid electrode of the first transistor is connected with the first signal wire, the first pole of the first transistor is used for receiving the test signal, and the second pole of the first transistor is coupled with the first end of the first transparent signal wire; and/or the presence of a gas in the gas,

the second test unit comprises a second transistor, a grid electrode of the second transistor is coupled with the second signal wire, a first pole of the second transistor is coupled with the second end of the first transparent signal wire, and a second pole of the second transistor is used for outputting an output signal of the first transparent signal wire; and/or the presence of a gas in the gas,

the third test unit comprises a third transistor, a gate of the third transistor is coupled to the third signal line, a first pole of the third transistor is coupled to the second transparent signal trace, and a second pole of the third transistor is used for outputting an output signal of the second transparent signal trace.

3. The display substrate of claim 1, further comprising a frame area, wherein the frame area is outside the display area, and wherein the test module is disposed in the frame area.

4. The display substrate according to claim 3, wherein the first signal line, the second signal line, and the third signal line are located in the frame region;

5. The display substrate according to claim 1, wherein the plurality of transparent signal traces are divided into two sets of transparent signal traces, two ends of each transparent signal trace in one set of transparent signal traces are respectively coupled to the first test unit and the second test unit, and each transparent signal trace in the other set of transparent signal traces is coupled to the third test unit.

6. The display substrate according to claim 5, wherein the plurality of transparent signal traces are sequentially arranged, and two sets of transparent signal traces include a first set of transparent signal traces and a second set of transparent signal traces, the first set of transparent signal traces includes transparent signal traces at odd bits, and the second set of transparent signal traces includes transparent signal traces at even bits.

7. The display substrate according to claim 1, wherein each test unit is connected to a transparent signal trace through a signal outgoing line, the display substrate comprises a thin film transistor in a display area, and the signal outgoing line and a source electrode or a drain electrode of the thin film transistor are located on the same layer.

8. The display substrate according to claim 1, further comprising a test pad set, wherein the test pad set comprises a first pad, a second pad and a third pad, the first pad is coupled to the first testing unit, the second pad is coupled to the second testing unit, the third pad is coupled to the third testing unit, the first pad is configured to receive the test signal inputted from the outside, the second pad is configured to provide the feedback signal of the first transparent signal trace to the outside, the third pad is configured to provide the feedback signal of the second transparent signal trace to the outside, and the test pad set is located in a frame region of the display substrate.

9. The display substrate of any one of claims 1 to 8, wherein the first sub display area is divided into at least two sub areas, each sub area is symmetrically arranged with respect to a center of the first sub display area, and each sub area has the corresponding test module.

10. A method for inspecting a display substrate, the method being applied to the display substrate according to any one of claims 1 to 9, the method comprising:

providing an effective level signal to a second signal line, and detecting a feedback signal of the first transparent signal routing through a second test unit;

and providing an effective level signal for the third signal line, and detecting a feedback signal of the second transparent signal wiring through the third test unit.

11. The detection method according to claim 10,

12. A display device comprising the display substrate of any one of claims 1 to 9 and a photosensor, wherein an orthographic projection of the photosensor on the display substrate at least partially overlaps the first sub-display region.