CN115557461A

CN115557461A - Micro electro mechanical system packaging structure

Info

Publication number: CN115557461A
Application number: CN202211088194.6A
Authority: CN
Inventors: 雷永庆; 周俊; 冯军
Original assignee: Mestar Microelectronics Shenzhen Co ltd
Current assignee: Mestar Microelectronics Shenzhen Co ltd
Priority date: 2022-09-06
Filing date: 2022-09-06
Publication date: 2023-01-03

Abstract

The invention discloses a micro electro mechanical system packaging structure, and relates to the technical field of micro electro mechanical systems. The packaging structure of the micro electro mechanical system comprises a substrate, a control chip, a device chip and a packaging body, wherein the substrate, the control chip and the device chip are stacked from top to bottom and are mutually and electrically communicated, the packaging body is used for packaging the substrate, the control chip and the device chip, and a limiting structure for resisting the deformation of the device chip is arranged between the packaging body and the device chip. According to the packaging structure of the micro electro mechanical system, the limiting structure resisting deformation of the device chip is arranged between the packaging body and the device chip, so that the contraction force of the packaging body to the device layer is reduced, and the stress deformation of the device layer is reduced.

Description

Micro electro mechanical system packaging structure

Technical Field

The invention relates to the technical field of micro electro mechanical systems, in particular to a micro electro mechanical system packaging structure.

Background

Micro-Electro-Mechanical systems (MEMS) are recently developed in the field of integrated circuits. MEMS include devices fabricated using semiconductor technology to form mechanical and electrical components. Common MEMS device applications include resonators, accelerators, pressure sensors, actuators, mirrors, heaters, and printer nozzles, among others.

After the MEMS is packaged into a finished product, the finished product is applied to various electronic products. Some finished products of the micro electro mechanical system work in a constant temperature environment, and some finished products of the micro electro mechanical system work in a variable temperature environment, especially the finished products of the micro electro mechanical system work in an environment with large temperature change, because of the temperature change, the acting force of the packaging body on the internal device layer is overlarge, so that the device layer is stressed and deformed, and the normal work of the device layer is influenced.

Disclosure of Invention

The application provides a micro electro mechanical system packaging structure for reducing stress deformation of a device layer.

In order to solve the technical problem, the technical scheme provided by the application is as follows:

a micro electro mechanical system packaging structure comprises a substrate, a control chip, a device chip and a packaging body, wherein the substrate, the control chip and the device chip are stacked from top to bottom and are mutually and electrically communicated, the packaging body is used for packaging the substrate, the control chip and the device chip, and a limiting structure for resisting deformation of the device chip is configured between the packaging body and the device chip.

The packaging body comprises a first packaging body and a second packaging body, and the first packaging body packages the substrate, the control chip and the device chip; the second packaging body is arranged on the top surface of the first packaging body in a protruding mode, the second packaging body is located right above the device chip and packages the device chip, and the periphery of the second packaging body is located inside the edge of the first packaging body.

The distance between the surface of the second packaging body, which faces away from the first packaging body, and the top surface of the first packaging body is the thickness of the second packaging body, and the thickness of the second packaging body is 50um.

The device chip comprises a first substrate, a second substrate and a device layer, wherein the first substrate and the second substrate are opposite at intervals, the device layer is arranged between the first substrate and the second substrate, the first substrate and the top surface, far away from the base plate, of the control chip are fixedly connected, and the device layer is electrically communicated with the control chip.

At least one groove is formed in the top surface, back to the device layer, of the second substrate, and the groove is filled with the packaging body.

Wherein the groove is configured as a rectangular groove.

Wherein, the length and the width of recess are 500um, and the degree of depth is 30um.

The device layer comprises a connecting part, an actuating part and an electrode part, the connecting part and the electrode part are fixedly connected with the first substrate and/or the second substrate, and the actuating part and the connecting part are coupled with each other; the electrode part is arranged adjacent to the actuating part and is electrically communicated with the control chip so as to drive the actuating part.

Wherein the connection portion and the electrode portion are eutectic bonded with the first substrate and/or the second substrate via an anchor point.

Wherein the encapsulant is configured as an epoxy-based encapsulant, a silicone-based encapsulant, a polyurethane encapsulant, an ultraviolet light curing encapsulant, or a combination thereof.

The beneficial effect of this application is: according to the packaging structure of the micro electro mechanical system, the limiting structure resisting deformation of the device chip is arranged between the packaging body and the device chip, so that the contraction force of the packaging body to the device layer is reduced, and the stress deformation of the device layer is reduced.

Drawings

In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings used in the embodiments or the prior art descriptions will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without inventive efforts, wherein:

FIG. 1 is a schematic cross-sectional view of a prior art MEMS package structure;

FIG. 2 is a schematic cross-sectional view of a MEMS package structure in accordance with a first embodiment of the present application;

FIG. 3 is a first schematic cross-sectional view of a MEMS package structure of a second embodiment of the present application;

FIG. 4 is a second cross-sectional view of a MEMS package structure in accordance with a second embodiment of the present application;

FIG. 5 is a third schematic cross-sectional view of a MEMS package structure of a second embodiment of the present application;

FIG. 6 is a first schematic cross-sectional view of a MEMS package structure in accordance with a third embodiment of the present application;

FIG. 7 is a second cross-sectional view of a MEMS package structure in accordance with a third embodiment of the present application;

FIG. 8 is a third schematic cross-sectional view of a MEMS package structure in accordance with a third embodiment of the present application;

FIG. 9 is a partial schematic view of an MEMS package structure in an embodiment of the present application;

FIG. 10 is an in-plane deformation diagram of a first gap in a MEMS package structure of the prior art and in accordance with various embodiments of the present application;

FIG. 11 is a diagram of a second gap in-plane deformation in a MEMS package structure of the prior art and various embodiments of the present application;

FIG. 12 is a diagram of a first gap warp deformation in a MEMS package structure of the prior art and various embodiments;

FIG. 13 is a warpage diagram of a second gap in a MEMS package structure of the prior art and various embodiments.

Detailed Description

The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.

It should be noted that the terms "first", "second", etc. are used hereinafter for descriptive purposes only and are not to be construed as indicating or implying relative importance or as implying a number of the indicated technical features. Thus, features defined as "first" and "second" may explicitly or implicitly include one or more of the described features.

The terminology used in the description is for the purpose of describing the embodiments of the invention and is not intended to be limiting of the invention. It is also to be understood that, unless otherwise expressly stated or limited, the terms "disposed," "connected," and "connected" are intended to be open-ended, i.e., may be fixedly connected, detachably connected, or integrally connected; they may be mechanically coupled, directly coupled, indirectly coupled through intervening media, or may be interconnected between two elements. Those skilled in the art will specifically understand that the above description is meant to be specific to the present invention.

Referring to fig. 1, fig. 1 is a schematic cross-sectional view of a mems package structure according to an embodiment of the prior art.

The MEMS package structure 800 in the prior art includes a substrate 81 (substrate), a control chip 82 (CMOS Die), a device chip 83 (MEMS Die), and a package 84, wherein the control chip 82 is stacked on top of the substrate 81, the control chip 82 is adhered on top of the substrate 81 by glue (e.g. conductive epoxy), and the device chip 83 is stacked on a side of the control chip 82 opposite to the substrate 81. The Device chip 83 is composed of a first substrate 830 (wafer i), a Device Layer 831 (Device Layer), and a second substrate 832 (wafer ii), the first substrate 830 and the second substrate 832 being spaced apart from each other, the Device Layer 831 being located between the first substrate 830 and the second substrate 832.

The package 84 encapsulates the substrate 81, the control chip 82 and the device chip 83, wherein at least the bottom of the substrate 81 is exposed for electrically communicating the mems package structure with external circuitry.

In the mems package structure, the deformation of the device layer 831 is only affected by the second substrate 832. The lower first substrate 830, the control chip 82 and the base plate 81 are connected together by using the device layer 831 as an interface, so as to resist the lower shrinkage deformation of the package 84. The second substrate 832 is encapsulated by the upper portion of the package body 84, and the shrinkage deformation of the upper portion of the package body 84 is mainly resisted by the second substrate 832. Therefore, the second substrate 832 is thickened to resist the shrinkage deformation of the upper portion of the package body 84. As the thickness of the second substrate 832 increases, the thickness of the encapsulation 84 also increases, and the increase of the volume shrinkage force of the encapsulation 84 exceeds the increase of the rigidity of the second substrate 832, so that the deformation of the second substrate 832 is increased, and further the deformation of the device layer 831 is increased, which affects the normal operation of the device layer 831.

Accordingly, there is a need for improved packaging structures for mems devices that provide a confinement structure between the package and the device chip that resists deformation of the device chip. Therefore, the contraction force of the packaging body on the device layer is reduced, the stress deformation of the device layer is reduced, and the normal work of the device layer is ensured.

Specifically, referring to fig. 2 for a first embodiment, fig. 2 is a schematic view of a mems package structure according to a first embodiment of the present disclosure.

The mems package structure 100 includes a substrate 1, a control chip 2, a device chip 3, and a package 4, wherein the control chip 2 is stacked on the top of the substrate 1, the control chip 2 is bonded on the top of the substrate 1 by a glue (e.g., a conductive epoxy), and the device chip 3 is stacked on a side of the control chip 2 opposite to the substrate 1. The substrate 1, the control chip 2 and the device chip 3 are electrically communicated with each other.

The Device chip 3 includes a first substrate 30 (wafer i), a Device Layer 31 (Device Layer), and a second substrate 32 (wafer ii), wherein the first substrate 30 and the second substrate 32 are spaced apart from each other and face each other, and the Device Layer 31 is located between the first substrate 30 and the second substrate 32. The device layer 31 is in electrical communication with the control chip 2.

The device layer 31 includes a connection portion 310, an actuation portion 311, and an electrode portion (not shown). The connection portion 310 and the electrode portion are fixedly connected to the first substrate 30 and the second substrate 32, and the connection portion 310 and the actuation portion 311 are coupled to each other. The electrode portion is disposed adjacent to the actuation portion 311 and is in electrical communication with the control chip 2 to drive the actuation portion 311. Preferably, a gap is left between the electrode portion and the actuating portion 311.

Of course, the connection portion 310 and the electrode portion may be fixedly connected to only the first substrate 30 or the second substrate 32.

The device layer 31 may be configured as a micromechanical structure such as a resonator, beam, arm, electrostatic motor, or the like. The first substrate 30 and the second substrate 32 may have a variety of dielectric materials used to form integrated circuits. The chemical may outgas from the dielectric material into the cavity. The gas can change the environment around the MEMS package and affect the operation of the MEMS package.

The connection portion 310 and the electrode portion are eutectic-bonded to the first substrate 30 and the second substrate 32 via an anchor point. Eutectic bonding, i.e., the bonding of two specific metals, commonly used metal configurations include, but are not limited to, al-Ge (aluminum germanium), au-Ge (gold germanium), au-Si (gold silicon).

The top surface of the second substrate 32 facing away from the device layer 31 is opened with a groove 320, that is, the opening direction of the groove 320 is away from the top surface of the device layer 31 in the second substrate 32. The number of the grooves 320 may be one or more.

The package 4 is made of a plastic package material, and encapsulates the substrate 1, the control chip 2 and the device chip 3 therein, and the package 4 fills the groove 320. Substrate 1 is exposed at least at its bottom for electrically communicating the MEMS package structure with external circuitry.

With the device layer 31 as a boundary, when the temperature changes, especially when the temperature changes drastically, the mems package structure as a whole is prone to generate downward bending deformation relative to the device layer 31, which is mainly due to the larger volume of the lower portion of the package body 4 and generates larger shrinkage force, and the bending deformation is transmitted to the second substrate 32 on the top. Therefore, if the package 4 in the partial area of the upper portion of the second substrate 32 is appropriately enlarged, the reverse contraction force of the upper portion of the package 4 can be increased.

Thus, at least one groove 320 is formed on the top surface of the second substrate 32 facing away from the device layer 31, and the package 4 fills the groove 320, so that the package 4 in the upper partial area of the second substrate 32 is increased.

In this embodiment, the recess 320 is one, which is located at a middle position of the top surface of the second substrate 32. The thickness of the first substrate 30 is 100um, and the thickness of the second substrate 32 is 100um. The groove 320 is rectangular, the length and width of the groove are both 500um, and the depth is 30um.

The groove 320 and the package 4 form the above-mentioned limited structure, the plastic package material of the package 4 is filled in the groove 320, the volume of the package 4 in the upper partial area of the second substrate 32 is properly increased, when the temperature changes, especially when the temperature changes violently, the reverse shrinkage force on the upper portion of the package 4 can be increased, and the deformation of the device chip 3 is reduced.

The conventional package 4 mainly includes epoxy-based package glue, silicone-based package glue, polyurethane package glue, ultraviolet light curing package glue or a combination thereof. The color of the packaging adhesive can be transparent and colorless, and can also be made into almost any color according to the requirement. The epoxy packaging adhesive is generally rigid and hard, most of the epoxy packaging adhesive is two-component and needs to be blended for use, and the other few of the epoxy packaging adhesive is single-component and can be cured only by heating. The organic silicon packaging adhesive is almost soft and elastic and is the same as epoxy, wherein most of the organic silicon packaging adhesive is double-component and needs to be blended for use, and a small part of the organic silicon packaging adhesive is single-component and can be cured only by heating.

It is understood that the rectangular groove 320 has a length and width of 500um and a depth of 30um. The length, width and depth of the grooves 320 may also be other suitable dimensions. The groove 320 may also be configured to be circular, oval or irregular, and is not limited herein.

Referring to fig. 3, fig. 3 is a first schematic cross-sectional view of a mems package structure according to a second embodiment of the present application.

The second embodiment is further improved on the basis of the structure of the first embodiment. The improvement is that the package 4 includes a first package 40 and a second package 41. The first package 40 packages the substrate 1, the control chip 2, and the device chip. The second package 41 is disposed on the top surface of the first package 40 in a protruding manner, the second package 41 is located right above the device chip 3 and packages the device chip 3, and the periphery of the second package is located within the edge of the first package 40.

The first package body 40 and the second package body 41 are rectangular, and the bottom surface of the second package body 41 is coplanar with the top surface of the first package body 40. The first package body 40 and the second package body 41 are stepped, and the side surface of the second package body 41 is perpendicular to the top surface of the first package body 40. A thickness difference is formed between the portion of the top surface of the first package body 40 surrounding the second package body 41 and the second package body 41, so that the thickness of the portion of the top surface of the first package body 40 surrounding the first package body 40 is reduced, and the periphery of the top of the first package body 40 is properly thinned. The second package 41 fills the recess 320.

The second package 41 fills the recess 320, thereby increasing the package 4 in the upper partial area of the second substrate 32. In addition, when the temperature changes, especially when the temperature changes drastically, the contraction force of the second package 41 on the device chip 3 is reduced, that is, the contraction force of the package 4 on the device chip 3 is reduced, so that the deformation amount of the device chip 3 is reduced, and the normal operation of the device chip is not affected.

In the present embodiment, the thickness of the first substrate 30 is 100um, the thickness of the second substrate 32 is 100um, and the thickness of the second package 41 is 50um (the distance between the surface of the second package 41 facing away from the first package 40 and the top surface of the first package 40 is the thickness of the second package 41). The second package 41 is rectangular, and has a length and a width of 1000um. Of course, the second package 41 may have other shapes such as a circular shape and an oval shape as long as the thickness of the second package 41 is ensured to be 50um. Recess 320 is the rectangle, and its length and width are 500um, and the degree of depth is 30um.

On the premise of ensuring that the thickness of the second package 41 is 50um, a thickness difference is formed between the portion of the top surface of the first package 40 surrounding the second package 41 and the second package 41, so that the thickness of the portion of the top surface of the first package 40 surrounding the second package 41 is reduced, and the periphery of the top of the first package 40 is properly thinned.

In addition, it may be defined that the second package 41 is formed by protruding the top surface of the first package 40, the second package 41 is located right above the device chip 3 and encapsulates the device chip 3, and the second package 41 fills the groove 320. The first package body 40 and the second package body 41 are transited by a slope or an arc, as shown in fig. 4 and 5.

The groove 320, the second package body 41 and the portion of the top surface of the first package body 40 surrounding the second package body 41 form the above-mentioned limiting structure, the plastic packaging material of the package body 4 is filled in the groove 320, the volume of the package body 4 in the upper partial area of the second substrate 32 is properly increased, when the temperature changes, especially when the temperature changes violently, the reverse shrinkage force on the upper portion of the package body 4 can be increased, and the deformation of the device chip 3 is reduced by combining the second package body 41.

Furthermore, the whole MEMS packaging structure is axisymmetric with the central axis thereof as a symmetry axis.

Referring to fig. 6, fig. 6 is a first schematic cross-sectional view of a mems package structure according to a third embodiment of the present application.

A third embodiment is further improved on the basis of the structure of the second embodiment described above. The improvement resides in the elimination of the groove 320. The package 4 is still configured in the same structure as the second embodiment.

The package 4 includes a first package 40 and a second package 41. The first package 40 packages the substrate 1, the control chip 2, and the device chip. The second package 41 is disposed on the top surface of the first package 40 in a protruding manner, the second package 41 is located right above the device chip 3 and packages the device chip 3, and the periphery of the second package is located within the edge of the first package 40.

The first package body 40 and the second package body 41 are rectangular, and the bottom surface of the second package body 41 is coplanar with the top surface of the first package body 40. The first package body 40 and the second package body 41 are stepped, and the side surface of the second package body 41 is perpendicular to the top surface of the first package body 40. A thickness difference is formed between the part of the top surface of the first packaging body 40 surrounding the second packaging body 41 and the second packaging body 41, so that the thickness of the part of the top surface of the first packaging body 40 surrounding the first packaging body 40 is reduced, the periphery of the top of the first packaging body 40 is properly thinned, when the temperature changes, particularly when the temperature changes violently, the contraction force of the second packaging body 41 on the device chip 3 is reduced, the deformation of the device chip 3 is reduced, and the normal operation of the device chip is not influenced.

In the present embodiment, the thickness of the first substrate 30 is 100um, the thickness of the second substrate 32 is 100um, and the thickness of the second package 41 is 50um (the distance between the surface of the second package 41 facing away from the first package 40 and the top surface of the first package 40 is the thickness of the second package 41). The second package 41 is rectangular, and both the length and the width of the second package are 1000um. Of course, the second package 41 may have other shapes such as a circle and an ellipse, as long as the thickness of the second package 41 is ensured to be 50um.

In addition, it may be defined that the second package 41 is formed by raising the top surface of the first package 40, the second package 41 is located right above the device chip 3 and packages the device chip 3, and the second package 41 fills the groove 320. The first package body 40 and the second package body 41 are connected by a slope or an arc, as shown in fig. 7 and 8.

The second package 41 and the portion of the top surface of the first package 40 surrounding the second package 41 form the above-mentioned limiting structure, so that when the temperature changes, especially when the temperature changes dramatically, the reverse shrinkage force on the upper portion of the package 4 can be increased, and the deformation of the device chip 3 is reduced in combination with the second package 41.

Preferably, at least one Through-Silicon Via (TSV) 321 is formed Through the second substrate 32, and the control chip 2 forms signal conduction with the electrode portion Through the TSV 321 to control the action of the actuating portion 311.

Referring to fig. 9, fig. 9 is a partial schematic view of a mems package structure according to an embodiment of the present application.

The actuator portion 311 is configured as a ring resonator, the electrode portion includes a driving electrode 312 and a sensing electrode 313, the sensing electrode 313 is disposed in the ring resonator with a first gap 3111 therebetween, and the driving electrode 312 surrounds the ring resonator with a second gap 3112 therebetween.

The drive electrodes 312 are connected to a drive circuit to induce the ring resonator to oscillate or vibrate, wherein the oscillation or vibration has one or more resonant frequencies.

The sensing electrode 313 is connected with a sensing circuit to sense, sample and/or detect a signal having one or more resonant frequencies.

The drive electrodes 312 and sense electrodes 313, drive circuitry and sense circuitry may be of conventional well-known types or may be any type and/or shape of electrodes now known or later developed. Further, physical electrode mechanisms may include, for example, capacitance, piezoresistive, piezoelectric, inductive, magnetoresistive, and thermal.

Thus, the MEMS packaging structure is configured as a MEMS oscillator, which is taken as a simulation object, and the material parameters are referred to the table I.

TABLE 1 materials parameters for MEMS packaging structures

Material	Modulus of elasticity	Poisson ratio	Coefficient of thermal expansion (1/K)
				Si	162	0.27	2.6e ^-6
SiO ₂	73	0.17	4e ^-7
				Cu	110	0.34	1.8e ^-5
Epoxy resin	24.6	0.136	1.55e ^-5

In the packaging process of the MEMS packaging structure, the whole assembly is cured at a high temperature of 130 ℃ to be used as a colloid of a packaging body (the colloid can be considered to be in a 0 stress state at the moment), and then the normal temperature is recovered; after that, the Surface Mount Technology (SMT) is an abbreviation or abbreviation of Surface Mount Technology, and it means that a Surface Mount Device (SMD) is attached to the Surface of a PCB (or its board) by certain processes, equipment, and materials, and then soldering, cleaning, and testing are performed to finally complete the assembly.

The modulus of elasticity is: dividing the stress in the unidirectional stress state by the strain in the direction; generally speaking, when an external force is applied to an elastic body, the elastic body can change its shape (called "deformation"); in the elastic deformation stage of the material, the stress and the strain are in a proportional relation (namely, the material conforms to Hooke's law), and the proportionality coefficient of the material is called elastic modulus. The elastic modulus is a physical quantity describing elasticity of a substance, and is a general term, and means may be "young's modulus", "shear modulus", "bulk modulus", or the like.

The poisson ratio is: the ratio of transverse positive strain to axial positive strain, also called transverse deformation coefficient, when the material is unidirectionally pulled or pressed, is an elastic constant reflecting the transverse deformation of the material.

The thermal expansion coefficient is: is a physical quantity that measures the degree of thermal expansion of a solid material. Is the relative change of the length or volume of an object with unit length and unit volume when the temperature rises by 1 ℃. Can be expressed as an average linear expansion coefficient alpha or an average volume expansion coefficient beta.

Simulation calculation conditions: the temperature of the whole body is reduced from 130 ℃ to 25 ℃, and the temperature is reduced to 105 ℃. Simulation means that specific parameters are set in a specific model, and then relevant index values are detected and changes of the relevant index values are analyzed. The method is one of production process types and mainly comprises real-time visualization of a complex process and real-time processing of a complex geometric model.

Table 2 is a table of values of electrode deformation in mems package structures of the prior art and various embodiments; FIG. 10 is an in-plane deformation diagram of a first gap in a MEMS package structure of the prior art and in accordance with various embodiments of the present application; FIG. 11 is a diagram of second gap in-plane deformation in a MEMS package structure of the prior art and in accordance with various embodiments of the present application; FIG. 12 is a diagram of a prior art and various embodiments of first gap warp deformation in a MEMS package structure; FIG. 13 is a diagram of second gap warp deformation in MEMS package structures of the prior art and various embodiments.

Table 2 is a table of values of electrode deformation in MEMS package structures of the prior art and various embodiments

Referring to table 2, fig. 10, fig. 11, fig. 12, and fig. 13, it can be seen that:

1. relative to the prior art, the first gap 3111 of the first embodiment is reduced by 7% in-plane deformation and the second gap 3112 is reduced by 5% in-plane deformation; the first gap 3111 is reduced in warp deformation by 12%, and the second gap 3112 is reduced in warp deformation by 10%.

2. With respect to the prior art, the first gap 3111 of the second embodiment is reduced in-plane deformation by 32%, and the second gap 3112 is reduced in-plane deformation by 29%; the first gap 3111 is reduced in warp deformation by 16%, and the second gap 3112 is reduced in warp deformation by 19%.

3. With respect to the prior art, the first gap 3111 of the third embodiment is reduced in-plane deformation by 14%, and the second gap 3112 is reduced in-plane deformation by 13%; the first gap 3111 is reduced in warp deformation by-3% and the second gap 3112 is reduced in warp deformation by 2%.

The first, second, and third embodiments have both a significantly reduced in-plane deformation of the first clearance and a significantly reduced in-plane deformation of the second clearance relative to the prior art; both the first and second embodiments have a significant reduction in both the first and second gap warp deformations relative to the prior art.

The first, second and third embodiments all have significantly reduced overall deformation relative to the prior art.

In summary, in combination with the actual packaging process flow, the shape of the package 4 in the mems package structure is optimized, and particularly, the package 4 above the device layer 31 is optimized, so as to better reduce the deformation influence of the package 4 on the device layer 31 and significantly reduce the deformation of the device layer 31.

In the description of the present application, the description of the terms "one embodiment," "another embodiment," and the like, means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the application. In this specification, the schematic representations of the terms used above do not necessarily refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.

The above embodiments are merely examples and are not intended to limit the scope of the present disclosure, and all modifications, equivalents, and flow charts using the contents of the specification and drawings of the present disclosure or those directly or indirectly applied to other related technical fields are intended to be included in the scope of the present disclosure.

Claims

1. A micro electro mechanical system packaging structure comprises a substrate, a control chip, a device chip and a packaging body, wherein the substrate, the control chip and the device chip are stacked from top to bottom and are mutually and electrically communicated, and the packaging body is used for packaging the substrate, the control chip and the device chip.

2. The mems package structure of claim 1, wherein the package includes a first package and a second package, the first package encapsulating the substrate, the control chip, and the device chip; the second packaging body is arranged on the top surface of the first packaging body in a protruding mode, the second packaging body is located right above the device chip and packages the device chip, and the periphery of the second packaging body is located inside the edge of the first packaging body.

3. The mems package structure of claim 2, wherein a distance between a surface of the second package body facing away from the first package body and a top surface of the first package body is a thickness of the second package body, and the thickness of the second package body is 50um.

4. The mems package structure of any one of claims 1-3, wherein the device die includes first and second substrates spaced apart from each other and facing each other, and a device layer disposed between the first and second substrates, wherein the first substrate is fixedly connected to a top surface of the control die remote from the base plate, and the device layer is in electrical communication with the control die.

5. The mems package structure of claim 4 wherein the second substrate has at least one recess formed in a top surface thereof facing away from the device layer, the recess being filled with the encapsulant.

6. The mems package structure of claim 5 wherein the recess is configured as a rectangular recess.

7. The mems package structure of claim 6 wherein the recess has a length and width of 500um and a depth of 30um.

8. The mems package structure of claim 4, wherein the device layer comprises a connection portion, an actuation portion, and an electrode portion, the connection portion and the electrode portion being fixedly connected to the first substrate and/or the second substrate, the actuation portion and the connection portion being coupled to each other; the electrode part is arranged adjacent to the actuating part and is electrically communicated with the control chip so as to drive the actuating part.

9. The mems package structure of claim 8, wherein the connection portion and the electrode portion are eutectic bonded to the first substrate and/or the second substrate via an anchor point.

10. The mems package structure of claim 1 wherein the encapsulant is configured as an epoxy-based encapsulant, a silicone-based encapsulant, a polyurethane encapsulant, an uv light-cured encapsulant, or a combination thereof.