CN115527483A

CN115527483A - Pixel circuit, control method thereof and display device

Info

Publication number: CN115527483A
Application number: CN202211149494.0A
Authority: CN
Inventors: 蒋伟信; 赵爽; 康皓炜; 王晓静; 王强; 胡乃威; 兰博骁
Original assignee: Beijing Eswin Computing Technology Co Ltd
Current assignee: Beijing Eswin Computing Technology Co Ltd
Priority date: 2022-09-21
Filing date: 2022-09-21
Publication date: 2022-12-27

Abstract

The application discloses a pixel circuit, a control method thereof and a display device, wherein the pixel circuit comprises: a light emitting element; the data reading module controls whether to generate the driving current according to the light-emitting control signal and controls the magnitude of the driving current according to the gray scale voltage and the scanning signal; the mode control module outputs a mode control signal according to the gray scale voltage and the set voltage; the data writing module receives the driving current according to the light-emitting control signal, controls the output mode of the driving current according to the mode control signal, and when the gray scale voltage is greater than the set voltage, the mode control signal is the light-emitting control signal and continuously outputs the driving current to the light-emitting element; when the gray scale voltage is less than the set voltage, the mode control signal is a pulse width modulation signal and outputs a driving current to the light emitting element in a pulse mode. According to the display device, the mode control module is additionally arranged in the pixel circuit, and the driving current is provided for the light-emitting element in a PWM or PAM control mode according to the gray scale voltage and the set voltage, so that the display effect is improved.

Description

Pixel circuit, control method thereof and display device

Technical Field

The application relates to the technical field of display, in particular to a pixel circuit, a control method thereof and a display device.

Background

With the continuous development and progress of modern display technology, the requirements of electronic products on human-computer interaction are gradually increased, and the LED display screens are widely applied in more and more use scenes. However, as the user demands higher display effect, the LED display technology has been shifted from the conventional display to the Mini LED display or even the Micro LED display.

At present, when a PAM (Pulse Amplitude Modulation) control method is used to drive light emitting elements in a display device to achieve gray scale display, especially when relatively low gray scale display is achieved, a relatively low current is applied to the light emitting elements, and then the luminance difference is large, so that a phenomenon of uneven luminance (Mura) occurs. Further, as shown in fig. 1a, 1b, and 1c, the smaller the driving current applied to the Mini LEDs of the three colors, the larger the difference in luminance. When a PWM (Pulse Width Modulation) control method is used to drive a light emitting element in a display device to realize gray scale display, especially when relatively high gray scale display is realized, the high transient luminance may cause visual fatigue and a certain flicker. That is, the display effect of the display device is poor due to the adoption of the two control methods.

Disclosure of Invention

In order to solve the above technical problem, the present application provides a pixel circuit, a control method thereof, and a display device, so as to improve a display effect.

In a first aspect, an embodiment of the present application provides a pixel circuit, including:

a light emitting element;

the data reading module controls whether to generate the driving current according to the light-emitting control signal and controls the magnitude of the driving current according to the gray scale voltage and the scanning signal;

the mode control module selects one of the light-emitting control signal and the pulse width modulation signal to be output as a mode control signal according to the gray scale voltage and the set voltage;

a data writing module for receiving the driving current according to the light-emitting control signal and controlling the output mode of the driving current according to the mode control signal,

when the gray scale voltage is greater than the set voltage, the mode control signal is the light-emitting control signal, and the data writing module continuously outputs the driving current to the light-emitting element; when the gray scale voltage is smaller than the set voltage, the mode control signal is the pulse width modulation signal, and the data writing module outputs the driving current to the light emitting element in a pulse mode.

Optionally, the mode control module includes:

a first comparator, wherein a first input end receives the gray scale voltage, a second input end receives the set voltage, and an output end outputs a first mode signal;

the input end of the phase inverter is connected with the output end of the first comparator, and the output end of the phase inverter outputs a second mode signal;

a first transistor turned on when the first mode signal is in an active level state to output the pulse control signal; and

a second transistor turned on to output the light emission control signal when the second mode signal is in an active level state,

wherein the first transistor and the second transistor are both PMOS transistors or NMOS transistors.

Optionally, the data reading module includes:

a storage capacitor connected between a supply voltage and a first node;

a third transistor, wherein a control end receives the scanning signal, and a first end receives the gray scale voltage;

a fourth transistor, a control terminal of which is connected to the first node, and a first terminal of which is connected to the second terminal of the third transistor;

a fifth transistor, having a control terminal receiving the scan signal, a first terminal connected to the second terminal of the fourth transistor and providing the driving current, and a second terminal connected to the first node; and

and the control end of the sixth transistor receives the light-emitting control signal, the first end of the sixth transistor receives the power supply voltage, and the second end of the sixth transistor is connected with the first end of the fourth transistor.

Optionally, the data writing module includes:

a seventh transistor, a control terminal receiving the light emission control signal, and a first terminal receiving the driving current; and

and a control end of the eighth transistor receives the mode control signal, a first end of the eighth transistor is connected with a second end of the seventh transistor, and a second end of the eighth transistor is connected with the light-emitting element.

Optionally, the method further comprises:

and the resetting module is used for resetting the storage capacitor and the light-emitting element before the data reading module provides the driving current.

Optionally, the reset module includes:

a ninth transistor, having a control terminal receiving a reset signal, a first terminal connected to the first node, and a second terminal receiving a reference negative voltage; and

and a tenth transistor having a control terminal receiving the reset signal, a first terminal receiving the reference negative voltage, and a second terminal connected to the light emitting element.

Optionally, the mode control module includes:

a second comparator, wherein the first input end receives the gray scale voltage, the second input end receives the setting voltage, and the output end outputs a third mode signal;

an eleventh transistor turned on when the third mode signal is in an active level state to output the light emission control signal; and

a twelfth transistor turned on to output the pulse control signal when the third mode signal is in an inactive level state,

wherein the eleventh transistor and the twelfth transistor are a PMOS transistor and an NMOS transistor, or an NMOS transistor and a PMOS transistor.

In a second aspect, an embodiment of the present application provides a method for controlling a pixel circuit, where the method includes:

controlling whether to generate a driving current according to the light emitting control signal, wherein the magnitude of the driving current is controlled by the gray scale voltage and the scanning signal;

receiving the driving current according to the light emission control signal and controlling an output mode of the driving current according to the mode control signal,

wherein, according to the gray scale voltage and the setting voltage, one of the light-emitting control signal and the pulse width modulation signal is selected to be output as a mode control signal, and when the gray scale voltage is greater than the setting voltage, the mode control signal is the light-emitting control signal to continuously output the driving current to the light-emitting element; when the gray scale voltage is smaller than the set voltage, the mode control signal is the pulse width modulation signal to output the driving current to the light-emitting element in a pulse mode.

Optionally, before controlling whether to generate the driving current according to the light-emitting control signal, the method further comprises:

resetting the storage capacitor and the light emitting element.

In a third aspect, an embodiment of the present application provides a display device, including:

a pixel circuit as described above, or a pixel circuit for performing the control method.

The pixel circuit, the control method thereof and the display device provided by the application have the advantages that the mode control module is additionally arranged in the pixel circuit, the judgment is carried out according to the gray scale voltage and the set voltage, the driving current is provided for the light-emitting element in the PWM control mode or the PAM control mode, on the premise that other external control signals are not introduced into the pixel circuit, the control mode for writing the driving current into the light-emitting element can be determined only according to the gray scale voltage and the set voltage, the display effect is improved, additional data lines cannot be introduced to be connected with the pixel circuit due to the addition of other external signals, and the wiring complexity of a display panel is reduced.

It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the application.

Drawings

FIG. 1a shows a waveform schematic of the rate of change of Red Mini LED with time-brightness at different drive currents; FIG. 1b shows a schematic waveform of the time-luminance rate of change of Green Mini LED at different driving currents; FIG. 1c shows a waveform schematic of the rate of change of the Blue Mini LED with time-brightness at different drive currents;

FIG. 2 is a schematic diagram illustrating a structure of a display device provided in an embodiment of the present application;

FIG. 3 is a schematic diagram of a pixel circuit in a display device according to an embodiment of the present application;

FIG. 4 is a timing diagram of a pixel circuit in a display device according to an embodiment of the application;

FIG. 5 is a schematic circuit diagram of a mode control module in a pixel circuit according to an embodiment of the present disclosure;

fig. 6 is a schematic flowchart illustrating a control method for a pixel circuit in a display device according to an embodiment of the present disclosure.

Detailed Description

To facilitate an understanding of the present application, the present application will now be described more fully with reference to the accompanying drawings. Preferred embodiments of the present application are shown in the drawings. This application may, however, be embodied in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.

At present, in the industry, the light emitting elements are driven in different control modes under different gray scales to realize gray scale display, so that the display effect is improved. Then, when different gray scale displays are implemented by using different control modes, at least one control signal indicating a display mode (for example, a relatively high gray scale display or a relatively low gray scale display) needs to be additionally provided by the external driving circuit, and then the corresponding control mode is selected to control the pixel circuit to implement the corresponding gray scale display. However, the driving control method introduces a new external control signal, and accordingly, one data line needs to be added for each pixel circuit to be connected to the external driving circuit, which undoubtedly increases the wiring complexity of the display panel. The application provides a pixel circuit, can also promote display effect simultaneously neither increase display panel's wiring complexity.

Fig. 2 shows a schematic structural diagram of a display device provided according to an embodiment of the present application. Fig. 3 shows a schematic diagram of a pixel circuit in a display device provided according to an embodiment of the present application. Fig. 4 shows a timing diagram of a pixel circuit in a display device according to an embodiment of the present application. Fig. 5 is a schematic circuit diagram of a mode control module in a pixel circuit according to an embodiment of the present disclosure.

Referring to fig. 2, the display device 1000 includes a display panel 1100, a data driving circuit 1200, and a scan driving circuit 1300. The display device 1000 in this embodiment will be described by taking a Mini LED (sub-millimeter light emitting diode) display device as an example. In other embodiments, the display device may also be a Micro LED (Micro Light Emitting Diode) display device, an OLED (Organic Light-Emitting Diode) display device, or a Micro OLED (Micro Organic Light Emitting Diode) display device.

The display panel 1100 includes a plurality of pixel circuits 1110 arranged in an array.

The Data driving circuit 1200 is used to supply gray-scale voltage Data to each pixel circuit 1110.

The scan driving circuit 1300 is used to supply a scan signal Gs and a reset signal Gs to each pixel circuit 1110 to control resetting and scanning the pixel circuits 1110.

Further, the pixel circuits 1110 located in the same row, for example, share and are driven by one scan driving unit in the scan driving circuit 1300. The pixel circuits 1110 located in the same column, for example, share and are driven by one data driving unit in the data driving circuit 1200.

Referring to fig. 3, the pixel circuit 1110 includes a light emitting device D, a data reading module 1111, a mode control module 1112, and a data writing module 1113.

The Data reading module 1111 controls whether to generate the driving current according to the emission control signal EM and controls the magnitude of the driving current according to the gray scale voltage Data and the scanning signal Gr. Further, the data reading module 1111 includes a storage capacitor Cs, a transistor M3, a transistor M4, a transistor M5 and a transistor M6. The storage capacitor Cs is connected between the supply voltage VDD and the first node a. The control terminal of the transistor M3 receives the scan signal Gs, and the first terminal of the transistor M3 receives the gray-scale voltage Data. A control terminal of the transistor M4 is connected to the first node a, and a first terminal of the transistor M4 is connected to a second terminal of the transistor M3. A control terminal of the transistor M5 receives the scan signal Gs, a first terminal of the transistor M5 is connected to a second terminal of the transistor M4 and provides a driving current, and a second terminal of the transistor M5 is connected to the first node a. The control terminal of the transistor M6 receives the light emission control signal EM, the first terminal of the transistor M6 receives the supply voltage VDD, and the second terminal of the transistor M6 is connected to the first terminal of the transistor M4. The transistors M3, M4, M5, and M6 are all NMOS transistors, for example. The initial state of the first node a before the data reading module 1111 supplies the driving current is, for example, a low level. The control terminal is a grid electrode of the transistor, and the first terminal and the second terminal are respectively a source electrode and a drain electrode or a drain electrode and a source electrode of the transistor.

The mode control module 1112 selects one of the emission control signal EM and the pulse width modulation signal Hf to be output as the mode control signal Ctrl0 according to the gray-scale voltage Data and the setting voltage Vref. Further, the mode control module 1112 includes a first comparator U1, an inverter U2, a transistor M1, and a transistor M2. The first input end of the first comparator U1 receives the gray scale voltage Data, the second input end of the first comparator U1 receives the setting voltage Vref, and the output end of the first comparator U1 outputs the first mode signal Ctrl1. Illustratively, the positive phase power terminal of the first comparator U1 receives the voltage VGH, the negative phase power terminal of the first comparator U1 receives the voltage VGL, the first input terminal is a positive phase input terminal, and the second input terminal is a negative phase input terminal, so that when the gray scale voltage Data is greater than the setting voltage Vref, the first mode signal Ctrl1 is at a high level, and when the gray scale voltage Data is less than the setting voltage Vref, the first mode signal Ctrl1 is at a low level. The input end of the inverter U2 is connected to the output end of the first comparator U1, and the output end of the inverter U2 outputs the second mode signal Ctrl2. Wherein, the level state of the first mode signal Ctrl1 is opposite to the level state of the second mode signal Ctrl2. The transistor M1 is turned on to output the pulse control signal Hf when the first mode signal Ctrl1 is at an active level state. The second transistor M2 is turned on to output the emission control signal EM when the second mode signal Ctrl2 is in an active level state. Wherein the transistor M1 and the transistor M2 are of the same type. Specifically, the control terminal of the transistor M1 receives the first mode signal Ctrl1, the first terminal of the transistor M1 receives the pulse control signal Hf, the control terminal of the transistor M2 receives the second mode signal Ctrl2, the first terminal of the transistor M2 receives the emission control signal EM, and the second terminal of the transistor M1 is connected to the second terminal of the transistor M2 to output one of the emission control signal EM and the pulse control signal Hf as the mode control signal Ctrl0. Further, the transistor M1 and the transistor M2 are PMOS transistors, and the first mode signal Ctrl1 and the second mode signal Ctrl2 are both valid at a low level. That is, when the gray-scale voltage Data is greater than the setting voltage Vref, the first mode signal Ctrl1 is at a high level (in an inactive level state) to control the switch transistor M1 to be turned off, and the second mode signal Ctrl2 is at a low level (in an active level state) to control the switch transistor M2 to be turned on, so that the emission control signal EM is output as the mode control signal Ctrl0. When the gray-scale voltage Data is smaller than the set voltage Vref, the first mode signal Ctrl1 is at a low level (active level state) to control the switching tube M1 to be turned on, and then the pulse control signal Hf is output as the mode control signal Ctrl0, and the second mode signal Ctrl2 is at a high level (inactive level state) to control the switching tube M2 to be turned off.

In other embodiments, when the transistor M1 and the transistor M2 may also be NMOS transistors, for example, and the first mode signal Ctrl1 and the second mode signal Ctrl2 are both valid at a high level, correspondingly, the first input terminal of the first comparator U1 is an inverting input terminal, and the second input terminal of the first comparator U1 is a non-inverting input terminal.

The data writing module 1113 receives the driving current according to the emission control signal EM and controls the output mode of the driving current according to the mode control signal Ctrl0. Further, the data writing module 1113 comprises a transistor M7 and a transistor M8. The control terminal of the transistor M7 receives the light emission control signal EM, and the first terminal of the transistor M7 is connected to the data reading module 1111 to receive the driving current. The control terminal of the transistor M8 receives the mode control signal Ctrl0, the first terminal of the transistor M8 is connected to the second terminal of the transistor M7, and the second terminal of the transistor M8 is connected to the first terminal of the light emitting element D. The transistors M7 and M8 are NMOS transistors, for example. Here, the transistor M7 transmits the driving current when the emission control signal EM is in an active level state (low level), and the transistor M7 does not transmit the driving current when the emission control signal EM is in an inactive level state (high level). The emission control signal EM is in an active level state in the emission stage of the pixel circuit 1110, and is in an inactive level state in other stages. Further, when the transistor M7 transmits the driving current when the emission control signal EM is in an active level state (low level), and when the mode control signal Ctrl0 is the emission control signal EM, the transistor M8 is controlled to be continuously turned on, and thus the driving current is continuously output to the light emitting element D; when the mode control signal Ctrl0 is the pulse control signal Hf, the control transistor M8 is intermittently turned on to output the driving current to the light emitting element D in a pulse manner.

The light emitting element D is a Mini LED, and the second end of the light emitting element D is connected with a power supply voltage VSS. In other embodiments, the light emitting element D may be a light emitting element such as a Micro LED.

In other embodiments, the pixel circuit 1110 further includes a reset module 1114 for resetting the storage capacitor Cs and the light emitting element D before the data reading module 1111 provides the driving current. Further, the reset module includes a transistor M9 and a transistor M10. A control terminal of the transistor M9 receives the reset signal Gr, a first terminal of the transistor M9 is connected to the first node a, and a second terminal of the transistor M9 receives the reference negative voltage Vinit. A control terminal of the transistor M10 receives the reset signal Gr, a first terminal of the transistor M10 receives the reference negative voltage Vinit, and a second terminal of the transistor M10 is connected to the first terminal of the light emitting element D. Further, before the data reading module 1111 provides the driving current, the reset signal Gr controls the transistors M9 and M10 to be turned on for an active level state, thereby pulling the voltages at the first node a and the first terminal of the light emitting diode D low to reset to an initial state. The transistors M9 and M10 are NMOS transistors, for example.

The scan signal Gs and the reset signal Gr are supplied from the scan driving circuit 1300, the gray-scale voltage Data is supplied from the Data driving circuit 1200, and the emission control signal EM and the pulse control signal Hf are supplied from an external main control circuit, for example. The setting voltage Vref can be set according to actual requirements, when the gray scale voltage Data is larger than the setting voltage Vref, the pixel circuit works in a high gray scale display mode, and when the gray scale voltage Data is smaller than the setting voltage Vref, the pixel circuit works in a low gray scale display mode.

Referring to fig. 4, the pixel circuit 1110 includes at least the following stages in one frame display period.

In the reset phase t1, the reset signal Gr is in an active level state (low level), the transistors M9 and M10 in the reset module 1114 are turned on, the voltages at the first node a and the first end of the light emitting diode D are pulled down to be reset to the initial state, and other modules do not work in this phase.

Next, in the data reading phase t2, the reset signal Gr is in an inactive level state (high level), and the transistors M9 and M10 in the reset module 1114 are turned off. The scanning signal Gs becomes an active level state (low level), and the emission control signal EM is still in an inactive level state (high level) at this time. Correspondingly, the transistors M3, M4, and M5 in the data reading module 1111 are turned on, and the transistor M6 is turned off. At this stage, the gray-scale voltage Data is read through the transistor M3, and the first node a is charged through the transistor M4 and the transistor M5, thereby controlling the current flowing through the transistor M4. That is, the data reading module 1111 supplies the driving current when the emission control signal EM is at the inactive level state. Further, the transistor M7 of the data writing module 1113 turns off the non-receiving driving current based on the emission control signal EM, and thus does not write the driving current into the light emitting device D.

Next, in the data writing phase (light emitting phase) t3, the reset signal Gr is in an inactive level state (high level), and the transistors M9 and M10 in the reset block 1114 are turned off. The scanning signal Gs becomes an inactive level state (high level), and the emission control signal EM becomes an active level state (low level). Correspondingly, the transistors M3 and M5 are turned off, and the transistor M6 is turned on to provide the driving current via the transistor M4. The transistor M7 of the data writing module 1113 is controlled to be turned on to receive the driving current based on the emission control signal EM. Further, when the gray-scale voltage Data is greater than the setting voltage Vref, the mode control module 1112 outputs the light-emitting control signal EM as the mode control signal Ctrl0, and correspondingly, controls the transistor M8 to be continuously turned on, so as to continuously output the driving current to the light-emitting element D. When the gray-scale voltage Data is smaller than the setting voltage Vref, the mode control module 1112 outputs the pulse control signal Hf as the mode control signal Ctrl0, and correspondingly, controls the transistor M8 to be intermittently turned on, so as to output the driving current to the light emitting element D in a pulse manner.

The application provides a pixel circuit among display panel through addding the mode control module, judges the display mode and shows for high grey scale display or low grey scale display according to grey scale voltage in display panel, and then provides the luminous control signal under high grey scale display mode to adopt PAM control mode to continuously write into light emitting component with driving current. And providing a pulse control signal in a low gray scale display mode to write the driving current into the light emitting element in a pulse mode by adopting a PWM control mode so as to improve the display effect. In addition, the pixel circuit can realize the driving light-emitting scheme adopting different control modes under different gray scales only through one gray scale voltage, and avoids the improvement of the wiring complexity of the display panel caused by introducing a new mode control signal.

Fig. 5 is a schematic circuit diagram of a mode control module in a pixel circuit according to an embodiment of the present disclosure.

Referring to FIG. 5, the module control module 2112 may also implement the functionality of the module control module 1112. The mode control module 2112 includes a second comparator U3, a transistor M11, and a transistor M12. A first input end of the second comparator U3 receives the gray scale voltage Data, a second input end of the second comparator U3 receives the setting voltage Vref, and an output end of the second comparator U3 outputs the third mode signal Ctrl3. Illustratively, the positive phase power terminal of the second comparator U3 receives the voltage VGH, the negative phase power terminal of the second comparator U3 receives the voltage VGL, the first input terminal is a positive phase input terminal, and the second input terminal is a negative phase input terminal, so that the third mode signal Ctrl3 is in an active level state (high level) when the gray scale voltage Data is greater than the setting voltage Vref, and the third mode signal Ctrl3 is in an inactive level state (low level) when the gray scale voltage Data is less than the setting voltage Vref. The transistor M11 is turned on when the third mode signal Ctrl3 is in an active level state to output the emission control signal EM. The transistor M12 is turned on to output the pulse control signal Hf when the third mode signal Ctrl3 is in an inactive level state. Wherein the transistor M11 and the transistor M12 are of different types. Specifically, the control terminal of the transistor M11 receives the third mode signal Ctrl3, the first terminal of the transistor M11 receives the light emission control signal EM, the control terminal of the transistor M12 receives the third mode signal Ctrl3, the first terminal of the transistor M12 receives the pulse control signal Hf, and the second terminal of the transistor M1 is connected to the second terminal of the transistor M2 to output one of the light emission control signal EM and the pulse control signal Hf as the mode control signal Ctrl0. Further, the transistor M11 is an NMOS transistor, and the transistor M12 is a PMOS transistor. That is, when the gray-scale voltage Data is greater than the setting voltage Vref, the third mode signal Ctrl3 is at a high level (active level state) to control the switching tube M11 to be turned on and the switching tube M12 to be turned off, and the emission control signal EM is output as the mode control signal Ctrl0. When the gray-scale voltage Data is smaller than the setting voltage Vref, the third mode signal Ctrl3 is at a low level (in an invalid level state) to control the switch transistor M11 to be turned off and the switch transistor M12 to be turned on, and the pulse control signal Hf is output as the mode control signal Ctrl0.

Fig. 6 is a flowchart illustrating a control method for a pixel circuit in a display device according to an embodiment of the present disclosure.

Referring to fig. 6, the control method of the pixel circuit includes the steps of:

step S200: whether the driving current is generated is controlled according to the light emitting control signal, and the magnitude of the driving current is controlled by the gray scale voltage and the scanning signal.

Step S300: receiving the driving current according to the light emitting control signal and controlling the output mode of the driving current according to the mode control signal. Further, one of the light emission control signal and the pulse width modulation signal is selected to be output as the mode control signal according to the gray scale voltage and the setting voltage. Further, when the gray scale voltage is greater than the set voltage, the mode control signal is a light emitting control signal to continuously output a driving current to the light emitting element; when the gray scale voltage is less than the set voltage, the mode control signal is a pulse width modulation signal to output the driving current to the light emitting element in a pulse mode.

In other embodiments, step S100 is also performed before step S200: resetting the storage capacitor and the light emitting element.

Finally, it should be noted that: it should be understood that the above examples are only for clarity of illustration of the present application and are not intended to limit the embodiments. Other variations and modifications will be apparent to persons skilled in the art in light of the above description. And are neither required nor exhaustive of all embodiments. And obvious variations or modifications of this invention may be made without departing from the spirit or scope of the invention.

It is also to be understood that the terms and expressions employed herein are used as terms of description and not of limitation, and that the embodiment or embodiments of the specification are not limited to those terms and expressions. The use of such terms and expressions is not intended to exclude any equivalents of the features shown and described (or portions thereof), and it is recognized that various modifications may be made which are within the scope of the claims. Other modifications, variations, and alternatives are also possible. Accordingly, the claims should be looked to in order to cover all such equivalents.

Claims

1. A pixel circuit, comprising:

a light emitting element;

when the gray scale voltage is greater than the set voltage, the mode control signal is the light emitting control signal, and the data writing module continuously outputs the driving current to the light emitting element; when the gray scale voltage is smaller than the set voltage, the mode control signal is the pulse width modulation signal, and the data writing module outputs the driving current to the light emitting element in a pulse mode.

2. The pixel circuit of claim 1, wherein the mode control module comprises:

the input end of the inverter is connected with the output end of the first comparator, and the output end of the inverter outputs a second mode signal;

3. The pixel circuit of claim 1, wherein the data reading module comprises:

a storage capacitor connected between a supply voltage and a first node;

a fifth transistor, a control terminal receiving the scan signal, a first terminal connected to a second terminal of the fourth transistor and providing the driving current, and a second terminal connected to the first node; and

4. The pixel circuit of claim 1, wherein the data writing module comprises:

5. The pixel circuit of claim 3, further comprising:

a reset module for resetting the storage capacitor and the light emitting element before the data reading module provides the driving current.

6. The pixel circuit of claim 5, wherein the reset module comprises:

7. The pixel circuit of claim 1, wherein the mode control module comprises:

a first input end of the second comparator receives the gray scale voltage, a second input end of the second comparator receives the set voltage, and an output end of the second comparator outputs a third mode signal;

8. A control method of a pixel circuit, comprising:

9. The control method according to claim 8, further comprising, before controlling whether to generate the driving current according to the light emission control signal:

resetting the storage capacitor and the light emitting element.

10. A display device, comprising:

a pixel circuit as claimed in any one of claims 1 to 7, or a pixel circuit for performing a control method as claimed in any one of claims 8 to 9.