CN115497934A - Super junction device terminal protection layout structure - Google Patents
Super junction device terminal protection layout structure Download PDFInfo
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- CN115497934A CN115497934A CN202211229220.2A CN202211229220A CN115497934A CN 115497934 A CN115497934 A CN 115497934A CN 202211229220 A CN202211229220 A CN 202211229220A CN 115497934 A CN115497934 A CN 115497934A
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- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0207—Geometrical layout of the components, e.g. computer aided design; custom LSI, semi-custom LSI, standard cell technique
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
- H01L29/063—Reduced surface field [RESURF] pn-junction structures
- H01L29/0634—Multiple reduced surface field (multi-RESURF) structures, e.g. double RESURF, charge compensation, cool, superjunction (SJ), 3D-RESURF, composite buffer (CB) structures
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Abstract
The invention provides a super junction device terminal protection layout structure, which comprises a transition area and a terminal area; the terminal area is arranged on the periphery of the transition area; the transition zone comprises: the semiconductor device comprises a first conductive type column, a second conductive type column and a second conductive type base region, wherein the first conductive type column and the second conductive type column are alternately arranged, and the second conductive type base region is formed above the first conductive type column and the second conductive type column; the layout graph of the second conductive type base region positioned at the corner part of the transition region is in a step shape, and the starting point of the table top of each step in the step shape graph is positioned on the second conductive type column. The layout structure for super junction device terminal protection provided by the invention can solve the problems that when the depletion layer of the traditional super junction device is expanded to the corner of the transition region and the corner of the terminal region, the charges on two sides of the N-type column are not uniformly depleted, the depletion layer has defects in shape, and the breakdown voltage of the device is low.
Description
Technical Field
The invention relates to the field of power semiconductor devices, in particular to a super junction device terminal protection layout structure.
Background
The on-resistance of conventional power semiconductor devices leads to a drastic increase in power consumption with an increase in withstand voltage. The occurrence of charge balance devices represented by Super-Junction (Super-Junction) devices breaks through the limitation, improves the restriction relationship between on-resistance and voltage resistance, and can simultaneously realize low-state power consumption and high-off voltage, so that the Super-Junction device can be rapidly applied to various high-energy-efficiency occasions, and has a very wide market prospect.
In the super junction device, a single conduction type material in a traditional power device is replaced by a P-type column and N-type column structure which are alternately arranged to serve as a voltage maintaining layer, and a transverse electric field is introduced into a drift region; the P-type column and the N-type column meet the charge balance condition, under reverse bias, the P-type column and the N-type column are completely exhausted, and the region can be broken down only if external voltage is greater than an internal transverse electric field, so that the voltage resistance of the region (the active region which is divided into the charge flowing region and the transition region positioned around the charge flowing region) is extremely high, and the purposes of improving breakdown voltage and reducing on-resistance can be achieved.
At present, the terminal structure of the superjunction device which is most widely applied adopts the same structure as the active region, as shown in fig. 1 and fig. 2, and is a layout structure of the superjunction device (N-type channel device) which is most widely applied, it can be seen that the terminal region also has a plurality of alternating P-type columns and N-type columns, but since the P-type base region patterns at the corners of the terminal region and the transition region are right-angled (as shown in a dashed line frame in fig. 1) or arc (as shown in a dashed line frame in fig. 2), the depletion layer at this position is prone to have defects:
due to the voltage effect of reverse breakdown, depletion is approximately expanded in a spherical shape in the whole device, for a right-angle boundary line shown in fig. 1, when a depletion layer is expanded to a sharp corner of the right-angle boundary line, the depletion form of the depletion layer can be influenced by charge concentration existing at the sharp corner, and the breakdown voltage of the super-junction device is reduced; for the arc-shaped boundary line shown in fig. 2, when the depletion layer expands to the boundary line, the P-type column at the boundary line cannot completely deplete the N-type column, which affects the formation speed and form of the depletion layer, and reduces the breakdown voltage of the superjunction device.
Disclosure of Invention
In view of the defects of the prior art, the invention aims to provide a layout structure for protecting a terminal of a super junction device, which is used for solving the problems that when a depletion layer of the existing super junction device expands to a corner of a transition region and a corner of a terminal region, the depletion of charges on two sides of an N-type column is unbalanced, the depletion layer has defects in form, and the breakdown voltage of the device is low.
In order to achieve the purpose, the invention provides a super junction device terminal protection layout structure, which comprises a transition region and a terminal region;
the terminal area is arranged on the periphery of the transition area;
the transition zone comprises: the semiconductor device comprises a first conductive type column, a second conductive type column and a second conductive type base region, wherein the first conductive type column and the second conductive type column are alternately arranged, and the second conductive type base region is formed above the first conductive type column and the second conductive type column;
and the layout graph of the second conductive type base region positioned at the corner part of the transition region is in a step shape, and the starting point of the table top of each step in the step shape is positioned on the second conductive type column.
Optionally, the starting points of the terraces of the steps of each stage form an arc together, and the opening of the arc faces the inner side of the transition zone.
Optionally, a mesa start point and a mesa end point of each step are located on a longitudinal central axis of the second conductive type pillar.
Optionally, the starting point of the mesa of the kth stage step is located on the kth second conductive type column, the end point of the mesa of the kth stage step is located on the (K + 1) th second conductive type column, and K is greater than or equal to 1.
Optionally, the layout structure further includes a charge flow region, wherein the transition region is formed between the charge flow region and the termination region; a second conductive type base region is formed on the second conductive type column in the charge flowing region, and the second conductive type base regions are formed on both the first conductive type column and the second conductive type column in the transition region.
Optionally, the layout structure further includes a stop ring, and the stop ring is located at the periphery of the terminal region.
Optionally, the length of the first conductive type pillar is the same as the length of the second conductive type pillar.
Optionally, the first conductivity type is an N-type, and the second conductivity type is a P-type.
As described above, in the layout structure of the super junction device terminal protection of the present invention, the layout pattern of the second conductivity type base region at the corner of the transition region is stepped, and the multiple steps at the corner share the charge concentration, so that compared with a right-angle layout pattern in which the charge concentration is shared by only one right angle, the influence caused by the charge concentration can be significantly reduced; and the starting point and the terminal point of the mesa of each step are positioned at the center of the second conductive type column, when the corner part and the terminal area corner part of the expansion transition area of the depletion layer are formed, the electric charges on two sides of the second conductive type column are depleted and balanced, the expansion depletion form of the depletion layer cannot be influenced, and the breakdown voltage of the super junction device cannot be reduced.
Drawings
Fig. 1 shows a layout pattern of the second conductivity type base region at the corner of the transition region in the background art as a layout structure of a right-angle super junction device terminal protection.
Fig. 2 shows a layout structure of the terminal protection in which the layout pattern of the second conductivity type base region at the corner portion of the transition region is a circular arc shape in the background art.
Fig. 3 shows a layout structure of the super junction device terminal protection according to the invention.
Fig. 4 shows an equal quarter of a layout structure for the superjunction device terminal protection according to the invention.
Fig. 5 shows a schematic perspective structure of the super junction device of the invention.
Description of component reference numerals
10. Super junction device terminal protection layout structure
Two central axes of layout structure for A-A ', B-B' super junction device terminal protection
11. Quarter equal part of layout structure for super junction device terminal protection
111. Region of charge flow
112. Transition zone
120. Terminal area
130 N type column (first conductive type column)
140 P type column (second conductive type column)
131. K-th-stage N-type column
141. K-th grade P-type column
142. K +1 th grade P type column
150 P base region (second conductive type base region)
160. Cut-off ring
Middle line of M-M' K-th-stage N-type column
Middle line of L-L' K-th P-type column
Middle line of R-R' K +1 grade P type column
Detailed Description
The embodiments of the present invention are described below with reference to specific embodiments, and other advantages and effects of the present invention will be easily understood by those skilled in the art from the disclosure of the present specification. The invention is capable of other and different embodiments and of being practiced or of being carried out in various ways, and its several details are capable of modification in various respects, all without departing from the spirit and scope of the present invention.
Please refer to fig. 3 to 5. It should be noted that the drawings provided in the present embodiment are only for illustrating the basic idea of the present invention, and the components related to the present invention are only shown in the drawings rather than drawn according to the number, shape and size of the components in actual implementation, and the type, quantity and proportion of the components in actual implementation may be changed freely, and the layout of the components may be more complicated.
The present embodiment provides a layout structure 10 for terminal protection of a superjunction device, as shown in fig. 3, the layout structure 10 includes a transition region 112 and a terminal region 120.
In this embodiment, for convenience of description, as shown in fig. 3, the layout structure 10 is divided into 4 equal parts along two central axes (an axisbase:Sub>A-base:Sub>A 'and an axis B-B') of the layout structure 10 for protecting the terminal of the superjunction device, as shown in fig. 4, and the following drawings illustrate the layout structure 10 for protecting the terminal of the superjunction device based onbase:Sub>A quarter equal part 11 located at the upper left corner as an example.
The terminal region 120 is disposed at the periphery of the transition region 112, and the transition region 112 includes: first and second conductive type pillars 130 and 140 alternately arranged, and a second conductive type base region 150 formed over the first and second conductive type pillars 130 and 140.
In this embodiment, the first conductive type pillar 130 may be an N-type pillar or a P-type pillar, the second conductive type pillar 140 may be an N-type pillar or a P-type pillar, and the conductive type of the first conductive type pillar 130 is opposite to the conductive type of the second conductive type pillar 140; taking the super-junction device with the channel region being an N-type as an example (the first conductive type column is an N-type column, and the second conductive type column is a P-type column), as shown in fig. 4, in the transition region 112 of the layout structure 10 for protecting the terminal of the super-junction device, a plurality of P-type columns 140 and a plurality of N-type columns 130 are arranged in parallel and alternately adjacent to each other, and the arrangement direction of the P-type columns and the N-type columns formed in the terminal region 120, and the lengths of the P-type columns and the N-type columns are the same as those in the transition region 112. As a preferred embodiment, the length dimension between each P-type pillar 140 and N-type pillar 130 may be the same; it should be noted that in some variant embodiments, superjunction units of other topologies are also applicable to the superjunction device of the present invention.
Specifically, the layout structure 10 for protecting the terminal of the superjunction device further includes a charge flowing region 111, wherein the transition region 112 is formed between the charge flowing region 111 and the terminal region 120; a second conductive-type base region 150 is formed on the second conductive-type pillar 140 in the charge flowing region 111, and the second conductive-type base region 150 is formed on both the first conductive-type pillar 130 and the second conductive-type pillar 140 in the transition region 120.
In this embodiment, the second conductive type base region 150 has the same conductive type as the second conductive type column 140, and is P-type conductive, so it is a P-base region (P-body); as shown in fig. 4 and 5, the region covered by diagonal line shading in the figure is a P-base region, and the P-base region is formed at the upper end of a P-type column or an N-type column by means of ion implantation or the like; as shown in fig. 4, on the charge flowing region 111, the P base region is formed only at the upper end of the P-type column (the width of the P base region is the same as that of the P-type column), it should be noted that, in some embodiments, the P base region on the charge flowing region 111 may also be slightly wider than that of the P-type column, and a partial region is formed at the upper end of the N-type column, but does not completely cover the N-type column, so that a sufficient channel region width is reserved for the super-junction device; a P base region is formed on the transition region 112 no matter the upper end of the N-type column or the upper end of the P-type column, and the P base region completely covers the P-type column and the B-type column; in the termination region 120, no P-base region is formed at either the upper end of the N-type pillar or the upper end of the P-type pillar.
The layout pattern of the second conductive type base region 140 located at the corner of the transition region 112 is stepped, and the starting point of the mesa of each step in the stepped pattern is located on the second conductive type column 140.
In this embodiment, as shown in fig. 4, the layout pattern of the P base region located at the corner of the transition region 112 is stepped, an outer line of the layout pattern of the P base region is actually a boundary between the transition region 112 and the terminal region 120, the P base region needs to be formed in the transition region 112, and the P base region does not need to be formed in the terminal region. When the layout graph of the P base region is in a step shape, charges gathered at the corners of the P base region are commonly borne by the N steps, and compared with the situation that all the charges gathered at the corners of the P base region in the graph 1 are borne by one right angle, the influence of charge concentration at the corners can be obviously reduced, and the influence of the charge concentration at the corners on the depletion form is reduced.
Specifically, the starting point and the ending point of the mesa of each step are located on the longitudinal central axis of the second conductive type pillar 150.
In the present embodiment, as shown in fig. 5, when the depletion layer extends to the corner of the transition region 112 and the termination region 120, the N-type pillar and the P-type pillar under each step can be completely depleted, and the problem of the depletion state of the depletion layer being affected by the unbalanced charge depletion on the two sides of the N-type pillar in the dashed line frame in fig. 2 does not exist. Taking the K-th step in the transition region 112 as an example, one N-type column 131 spanned by the K-th step is defined as a K-th N-type column, a center line of the K-th N-type column 131 is M, a center line of a K-th P-type column 141 immediately left of the K-th N-type column 131 is L, and a center line of a K + 1-th P-type column 142 immediately right of the K-th N-type column 131 is R; then, the distance from the central line L to the central line M is equal to the distance from the central line M to the central line R, when the depletion layer expands, the region from the central line L to the central line R can be completely depleted by taking M as the central line, and the expansion form of the depletion layer when the depletion layer expands to the corner of the transition region and the corner of the terminal region is not affected.
Specifically, the starting points of the terraces of the steps of each stage form an arc together, and the opening of the arc faces the inner side of the transition region 112.
In this embodiment, as shown in fig. 3, when the depletion layer expands in the super junction device, the depletion layer expands approximately spherically, when the number of steps is large enough, if the starting points of the terraces of the steps are all distributed on a smooth arc in sequence (as shown by a dashed curve in fig. 3), then, as shown in fig. 4, the stepped pattern formed by a plurality of tiny steps can be regarded as a smooth curve in the shape of an arc, and when the depletion layer expands to the corner of the transition region 112 and the terminal region 120, the expansion form of the depletion layer is approximately curved, so that the depletion layer continues to expand spherically, the expansion form of the depletion layer is not affected during expansion, and the breakdown voltage of the super junction device can be effectively reduced. As a preferable example, when the starting point of the mesa of the step of the kth level is located on the kth P-type column and the end point of the mesa of the step of the kth level is located on the K +1 th P-type column (K ≧ 1), the number of points forming an arc is the largest, the curve is the smoothest, and the expansion form of the depletion layer is more similar to that of the depletion layer, so that the expansion form of the depletion layer is slightly affected.
Specifically, the layout structure further includes a stop ring 160, and the stop ring 160 is located at the periphery of the terminal region 120.
In this embodiment, in the termination region 120, a stop ring 160 is further disposed outside the alternating arrangement of the N-type pillars 130 and the P-type pillars 140, and the stop ring 160 has an N-type conductivity, and is N + doped with respect to an N-type substrate, and the doping concentration is greater than 1e16cm-3.
Specifically, the length of the first conductive type pillar 130 is the same as the length of the second conductive type pillar 140.
In this embodiment, whether the regions of the kth-stage N-type column 131, the kth-stage P-type column 141, and the K + 1-stage P-type column 142 from the center line L to the center line R are completely depleted depends on the widths and concentrations of the N-type column 130 and the P-type column 140, and when the product of the width and the concentration of the N-type column 130 is equal to the product of the width and the concentration of the P-type column 140, the region from the center line L to the center line R is completely depleted and exhibits intrinsic characteristics, which is beneficial to improving the breakdown voltage of the super junction device.
The embodiment also provides a photomask and a super junction device, wherein the photomask is obtained based on the layout structure of the super junction device terminal protection, and the photomask is used for forming the second conductive type base region.
In this embodiment, due to the improvement of the layout structure of the super junction device terminal protection, in order to form a corresponding device structure, a mask applied in the manufacturing process needs to be modified correspondingly, the layout structure of the super junction device terminal protection in this embodiment actually relates to two layers of layouts, the first layer of layout is a layout layer for defining the distribution, shape and size of an N-type column and a P-type column, the second layer of layout is a layout layer for defining the distribution, shape and size of a P-base region, and the mask applied in the manufacturing process needs to be modified correspondingly according to the second layer of layout, so as to prepare and obtain the P-base region conforming to the super junction device layout in this embodiment.
The embodiment also provides a super junction device which is prepared by adopting the photomask.
In this embodiment, during the manufacturing, a substrate is provided first, and the super junction device is manufactured on the substrate by using the above mask, and therefore, the layout structure of the super junction device terminal protection is described in detail above, and is not described herein again.
In summary, in the layout structure for terminal protection of the super junction device, the layout pattern of the second conductivity type base region at the corner part of the transition region is in a step shape, the multi-stage steps at the corner part share the charge concentration, and compared with the right-angle layout pattern in which the charge concentration is only shared by one right angle, the influence caused by the charge concentration can be remarkably reduced; and the starting point and the terminal point of the mesa of each step are positioned at the center of the second conductive type column, when the depletion layer expands to the corner part of the transition region and the corner part of the terminal region, the charges on two sides of the second conductive type column are depleted and balanced, the depletion expansion form of the depletion layer cannot be influenced, and the breakdown voltage of the super junction device cannot be reduced. Therefore, the present invention has a great industrial utility value.
The foregoing embodiments are merely illustrative of the principles and utilities of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or change the above-mentioned embodiments without departing from the spirit and scope of the present invention. Accordingly, it is intended that all equivalent modifications or changes which can be made by those skilled in the art without departing from the spirit and technical spirit of the present invention be covered by the claims of the present invention.
Claims (8)
1. A layout structure for protecting a terminal of a super junction device is characterized in that the layout structure comprises a transition region and a terminal region;
the terminal area is arranged on the periphery of the transition area;
the transition zone comprises: the semiconductor device comprises a first conductive type column, a second conductive type column and a second conductive type base region, wherein the first conductive type column and the second conductive type column are alternately arranged, and the second conductive type base region is formed above the first conductive type column and the second conductive type column;
the layout graph of the second conductive type base region positioned at the corner part of the transition region is in a step shape, and the starting point of the table top of each step in the step shape graph is positioned on the second conductive type column.
2. The super junction device terminal protection layout structure according to claim 1, wherein starting points of the mesas of each stage form an arc together, and an opening of the arc faces to the inner side of the transition region.
3. The layout structure of super junction device terminal protection according to claim 1, wherein a mesa start point and a mesa end point of each step are located on a longitudinal central axis of the second conductive type column.
4. The super junction device terminal protection layout structure according to claim 1, wherein a starting point of a mesa of the kth level of the step is located on the kth second conductive type column, an end point of the mesa of the kth level of the step is located on the (K + 1) th second conductive type column, and K is greater than or equal to 1.
5. The super junction device termination protected layout structure of claim 1, further comprising a charge flow region, wherein the transition region is formed between the charge flow region and the termination region; a second conductive type base region is formed on the second conductive type column in the charge flowing region, and the second conductive type base regions are formed on both the first conductive type column and the second conductive type column in the transition region.
6. The layout structure of superjunction device terminal protection according to claim 1, further comprising a cut-off ring located at an outer periphery of the terminal region.
7. The layout structure of superjunction device terminal protection according to claim 1, wherein the length of the first conductive type column is the same as the length of the second conductive type column.
8. The layout structure of super junction device terminal protection according to claim 1, wherein the first conductivity type is N-type and the second conductivity type is P-type.
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| CN202211229220.2A CN115497934B (en) | 2022-10-09 | 2022-10-09 | Territory structure for protecting super junction device terminal |
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Denomination of invention: A Layout Structure for Terminal Protection of Hyperjunction Devices Effective date of registration: 20231228 Granted publication date: 20230526 Pledgee: Wuding Road Sub branch of Bank of Shanghai Co.,Ltd. Pledgor: Shanghai Gongcheng Semiconductor Technology Co.,Ltd. Registration number: Y2023980075345 |