CN115441884A

CN115441884A - Transmitter, local oscillator calibration circuit and calibration method

Info

Publication number: CN115441884A
Application number: CN202210919706.2A
Authority: CN
Inventors: 俞小宝; 梁建; 朱年勇
Original assignee: Huawei Technologies Co Ltd
Current assignee: Huawei Technologies Co Ltd
Priority date: 2018-06-12
Filing date: 2018-06-12
Publication date: 2022-12-06
Also published as: CN112272924B; WO2019237260A1; CN112272924A; CN115425995A

Abstract

The embodiment of the application provides a transmitter, a local oscillator calibration circuit and a calibration method, which are used for improving the performance of the transmitter. The transmitter includes: a baseband signal path for generating an analog baseband signal; the local oscillator signal path includes: the first buffer is used for acquiring a first oscillation signal, and calibrating the duty ratio of the first oscillation signal according to the differential voltage signal to obtain a second oscillation signal; the local oscillator calibration circuit includes: the second buffer is used for generating a static point adjusting signal according to the self-bias voltage, the current of the voltage-dividing type biasing circuit is adjusted by using the static point adjusting signal, a differential voltage signal is generated, a static working point of the second buffer is matched with a static working point of the first buffer, and a common-mode voltage signal corresponding to the differential voltage signal is used for tracking the static point adjusting signal; the frequency division circuit is used for dividing the frequency of the second oscillation signal to obtain a local oscillation signal; and the frequency mixer is used for converting the analog baseband signal by using the local oscillator signal to generate a radio frequency signal.

Description

Transmitter, local oscillator calibration circuit and calibration method

The present application is a divisional application, the original application having an application number of 201880094517.8 and the original application date of 2018, 06 month 12, the entire content of the original application being incorporated by reference in the present application.

Technical Field

The embodiment of the application relates to the technical field of communication, in particular to a transmitter, a local oscillator calibration circuit and a calibration method.

Background

With the rapid development of communication technology, radio spectrum resources are becoming increasingly scarce, and a Long Term Evolution (LTE) system adopts a multi-Resource Block (RB) operating mode to maximize the utilization of spectrum resources, for example, as shown in fig. 1, each channel occupies a plurality of RBs, and each RB is composed of OFDM-modulated subcarriers. When a transmitted signal occupies only a portion of the RBs in the channel (which may be contiguous or scattered), the intermodulation products between multiple transmitted signals will fall within the receive band or other protected band, causing problems with the regeneration of the transmitted spectrum and interference with other communication systems. In a plurality of regenerated frequency spectrums, a third-order harmonic intermodulation distortion term CIM3 (frequency point is flo-3 fbb) at a position 4fbb away from a frequency point of a useful signal (flo + fbb) is relatively large, flo is a local oscillation frequency point of a transmitter, and fbb is a baseband frequency point of the transmitter, so that the reduction or the reduction of CIM3 is the key for improving the performance of the transmitter.

Disclosure of Invention

Embodiments of the present application provide a transmitter, a local oscillator calibration circuit, and a calibration method, which are used to reduce or reduce CIM3 in the transmitter, so as to improve performance of the transmitter.

In order to achieve the above purpose, the embodiment of the present application adopts the following technical solutions:

in a first aspect, a transmitter is provided, the transmitter comprising: a baseband signal path, a local oscillator signal path and a mixer; the baseband signal path is used for generating an analog baseband signal with 2N phases, wherein N is a positive integer; the local oscillator signal path includes: the first buffer is used for acquiring a first oscillating signal and calibrating the duty ratio of the first oscillating signal according to the differential voltage signal to obtain a second oscillating signal; local oscillator calibration circuit includes: the second buffer is used for generating a static point adjusting signal according to the self-bias voltage and adjusting the current of the voltage-dividing type biasing circuit by using the static point adjusting signal to generate a differential voltage signal, wherein the static working point of the second buffer is matched with the static working point in the first buffer, and a common-mode voltage signal corresponding to the differential voltage signal is used for tracking the static point adjusting signal; the frequency division circuit is used for carrying out frequency division on the two oscillation signals to obtain local oscillation signals with 2N phases; and the frequency mixer is used for performing up-conversion on the analog baseband signal by using the local oscillator signal to generate a radio frequency signal.

The static state refers to a state that current and voltage in the circuit are unchanged when no alternating current signal is input, and the current value and the voltage value of each pole in the MOS tube in the static state are called as a static operating point Q. The current value and the voltage value of each electrode related to the static operating point Q mainly include a gate current, a drain current and a drain-source voltage difference. The static operating point of the second buffer is matched with the static operating point of the first buffer, which may mean that the gate current, the drain current, and the voltage difference between the drain and the source of the PMOS transistor and the NMOS transistor included in the second buffer are equal to the gate current, the drain current, and the NMOS transistor included in the first buffer.

In addition, the differential voltage signal may include a positive voltage signal and a negative voltage signal, and the common mode voltage signal corresponding to the differential voltage signal is equal to one-half of the sum of the positive voltage signal and the negative voltage signal. The common mode voltage signal corresponding to the differential voltage signal is used for tracking the static point adjustment signal, which may mean that the common mode voltage signal is equal to the static point adjustment signal. For example, assume that the positive voltage signal is V _P = V1+ IR, negative voltage signal is V _N If the common-mode signal is V1 and the quiescent point adjustment signal is Vout, the common-mode voltage signal corresponding to the differential voltage signal is equal to the quiescent point adjustment signal, i.e., 1/2 (V1-IR) _P +V _N )＝V1＝Vout。

With reference to the first aspect, in a first possible implementation manner of the first aspect, the local oscillator calibration circuit further includes: an error amplifier; the error amplifier is used for obtaining a feedback voltage from the voltage-dividing bias circuit, generating an error amplification signal according to a difference value of the feedback voltage and the quiescent point adjustment signal, and adjusting current in the voltage-dividing bias circuit by using the error amplification signal.

In the above technical solution, since the local oscillator signal is a local oscillator signal of 2N phase obtained by performing frequency division processing on the second oscillator signal obtained after calibrating the duty ratio, the phases of the local oscillator signals of 2N phase are aligned, so that when the local oscillator signal is used to perform up-conversion on the analog baseband signal, the third harmonic of the local oscillator signal can be reduced or eliminated, and then the third order distortion term CIM3 is reduced or eliminated, thereby improving the performance of the transmitter.

With reference to the first possible implementation manner of the first aspect, in a second possible implementation manner of the first aspect, the voltage division bias circuit includes: the power supply comprises a current source, a first P-channel metal oxide semiconductor (PMOS) tube, a first capacitor, a first resistor and a second resistor; one end of the current source and the source electrode of the first PMOS tube are respectively coupled to the first bias voltage end; the other end of the current source and the drain electrode of the first PMOS are respectively coupled to the first end of the first resistor; the grid electrode of the first PMOS tube is coupled with one end of the first capacitor and used for receiving the error amplification signal; the second end of the first resistor, the first end of the second resistor and the other end of the first capacitor are respectively coupled to a first node, and the first node is used for providing feedback voltage; the second end of the second resistor is coupled to ground. In the above possible implementation manner, a structure of the voltage division type bias circuit is provided, which is simple to implement and can reduce the volume of the voltage division type bias circuit.

With reference to the second possible implementation manner of the first aspect, in a third possible implementation manner of the first aspect, the first resistor and the second resistor are both fixed resistors; the first end of the first resistor and the first end of the second resistor are used for providing a differential voltage signal. In the above possible implementation, the differential voltage signal may be provided by a fixed resistor.

With reference to the second possible implementation manner of the first aspect, in a fourth possible implementation manner of the first aspect, the first resistor and the second resistor are both multi-stage adjusting resistors, and each of the first resistor and the second resistor further includes an adjusting end; the adjusting end of the first resistor and the adjusting end of the second resistor are used for providing a differential voltage signal. In the possible implementation manner, the differential voltage signal can be provided through the multi-gear adjusting resistor, so that the amplitude of the differential voltage signal is changed by adjusting different gears, and the performance of the transmitter is improved.

With reference to any one of the first aspect to the fourth possible implementation manner of the first aspect, in a fifth possible implementation manner of the first aspect, the second buffer includes: the second PMOS tube, the N-channel metal oxide semiconductor NMOS tube and the second resistor are connected in series; the source electrode of the second PMOS tube is coupled to a second bias voltage end; the drain electrode of the second PMOS tube, one end of the second resistor and the drain electrode of the NMOS tube are all coupled to a second node, and the second node is used for providing self-bias voltage; the grid electrode of the second PMOS tube, the other end of the second resistor and the grid electrode of the NMOS tube are coupled to a third node, and the third node is used for providing a static point adjusting signal; the source electrode of the NMOS tube is coupled to the ground. In the above possible implementation manner, a structure of the second buffer is provided, and the size of the second buffer may be equal to or proportional to the size of the first buffer, so that it can be ensured that the static operating point of the second buffer matches the static operating point in the first buffer.

With reference to any one of the first aspect to the fifth possible implementation manner of the first aspect, in a sixth possible implementation manner of the first aspect, the local oscillator calibration circuit further includes: a filter; and the filter is used for filtering the differential voltage signal and providing the filtered differential voltage signal to the first buffer. In the possible implementation manner, by performing filtering processing on the differential voltage signal, noise in the differential voltage signal can be reduced, and the signal-to-noise ratio can be improved.

With reference to any one of the sixth possible implementation manners of the first aspect, in a seventh possible implementation manner of the first aspect, the filter includes: a fourth resistor, a second capacitor, a fifth resistor and a third capacitor; one end of the fourth resistor is coupled with one end of the second capacitor, one end of the fifth resistor is coupled with one end of the third capacitor, and one end of the fourth resistor and one end of the fifth resistor are used for receiving differential voltage signals; the other end of the second capacitor and the other end of the third capacitor are coupled to the ground respectively; the other end of the fourth resistor and the other end of the fifth resistor are used for providing a filtered differential voltage signal. In the possible implementation manners, a structure of the filter is provided, the filter is simple to implement, and the device cost is low.

With reference to any one of the first aspect to the seventh possible implementation manner of the first aspect, in an eighth possible implementation manner of the first aspect, the first buffer is specifically configured to: the zero-crossing points of the first oscillating signal are calibrated according to the differential voltage signal so that the duty ratio of the second oscillating signal is 50%.

In a second aspect, a local oscillator calibration circuit is applied to a multi-phase transmitter, where a first buffer in the transmitter is used to calibrate a duty cycle of an oscillation signal of the transmitter according to a differential voltage signal, and the local oscillator calibration circuit includes: the second buffer and the voltage division bias circuit; and the second buffer is used for generating a static point adjusting signal according to the self-bias voltage and adjusting the current of the voltage-dividing type bias circuit by using the static point adjusting signal to generate a differential voltage signal, wherein the static working point of the second buffer is matched with the static working point in the first buffer, and a common-mode voltage signal corresponding to the differential voltage signal is used for tracking the static point adjusting signal.

With reference to the second aspect, in a first possible implementation manner of the second aspect, the local oscillation calibration circuit further includes: an error amplifier; and the error amplifier is used for acquiring the feedback voltage from the voltage-dividing bias circuit, generating an error amplification signal according to the difference value of the feedback voltage and the quiescent point adjustment signal, and adjusting the current of the voltage-dividing bias circuit by using the error amplification signal.

With reference to the first possible implementation manner of the second aspect, in a second possible implementation manner of the second aspect, the voltage division bias circuit includes: the circuit comprises a current source, a first metal oxide semiconductor PMOS (P-channel metal oxide semiconductor) tube, a first capacitor, a first resistor and a second resistor; one end of the current source and the source electrode of the first PMOS tube are respectively coupled to the first bias voltage end; the other end of the current source and the drain electrode of the first PMOS are respectively coupled to the first end of the first resistor; the grid electrode of the first PMOS tube is coupled with one end of the first capacitor and used for receiving the error amplification signal; the second end of the first resistor, the first end of the second resistor and the other end of the first capacitor are respectively coupled to a first node, and the first node is used for providing feedback voltage; the second end of the second resistor is coupled to ground.

With reference to the second possible implementation manner of the second aspect, in a third possible implementation manner of the second aspect, the first resistor and the second resistor are both fixed resistors; the first end of the first resistor and the first end of the second resistor are used for providing a differential voltage signal.

With reference to the second possible implementation manner of the second aspect, in a fourth possible implementation manner of the second aspect, the first resistor and the second resistor are both multi-stage adjusting resistors, and each of the first resistor and the second resistor further includes an adjusting end; the adjusting end of the first resistor and the adjusting end of the second resistor are used for providing a differential voltage signal.

With reference to any one of the second aspect to the third possible implementation manner of the second aspect, in a fifth possible implementation manner of the second aspect, the second buffer includes: the second PMOS tube, the N-channel metal oxide semiconductor NMOS tube and the second resistor are connected in series; the source electrode of the second PMOS tube is coupled to a second bias voltage end; the drain electrode of the second PMOS tube, one end of the second resistor and the drain electrode of the NMOS tube are all coupled to a second node, and the second node is used for providing self-bias voltage; the grid electrode of the second PMOS tube, the other end of the second resistor and the grid electrode of the NMOS tube are coupled to a third node, and the third node is used for providing a static point adjusting signal; the source electrode of the NMOS tube is coupled to the ground.

With reference to any one of the second aspect to the fifth possible implementation manner of the second aspect, in a sixth possible implementation manner of the second aspect, the local oscillation calibration circuit further includes: a filter; and the filter is used for filtering the differential voltage signal and providing the filtered differential voltage signal to the first buffer.

With reference to any one of the sixth possible implementation manners of the second aspect, in a seventh possible implementation manner of the second aspect, the filter includes: a fourth resistor, a second capacitor, a fifth resistor and a third capacitor; one end of the fourth resistor is coupled with one end of the second capacitor, one end of the fifth resistor is coupled with one end of the third capacitor, and one end of the fourth resistor and one end of the fifth resistor are used for receiving a differential voltage signal; the other end of the second capacitor and the other end of the third capacitor are coupled to the ground respectively; the other end of the fourth resistor and the other end of the fifth resistor are used for providing a filtered differential voltage signal.

With reference to any one of the second aspect to the seventh possible implementation manner of the second aspect, in an eighth possible implementation manner of the second aspect, the first buffer is specifically configured to: and calibrating the zero crossing point of the oscillation signal according to the differential voltage signal so that the duty ratio of the calibrated oscillation signal is 50%.

In a third aspect, a calibration method is provided, which is applied in a transmitter, where the transmitter includes: the method comprises a baseband signal path, a local oscillator signal path and a mixer, and comprises the following steps: the baseband signal path generates an analog baseband signal with 2N phases and outputs the analog baseband signal to the mixer, wherein N is a positive integer; the first buffer acquires a first oscillation signal, and calibrates the duty ratio of the first oscillation signal according to the differential voltage signal to obtain a second oscillation signal; the local oscillator signal path includes: the local oscillator calibration circuit comprises a local oscillator calibration circuit, a first buffer and a frequency division circuit, wherein a second buffer generates a static point adjusting signal according to self-bias voltage, adjusts the current of a voltage division type bias circuit by using the static point adjusting signal, generates a differential voltage signal and outputs the differential voltage signal to the first buffer, the static working point of the second buffer is matched with the static working point in the first buffer, and a common-mode voltage signal corresponding to the differential voltage signal is used for tracking the static point adjusting signal; the frequency divider divides the frequency of the second oscillation signal to obtain a local oscillation signal with 2N phase and outputs the local oscillation signal to the frequency mixer; the frequency mixer performs up-conversion on the analog baseband signal by using the local oscillator signal to generate a radio frequency signal.

With reference to the third aspect, in a first possible implementation manner of the third aspect, the local oscillation calibration circuit further includes an error amplifier, and the method further includes: the error amplifier obtains a feedback voltage from the voltage division type bias circuit, generates an error amplification signal according to a difference value of the feedback voltage and the quiescent point adjustment signal, and adjusts the current of the voltage division type bias circuit by using the error amplification signal.

With reference to the third aspect or the first possible implementation manner of the third aspect, in a second possible implementation manner of the third aspect, the local oscillation calibration circuit further includes a filter, and the method further includes: the filter receives the differential voltage signal, performs filtering processing on the differential voltage signal, and provides the filtered differential voltage signal to the first buffer.

With reference to any one of the third aspect to the second possible implementation manner of the third aspect, in a third possible implementation manner of the third aspect, the calibrating, by the first buffer, the duty ratio of the first oscillation signal according to the differential voltage signal to obtain the second oscillation signal includes: the first buffer calibrates a zero-crossing point of the first oscillation signal according to the differential voltage signal so that a duty ratio of the second oscillation signal is 50%.

It can be understood that, the above-mentioned local oscillator calibration circuit or the calibration method is used for calibrating the local oscillator signal in the transmitter, and therefore, the beneficial effects achieved by the local oscillator calibration circuit or the calibration method can refer to the beneficial effects in the transmitter provided above, and are not described herein again.

Drawings

FIG. 1 is a schematic diagram of the bandwidth of a transmitted signal;

fig. 2 is a schematic diagram of a transmitter in the prior art;

fig. 3 is a schematic diagram of a regenerated transmission spectrum according to an embodiment of the present application;

fig. 4 is a schematic diagram of another retransmission spectrum provided in an embodiment of the present application;

fig. 5 is a first schematic structural diagram of a transmitter according to an embodiment of the present application;

fig. 6 is a schematic diagram of a second oscillating signal according to an embodiment of the present disclosure;

fig. 7 is a first schematic structural diagram of a local oscillator calibration circuit according to an embodiment of the present application;

fig. 8 is a second schematic structural diagram of a local oscillator calibration circuit according to an embodiment of the present application;

fig. 9 is a schematic structural diagram of a transmitter according to an embodiment of the present application;

fig. 10 is a schematic structural diagram of an amplifying circuit according to an embodiment of the present disclosure;

fig. 11 is a flowchart illustrating a calibration method according to an embodiment of the present application.

Detailed Description

The technical solutions in the embodiments of the present application will be described below with reference to the drawings in the embodiments of the present application. In the description of the present application, the term "plurality" means two or more than two, unless otherwise specified. In addition, in order to facilitate clear description of technical solutions of the embodiments of the present application, in the embodiments of the present application, words such as "first" and "second" are used to distinguish identical items or similar items with substantially identical functions and actions. Those skilled in the art will appreciate that the words "first," "second," and the like do not limit the number or order of execution.

It should be understood that the embodiments of the present application may be applied to various communication systems that need to reduce the third-order harmonic intermodulation distortion (CIM 3), such as a global system for mobile communications (GSM) system, a Code Division Multiple Access (CDMA) system, a Wideband Code Division Multiple Access (WCDMA) system, a General Packet Radio Service (GPRS), a long term evolution (long term evolution, LTE) system, a LTE (frequency division multiple, FDD) system, an LTE time division duplex (time division duplex, TDD), a universal mobile telecommunications system (universal mobile telecommunications system, UMTS), a universal microwave access (UMTS), a Worldwide Interoperability for Microwave Access (WiMAX) system, and a future communication system G5.

It should also be understood that the embodiments of the present application may also be applied to various communication systems based on non-orthogonal multiple access technologies, such as Sparse Code Multiple Access (SCMA) systems, although SCMA may also be referred to by other names in the field of communications; further, the technical solution of the embodiment of the present application may be applied to a multi-carrier transmission system using a non-orthogonal multiple access technology, for example, an Orthogonal Frequency Division Multiplexing (OFDM) system using a non-orthogonal multiple access technology, a filter bank multi-carrier (FBMC), a General Frequency Division Multiplexing (GFDM) system, a filtered orthogonal frequency division multiplexing (F-OFDM) system, and the like.

It should also be understood that the embodiments of the present application can be applied to LTE systems and subsequently evolved systems such as 5G, etc., or other wireless communication systems using various wireless access technologies, such as systems using access technologies such as code division multiple access, frequency division multiple access, time division multiple access, orthogonal frequency division multiple access, single carrier frequency division multiple access, etc.

The communication system applied in the embodiment of the present application may include a transmitter, which may be a network device, or a terminal, etc. A terminal can also be called a User Equipment (UE), an access terminal, a subscriber unit, a subscriber station, mobile station, remote terminal, mobile device, user terminal, wireless communication device, user agent, or user device. The terminal may be a Station (STA) in a Wireless Local Area Network (WLAN), and may be a cellular phone, a cordless phone, a Session Initiation Protocol (SIP) phone, a Wireless Local Loop (WLL) station, a Personal Digital Assistant (PDA) device, a handheld device with a wireless communication function, a computing device or other processing device connected to a wireless modem, a vehicle-mounted device, a wearable device, and a next-generation communication system, for example, a terminal in a fifth-generation (5G) communication network or a terminal in a future-evolved Public Land Mobile Network (PLMN) network, and the like. Among them, 5G may also be referred to as New Radio (NR).

As an example, in the embodiment of the present application, the terminal may also be a wearable device. Wearable equipment can also be called wearable intelligent equipment, is the general term of applying wearable technique to carry out intelligent design, develop the equipment that can dress to daily wearing, like glasses, gloves, wrist-watch, dress and shoes etc.. A wearable device is a portable device that is worn directly on the body or integrated into the clothing or accessories of the user. The wearable device is not only a hardware device, but also realizes powerful functions through software support, data interaction and cloud interaction. The generalized wearable smart device includes full functionality, large size, and can implement full or partial functionality without relying on a smart phone, such as: smart watches or smart glasses and the like, and only focus on a certain type of application functions, and need to be used in cooperation with other devices such as smart phones, such as various smart bracelets for physical sign monitoring, smart jewelry and the like.

The network device may be a base station or an access point, for example, the network device is an Access Point (AP) in a WLAN, and the base station may be an evolved Node B (eNB) or an eNodeB in an LTE system, and may also be a next generation Node B (gNB) in an NR. Or, the network device is a relay station, a vehicle-mounted device, a wearable device, and a network device in a future 5G network or a network device in a future evolved PLMN network, and the like.

In addition, in the embodiment of the present application, the network device provides a service in a cell, and the terminal communicates with the network device through a transmission resource (for example, a frequency domain resource or a time frequency resource) of the cell. The cell may be a cell corresponding to a network device (e.g., a base station), where the cell may belong to a macro base station or a base station corresponding to a small cell (small cell), and the small cell may include: a metro cell (metro cell), a micro cell (micro cell), a Pico cell (Pico cell), a femto cell (femto cell), etc.

Fig. 2 is a schematic diagram of a transmitter, which includes a baseband (BB) signal path, a local oscillator signal path, a Mixer (MX), and a Power Amplifier (PA). The baseband signal path is used for providing analog baseband signals, the local oscillator signal path is used for providing local oscillator signals, the frequency mixer is used for carrying out frequency mixing processing on the analog baseband signals and the local oscillator signals to obtain radio-frequency signals, and the power amplifier is used for carrying out power amplification on the radio-frequency signals.

Alternatively, the baseband signal path may be used to provide an analog baseband signal having multiple Phases (PH), and the local oscillator signal path may be used to provide a local oscillator signal having multiple phases. For example, when the transmitter is an 8PH transmitter, the baseband signal path provides an 8PH analog baseband signal, and the local oscillator signal path provides an 8PH local oscillator signal; alternatively, when the transmitter is a 4PH transmitter, the baseband signal path provides a 4PH analog baseband signal and the local oscillator signal path provides a 4PH local oscillator signal.

The reason why CIM3 is generated in the transmitter will be described in detail with reference to the transmitter structure shown in fig. 2. Among them, CIM3 can be called (flo-3 fbb) signal, and the reasons for generating (flo-3 fbb) signal are mainly two types: the first type is generated by analog baseband limited linearity, as shown in fig. 3, when the baseband linearity of the transmitter is insufficient, a third harmonic (3 fbb) is generated, and after the third harmonic (3 fbb) is mixed with a local oscillator signal by a mixer, a (flo-3 fbb) signal is generated at the output end; the second type is generated by harmonic mixing of a mixer, as shown in fig. 4, the local oscillator signal input by the mixer contains harmonics, wherein the third harmonic 3flo and the baseband signal fbb generate harmonic mixing effect, a (3 flo-fbb) signal is generated at the output end of the mixer, and then the (flo-3 fbb) signal is generated after the useful signal (flo + fbb) and the (3 flo-fbb) are subjected to third-order intermodulation due to the nonlinear region operating characteristics of a post-stage amplifier. Therefore, in order to reduce or eliminate CIM3 as much as possible to improve the performance of the transmitter, the (flo-3 fbb) signal can be eliminated by eliminating the third harmonic mixing.

In fig. 3 and 4, BB HD3 represents the third harmonic of the analog baseband signal fbb, wanted represents the desired signal (flo + fbb), IMG represents the image signal of the desired signal (flo + fbb), and 3LO-BB 3HD represents the third harmonic of the (3 flo-fbb) signal.

Fig. 5 is a schematic structural diagram of a transmitter according to an embodiment of the present application, where the transmitter includes: a baseband signal path 501, a local oscillator signal path 502, and a mixer 503.

Baseband signal path 501 is used to generate an analog baseband signal with 2N phases, where N is a positive integer.

In practical applications, the baseband signal path 501 may include a baseband chip, and the baseband signal path 501 may generally include a digital to analog converter (DAC), an Amplifier (AMP), and other related devices.

In addition, the value of N is a positive integer, for example, N may be 1, 2, or 4, and the analog baseband signal of 2N phase may be a 2PH analog baseband signal, a 4PH analog baseband signal, or an 8PH analog baseband signal.

As shown in fig. 5, the local oscillator signal path 502 includes: local oscillator calibration circuit 5021, first buffer 5022 and frequency division circuit 5023.

The first buffer 5022 is configured to obtain the first oscillation signal, and calibrate the duty ratio of the first oscillation signal according to the differential voltage signal to obtain a second oscillation signal.

The first oscillating signal may be generated by a local oscillation signal path of the transmitter, or may be generated by a system (for example, a device such as a mobile phone in which the transmitter is installed) in which the transmitter is located. When the first oscillating signal is generated by the local oscillating signal path, an oscillator for generating the first oscillating signal may be further included in the local oscillating signal path, and the first oscillating signal is provided to the first buffer 5022.

Optionally, the first buffer 5022 calibrates the zero-crossing point of the first oscillating signal according to the differential voltage signal so that the duty ratio of the second oscillating signal is 50%. Certainly, in practical applications, the first buffer 5022 may also calibrate the zero-crossing point of the first oscillating signal according to the differential voltage signal, so that the duty cycle of the second oscillating signal is other than 50%, which is not specifically limited in this embodiment of the present application.

For example, as shown in fig. 6, assuming that a voltage corresponding to the zero-crossing point of the first oscillation signal is Va, a duty ratio of a square wave signal corresponding to the first oscillation signal (i.e., a second oscillation signal before the zero-crossing point is adjusted) determined according to Va is 30%, the first buffer 5022 may pull down the zero-crossing point of the first oscillation signal from Va to Vb according to the differential voltage signal, and the duty ratio of the square wave signal corresponding to the first oscillation signal (i.e., a second oscillation signal after the zero-crossing point is adjusted) determined according to Vb is 50%.

The local oscillation calibration circuit 5021 includes: a second buffer 50211 and a voltage-dividing bias circuit 50212. The second buffer 50211 is configured to generate a quiescent point adjusting signal according to the self-bias voltage, and adjust the current of the voltage-division biasing circuit 50212 by using the quiescent point adjusting signal to generate a differential voltage signal. The quiescent operating point of the second buffer 50211 is matched with the quiescent operating point of the first buffer 5022, and the common-mode voltage signal corresponding to the differential voltage signal is used for tracking the quiescent point adjusting signal.

The static state refers to a state where current and voltage in a circuit are not changed when no ac signal is input, and a current value and a voltage value of each electrode in a Metal Oxide Semiconductor (MOS) transistor in the static state are referred to as a static operating point Q. The MOS tube can comprise a P-channel MOS tube (PMOS for short) and an N-channel MOS tube (NMOS for short). Each MOS transistor includes three poles, i.e., a source (source, s), a gate (gate, g), and a drain (drain, d), and the current value and the voltage value of each pole related to the quiescent operating point Q may mainly include a gate current IgQ, a drain current IdQ, and a drain-source voltage difference UdsQ.

In addition, the static operation point of the second buffer 50211 matches with the static operation point in the first buffer 5022, which may mean that IgQ, idQ, and UdsQ of the PMOS transistor and the NMOS transistor included in the second buffer 50211 are equal to those of the PMOS transistor and the NMOS transistor included in the first buffer 5022. In practical applications, the size of the second buffer 50211 and the size of the first buffer 5022 can be equal or proportional, so that the static operating point of the second buffer 50211 can be guaranteed to be matched with the static operating point of the first buffer 5022.

Further, the differential voltage signal may include a positive polarity voltage signal and a negative polarity voltage signal, the differenceThe common-mode voltage signal corresponding to the divided voltage signal is equal to one half of the sum of the positive voltage signal and the negative voltage signal. The common mode voltage signal corresponding to the differential voltage signal is used for tracking the quiescent point adjustment signal, which may mean that the common mode voltage signal is equal to the quiescent point adjustment signal. For example, assume that the positive voltage signal is V _P = V1+ IR, negative voltage signal is V _N If the common-mode signal is V1 and the quiescent point adjustment signal is Vout, the common-mode voltage signal corresponding to the differential voltage signal is equal to the quiescent point adjustment signal, i.e., 1/2 (V1-IR) _P +V _N )＝V1＝Vout。

And the frequency division circuit 5023 is used for carrying out frequency division on the second oscillation signal to obtain a local oscillation signal with a 2N phase.

Illustratively, the frequency dividing circuit 5023 may include a frequency divider for dividing the frequency of the second oscillating signal to obtain a local oscillator signal with 2N phase, for example, the frequency divider may be a divide-by-two frequency divider or a divide-by-four frequency divider, etc. Optionally, the frequency dividing circuit 5023 may further include an and gate circuit, where the and gate circuit is configured to receive the signal frequency-divided by the frequency divider, and perform an and operation on the frequency-divided signal to obtain a local oscillator signal with a 2N phase.

The mixer 503 is configured to perform up-conversion on the analog baseband signal by using the local oscillator signal, and generate a radio frequency signal.

The mixer 503 may perform up-conversion on the analog baseband signal by using the local oscillator signal to obtain a radio frequency signal. Because the local oscillator signal is the local oscillator signal of 2N phase obtained by frequency division processing of the second oscillator signal obtained after the duty ratio is calibrated, the phases between the local oscillator signals of 2N phase are aligned, so that when the local oscillator signal is used for carrying out up-conversion on the analog baseband signal, the third harmonic of the local oscillator signal can be reduced or eliminated, and then the third-order distortion item CIM3 of the message is reduced or eliminated, thereby improving the performance of the transmitter.

Further, the local oscillator calibration circuit 5021 further comprises: the error amplifier 50213 and the error amplifier 50213 are located between the second buffer 50211 and the voltage-dividing bias circuit 50212. The error amplifier 50213 is configured to obtain a feedback voltage from the voltage-divided bias circuit 50212, generate an error amplification signal according to a difference between the feedback voltage and the quiescent point adjustment signal, and adjust a current in the voltage-divided bias circuit 50212 by using the error amplification signal.

When the circuit is just started, the feedback voltage (i.e., the common-mode voltage corresponding to the differential voltage signal) may have a difference with the quiescent point adjusting signal, the error amplifier 50213 may generate an error amplified signal according to the difference between the feedback voltage and the quiescent point adjusting signal, and adjust the current in the voltage division bias circuit 50212 by using the error amplified signal to change the reduction of the common-mode voltage corresponding to the differential voltage signal, i.e., change the feedback voltage, and when the difference between the changed feedback voltage and the quiescent point adjusting signal is zero, i.e., the changed feedback voltage is equal to the quiescent point adjusting signal, the circuit reaches a stable state. At this time, the common mode voltage corresponding to the differential voltage signal is equal to the quiescent point adjustment signal.

Further, as shown in fig. 7, the voltage-dividing bias circuit 50212 includes: the current source IS, a first PMOS transistor M1, a first capacitor C1, a first resistor R1, and a second resistor R2.

One end of the current source IS and the source s of the first PMOS transistor M1 are respectively coupled to the first bias voltage end; the other end of the current source IS and the drain d of the first PMOS transistor M1 are respectively coupled to the first end of the first resistor R1; the grid g of the first PMOS tube M1 is coupled with one end of the first capacitor C1 and used for receiving an error amplification signal; the second end of the first resistor R1, the first end of the second resistor R2 and the other end of the first capacitor C1 are coupled to a first node, respectively, and the first node is configured to provide a feedback voltage; the second end of the second resistor R2 is coupled to ground. Illustratively, the voltage value of the first bias voltage terminal may be 1.8V.

Optionally, the first resistor R1 and the second resistor R2 are both fixed resistors, and a first end of the first resistor R1 and a first end of the second resistor R2 are used to provide a differential voltage signal. Or, the first resistor R1 and the second resistor R2 are both multi-stage adjusting resistors, the first resistor R1 and the second resistor R2 further include adjusting terminals, and the adjusting terminals of the first resistor R1 and the adjusting terminals of the second resistor R2 are used for providing differential voltage signals. Fig. 7 illustrates an example in which the first resistor R1 and the second resistor R2 are both multi-step adjusting resistors.

Specifically, since the voltage value of the gate g of the PMOS transistor IS inversely proportional to the current value of the drain d of the PMOS transistor, when the gate g of the first PMOS transistor M1 receives the error amplified signal generated by the error amplifier 50213, the current value of the drain d of the first PMOS transistor M1 decreases, and the sum of the current values of the current source IS and the drain d decreases, so that the voltage value falling at the first node decreases, that IS, the feedback voltage decreases, thereby decreasing the difference between the feedback voltage and the quiescent point adjusting signal, and making the feedback voltage when the circuit IS in a stable state equal to the quiescent point adjusting signal.

When the circuit is in a stable state, if the feedback voltage provided by the first node is assumed to be V1 (i.e. the common-mode voltage signal corresponding to the differential voltage signal is V1), the positive voltage signal of the differential voltage signal is V _P = V1+ IR, negative voltage signal is V _N = V1-IR, the quiescent point adjust signal is Vout, and the circuit is in steady state and satisfies 1/2 (V) _P +V _N )＝V1＝Vout。

It should be noted that I may be a sum of current values of the current source IS and the drain d of the first PMOS transistor M1 when the circuit IS in a stable state; when the first resistor R1 and the second resistor R2 are fixed resistors, R may refer to resistance values of the first resistor R1 and the second resistor R2, and when the first resistor R1 and the second resistor R2 are multi-stage adjusting resistors, R may refer to a resistance value between the first node and an adjustable end of the first resistor R1 and a resistance value between the first node and an adjustable end of the second resistor R1.

Further, as shown in fig. 7, the second buffer 50211 includes: a second PMOS transistor M2, an NMOS transistor M3 and a third resistor R3.

The source s of the second PMOS transistor M2 is coupled to the second bias voltage terminal; the drain d of the second PMOS tube M2, one end of the third resistor R3 and the drain d of the NMOS tube M3 are coupled to a second node, and the second node is used for providing self-bias voltage; the grid g of the second PMOS tube M2, the other end of the third resistor R3 and the grid g of the NMOS tube M3 are coupled to a third node, and the third node is used for providing a static point adjusting signal; the source s of the NMOS transistor M3 is coupled to ground. Illustratively, the voltage value of the second bias voltage terminal may be 0.9V.

Further, with reference to fig. 7, as shown in fig. 8, the local oscillation calibration circuit 5021 further includes: the filter 50214. The filter 50214 is used for filtering the differential voltage signal and providing the filtered differential voltage signal to the first buffer 5022.

Wherein, the filter 50214 comprises: a fourth resistor R4, a second capacitor C2, a fifth resistor R5 and a third capacitor C3. Specifically, one end of the fourth resistor R4 is coupled to one end of the second capacitor C2, one end of the fifth resistor R5 is coupled to one end of the third capacitor C3, and one end of the fourth resistor R4 and one end of the fifth resistor R5 are configured to receive the differential voltage signal; the other end of the second capacitor C2 and the other end of the third capacitor C3 are coupled to the ground respectively; the other end of the fourth resistor and the other end of the fifth resistor R5 are used for providing a filtered differential voltage signal.

Fig. 9 is a schematic structural diagram of an 8PH transmitter according to an embodiment of the present application, where the 8PH transmitter includes an 8PH baseband signal channel, an 8PH local oscillator signal channel, and an 8PH mixer. The 8PH baseband signal channel may include a DAC and an AMP, and the 8PH local oscillation signal channel may include an oscillator (LO), a first buffer, a local oscillation calibration circuit, a divide-by-four frequency divider, and an and gate circuit. In addition, the transmitter is an 8PH transmitter, and may further include a Radio Frequency (RF) Variable Gain Amplifier (VGA).

Wherein, in 8PH local oscillator signal passageway, be provided with two electric capacities (for example, C01 and C02) between oscillator and the first buffer, two electric capacities are arranged in the direct current component among the first oscillating signal of filtering oscillator production, and local oscillator calibration circuit connects between two electric capacities and first buffer, and first oscillating signal and differential voltage signal obtain the second oscillating signal that the duty cycle is 50% after passing through first buffer. The second oscillation signal passes through a divide-by-four frequency divider (DIV 4) and an AND gate circuit to obtain a local oscillation signal of 8PH, the duty ratio of the local oscillation signal is 12.5% (namely, 50% is divided by 4), and finally the local oscillation signal is output to an 8PH mixer. The 8PH frequency mixer performs up-conversion processing on the analog baseband signal by using the local oscillator signal to generate a radio frequency signal, and the radio frequency signal is amplified by the RF VGA and then output.

It should be noted that, for the description of each device or circuit in the 8PH transmitter, reference may be made to the description in the previous embodiment, and the description of the embodiment of the present application is not repeated herein.

In addition, the embodiment of the application can also provide a 4PH transmitter. The difference between the 4PH transmitter and the 8PH transmitter is that the 4PH transmitter includes a 4PH baseband signal channel, a 4PH local oscillator signal channel and a 4PH mixer, and the frequency divider included in the 4PH local oscillator signal channel is a divide-by-two frequency divider. In addition, the duty ratio of the local oscillation signal of 4PH obtained by dividing the frequency divider by two and the and gate circuit in the 4PH transmitter is 25% (i.e., 50% divided by 2).

The embodiment of the present application further provides a schematic structural diagram of a local oscillator calibration circuit, where the local oscillator calibration circuit is applied to a multi-phase transmitter, a first buffer in the transmitter is used to calibrate a duty cycle of an oscillation signal of the transmitter according to a differential voltage signal, and the local oscillator calibration circuit includes: a second buffer and a voltage-dividing bias circuit.

The second buffer is used for generating a quiescent point adjusting signal according to the self-bias voltage and adjusting the current of the voltage-dividing bias circuit by using the quiescent point adjusting signal to generate a differential voltage signal, wherein the quiescent operating point of the second buffer is matched with the quiescent operating point in the first buffer, and a common-mode voltage signal corresponding to the differential voltage signal is used for tracking the quiescent point adjusting signal.

Further, the local oscillator calibration circuit further includes: an error amplifier.

The error amplifier is used for obtaining a feedback voltage from the voltage-dividing bias circuit, generating an error amplification signal according to a difference value of the feedback voltage and the quiescent point adjustment signal, and adjusting the current of the voltage-dividing bias circuit by using the error amplification signal.

In one possible implementation, a voltage-dividing bias circuit includes: the current source, the first PMOS tube, the first capacitor, the first resistor and the second resistor; one end of the current source and the source electrode of the first PMOS tube are respectively coupled to the first bias voltage end; the other end of the current source and the drain electrode of the first PMOS are respectively coupled to the first end of the first resistor; the grid electrode of the first PMOS tube is coupled with one end of the first capacitor and used for receiving the error amplification signal; the second end of the first resistor, the first end of the second resistor and the other end of the first capacitor are respectively coupled to a first node, and the first node is used for providing a feedback voltage; the second end of the second resistor is coupled to ground.

Optionally, the first resistor and the second resistor are both fixed resistors, and a first end of the first resistor and a first end of the second resistor are used for providing a differential voltage signal; or the first resistor and the second resistor are both multi-gear adjusting resistors, the first resistor and the second resistor further comprise adjusting ends, and the adjusting ends of the first resistor and the adjusting ends of the second resistor are used for providing differential voltage signals.

In one possible implementation, the second buffer includes: the second PMOS tube, the NMOS tube and the third resistor; the source electrode of the second PMOS tube is coupled to a second bias voltage end; the drain electrode of the second PMOS tube, one end of the third resistor and the drain electrode of the NMOS tube are all coupled to a second node, and the second node is used for providing self-bias voltage; the grid electrode of the second PMOS tube, the other end of the third resistor and the grid electrode of the NMOS tube are coupled to a third node, and the third node is used for providing a static point adjusting signal; the source electrode of the NMOS tube is coupled to the ground.

In a possible implementation manner, the local oscillator calibration circuit further includes: a filter; and the filter is used for filtering the differential voltage signal and providing the filtered differential voltage signal to the first buffer.

Optionally, the filter includes: a fourth resistor, a second capacitor, a fifth resistor and a third capacitor; one end of the fourth resistor is coupled with one end of the second capacitor, one end of the fifth resistor is coupled with one end of the third capacitor, and one end of the fourth resistor and one end of the fifth resistor are used for receiving a differential voltage signal; the other end of the second capacitor and the other end of the third capacitor are coupled to the ground respectively; the other end of the fourth resistor and the other end of the fifth resistor are used for providing a filtered differential voltage signal.

It should be noted that, for the structural schematic diagram of the local oscillation calibration circuit provided in the embodiment of the present application, reference may be made to the structural schematic diagrams of the local oscillation calibration circuit included in the transmitter shown in fig. 5, fig. 7, and fig. 8, and specific relevant descriptions may also refer to explanations in the foregoing embodiments, which are not described herein again.

Further, the structural schematic diagram of the local oscillator calibration circuit provided in the embodiment of the present application may also be applied to any circuit or device that needs to adaptively adjust the common mode input and needs to output the differential calibration voltage, for example, a DC offset calibration circuit. For example, as shown in fig. 10, when there is a mismatch at the input of the amplifier in the circuit, the adjustment may be performed by the local oscillator calibration circuit in the present application. The embodiment of the application is particularly suitable for the condition that the input common mode value of the amplifier changes along with the required voltage. R01, R02, R03, and R04 in fig. 10 each represent a resistance.

In the embodiment of the application, the differential voltage signal generated by the local oscillator calibration circuit can be used for calibrating the duty ratio of the oscillation signal in the transmitter, so that the phases of the multi-phase local oscillator signals generated by the calibrated local oscillator signals are aligned, and when the local oscillator signals are used for performing up-conversion on an analog baseband signal, the third-order harmonic of the local oscillator signals can be reduced or eliminated, so that the third-order distortion item CIM3 is reduced or informed, and the performance of the transmitter is improved.

Fig. 11 is a flowchart of a calibration method according to an embodiment of the present application, where the method is applied to a transmitter, and the transmitter includes: a baseband signal path, a local oscillator signal path, and a mixer, the method comprising the following steps.

S1101: the baseband signal path generates an analog baseband signal with 2N phases and outputs the analog baseband signal to the mixer, wherein N is a positive integer.

Wherein, the local oscillator signal route includes: the device comprises a local oscillator calibration circuit, a first buffer and a frequency division circuit.

S1102: the first buffer acquires the first oscillation signal, and calibrates the duty ratio of the first oscillation signal according to the differential voltage signal to obtain a second oscillation signal.

Optionally, the first buffer calibrates a zero-crossing point of the first oscillating signal according to the differential voltage signal so that a duty ratio of the second oscillating signal is 50%.

The local oscillator calibration circuit comprises a second buffer and a voltage division type bias circuit.

S1103: the second buffer generates a static point adjusting signal according to the self-bias voltage, adjusts the current of the voltage-dividing bias circuit by using the static point adjusting signal, generates a differential voltage signal and outputs the differential voltage signal to the first buffer, wherein the static working point of the second buffer is matched with the static working point in the first buffer, and a common-mode voltage signal corresponding to the differential voltage signal is used for tracking the static point adjusting signal.

S1104: and the frequency divider divides the frequency of the second oscillation signal to obtain a local oscillation signal with 2N phase and outputs the local oscillation signal to the frequency mixer.

S1105: the frequency mixer performs up-conversion on the analog baseband signal by using the local oscillator signal to generate a radio frequency signal.

In a possible implementation manner, the local oscillation calibration circuit further includes an error amplifier, and the method further includes:

the error amplifier obtains a feedback voltage from the voltage division type bias circuit, generates an error amplification signal according to a difference value of the feedback voltage and the quiescent point adjustment signal, and adjusts the current of the voltage division type bias circuit by using the error amplification signal.

In a possible implementation manner, the local oscillator calibration circuit further includes: a filter, the method further comprising:

the filter performs filtering processing on the differential voltage signal and provides the filtered differential voltage signal to the first buffer.

It should be noted that, for specific descriptions of each step in the foregoing method embodiment, reference may be made to descriptions of related devices or circuits in the foregoing embodiment corresponding to the transmitter, and details of this embodiment are not described herein again.

In the embodiment of the application, the local oscillator signal is a local oscillator signal with a 2N phase obtained by performing frequency division processing on a second oscillation signal obtained after calibrating the duty ratio, so that the phases of the local oscillator signals with the 2N phases are aligned, and when the local oscillator signal is used for performing up-conversion on an analog baseband signal, third-order harmonics of the local oscillator signal can be reduced or eliminated, and then a third-order distortion item CIM3 of a message is reduced or eliminated, so that the performance of a transmitter is improved.

The above description is only for the specific embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily think of the changes or substitutions within the technical scope of the present application, and shall be covered by the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims

1. A transmitter, characterized in that the transmitter comprises: a baseband signal path, a local oscillator signal path, a frequency mixer and a radio frequency variable gain amplifier;

the baseband signal path is used for generating an analog baseband signal with 8 phases;

the local oscillator signal path is used for providing local oscillator signals with 8 phases for the frequency mixer;

the mixer is configured to perform up-conversion on the analog baseband signal with the 8 phases by using the local oscillator signal with the 8 phases, so as to generate a radio frequency signal;

and the radio frequency signal is amplified by the radio frequency variable gain amplifier and then output.

2. The transmitter of claim 1, wherein the local oscillator signal path comprises a local oscillator calibration circuit and a first buffer, the local oscillator calibration circuit is configured to generate a differential voltage signal, and the first buffer is configured to obtain the first oscillator signal and calibrate the first oscillator signal according to the differential voltage signal to obtain the phase-aligned local oscillator signal with the 8 phases.

3. The transmitter of claim 2, wherein the local oscillator signal path further comprises: an oscillator for generating a clock signal in response to a clock signal,

the oscillator is used for generating the first oscillating signal.

4. The transmitter of claim 3, wherein the local oscillator calibration circuit further comprises: a filter;

the differential voltage signal is used for calibrating the first oscillation signal after being filtered by the filter.

5. The transmitter of claim 4, wherein the filter comprises: the circuit comprises a first resistor, a first capacitor, a second resistor and a second capacitor;

a first end of the first resistor is coupled with a first end of the first capacitor, a first end of the second resistor is coupled with a first end of the second capacitor, and the first end of the first resistor and the first end of the second resistor are used for receiving the differential voltage signal;

the second end of the second capacitor and the second end of the first capacitor are respectively coupled to the ground;

the second end of the first resistor and the second end of the second resistor are used for providing the filtered differential voltage signal.

6. The transmitter of any one of claims 2-5, wherein the local oscillator signal path further comprises an AND gate circuit comprising a plurality of series-connected NAND gates and NOT gates, wherein each of the plurality of series-connected NAND gates and NOT gates is configured to output one of the 8-phase local oscillator signals to the mixer.

7. The transmitter according to any of claims 2 to 6, wherein the local oscillator signal path further comprises a third capacitor and a fourth capacitor, and the third capacitor and the fourth capacitor are configured to filter a dc component of the first local oscillator signal generated by the oscillator.

8. The transmitter according to any one of claims 2 to 7, wherein the first buffer is specifically configured to obtain a first oscillating signal, and adjust a common-mode component of the first oscillating signal according to the differential voltage signal, so as to obtain the phase-aligned local oscillating signals with the 8 phases.

9. A method of transmitting a signal, comprising:

generating an analog baseband signal of 8 phases;

providing a local oscillator signal with 8 phases;

performing up-conversion on the 8-phase analog baseband signal by using the 8-phase local oscillator signal to generate a radio frequency signal;

and the radio frequency signal is output after being amplified.

10. The method of claim 9, wherein providing the 8-phase local oscillator signal comprises:

generating a differential voltage signal;

and acquiring a first oscillating signal, and calibrating the first oscillating signal according to the differential voltage signal to obtain the local oscillating signal with the 8 phases and aligned with the phases.

11. The method of claim 10, wherein providing the 8-phase local oscillator signal further comprises:

filtering the differential voltage signal.

12. The method of claim 10 or 11, wherein providing the 8-phase local oscillator signal further comprises:

and performing NAND operation and NOT operation on the local oscillation signals with the 8 phases after the phases are aligned, and outputting the structures after the operation to the frequency mixer.

13. The method according to any of claims 10-12, wherein said providing an 8-phase local oscillator signal further comprises:

and filtering out a direct current component of the first local oscillation signal generated by the oscillator.

14. The method according to any one of claims 10 to 13, wherein obtaining a first oscillating signal and calibrating the first oscillating signal according to the differential voltage signal to obtain the phase-aligned 8-phase local oscillating signal specifically includes:

and acquiring a first oscillation signal, and adjusting a common-mode component of the first oscillation signal according to the differential voltage signal to obtain the local oscillation signal of the 8 phases with aligned phases.

15. A transmitter, characterized in that the transmitter comprises: a baseband signal path, a local oscillator signal path and a mixer;

the baseband signal path is used for generating 2N phase analog baseband signals, wherein N is a positive integer;

the local oscillator signal path includes: a first buffer, a local oscillator calibration circuit, and a frequency division circuit, wherein,

the first buffer is used for acquiring a first oscillation signal and calibrating the duty ratio of the first oscillation signal according to the differential voltage signal to obtain a second oscillation signal;

the local oscillator calibration circuit includes: the second buffer is used for generating a static point adjusting signal according to a self-bias voltage, and adjusting the current of the voltage-dividing type biasing circuit by using the static point adjusting signal to generate a differential voltage signal, wherein a static operating point of the second buffer is matched with a static operating point in the first buffer, and a common-mode voltage signal corresponding to the differential voltage signal is used for tracking the static point adjusting signal;

the frequency division circuit is used for carrying out frequency division on the second oscillating signal to obtain a local oscillating signal with a 2N phase;

the frequency mixer is configured to perform up-conversion on the analog baseband signal by using the local oscillator signal to generate a radio frequency signal.

16. The transmitter of claim 15, wherein the local oscillator calibration circuit further comprises: an error amplifier;

the error amplifier is used for obtaining a feedback voltage from the voltage-dividing bias circuit, generating an error amplification signal according to a difference value of the feedback voltage and the quiescent point adjustment signal, and adjusting current in the voltage-dividing bias circuit by using the error amplification signal.

17. The transmitter of claim 16, wherein the voltage-dividing bias circuit comprises: the power supply comprises a current source, a first P-channel metal oxide semiconductor (PMOS) tube, a first capacitor, a first resistor and a second resistor;

one end of the current source and the source electrode of the first PMOS tube are respectively coupled to a first bias voltage end;

the other end of the current source and the drain electrode of the first PMOS are respectively coupled to the first end of the first resistor;

the grid electrode of the first PMOS tube is coupled with one end of the first capacitor and used for receiving the error amplification signal;

the second end of the first resistor, the first end of the second resistor and the other end of the first capacitor are respectively coupled to a first node, and the first node is used for providing the feedback voltage;

the second end of the second resistor is coupled to ground.

18. The transmitter of claim 17, wherein the first resistor and the second resistor are both fixed resistors;

the first end of the first resistor and the first end of the second resistor are used for providing the differential voltage signal.

19. The transmitter of claim 17, wherein the first resistor and the second resistor are both multi-step adjusting resistors, and the first resistor and the second resistor further comprise adjusting terminals;

the adjusting end of the first resistor and the adjusting end of the second resistor are used for providing the differential voltage signal.

20. The transmitter according to any of claims 15-19, wherein the second buffer comprises: the second PMOS tube, the N-channel metal oxide semiconductor NMOS tube and the third resistor;

the source electrode of the second PMOS tube is coupled to a second bias voltage end;

the drain electrode of the second PMOS tube, one end of the third resistor and the drain electrode of the NMOS tube are all coupled to a second node, and the second node is used for providing the self-bias voltage;

the grid electrode of the second PMOS tube, the other end of the third resistor and the grid electrode of the NMOS tube are coupled to a third node, and the third node is used for providing the static point adjusting signal;

and the source electrode of the NMOS tube is coupled with the ground.

21. The transmitter according to any one of claims 15 to 20, wherein the local oscillator calibration circuit further comprises: a filter;

the filter is configured to perform filtering processing on the differential voltage signal, and provide the filtered differential voltage signal to the first buffer.

22. The transmitter of claim 21, wherein the filter comprises: a fourth resistor, a second capacitor, a fifth resistor and a third capacitor;

one end of the fourth resistor is coupled with one end of the second capacitor, one end of the fifth resistor is coupled with one end of the third capacitor, and one end of the fourth resistor and one end of the fifth resistor are used for receiving the differential voltage signal;

the other end of the second capacitor and the other end of the third capacitor are respectively coupled to the ground;

the other end of the fourth resistor and the other end of the fifth resistor are used for providing the filtered differential voltage signal.

23. The transmitter according to any of claims 15-22, wherein the first buffer is specifically configured to:

and calibrating the zero-crossing point of the first oscillating signal according to the differential voltage signal so as to enable the duty ratio of the second oscillating signal to be 50%.

24. A local oscillator calibration circuit, applied to a transmitter with multiple phases, a first buffer in the transmitter being configured to calibrate a duty cycle of an oscillation signal of the transmitter according to a differential voltage signal, the local oscillator calibration circuit comprising: the second buffer and the voltage division type bias circuit;

the second buffer is configured to generate a quiescent point adjustment signal according to a self-bias voltage, and adjust a current of the voltage-dividing bias circuit by using the quiescent point adjustment signal to generate the differential voltage signal, where a quiescent operating point of the second buffer is matched with a quiescent operating point in the first buffer, and a common-mode voltage signal corresponding to the differential voltage signal is used to track the quiescent point adjustment signal.

25. The local oscillator calibration circuit of claim 24, wherein the local oscillator calibration circuit further comprises: an error amplifier;

the error amplifier is used for obtaining a feedback voltage from the voltage-dividing bias circuit, generating an error amplification signal according to a difference value of the feedback voltage and the quiescent point adjusting signal, and adjusting the current of the voltage-dividing bias circuit by using the error amplification signal.

26. The local oscillator calibration circuit of claim 25, wherein the voltage division bias circuit comprises: the power supply comprises a current source, a first P-channel metal oxide semiconductor (PMOS) tube, a first capacitor, a first resistor and a second resistor;

the other end of the current source and the drain electrode of the first PMOS are respectively coupled to a first end of the first resistor;

the second end of the second resistor is coupled to ground.

27. The local oscillator calibration circuit of claim 26, wherein the first resistor and the second resistor are both fixed resistors;

28. The local oscillator calibration circuit of claim 26, wherein the first resistor and the second resistor are both multi-stage adjusting resistors, and the first resistor and the second resistor further comprise adjusting terminals;

29. The local oscillator calibration circuit of any one of claims 24 to 28, wherein the second buffer comprises: the second PMOS tube, the N-channel metal oxide semiconductor NMOS tube and the third resistor;

the source electrode of the NMOS tube is coupled to the ground.

30. The local oscillator calibration circuit of any one of claims 24 to 29, further comprising: a filter;

31. The local oscillator calibration circuit of claim 30, wherein the filter comprises: a fourth resistor, a second capacitor, a fifth resistor and a third capacitor;

32. The local oscillator calibration circuit according to any one of claims 24 to 31, wherein the first buffer is specifically configured to:

and calibrating the zero crossing point of the oscillation signal according to the differential voltage signal so as to enable the duty ratio of the calibrated oscillation signal to be 50%.

33. A calibration method, for use in a transmitter, the transmitter comprising: a baseband signal path, a local oscillator signal path, and a mixer, the method comprising:

the baseband signal path generates an analog baseband signal with 2N phases and outputs the analog baseband signal to the mixer, wherein N is a positive integer;

the local oscillation signal path includes: a local oscillator calibration circuit, a first buffer, and a frequency division circuit, wherein,

the first buffer acquires a first oscillation signal, and calibrates the duty ratio of the first oscillation signal according to a differential voltage signal to obtain a second oscillation signal;

the local oscillator calibration circuit comprises a second buffer and a voltage division bias circuit, wherein,

the second buffer generates a static point adjusting signal according to a self-bias voltage, adjusts the current of the voltage-dividing bias circuit by using the static point adjusting signal, generates a differential voltage signal and outputs the differential voltage signal to the first buffer, wherein a static operating point of the second buffer is matched with a static operating point in the first buffer, and a common-mode voltage signal corresponding to the differential voltage signal is used for tracking the static point adjusting signal;

the frequency divider divides the frequency of the second oscillating signal to obtain a local oscillating signal with a 2N phase and outputs the local oscillating signal to the frequency mixer;

the frequency mixer performs up-conversion on the analog baseband signal by using the local oscillator signal to generate a radio frequency signal.

34. The calibration method of claim 33, wherein the local oscillator calibration circuit further comprises an error amplifier, the method further comprising:

the error amplifier obtains a feedback voltage from the voltage-dividing bias circuit, generates an error amplification signal according to a difference value of the feedback voltage and the quiescent point adjustment signal, and adjusts the current of the voltage-dividing bias circuit by using the error amplification signal.

35. The calibration method according to claim 33 or 34, wherein the local oscillator calibration circuit further comprises a filter, the method further comprising:

the filter receives the differential voltage signal, performs filtering processing on the differential voltage signal, and provides the filtered differential voltage signal to the first buffer.

36. The calibration method according to any one of claims 33 to 35, wherein the calibrating the duty cycle of the first oscillating signal by the first buffer according to the differential voltage signal to obtain the second oscillating signal comprises:

the first buffer calibrates a zero-crossing point of the first oscillation signal according to the differential voltage signal so that a duty ratio of the second oscillation signal is 50%.

37. A transmitter comprising a baseband signal path, a local oscillator signal path and a mixer, the baseband signal path comprising a digital-to-analog converter and an amplifier coupled thereto, the baseband signal path and the local oscillator signal path being coupled to the mixer respectively.