CN115437562A

CN115437562A - Method, device, equipment and medium for reducing flash memory read interference in solid state disk

Info

Publication number: CN115437562A
Application number: CN202210963639.4A
Authority: CN
Inventors: 张展明; 弗兰克·陈; 李晓龙; 熊小明; 张晓霞
Original assignee: Exascend Technology Wuhan Co ltd
Current assignee: Exascend Technology Wuhan Co ltd
Priority date: 2022-08-11
Filing date: 2022-08-11
Publication date: 2022-12-06

Abstract

The invention discloses a method, a device, equipment and a medium for reducing read interference of a flash memory in a solid state disk, wherein the method comprises the following steps: recording the reading times by taking the storage block as a unit, screening out the storage block containing the reading hot data from the data read by the host continuously, and putting the storage block containing the reading hot data into a reading interference storage pool for management; and recording the read times of the memory blocks in the read interference memory pool by taking the word as a unit, and when the read times of one word in the memory blocks exceed a preset threshold value, moving other words in the memory blocks to another preset standby memory block. The invention applies a new management strategy, can reduce frequent data movement in the life cycle of the disk, reduce write amplification and prolong the service life of the disk. Overall, the performance of the SSD is at its best available throughout its lifetime, with the overall performance being optimal.

Description

Method, device, equipment and medium for reducing flash memory read interference in solid state disk

Technical Field

The invention relates to the technical field of solid state disks, in particular to a method, a device, equipment and a medium for reducing flash memory read interference in a solid state disk.

Background

The Solid State Disk (SSD) is composed of a main control unit and a solid state storage unit, and the solid state storage unit includes a plurality of storage blocks (or called data blocks). Because the solid state disk has no rewriting mechanism, after a Block is full of data, the data in the Block needs to be erased, and new data can be written. While the erase operation is very time consuming. In consideration of efficiency, when a user writes the same logical address, the solid state disk actually writes the same logical address into different physical addresses, which causes the situation that invalid data exists on an original storage address, and garbage collection is needed to improve the space utilization rate.

The page reading operation of the solid state disk can cause interference to other pages in the same block, and with the improvement of the Flash manufacturing process, the number of pages of one physical block is more, and information stored in a single Cell (storage unit) is more (such as TLC and QLC), the problem becomes more prominent, and in a serious case, errors in read back data can be caused, and data loss can be caused.

To address the problem of read disturb, the existing solution is to maintain a read number table for each Block. When the read times reach the threshold value, all the data on the Block are moved away, and when the data are written into a new Block, the read times table is cleared to be 0. This causes WA (Write Amplification, which is a ratio of the amount of data written to the flash memory to the amount of data written by the user) of the disc to increase. In some specific use scenes, the obvious defect of the solution is that the disk can continuously move data, the aging of the disk is accelerated, the service life of the disk is greatly reduced, when a read interference management algorithm is carried out, frequent data moving can occupy the resources of the disk and the bandwidth of a flash bottom layer, so that the read-write performance is reduced, the phenomenon of blocking can occur in the use process, and even data loss can be caused in scenes such as abnormal power failure.

Disclosure of Invention

The present invention is directed to overcome the above-mentioned drawbacks of the background art, and provides a method for reducing flash memory read interference in a solid state disk.

In a first aspect, a method for reducing flash memory read interference in a solid state disk is provided, including:

step 1, recording the reading times by taking a storage block as a unit, screening out the storage block containing the reading hot data from the data continuously read by a host, and putting the storage block containing the reading hot data into a reading interference storage pool for management;

and 2, recording the reading times of the storage blocks in the reading interference storage pool by taking the words as a unit, and moving other words in the storage block to another preset standby storage block when the reading times of one word in the storage block exceed a preset threshold value.

Further, the step 1 comprises:

storing and updating the first reading times a of each storage block by taking the storage block of the solid state disk as a unit, and giving a first reading time threshold A of each storage block; when the first read times a of a certain storage block exceed the corresponding first read times threshold A, the storage block is placed into a read interference storage pool for management.

Further, the step 2 comprises:

storing and updating the second reading times B of each word line in the storage block by taking the word line as a unit, and giving a second reading time threshold B to each word line; and when the second reading time B of one word line in the storage block exceeds the corresponding second reading time threshold B, moving other word lines in the storage block to another preset standby storage block.

Further, the first read time threshold a is drawn up according to the characteristics of the flash memory and experimental data.

In a second aspect, an apparatus for reducing flash memory read interference in a solid state disk is provided, including:

the screening module is used for recording the reading times by taking the storage block as a unit and screening the storage block containing the read hot data in the data continuously read by the host;

the read interference storage pool is used for storing the storage blocks which are screened by the screening module and contain the read hot data;

the judging module is used for recording the read times of the storage blocks in the read interference storage pool by taking the word as a unit, and comparing the read times of each word in the storage blocks with a preset threshold value to judge whether the read times of the word exceed the preset threshold value;

and the data moving module is used for moving other words in the storage block to another preset standby storage block when the reading times of one word in the storage block exceed a preset threshold value.

Further, the screening module includes:

the device comprises a first comparison unit, a second comparison unit and a third comparison unit, wherein the first comparison unit is used for storing and updating a first reading time a of each storage block by taking the storage block of the solid-state disk as a unit, and comparing the first reading time a with a given first reading time threshold A;

and the first screening unit is used for screening out the storage blocks of which the first read times a exceed the first read time threshold A and placing the storage blocks into a read interference storage pool to be managed as the storage blocks containing read hot data.

Further, the judging module comprises:

and the second comparison unit is used for storing and updating the second reading times B of each word line of the storage blocks in the read interference storage pool by taking the word line as a unit, and comparing the second reading times B with a given second reading time threshold B.

Further, there are one or more spare memory blocks.

In a third aspect, the present invention provides an apparatus for reducing flash memory read interference in a solid state disk, including:

a memory for storing a computer program;

a processor for implementing the steps of the method according to any of the above claims when executing the computer program.

In a fourth aspect, the present invention provides a readable storage medium, on which a computer program is stored, which, when being executed by a processor, implements the steps of the method according to any one of the above-mentioned technical solutions.

Compared with the prior art, the invention has the following advantages:

the storage blocks containing read hot data are screened out by taking the storage blocks as units, the storage blocks are placed into a read interference storage pool, the read times of the word line are recorded, read cold data in the storage blocks are moved, and the read hot data are reserved, so that the influence of the read interference on other word lines (read cold data) of the storage blocks caused by the frequently read hot data of the host is reduced. By applying a new management strategy, frequent data movement in the life cycle of the disk can be reduced, write amplification is reduced, and the service life of the disk is prolonged. Overall, the performance of the SSD is at its best available throughout its lifetime, with the overall performance being optimal.

Drawings

FIG. 1 is a schematic diagram of MLC threshold voltage distributions.

FIG. 2 is a diagram of flash internal read data voltages.

FIG. 3 is a graph showing the change in nand read disturb threshold voltage.

FIG. 4 is a schematic diagram of the inter-storage block data transfer process of the present invention.

FIG. 5 is a flow chart of a read disturb algorithm of the present invention.

Detailed Description

Reference will now be made in detail to the present embodiments of the invention, examples of which are illustrated in the accompanying drawings. While the invention will be described in conjunction with the specific embodiments, it will be understood that they are not intended to limit the invention to the described embodiments. On the contrary, it is intended to cover alternatives, modifications, and equivalents as may be included within the spirit and scope of the invention as defined by the appended claims. It should be noted that the method steps described herein may be implemented by any functional block or functional arrangement and that any functional block or functional arrangement may be implemented as a physical entity or a logical entity, or a combination of both.

In order that those skilled in the art will better understand the present invention, the following detailed description of the invention is provided in conjunction with the accompanying drawings and the detailed description of the invention.

Note that: the example to be described next is only a specific example, and does not limit the embodiments of the present invention necessarily to the following specific steps, values, conditions, data, orders, and the like. Those skilled in the art can, upon reading this specification, utilize the concepts of the present invention to construct more embodiments than those specifically described herein.

The associated abbreviations or term definitions are explained first:

NAND A non-volatile storage medium, also known as NAND Flash memory chip (NAND Flash).

The SSD is a Solid State disk, solid State Drive and a data storage device consisting of a plurality of NANDFlash arrays.

Page: and the storage page is a basic unit for executing read and write operations by the NAND Flash.

And Block, namely a storage Block, wherein the NAND Flash consisting of a plurality of pages executes a basic unit of an erasing operation.

FTL Flash Translation Layer, NAND Flash management algorithm.

PEC, program Erase Count, which is the number of times Block is erased.

SLC, single Level Cell, the minimum memory Cell (Cell) can only store 1 bit of NAND Flash.

MLC is Multiple Level Cell, and the minimum memory Cell (Cell) can store NAND Flash with 2 bits.

Triple Level Cell, the minimum memory Cell (Cell) can store 3 bit NAND Flash.

And Ecc error, wherein the controller generates BCH/LDPC decoding errors.

WA: write Amplification, is the ratio of the amount of data written to the flash memory to the amount of data written by the user.

The data storage vault on the SSD is implemented by Nand Flash, which is a nonvolatile type memory because of its charge retention capability. But as Nand Flash is used and worn, the charge retention capacity is gradually weakened, and the probability of the occurrence of ecc error is increased.

Take MLC as an example. One MLC, each memory cell stores two bits of data, for a total of four states. Four different states are distinguished by injecting different numbers of charges into the floating gate of the memory cell.

To turn on the transistor, a control voltage greater than the threshold voltage of the transistor must be applied to the gate. For a floating gate transistor, injecting different amounts of electrons into the floating gate will change the threshold voltage of the transistor. Since different states have different threshold voltages, we can determine the current memory cell data by applying different reference voltages to the control electrode. Taking fig. 1 as an example, the low-bit data represents lower Page data, and the high-bit data represents Upper Page data. If we want to read the Upper Page data, to distinguish 0 from 1, we need to add a reference voltage V2 to the control gate: if the transistor is on, the description is 1, otherwise it is 0. If the Lower Page data is to be read, 0 and 1 are distinguished, a reference voltage V1 is added on a control electrode, if the control electrode is turned on, the data is 1, if the control electrode is turned off, no method is used for indicating that the data is 0 and 1, because threshold voltages of three states of 10/01/00 are all larger than V1, the reference voltage of the control electrode needs to be changed into V2, then the on state of a transistor is seen, if the transistor is turned on, the data is 0, if the transistor is turned off, the data cannot be judged to be 0 and 1, and because the threshold voltages of the states of 01 and 00 are both larger than V2. At this time, we need to change the voltage of the gate to V3 again, and at this time, the on state is 1, and the off state is 0. It is seen that reading the lower page requires trying a plurality of reference voltages to obtain the final data, and reading the upper page only needs one time, so for the MLC, the time for reading the lower page and the time for reading the upper page are different.

FIG. 2 is a diagram illustrating the internal read data voltages of the flash.

When a certain page in a block needs to be read, a Vpass voltage needs to be added to all other word control electrodes, so that other transistors are ensured to be conducted; for the read page, a reference voltage Vread needs to be added to the control electrode of the word where the page is located. In a read operation, the voltage applied to the substrate is 0, vread is the voltage applied to the control gate for the page being read, and Vpass is the voltage applied to the control gate for the other pages. Since Vpass is applied to other pages, which is a relatively large voltage, a strong electric field is formed between the floating gate and the substrate, which draws some electrons into the floating gate, i.e., causes a slight program on word line of Vpass. With the increasing times of reading page data on the block, floating gate electrons in word are accumulated, so that the state of data in the word is changed, and the ecc error of the data is represented. This is the read disturb. In short, page reads on the same block affect data on other words.

As shown in fig. 3, read disturb can cause the floating gate to enter electrons, which can cause the transistor threshold voltage to shift right.

If the threshold voltage of the transistor is changed, the internal logic of the flash memory is still applied to the control electrode according to the previous reference voltage, and then the data is judged, the misjudgment is determined, namely, the wrong data is read.

The degree of data influence caused by reading interference mainly depends on two factors, namely, the number of times of reading the data on the block is related, and the more the data are read, the more the data are right-shifted, the greater the influence is; secondly, the larger the PEC, the poorer the insulation effect, the easier it is for electrons to enter the floating gate, and the greater the influence of read disturb.

To address the problem of read disturb, existing solutions require maintaining a table of read times for each block, i.e., a record of how many times the block has been read. When the read times reach the threshold value, all the data on the block are moved away, and when the data are written into a new block, the read times table is cleared to be 0.

In some specific usage scenarios, the obvious disadvantage of this solution is that the disk will constantly move data, causing increased write amplification. And the smaller WA means the less wear and tear on the flash memory, which can prolong the service life of the flash memory, thereby supporting more user data writing amount.

Therefore, the prior art has the problems that:

in the conventional SSD read disturb management algorithm, when detecting that the number of reads in a block exceeds a set threshold, the FTL moves all valid data in the block to a new block, which causes the WA of the disc to increase.

In some specific use scenarios, the read disturb algorithm will shift data frequently, which accelerates the aging of the disk, resulting in a significant reduction in the lifetime of the disk.

When a read interference management algorithm is performed, frequent data movement occupies the resources of a disk and the bandwidth of a flash bottom layer, so that the read-write performance is reduced, a blocking phenomenon may occur in the use process, and even data loss may be caused in scenes such as abnormal power failure.

We know that there is some read hot and cold data during SSD user usage. Cold data, that is, data that a user does not frequently access/update, such as operating system data written by the user into the SSD, read-only file data, movies, and the like; in contrast, hot data is data that is frequently accessed/updated by a user.

For example, to solve the above technical problem, the present embodiment provides a method for reducing flash memory read interference in a solid state disk. As shown in fig. 5, the method includes:

step 1, recording the reading times by taking a storage block as a unit, screening out the storage block containing the read hot data from the data continuously read by a host, and putting the storage block containing the read hot data into a read interference storage pool for management.

The step 1 comprises the following steps:

storing and updating the first reading times a of each storage block by taking the storage block of the solid state disk as a unit, and giving a first reading time threshold A of each storage block; when the first read times a of a certain storage block exceed the corresponding first read times threshold A, the storage block is placed into a read interference storage pool for management. The first reading time threshold A is drawn up according to the characteristics of the flash memory flash and experimental data. The first read count threshold a is threshold 2 in fig. 5.

The step 2 comprises the following steps:

storing and updating the second reading times B of each word line in the storage block by taking the word line as a unit, and giving a second reading time threshold B to each word line; and when the second reading time B of a certain word line in the storage block exceeds a corresponding second reading time threshold B, moving other word lines in the storage block to another preset standby storage block. The second read number threshold B is threshold 1 in fig. 5.

Fig. 5 is a flowchart of a read disturb algorithm of the present invention, and it can be seen from fig. 5 that, after the read disturb detection is started, it is first determined whether a memory block is in a read disturb memory pool, if not, a block read number table is updated, it is determined whether the read number is greater than a threshold 2, if so, the block is placed in the read disturb memory pool, and if not, the read disturb detection is ended, and the next read disturb detection can be performed. If the storage block is in the read interference storage pool, updating a word read number table of the storage block, and judging whether the read number is greater than a threshold value 1, if so, moving block valid data (read cold data), and finishing read interference detection, otherwise, directly finishing read interference detection.

As shown in FIG. 4, read hot data in blockA in the read disturb pool remains, and all read cold data in blockA is moved to blockB (i.e., the spare memory block).

The corresponding cold reading data is moved to the blockB, after the moving is completed, the blockA is continued to read the hot data, although other pages can be influenced, because the affected pages on the blockA do not have valid data, the data moving is not needed any more, and meanwhile, the blockB does not have reading interference.

The invention is based on the defects of the existing design, and solves the problem of the increased SSD write amplification caused by frequent data movement. Through design improvement, the following beneficial effects can be achieved:

1. screening a certain amount of blocks and placing the blocks into a read interference storage pool, recording the read times of the work line in the read interference storage pool, realizing moving read cold data, and reserving read hot data, thereby reducing the influence of frequent reading of a host on the read interference of other work lines of the blocks;

2. by applying a new management strategy, frequent data movement in the life cycle of the disk can be reduced, write amplification is reduced, and the service life of the disk is prolonged;

3. overall, the performance of the SSD is at its best available throughout its lifecycle, with the overall performance being optimal.

Based on the same inventive concept, the invention also provides a device for reducing the read interference of the flash memory in the solid state disk, which comprises:

the screening module is used for recording the reading times by taking the storage block as a unit and screening the storage block containing the read hot data from the data continuously read by the host;

the read interference storage pool is used for storing the storage blocks which are screened by the screening module and contain read hot data;

the judging module is used for recording the reading times of the storage blocks in the read interference storage pool by taking the word as a unit, and comparing the reading times of each word in the storage blocks with a preset threshold value to judge whether the reading times of the word exceed the preset threshold value or not;

Wherein the screening module comprises:

The judging module comprises:

and the second comparison unit is used for storing and updating the second reading times B of each word line of the storage block in the read interference storage pool by taking the word line as a unit, and comparing the second reading times B with a given second reading time threshold B.

One or more of the spare memory blocks. The spare memory block may be randomly given.

a memory for storing a computer program;

a processor for implementing the steps of the method as described above when executing said computer program.

Based on the same inventive concept, the present invention proposes a readable storage medium having stored thereon a computer program which, when executed by a processor, implements the steps of the above method.

In the description of the present invention, it should be noted that the terms "upper", "lower", and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, which are merely for convenience of describing the present invention and simplifying the description, but do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus, should not be construed as limiting the present invention. Unless expressly stated or limited otherwise, the terms "mounted," "connected," and "coupled" are to be construed broadly and encompass, for example, both fixed and removable coupling as well as integral coupling; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meanings of the above terms in the present invention can be understood by those skilled in the art according to specific situations.

It is to be noted that, in the present invention, relational terms such as "first" and "second", and the like, are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrases "comprising one of 8230; \8230;" 8230; "does not exclude the presence of additional like elements in a process, method, article, or apparatus that comprises the element.

The above description is merely illustrative of particular embodiments of the invention that enable those skilled in the art to understand or practice the invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A method for reducing flash memory read interference in a solid state disk is characterized by comprising the following steps:

2. The method for reducing flash memory read interference in a solid state disk according to claim 1, wherein the step 1 comprises:

storing and updating the first reading times a of each storage block by taking the storage block of the solid state disk as a unit, and giving a first reading time threshold A to each storage block; when the first read times a of a certain storage block exceed the corresponding first read times threshold A, the storage block is placed into a read interference storage pool for management.

3. The method of claim 2, wherein the step 2 comprises:

4. The method of claim 3, wherein the first read time threshold A is formulated according to characteristics of a flash memory flash and experimental data.

5. An apparatus for reducing flash memory read interference in a solid state disk, comprising:

6. The apparatus of claim 5, wherein the screening module comprises:

7. The apparatus for reducing flash memory read interference in a solid state disk of claim 6, wherein the determining module comprises:

8. The apparatus of claim 7, wherein one or more of the spare memory blocks are provided.

9. An apparatus for reducing flash memory read interference in a solid state disk, comprising:

a memory for storing a computer program;

a processor for implementing the steps of the method according to any one of claims 1 to 4 when executing the computer program.

10. A readable storage medium, characterized in that a computer program is stored thereon which, when being executed by a processor, carries out the steps of the method according to any one of claims 1 to 4.