CN115414971B - Preparation method of micro-flow control chip and micro-flow control chip - Google Patents
Preparation method of micro-flow control chip and micro-flow control chip Download PDFInfo
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- CN115414971B CN115414971B CN202210930277.9A CN202210930277A CN115414971B CN 115414971 B CN115414971 B CN 115414971B CN 202210930277 A CN202210930277 A CN 202210930277A CN 115414971 B CN115414971 B CN 115414971B
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- 238000002360 preparation method Methods 0.000 title claims abstract description 14
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 184
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 184
- 239000010703 silicon Substances 0.000 claims abstract description 184
- 238000004528 spin coating Methods 0.000 claims abstract description 71
- 239000004205 dimethyl polysiloxane Substances 0.000 claims abstract description 60
- 229920000435 poly(dimethylsiloxane) Polymers 0.000 claims abstract description 60
- 238000000034 method Methods 0.000 claims abstract description 36
- 239000011521 glass Substances 0.000 claims abstract description 28
- 239000000758 substrate Substances 0.000 claims abstract description 21
- 239000007788 liquid Substances 0.000 claims abstract description 20
- 239000012452 mother liquor Substances 0.000 claims abstract description 18
- 238000010438 heat treatment Methods 0.000 claims abstract description 13
- -1 Polydimethylsiloxane Polymers 0.000 claims abstract description 11
- 239000003795 chemical substances by application Substances 0.000 claims abstract description 6
- 239000000178 monomer Substances 0.000 claims abstract description 6
- 229920002120 photoresistant polymer Polymers 0.000 claims description 75
- 238000004519 manufacturing process Methods 0.000 claims description 24
- 238000004140 cleaning Methods 0.000 claims description 22
- 238000003860 storage Methods 0.000 claims description 17
- 238000001723 curing Methods 0.000 claims description 16
- 238000000861 blow drying Methods 0.000 claims description 15
- 238000001816 cooling Methods 0.000 claims description 13
- 230000001133 acceleration Effects 0.000 claims description 12
- 239000011159 matrix material Substances 0.000 claims description 12
- 238000011068 loading method Methods 0.000 claims description 9
- 238000001259 photo etching Methods 0.000 claims description 9
- 238000005406 washing Methods 0.000 claims description 9
- 238000001035 drying Methods 0.000 claims description 7
- 238000002156 mixing Methods 0.000 claims description 5
- 238000010002 mechanical finishing Methods 0.000 abstract description 3
- 239000000243 solution Substances 0.000 description 9
- 238000010586 diagram Methods 0.000 description 7
- 238000001459 lithography Methods 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- KFZMGEQAYNKOFK-UHFFFAOYSA-N Isopropanol Chemical compound CC(C)O KFZMGEQAYNKOFK-UHFFFAOYSA-N 0.000 description 2
- 238000004458 analytical method Methods 0.000 description 2
- 239000010413 mother solution Substances 0.000 description 2
- 238000002791 soaking Methods 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 239000003814 drug Substances 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000012530 fluid Substances 0.000 description 1
- 238000009434 installation Methods 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B01—PHYSICAL OR CHEMICAL PROCESSES OR APPARATUS IN GENERAL
- B01L—CHEMICAL OR PHYSICAL LABORATORY APPARATUS FOR GENERAL USE
- B01L3/00—Containers or dishes for laboratory use, e.g. laboratory glassware; Droppers
- B01L3/50—Containers for the purpose of retaining a material to be analysed, e.g. test tubes
- B01L3/502—Containers for the purpose of retaining a material to be analysed, e.g. test tubes with fluid transport, e.g. in multi-compartment structures
- B01L3/5027—Containers for the purpose of retaining a material to be analysed, e.g. test tubes with fluid transport, e.g. in multi-compartment structures by integrated microfluidic structures, i.e. dimensions of channels and chambers are such that surface tension forces are important, e.g. lab-on-a-chip
- B01L3/502707—Containers for the purpose of retaining a material to be analysed, e.g. test tubes with fluid transport, e.g. in multi-compartment structures by integrated microfluidic structures, i.e. dimensions of channels and chambers are such that surface tension forces are important, e.g. lab-on-a-chip characterised by the manufacture of the container or its components
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
- B81C1/00015—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
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- Manufacturing & Machinery (AREA)
- Health & Medical Sciences (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Dispersion Chemistry (AREA)
- Analytical Chemistry (AREA)
- General Health & Medical Sciences (AREA)
- Hematology (AREA)
- Clinical Laboratory Science (AREA)
- Chemical Kinetics & Catalysis (AREA)
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Abstract
The application discloses a preparation method of a micro flow control chip and the micro flow control chip, which are characterized in that Polydimethylsiloxane (PDMS) monomer and a curing agent are mixed to obtain PDMS mother liquor; pouring PDMS mother liquor into a first silicon mold respectively, and heating and curing to obtain first cured PDMS; pouring the PDMS mother liquor into a second silicon mold, spin-coating, and heating and thermally curing to obtain second cured PDMS; separating the first cured PDMS from the first silicon mold to obtain a gas path layer; separating the second cured PDMS from the second silicon mold to obtain a liquid path layer; attaching the liquid path layer to the gas path layer to obtain a chip substrate; placing the chip substrate on glass, and processing the chip substrate and the glass by a plasma cleaner; and (3) attaching the chip substrate to glass, and baking the chip substrate and the glass to obtain the micro-current control chip. Compared with the laser processing and mechanical finishing methods, the method has higher precision and simpler method.
Description
Technical Field
The application relates to the technical field of chips, in particular to a preparation method of a micro-flow control chip and the micro-flow control chip.
Background
The microfluidic chip technology (Microfluidics) integrates basic operation units of sample preparation, reaction, separation, detection and the like in biological, chemical and medical analysis processes on a micron-scale chip, and automatically completes the whole analysis process. Because of its great potential in biological, chemical, medical and other fields, it has been developed into a new research field where the disciplines of biology, chemistry, medicine, fluids, electronics, materials, machinery and the like are crossed.
In the related art, the micro flow control chip is usually prepared by adopting methods such as laser processing, mechanical finish processing and the like, and the processing equipment is expensive and the method is complex.
Disclosure of Invention
The present application aims to solve at least one of the technical problems existing in the prior art. Therefore, the application provides a preparation method of a micro-flow control chip and the micro-flow control chip, which can manufacture the micro-flow control chip and has simple method.
The preparation method of the microfluidic chip according to the embodiment of the first aspect of the present application comprises:
manufacturing a first silicon die according to a first mask plate, wherein the first silicon die is provided with a plurality of air passage channels, each air passage channel is provided with a telescopic area, and the cross section area of each telescopic area is larger than that of each air passage channel;
manufacturing a second silicon die according to a second mask plate and a third mask plate, wherein the second silicon die is provided with at least two input channels, at least two output channels and at least two storage cavities, and each storage cavity is respectively communicated with one input channel and one output channel;
mixing Polydimethylsiloxane (PDMS) monomers with a curing agent to obtain PDMS mother liquor;
pouring the PDMS mother liquor into the first silicon mold respectively, and performing heating curing to obtain first cured PDMS;
pouring the PDMS mother liquor into the second silicon mold, spin-coating, and heating and curing to obtain second cured PDMS;
separating the first cured PDMS from the first silicon mold to obtain a gas path layer;
separating the second cured PDMS from the second silicon mold to obtain a liquid path layer;
attaching the liquid path layer to the gas path layer to obtain a chip substrate;
placing the chip matrix on glass, and processing the chip matrix and the glass by a plasma cleaning machine;
and attaching the chip matrix to the glass, and baking the chip matrix and the glass to obtain the micro-flow control chip.
The method according to the embodiment of the application has at least the following beneficial effects: according to the method, a first silicon die is manufactured according to a first mask plate; then manufacturing a second silicon die according to the second mask plate and the third mask plate; mixing Polydimethylsiloxane (PDMS) monomers with a curing agent to obtain PDMS mother liquor; pouring PDMS mother liquor into a first silicon mold respectively, and heating and curing to obtain first cured PDMS; pouring the PDMS mother liquor into a second silicon mold, spin-coating, and heating and thermally curing to obtain second cured PDMS; separating the first cured PDMS from the first silicon mold to obtain a gas path layer; separating the second cured PDMS from the second silicon mold to obtain a liquid path layer; attaching the liquid path layer to the gas path layer to obtain a chip substrate; placing the chip substrate on glass, and processing the chip substrate and the glass by a plasma cleaner; and (3) attaching the chip substrate to glass, and baking the chip substrate and the glass to obtain the micro-current control chip. Compared with the laser processing and mechanical finishing methods, the method has higher precision and simpler method.
According to some embodiments of the application, the fabricating a first silicon die according to a first mask plate includes:
providing a first silicon wafer;
spin-coating photoresist on the first silicon wafer;
baking the first silicon wafer subjected to spin coating of photoresist for the first time;
loading the first mask plate and the first silicon wafer subjected to the first baking by using a photoetching machine, and performing ultraviolet exposure; the first mask plate is provided with patterns corresponding to the plurality of air passage channels;
baking the first silicon wafer subjected to ultraviolet exposure for the second time;
cooling the first silicon wafer subjected to the second baking to normal temperature and then developing;
washing and drying the developed first silicon wafer;
and baking the first silicon wafer subjected to washing and blow-drying for the third time to obtain the first silicon die.
According to some embodiments of the application, spin-coating photoresist on the first silicon wafer includes:
carrying out first spin coating on the first silicon wafer by a spin coater, wherein the rotating speed of the spin coater is 500 revolutions per minute, the acceleration is 100 revolutions per minute, and the spin coating time lasts for 5 seconds to 15 seconds;
and carrying out second spin coating on the photoresist on the first silicon wafer subjected to the first spin coating of the photoresist through the photoresist homogenizing machine, wherein the rotating speed of the photoresist homogenizing machine is 3000 rpm, the acceleration is 500 rpm, and the spin coating time lasts for 20 to 50 seconds.
According to some embodiments of the application, the developing the first silicon wafer after the second baking is cooled to normal temperature includes:
cooling the first silicon wafer subjected to the second baking to normal temperature;
and immersing the first silicon wafer cooled to normal temperature in a developing solution for 10 to 40 seconds.
According to some embodiments of the present application, in the first baking of the first silicon wafer after spin-coating photoresist, the baking temperature is 95 ℃ and the baking time is 3 minutes;
in the second baking of the first silicon wafer after ultraviolet exposure, the baking temperature is 95 ℃ and the baking time is 2 to 5 minutes;
and in the third baking of the first silicon wafer after washing and drying, the baking temperature is 150 ℃ and the baking time is 20 to 40 minutes.
According to some embodiments of the application, the fabricating a second silicon die according to a second mask plate and a third mask plate includes:
providing a second silicon wafer;
spin-coating photoresist on the second silicon wafer;
baking the second silicon wafer subjected to the first spin coating of the photoresist for the first time;
loading the second mask plate and the second silicon wafer subjected to the first baking by using a photoetching machine, and performing first ultraviolet exposure; the second mask plate is provided with patterns corresponding to at least two storage cavities;
cooling the second silicon wafer subjected to the first ultraviolet exposure to normal temperature and then carrying out first development;
carrying out first cleaning and blow-drying on the second silicon wafer after the first development;
spin-coating photoresist on the second silicon wafer after cleaning and blow-drying;
baking the second silicon wafer subjected to the second spin coating of the photoresist for the second time;
loading the third mask plate and the second silicon wafer subjected to the second baking by using a photoetching machine, and performing second ultraviolet exposure; the third mask plate is provided with patterns corresponding to at least two input channels and at least two output channels;
baking the second silicon wafer subjected to the second ultraviolet exposure for the third time;
cooling the second silicon wafer subjected to the third baking to normal temperature and then carrying out second development;
carrying out second cleaning and blow-drying on the second silicon wafer subjected to the second development;
and baking the second silicon wafer after the second cleaning and rinsing to obtain a second silicon die.
According to some embodiments of the application, spin-coating photoresist on the second silicon wafer after cleaning and blow-drying comprises:
carrying out first spin coating on the second silicon wafer subjected to cleaning and blow-drying by using a spin coater, wherein the rotating speed of the spin coater is 500 revolutions per minute, the acceleration is 100 revolutions per minute, and the spin coating time lasts for 5 seconds to 15 seconds;
and carrying out second spin coating on the photoresist on the second silicon wafer after the photoresist is subjected to the first spin coating by the photoresist homogenizing machine, wherein the rotating speed of the photoresist homogenizing machine is 3000 rpm, the acceleration is 500 rpm, and the spin coating time lasts for 20 to 50 seconds.
According to some embodiments of the present application, in the first baking of the second silicon wafer after the first spin-coating photoresist, the baking temperature is 110 degrees celsius, and the baking time is 3 minutes;
in the second baking of the second silicon wafer after the second spin coating of photoresist, the baking temperature is 95 ℃ and the baking time is 45 minutes;
in the third baking of the second silicon wafer after the second ultraviolet exposure, the baking temperature is 95 ℃ and the baking time is 30 minutes;
and in the fourth baking of the second silicon wafer after the second cleaning and rinsing, the baking temperature is 150 ℃ and the baking time is 20 to 40 minutes.
According to some embodiments of the application, in said baking the chip substrate and the glass, a baking time is
60 minutes.
In a second aspect, an embodiment of the present application provides a micro-flow control chip, which uses the method according to any one of the embodiments of the first aspect
The preparation method comprises the following steps.
Additional aspects and advantages of the application will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the application.
Drawings
The application is further described with reference to the accompanying drawings and examples, in which:
FIG. 1 is a schematic flow chart of a method for manufacturing a micro-control flow chip according to an embodiment of the application;
FIG. 2 is a schematic structural diagram of a micro-flow control chip made by the preparation method according to an embodiment of the present application;
FIG. 3 is a schematic structural diagram of a micro-flow control chip made by the preparation method according to an embodiment of the present application;
FIG. 4 is a schematic flow chart of a method for manufacturing a micro-control flow chip according to another embodiment of the present application;
FIG. 5 is a schematic flow chart of a method for manufacturing a micro-control flow chip according to another embodiment of the present application;
FIG. 6 is a schematic flow chart of a method for manufacturing a micro-control flow chip according to another embodiment of the present application;
FIG. 7 is a schematic flow chart of a method for manufacturing a micro-control flow chip according to another embodiment of the present application;
FIG. 8 is a schematic flow chart of a method for manufacturing a micro-control flow chip according to another embodiment of the present application;
FIG. 9 is a simplified flow diagram of the preparation of a first silicon die and a second silicon die provided in one embodiment of the application;
fig. 10 is a schematic flow diagram of a micro flow control chip according to another embodiment of the present application.
Detailed Description
Embodiments of the present application are described in detail below, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to like or similar elements or elements having like or similar functions throughout. The embodiments described below by referring to the drawings are illustrative only and are not to be construed as limiting the application.
In the description of the present application, it should be understood that references to orientation descriptions such as upper, lower, front, rear, left, right, etc. are based on the orientation or positional relationship shown in the drawings, are merely for convenience of description of the present application and to simplify the description, and do not indicate or imply that the apparatus or elements referred to must have a particular orientation, be constructed and operated in a particular orientation, and thus should not be construed as limiting the present application.
In the description of the present application, the meaning of a number is one or more, the meaning of a number is two or more, and greater than, less than, exceeding, etc. are understood to exclude the present number, and the meaning of a number is understood to include the present number. The description of the first and second is for the purpose of distinguishing between technical features only and should not be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated or implicitly indicating the precedence of the technical features indicated.
In the description of the present application, unless explicitly defined otherwise, terms such as arrangement, installation, connection, etc. should be construed broadly and the specific meaning of the terms in the present application can be reasonably determined by a person skilled in the art in combination with the specific contents of the technical scheme.
In the description of the present application, the descriptions of the terms "one embodiment," "some embodiments," "illustrative embodiments," "examples," "specific examples," or "some examples," etc., mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present application. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiments or examples. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
Referring to fig. 1, an embodiment of the first aspect of the present application provides a method for preparing a microfluidic chip, which may include, but is not limited to, the following steps:
step S100, manufacturing a first silicon die according to a first mask plate, wherein the first silicon die is provided with a plurality of air passage channels, each air passage channel is provided with a telescopic area, and the cross section area of the telescopic area is larger than that of the air passage channel;
step S200, manufacturing a second silicon die according to a second mask plate and a third mask plate, wherein the second silicon die is provided with at least two input channels, at least two output channels and at least two storage cavities, and each storage cavity is respectively communicated with one input channel and one output channel;
step S300, mixing Polydimethylsiloxane (PDMS) monomers with a curing agent to obtain PDMS mother liquor;
step S400, pouring PDMS mother liquor into a first silicon mold respectively, and performing heating curing to obtain first cured PDMS;
s500, pouring PDMS mother liquor into a second silicon mold, spin-coating, and heating and curing to obtain second cured PDMS;
step S600, separating the first cured PDMS from the first silicon mold to obtain a gas path layer;
step S700, separating the second cured PDMS from the second silicon mold to obtain a liquid path layer;
step S800, attaching a liquid path layer to the gas path layer to obtain a chip substrate;
step S900, placing the chip matrix on glass, and processing the chip matrix and the glass by a plasma cleaner;
and step S1000, attaching the chip matrix on glass, and baking the chip matrix and the glass to obtain the micro-current control chip.
According to the method, a first silicon die is manufactured according to a first mask plate; then manufacturing a second silicon die according to the second mask plate and the third mask plate; mixing Polydimethylsiloxane (PDMS) monomers with a curing agent to obtain PDMS mother liquor; pouring PDMS mother liquor into a first silicon mold respectively, and heating and curing to obtain first cured PDMS; pouring the PDMS mother liquor into a second silicon mold, spin-coating, and heating and thermally curing to obtain second cured PDMS; separating the first cured PDMS from the first silicon mold to obtain a gas path layer; separating the second cured PDMS from the second silicon mold to obtain a liquid path layer; attaching the liquid path layer to the gas path layer to obtain a chip substrate; placing the chip substrate on glass, and processing the chip substrate and the glass by a plasma cleaner; and (3) attaching the chip substrate to glass, and baking the chip substrate and the glass to obtain the micro-current control chip. Compared with the laser processing and mechanical finishing methods, the method has higher precision and simpler method.
It should be noted that, fig. 2 and fig. 3 are schematic structural diagrams of the micro-flow control chip prepared by the above steps, referring to fig. 2 and fig. 3, the micro-flow control chip prepared by the above steps includes a liquid path layer 100 and a gas path layer 200, the liquid path layer 100 is provided with at least two input channels 120, at least two output channels 130 and at least two storage cavities 110, and each storage cavity 110 is respectively communicated with one input channel 120 and one output channel 130; the air channel layer 200 is disposed below the liquid channel layer 100, the air channel layer 200 is provided with a plurality of air channel channels 210, each air channel 210 is provided with a telescopic region 211, each telescopic region 211 corresponds to at least one input channel 120 or at least one output channel 130, the telescopic region 211 is used for extruding the corresponding input channel 120 or output channel 130 when expanding to block the corresponding input channel 120 or output channel 130, and the telescopic region 211 is also used for conducting the corresponding input channel 120 or output channel 130 when recovering. When the DNA solution is stored, the air path channel 210 is inflated, the inflated expansion region 211 of the air path channel 210 expands to squeeze the corresponding input channel 120, so that the inflated expansion region 211 of the air path channel 210 is blocked from the corresponding input channel 120, and the un-inflated expansion region 211 of the air path channel 210 is not expanded, so that the un-inflated expansion region 211 is not squeezed to conduct the corresponding input channel 120, so that part of the input channel 120 is conducted by inflating the air path channel 210, and part of the input channel 120 is blocked, so that the DNA solution can be stored in the corresponding storage cavity 110 through the conducted input channel 120. When the DNA solution is taken out, the storage chamber 110 in which the DNA solution to be extracted is located is selected, and the output channel 130 and the gas channel 210 corresponding to the input channel 120 connected to the other storage chambers 110 except the storage chamber 110 are inflated, so that the corresponding expansion area 211 expands to block the remaining output channel 130 and input channel 120, and only the output channel 130 and input channel 120 connected to the storage chamber 110 in which the DNA solution is required to be taken out are connected, so that the DNA solution in the storage chamber 110 can be discharged through the connected output channel 130 when the input channel 120 is inflated.
It will be appreciated that the third mask is further provided with a pattern matching the total output channels 150, so that the liquid path layer 100 is further provided with the total output channels 150, and the total output channels 150 are respectively connected to each output channel 130.
It will be appreciated that the third mask plate is further provided with a pattern matching the total input channels 140, so that the liquid path layer 100 is further provided with the total input channels 140, and the total input channels 140 are respectively connected to each of the input channels 120.
In step S500, after pouring the PDMS mother solution into the second silicon mold, spin-coating is performed for one minute using a spin coater at a speed of 1500 rpm to form a gas path film of 10 to 20 μm, and heating and curing are performed to obtain second cured PDMS.
In step S800, the liquid path layer is attached to the air path layer, and the liquid path layer corresponds to the pattern of the air path layer, specifically, each expansion region 211 in the air path layer corresponds to at least one input channel 120 or at least one output channel 130 of the liquid path layer.
It will be appreciated that referring to fig. 4, the step S100 of fabricating a first silicon die according to a first mask plate may include the following steps:
step S110, providing a first silicon wafer;
step S120, spin-coating photoresist on the first silicon wafer;
step S130, baking the first silicon wafer subjected to spin coating of photoresist for the first time;
step S140, loading a first mask plate and a first silicon wafer subjected to first baking by using a photoetching machine, and performing ultraviolet exposure; the first mask plate is provided with patterns corresponding to the plurality of air passage channels;
step S150, baking the first silicon wafer subjected to ultraviolet exposure for the second time;
step S160, cooling the first silicon wafer subjected to the second baking to normal temperature and then developing;
step S170, washing and drying the developed first silicon wafer;
and step S180, baking the first silicon wafer subjected to washing and blow-drying for the third time to obtain a first silicon die.
It can be understood that in step S140, the SUSS MA6 lithography machine is used to load the first mask plate and the first silicon wafer after the first baking, and ultraviolet exposure is performed; the first mask plate is provided with patterns corresponding to the plurality of air passage channels. The time of the ultraviolet exposure is 10 to 20 seconds, and may be, for example, 10 seconds, 15 seconds, or 20 seconds.
It will be appreciated that referring to fig. 5, in step S120, the following steps are further included:
step S121, spin coating photoresist is carried out on a first silicon wafer for the first time through a photoresist homogenizer, the rotating speed of the photoresist homogenizer is 500 revolutions per minute, the acceleration is 100 revolutions per minute, and the spin coating time lasts for 5 seconds to 15 seconds; for example, the spin-coating time may last 5 seconds, 10 seconds, or 15 seconds.
Step S122, performing second spin coating on the photoresist on the first silicon wafer subjected to the first spin coating by using a photoresist homogenizer, wherein the rotating speed of the photoresist homogenizer is 3000 rpm, the acceleration is 500 rpm, and the spin coating time lasts for 20 to 50 seconds; for example, the spin-coating time may last 20 seconds, 25 seconds, or 50 seconds.
Specifically, SU8-2015 photoresist is used in the spin-coating process.
It will be appreciated that, referring to fig. 6, step S160 includes the steps of:
step S161, cooling the first silicon wafer subjected to the second baking to normal temperature;
and step S162, soaking the first silicon wafer cooled to the normal temperature in the developing solution for 10 to 40 seconds.
Specifically, the first silicon wafer after the second baking is naturally cooled to room temperature, then is soaked in SU-8 developing page for 10 to 40 seconds, for example, 10 seconds, 20 seconds or 40 seconds, and then is rinsed with isopropanol and dried with an air gun.
It can be understood that, in step S130, the first silicon wafer after spin-coating the photoresist is baked for the first time, the baking temperature is 95 degrees celsius, and the baking time is 3 minutes;
in the step S150, the first silicon wafer after ultraviolet exposure is baked for the second time, wherein the baking temperature is 95 ℃ and the baking time is 2 to 5 minutes; for example, the baking time may be 2 minutes, 3 minutes or 5 minutes.
In the step S180, baking the first silicon wafer subjected to washing and blow-drying for the third time, wherein the baking temperature is 150 ℃ and the baking time is 20-40 minutes; for example, the baking time may be 20 minutes, 30 minutes, or 40 minutes.
It will be appreciated that referring to fig. 7, step S200 may include, but is not limited to, the following steps:
step S2100, providing a second silicon wafer;
step S2110, spin coating photoresist on a second silicon wafer;
step S2120, baking the second silicon wafer subjected to the first spin coating of photoresist for the first time;
step S2130, loading a second mask plate and a second silicon wafer subjected to first baking by using a photoetching machine, and performing first ultraviolet exposure; the second mask plate is provided with patterns corresponding to at least two storage cavities;
step S2140, cooling the second silicon wafer subjected to the first ultraviolet exposure to normal temperature and then performing first development;
step S2150, cleaning and drying the second silicon wafer after the first development for the first time;
step S2160, spin-coating photoresist on the second silicon wafer after cleaning and blow-drying;
step S2170, baking the second silicon wafer after the second spin coating of the photoresist for the second time;
step S2180, loading a third mask plate and a second silicon wafer subjected to second baking by using a photoetching machine, and performing second ultraviolet exposure; the third mask plate is provided with patterns corresponding to at least two input channels and at least two output channels;
step S2190, baking the second silicon wafer subjected to the second ultraviolet exposure for the third time;
step S2200, cooling the second silicon wafer subjected to the third baking to normal temperature and then carrying out second development;
step S2210, cleaning and drying the second silicon wafer after the second development for the second time;
and step S2220, baking the second silicon wafer after the second cleaning and rinsing to obtain a second silicon die.
It is understood that referring to fig. 8, step S2160 may include the following steps:
in step S2161, spin-coating photoresist is performed on the cleaned and dried second silicon wafer for the first time by a spin coater, the spin speed of the spin coater is 500 rpm, the acceleration is 100 rpm, and the spin-coating time lasts for 5 to 15 seconds. For example, the spin-coating time may be 5 seconds, 10 seconds, or 15 seconds in duration.
In step S2162, the photoresist is spin-coated for the second time on the second silicon wafer after the photoresist is spin-coated for the first time by a spin coater, the spin coater has a rotation speed of 3000 rpm, an acceleration of 500 rpm, and a spin coating time lasts for 20 seconds to 50 seconds. For example, the spin-coating time may be 20 seconds, 25 seconds, or 50 seconds in duration.
Specifically, AZ4620 photoresist was used during spin coating.
It is understood that in step S2120, the baking temperature is 110 degrees celsius and the baking time is 3 minutes;
in step S2170, the second silicon wafer after the second spin-coating photoresist is baked for a second time, wherein the baking temperature is 95 ℃ and the baking time is 45 minutes;
in step S2190, baking the second silicon wafer after the second ultraviolet exposure for a third time at a baking temperature of 95 ℃ for 30 minutes;
in step S2220, the second silicon wafer after the second cleaning and rinsing is baked for a fourth time, the baking temperature is 150 degrees celsius, and the baking time is 20 to 40 minutes. For example, the baking time may be 20 minutes, 30 minutes, or 40 minutes.
It will be appreciated that in step S2130, the SUSS MA6 lithography machine is used to load the second mask plate and the second silicon wafer after the first baking, and the first uv exposure is performed for 60 to 70 seconds, for example, 60 seconds, 65 seconds, or 70 seconds.
It will be appreciated that in step S2140, the second silicon wafer is cooled to room temperature and then immersed in AZ462 developer
The line is developed for the first time, with a soak time of 300 to 500 seconds, which may be 300 seconds, 400 seconds, or 500 seconds, for example.
It is understood that in step S2180, the third mask plate and the second silicon wafer after the second baking are loaded by using a SUSS MA6 lithography machine, and the second uv exposure is performed for 40 to 50 seconds, for example, 45 seconds, 48 seconds, or 50 seconds.
It is understood that in step S2200, the second silicon wafer after the third baking is cooled to room temperature and then subjected to the second developing, and the second silicon wafer is soaked in SU-8 developing solution for 100 seconds to 300 seconds, for example, the soaking time may be 100 seconds, 200 seconds or 300 seconds.
It is understood that in the baking of the chip substrate and the glass in step S1000, the baking time is 60 minutes. At the position of
In this step, the baking time is not limited, and may be, for example, 100 degrees celsius, and those skilled in the art will set the baking time according to the actual situation.
It should be noted that the first mask plate, the second mask plate and the third mask plate are all chrome mask plates.
It will be appreciated that referring to fig. 9, fig. 9 is a simplified flow diagram of the preparation of a first silicon die and a second silicon die provided in one embodiment of the present application. The first silicon mold is prepared through steps S110 to S180, and the second silicon mold is prepared through steps S2100 to S2220. In fig. 9, the first silicon die includes a photoresist 410 and a first silicon wafer 400, the photoresist 410 being SU8-2015 and having a height of 15 microns. In fig. 9, the second silicon die includes a photoresist 310 and a photoresist 320 and a second silicon wafer 300, the photoresist 310 being AZ4620, the height being 13 microns, the photoresist 320 being SU8-2100, the height being 100 microns.
It will be appreciated that referring to fig. 10, fig. 10 is a schematic flow diagram of a micro-fluidic chip according to another embodiment of the present application. In fig. 10, a micro flow control chip is prepared by a first silicon die, a second silicon die and polydimethylsiloxane 600, wherein the first silicon die comprises a first silicon wafer 400 and a photoresist 510, the photoresist 510 is photoresist SU8-2015, and the height is 15 micrometers; the second silicon die comprises a second silicon wafer 300, a photoresist 510, a photoresist 520 and a photoresist 530, wherein the photoresist 510 is photoresist SU8-2015, and the height is 15 micrometers; photoresist 520 is photoresist SU8-2100, 100 microns in height; photoresist 530 is photoresist AZ4680, having a height of 13 microns. And pouring the mother solution of the polydimethylsiloxane 600 into a first silicon die and a second silicon die respectively, obtaining the cured polydimethylsiloxane 600, and placing the cured polydimethylsiloxane 600 and the glass 700 into a plasma cleaning machine for treatment to obtain the final micro-current control chip.
In a second aspect, an embodiment of the present application provides a micro-flow control chip, which uses the method according to any one of the embodiments of the first aspect
The preparation method comprises the following steps.
The embodiments of the present application have been described in detail with reference to the accompanying drawings, but the present application is not limited to the above embodiments, and various changes can be made within the knowledge of one of ordinary skill in the art without departing from the spirit of the present application. Furthermore, embodiments of the application and features of the embodiments may be combined with each other without conflict.
Claims (10)
1. The preparation method of the micro flow control chip is characterized by comprising the following steps of:
manufacturing a first silicon die according to a first mask plate, wherein the first silicon die is provided with a plurality of air passage channels, each air passage channel is provided with a telescopic area, and the cross section area of each telescopic area is larger than that of each air passage channel;
manufacturing a second silicon die according to a second mask plate and a third mask plate, wherein the second silicon die is provided with at least two input channels, at least two output channels and at least two storage cavities, and each storage cavity is respectively communicated with one input channel and one output channel;
mixing Polydimethylsiloxane (PDMS) monomers with a curing agent to obtain PDMS mother liquor;
pouring the PDMS mother liquor into the first silicon mold respectively, and performing heating curing to obtain first cured PDMS;
pouring the PDMS mother liquor into the second silicon mold, spin-coating, and heating and curing to obtain second cured PDMS;
separating the first cured PDMS from the first silicon mold to obtain a gas path layer;
separating the second cured PDMS from the second silicon mold to obtain a liquid path layer;
attaching the liquid path layer to the gas path layer to obtain a chip substrate; wherein each expansion area corresponds to at least one input channel or at least one output channel, the expansion areas are used for extruding the corresponding input channel or output channel when expanding to block the corresponding input channel or output channel, and the expansion areas are also used for conducting the corresponding input channel or output channel when recovering;
placing the chip matrix on glass, and processing the chip matrix and the glass by a plasma cleaning machine;
and attaching the chip matrix to the glass, and baking the chip matrix and the glass to obtain the micro-flow control chip.
2. The method for manufacturing a micro-fluidic chip according to claim 1, wherein the manufacturing a first silicon die according to a first mask plate comprises:
providing a first silicon wafer;
spin-coating photoresist on the first silicon wafer;
baking the first silicon wafer subjected to spin coating of photoresist for the first time;
loading the first mask plate and the first silicon wafer subjected to the first baking by using a photoetching machine, and performing ultraviolet exposure; the first mask plate is provided with patterns corresponding to the plurality of air passage channels;
baking the first silicon wafer subjected to ultraviolet exposure for the second time;
cooling the first silicon wafer subjected to the second baking to normal temperature and then developing;
washing and drying the developed first silicon wafer;
and baking the first silicon wafer subjected to washing and blow-drying for the third time to obtain the first silicon die.
3. The method for preparing a micro-fluidic chip according to claim 2, wherein spin-coating photoresist on the first silicon wafer comprises:
carrying out first spin coating on the first silicon wafer by a spin coater, wherein the rotating speed of the spin coater is 500 revolutions per minute, the acceleration is 100 revolutions per minute, and the spin coating time lasts for 5 seconds to 15 seconds;
and carrying out second spin coating on the photoresist on the first silicon wafer subjected to the first spin coating of the photoresist through the photoresist homogenizing machine, wherein the rotating speed of the photoresist homogenizing machine is 3000 rpm, the acceleration is 500 rpm, and the spin coating time lasts for 20 to 50 seconds.
4. The method for manufacturing a micro-fluidic chip according to claim 2, wherein the developing the first silicon wafer after the second baking after cooling to the normal temperature comprises:
cooling the first silicon wafer subjected to the second baking to normal temperature;
and immersing the first silicon wafer cooled to normal temperature in a developing solution for 10 to 40 seconds.
5. The method for manufacturing a micro-control flow chip according to claim 2, wherein,
in the first baking of the first silicon wafer after spin coating of photoresist, the baking temperature is 95 ℃ and the baking time is 3 minutes;
in the second baking of the first silicon wafer after ultraviolet exposure, the baking temperature is 95 ℃ and the baking time is 2 to 5 minutes;
and in the third baking of the first silicon wafer after washing and drying, the baking temperature is 150 ℃ and the baking time is 20 to 40 minutes.
6. The method for manufacturing a micro-current control chip according to claim 1, wherein the manufacturing a second silicon die according to the second mask plate and the third mask plate comprises:
providing a second silicon wafer;
spin-coating photoresist on the second silicon wafer;
baking the second silicon wafer subjected to the first spin coating of the photoresist for the first time;
loading the second mask plate and the second silicon wafer subjected to the first baking by using a photoetching machine, and performing first ultraviolet exposure; the second mask plate is provided with patterns corresponding to at least two storage cavities;
cooling the second silicon wafer subjected to the first ultraviolet exposure to normal temperature and then carrying out first development;
carrying out first cleaning and blow-drying on the second silicon wafer after the first development;
spin-coating photoresist on the second silicon wafer after cleaning and blow-drying;
baking the second silicon wafer subjected to the second spin coating of the photoresist for the second time;
loading the third mask plate and the second silicon wafer subjected to the second baking by using a photoetching machine, and performing second ultraviolet exposure; the third mask plate is provided with patterns corresponding to at least two input channels and at least two output channels;
baking the second silicon wafer subjected to the second ultraviolet exposure for the third time;
cooling the second silicon wafer subjected to the third baking to normal temperature and then carrying out second development;
carrying out second cleaning and blow-drying on the second silicon wafer subjected to the second development;
and baking the second silicon wafer after the second cleaning and rinsing to obtain a second silicon die.
7. The method for preparing a micro-fluidic chip according to claim 6, wherein spin-coating photoresist is performed on the second silicon wafer after cleaning and blow-drying, and the method comprises the following steps:
carrying out first spin coating on the second silicon wafer subjected to cleaning and blow-drying by using a spin coater, wherein the rotating speed of the spin coater is 500 revolutions per minute, the acceleration is 100 revolutions per minute, and the spin coating time lasts for 5 seconds to 15 seconds;
and carrying out second spin coating on the photoresist on the second silicon wafer after the photoresist is subjected to the first spin coating by the photoresist homogenizing machine, wherein the rotating speed of the photoresist homogenizing machine is 3000 rpm, the acceleration is 500 rpm, and the spin coating time lasts for 20 to 50 seconds.
8. The method for manufacturing a micro-fluidic chip as recited in claim 6, wherein,
in the first baking of the second silicon wafer after the first spin coating of photoresist, the baking temperature is 110 ℃ and the baking time is 3 minutes;
in the second baking of the second silicon wafer after the second spin coating of photoresist, the baking temperature is 95 ℃ and the baking time is 45 minutes;
in the third baking of the second silicon wafer after the second ultraviolet exposure, the baking temperature is 95 ℃ and the baking time is 30 minutes;
and in the fourth baking of the second silicon wafer after the second cleaning and rinsing, the baking temperature is 150 ℃ and the baking time is 20 to 40 minutes.
9. The method for manufacturing a micro-control flow chip according to claim 1, wherein,
in the baking of the chip substrate and the glass, the baking time was 60 minutes.
10. A micro-flow control chip, characterized in that it is manufactured by the manufacturing method according to any one of claims 1 to 9.
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Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1621945A (en) * | 2004-12-20 | 2005-06-01 | 西安交通大学 | Method for making dimethyl silicone polymer micro flow control chip composite type optical cured resin die arrangement |
| CN1648663A (en) * | 2005-02-06 | 2005-08-03 | 中国科学院上海微***与信息技术研究所 | Glass microflow control chip and producing method |
| CN103350982A (en) * | 2013-05-31 | 2013-10-16 | 陕西理工学院 | Manufacturing method of micro-channel mold |
| CN108148751A (en) * | 2016-12-06 | 2018-06-12 | 中国科学院大连化学物理研究所 | A kind of integrated drug screening and dyeing micro-fluidic chip and preparation method thereof |
| CN112808335A (en) * | 2021-01-21 | 2021-05-18 | 中国科学技术大学 | Preparation method of micro-fluidic chip for multi-parameter detection of water body |
| CN114177962A (en) * | 2022-01-07 | 2022-03-15 | 中国科学院青岛生物能源与过程研究所 | Method for manufacturing sandwich micro-fluidic chip |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7144616B1 (en) * | 1999-06-28 | 2006-12-05 | California Institute Of Technology | Microfabricated elastomeric valve and pump systems |
| CA2501857A1 (en) * | 2002-10-09 | 2004-04-22 | The Board Of Trustees Of The University Of Illinois | Microfluidic systems and components |
| WO2004048254A1 (en) * | 2002-11-28 | 2004-06-10 | Postech Foundation | Micropump and micro-incubator utilizing gas generation and production method thereof |
| CN104321126B (en) * | 2012-03-27 | 2017-02-22 | 加利福尼亚大学董事会 | Continuous whole-chip 3-dimensional DEP cell sorter and related fabrication method |
| EP2871482B1 (en) * | 2012-07-09 | 2018-07-18 | Sony Corporation | Microchip and method for producing microchip |
-
2022
- 2022-08-03 CN CN202210930277.9A patent/CN115414971B/en active Active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1621945A (en) * | 2004-12-20 | 2005-06-01 | 西安交通大学 | Method for making dimethyl silicone polymer micro flow control chip composite type optical cured resin die arrangement |
| CN1648663A (en) * | 2005-02-06 | 2005-08-03 | 中国科学院上海微***与信息技术研究所 | Glass microflow control chip and producing method |
| CN103350982A (en) * | 2013-05-31 | 2013-10-16 | 陕西理工学院 | Manufacturing method of micro-channel mold |
| CN108148751A (en) * | 2016-12-06 | 2018-06-12 | 中国科学院大连化学物理研究所 | A kind of integrated drug screening and dyeing micro-fluidic chip and preparation method thereof |
| CN112808335A (en) * | 2021-01-21 | 2021-05-18 | 中国科学技术大学 | Preparation method of micro-fluidic chip for multi-parameter detection of water body |
| CN114177962A (en) * | 2022-01-07 | 2022-03-15 | 中国科学院青岛生物能源与过程研究所 | Method for manufacturing sandwich micro-fluidic chip |
Non-Patent Citations (1)
| Title |
|---|
| 塞洛普.卡尔帕基安.《制造工程与技术-机加工》.机械工业出版社,2019,254-262. * |
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