CN115407744A - Multi-protocol bus fault injection system and control method thereof - Google Patents

Multi-protocol bus fault injection system and control method thereof Download PDF

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Publication number
CN115407744A
CN115407744A CN202210774765.5A CN202210774765A CN115407744A CN 115407744 A CN115407744 A CN 115407744A CN 202210774765 A CN202210774765 A CN 202210774765A CN 115407744 A CN115407744 A CN 115407744A
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module
fault
level
bus
resistor
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王大方
杨博文
董浩崧
张齐
郝自伟
陈仕钦
孙旭
李�昊
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Harbin Institute of Technology Weihai
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Harbin Institute of Technology Weihai
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    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05BCONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B23/00Testing or monitoring of control systems or parts thereof
    • G05B23/02Electric testing or monitoring
    • G05B23/0205Electric testing or monitoring by means of a monitoring system capable of detecting and responding to faults
    • G05B23/0259Electric testing or monitoring by means of a monitoring system capable of detecting and responding to faults characterized by the response to fault detection
    • G05B23/0262Confirmation of fault detection, e.g. extra checks to confirm that a failure has indeed occurred
    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05BCONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B2219/00Program-control systems
    • G05B2219/20Pc systems
    • G05B2219/24Pc safety
    • G05B2219/24065Real time diagnostics

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Abstract

A multi-protocol bus fault injection system and a control method thereof relate to a bus test system and a method for data transmission, and comprise an upper computer module, a multi-protocol bus signal generation module and a fault injection module; the upper computer module comprises a bus type selection module, a message information input module, a fault type selection module and a message monitoring module; the multi-protocol bus signal generating module comprises a data link layer, a data memory and a physical layer; the fault injection module comprises a data link layer fault injection module and a physical layer fault injection module. The invention can realize fault simulation of a physical layer and a data link layer of various types of buses, and can simulate various buses and common faults commonly used by the current military.

Description

Multi-protocol bus fault injection system and control method thereof
Technical Field
The invention relates to a bus test system and a method for data transmission, in particular to a multi-protocol bus fault injection system and a control method thereof.
Background
With the higher informatization level of the army, the bus is applied to more and more modern weapons, and the complex military weapons such as airplane tanks and the like adopt the bus technology to transmit data of all functional units at present. For example, a master control unit, an accelerator control unit, a direction control unit and a fire control unit on an airplane are all connected by a 1553B bus, and after a pilot sends a required instruction to the master control unit of the airplane, the instruction can be transmitted to a corresponding control unit module through the bus to complete corresponding control work. The use of bus technology greatly improves the stability of modern weapons while reducing weapon weight. At present, various bus types such as CAN,1553B, RS485, MIC and the like have been developed to meet the requirements under different scenes. Due to the many advantages of the bus, the use of bus technology in modern weapons will become increasingly common in the future. The large number of applications of the bus puts higher demands on the stability of the bus technology and the fault tolerance when a fault occurs. For example, in contrast to purely mechanical steering, a steering system using bus control would risk a complete failure of the steering, with serious consequences, should the bus communication fail. The reliability of the bus technology is therefore of great importance for the reliability of the weapon during the actual combat.
Before a novel weapon is put into practical use, a technician verifies the fault injection aspect of the bus very importantly. The fault injection test is carried out on the bus system by a developer to simulate the state of the bus when encountering various faults, so that the reliability and the stability of the weapon bus in actual combat are improved. Military bus fault injection technology is rapidly developing, and a plurality of fault injection modules based on a specific bus are developed currently. For example, a certain missile bus fault injection system based on 1553B and a certain automatic loader bus fault injection system based on RS 422. The basic working principle of these products is as follows: the communication protocol specification of a specific bus is combined, and the faults of a data link layer and a physical layer are simulated by using hardware and software methods, so that bus signals show the level state when the real bus faults occur.
With the increasing level of electrification of weapons, the complexity of buses is higher and higher, and in the same weapon, a plurality of buses are sometimes needed to meet the actual requirements, for example, 1553B and CAN are common bus types on the existing military vehicle. The 1553B bus type is a master-slave structure, the bus transmission rate is 1Mb/s, and the real-time performance is good. However, when the bus controller fails, the entire system is shut down, and thus, the reliability is poor. The CAN bus has no master-slave structure, and the bus conflict is solved by adopting an arbitration bit method, so that when the network communication is busy, a node with low priority level CAN not send information for a long time, the data transmission rate is reduced, and the real-time performance is poor. However, the working mode of the CAN bus multi-master station enables one node to have a problem, and the whole system cannot be paralyzed. The components of the weapon with higher real-time requirements are connected by a 1553B bus, and the components with higher reliability requirements are connected by a CAN bus, so that the performance of the weapon CAN be better improved. Therefore, in practice, the existing bus fault injection equipment with more messages usually concentrates on a certain special bus technology, and for the weaponry existing in the existing multi-bus at the same time, a plurality of pieces of equipment are usually required to be purchased in actual use, so that waste in terms of resources is undoubtedly caused, and application under multiple scenes cannot be met.
Disclosure of Invention
The invention aims to solve the defects of the prior art, and provides a multi-protocol bus fault injection system and a control method thereof, wherein the fault injection system CAN be used for simulating faults of a physical layer and a data link layer of various buses (1553B, RS, RS485 and CAN), simulating various buses commonly used by the military and common faults, meeting the verification of fault units in the design of most weapon buses and realizing the multiplexing of software and hardware when various bus signals are simulated. The invention uses the method of realizing the mutual cooperation of the man-machine interaction mode of the software and the hardware fault injection system facility, the user sets the fault injection mode and the parameters from the software level, and the fault injection system of the hardware level realizes the fault parameters transmitted from the software level.
The technical scheme of the invention is as follows:
a multi-protocol bus fault injection system is characterized by comprising an upper computer module, a multi-protocol bus signal generation module and a fault injection module;
the upper computer module comprises a bus type selection module, a message information input module, a fault type selection module and a message monitoring module; the bus type selection module is used for selecting the message type of the fault to be injected; the message information input module controls the input message information; the fault type selection module is used for selecting different fault types; the message monitoring module is used for checking the bus state after fault injection in real time so as to analyze the performance of the bus in the fault injection state;
the multi-protocol bus signal generating module comprises a data link layer, a data memory and a physical layer; the data link layer is composed of a message generation module and used for outputting a '0' 1' level signal which meets the bus requirement and reflects message information according to the message information and the bus type selected by a user; the data memory is used for storing data produced by coupling the message signal generated by the data link layer and the fault signal injected by the data link layer fault injection module, and injecting the data into the physical layer in sequence; the physical layer comprises a data preprocessing module, a level output module and a level adjusting module, wherein the data preprocessing module is used for converting the message into a required data format; the level output module is used for outputting the message information processed by the data preprocessing module in a level signal form, and the level adjusting module is used for adjusting a 01 level signal of the digital output module into a level signal meeting the requirement of a corresponding message;
the fault injection module comprises a data link layer fault injection module and a physical layer fault injection module, and the data link layer fault injection module is used for generating a specific fault signal according to the data link layer fault selected by the fault type selection module and injecting the specific fault signal into the multi-protocol bus signal generation module; the physical layer fault injection module is used for generating a fault control signal according to the physical layer fault selected by the fault type selection module, injecting the multi-protocol bus signal generation module and controlling the generation of the physical layer fault.
The fault types in the fault type selection module are divided into physical layer faults and data link layer faults, the physical layer faults comprise level amplitude change, signal jump time delay and the like, the data link layer faults comprise format errors, bit errors, response errors and the like, and the faults can be selected through the fault type selection module.
The physical layer fault injection module comprises a time module and a level module, wherein the time module is used for controlling the generation of faults related to time, and the level module is used for generating faults related to level. The physical layer fault injection module includes a physical layer fault injection controller and a programmable potentiometer coupled within the level adjustment module.
The connection between the fault injection module and the multi-protocol bus signal generation module consists of the following two parts, wherein one part is that a digital signal generated by a data link layer fault injection module in the fault injection module is coupled with a digital signal generated by a data link layer part in the multi-protocol signal bus generation module in a binary operation mode; the other part is that a physical layer fault injection module in the fault injection module is coupled with a multi-protocol bus signal generation module, and the fault injection module is realized through hardware coupling, and specifically comprises the following steps: the time module is coupled with the data storage hardware and generates faults related to signal sending time; the level module is coupled with the level adjusting module in hardware and generates a fault related to the level signal.
A control method of a multi-protocol bus fault injection system is characterized by comprising the following steps:
the upper computer module transmits information such as message content, message type, sending address, receiving address and the like in the message information and the bus type information to the message generation module together according to the requirement of the message information input module and the bus type selected by the bus type selection module;
meanwhile, the upper computer module sends the fault type information selected by the fault type selection module to the fault injection module;
the fault injection module divides the fault types according to fault injection information transmitted by the upper computer module to obtain data link layer faults and physical layer faults, and the data link layer faults generate data link fault signals through the data link layer fault injection module and are injected into the multi-protocol signal bus generation module; generating a fault control signal for a physical layer fault through a physical layer fault injection module, injecting the fault control signal into a multi-protocol bus signal generation module, and generating the physical layer fault;
the physical layer fault control signal comprises a time fault control signal and a level fault control signal;
step three, the message generating module generates a message file from the message information bus type information; the message file and the data link failure signal are coupled together, and the message file is input into the data memory after being generated once;
meanwhile, the physical layer fault injection module inputs a time fault control signal to a register of the data memory;
coupling the primary message file in the data storage with a time fault control signal, and then transmitting the primary message file to a data preprocessing module for data preprocessing operation to generate a secondary message file, wherein the data in the data storage works according to a first-in first-out principle;
step five, the data preprocessing module transmits the secondary message file to a level output module; the level output module outputs the secondary message file into a level signal to generate a secondary message analog signal, and then the secondary message analog signal is transmitted into the level adjusting module;
meanwhile, the physical layer fault injection module inputs a level fault control signal to a programmable potentiometer coupled with the level adjustment module;
and step six, adjusting the secondary message analog signal into a level signal which accords with a required bus communication protocol through a level adjusting module, and controlling the programmable potentiometer to change through a level fault control signal to generate a message analog signal containing a level fault.
The physical layer fault injection module comprises a fault injection controller, the level module is a programmable potentiometer coupled with the level adjustment module, and the time module is a controller for changing the register value in the data memory.
The level adjusting module adjusts the 01 level signal of the level output module into a level signal meeting the size required by the corresponding message. And different bus types adopt different level adjusting modules to realize level adjustment, and finally, the analog signal of the message is generated.
In the invention, the message analog signal is acquired and transmitted to a message monitoring module in the upper computer module through the AD, so that the real-time monitoring of the whole fault simulation process is realized.
The message signals of the 1553B, MIC bus are transmitted by bipolar Manchester codes, namely, the signals are represented by rising edges and falling edges of levels; and the message information of CAN and RS232 is directly transmitted through high and low level signals. For bus data types requiring manchester transcoding, data preprocessing is required first, and this is not required for data transmission using high and low level signals. The data preprocessing method is that 1 in the original data is changed into 01, 0 in the original data is changed into 10, and the module can be realized in a single chip microcomputer.
The common bus type in the invention can be divided into a differential voltage type bus and a current type bus according to the type of the transmitted signal, and the level adjusting module comprises a differential voltage type bus level adjusting module and a current type bus level adjusting module. Such as CAN, RS485, RS422, differential voltage signals transmitted by MIC buses, such as current mode voltage signals transmitted by 1553B buses.
The level adjusting module comprises a differential voltage type bus level adjusting module and a current type bus level adjusting module, wherein the differential voltage type bus level adjusting module comprises a subtracter module P 1 And adder module P 2 Subtractor module P 1 Comprising an operational amplifier U 2 Resistance R 1 And a resistor R 2 And a resistor R 3 Electricity, electricityResistance R 4 Resistance R 17 And a programmable potentiometer R 8 Resistance R 1 Second terminal and resistor R 2 First terminal of and operational amplifier U 2 Is connected with the inverting input terminal of the resistor R 3 Second terminal and resistor R 4 First terminal of and operational amplifier U 2 Is connected with the non-inverting input terminal of the resistor R 1 The first end of the resistor R is connected with the output end of the level output module 2 Second terminal of and operational amplifier U 2 Is connected to the output terminal of the resistor R 3 First terminal of (1) and programmable potentiometer R 8 Connected by a resistor R 4 Is grounded, a programmable potentiometer R 8 The first end of the fixed end and the resistor R 17 Is connected to a first terminal of a resistor R 17 The second end of the first switch is connected with a power supply; programmable potentiometer R 8 The second end of the fixed end is grounded; operational amplifier U 2 The positive power supply end is connected with the power supply, and the negative power supply end is grounded; operational amplifier U 2 The output end of the differential signal is a high level signal output end in the differential signal; adder module P 2 Comprising an operational amplifier U 1 Resistance R 5 Resistance R 6 Resistance R 7 Resistance R 18 And a programmable potentiometer R 9 Resistance R 5 Second terminal of (1), resistor R 6 First terminal and resistor R 7 Second terminal of and operational amplifier U 1 Is connected to the inverting input terminal of the resistor R 5 The first end of the resistor R is connected with the output end of the level output module 6 Second terminal of and operational amplifier U 1 Is connected to the output terminal of the resistor R 7 First terminal of (2) and programmable potentiometer R 9 Connected by a resistor R 18 First terminal of (1) and programmable potentiometer R 9 The first ends of the fixed ends of the resistor R are connected with each other 18 Is grounded, the programmable potentiometer R 9 The second end of the fixed end of the power supply is connected with a power supply; operational amplifier U 1 The non-inverting input terminal of the operational amplifier U is grounded 1 The positive power supply end is connected with a power supply, and the negative power supply end is grounded; operational amplifier U 1 The output terminal of (2) is a low level signal output terminal in the differential signal.
The current type bus level adjusting module comprises an integrating module P1 and a current-voltage conversion module P2; the integration module P1 comprises an operational amplifier U1, a resistor R10, a resistor R11 and a capacitor C1; the first end of the resistor R10 is connected with the level output module, the second end of the resistor R10 is connected with the inverting input end of the operational amplifier U1, the first end of the resistor R11 is connected with the non-inverting input end of the operational amplifier U1, the second end of the resistor R11 is grounded, the first end of the capacitor C1 is connected with the inverting input end of the operational amplifier U1, and the second end of the capacitor C1 is connected with the output end of the operational amplifier U1;
the current-voltage conversion module P2 comprises an operational amplifier U2, a resistor R13, a resistor R14, a resistor R16, a programmable potentiometer R15 and a triode Q1; the first end of the resistor R13 and the first end of the resistor R14 are connected with the non-inverting input end of the operational amplifier U2, the second end of the resistor R13 and the first end of the fixed end of the programmable potentiometer R15 are connected with the emitting electrode of the triode Q1, the second end of the resistor R14 is grounded, the second end of the fixed end of the programmable potentiometer R15 is connected with the first end of the resistor R16 and the first end of the mutual inductor, the second end of the mutual inductor is grounded, the programmable potentiometer R15 (variable end) is connected with the emitting electrode of the triode Q1, and the second end of the resistor R16 is connected with the inverting input end of the operational amplifier U2; the collector of the triode Q1 is connected with a power supply, and the base of the triode Q1 is connected with the output end of the operational amplifier U2; the output terminal of the operational amplifier U1 is connected to the inverting input terminal of the operational amplifier U2 via a resistor R12.
The invention realizes the fault simulation of a physical layer and a data link layer of various buses (1553B, RS, RS485 and CAN) by using a method for realizing the mutual matching of a software man-machine interaction mode and hardware fault injection system facilities, so that a user CAN set a fault injection mode and parameters on the software of an operation interface, and a fault injection system on a hardware layer realizes fault parameters transmitted from a software layer. The unit can simulate various buses and common faults commonly used by the current military, the verification of the fault unit during the design of most weapon buses can be met by using the unit, and the multiplexing of soft and hard parts can be realized when various bus signals are simulated. And various devices are not required to be purchased, the use is convenient, and the resources are saved.
Drawings
Fig. 1 is a schematic structural diagram of functional modules of a multi-protocol bus fault injection system in the invention.
Fig. 2 is a schematic circuit diagram of a level adjustment module of the differential voltage bus according to the present invention.
Fig. 3 is a schematic circuit diagram of the current-mode bus level adjustment module according to the present invention.
Fig. 4 is a schematic diagram of a data link layer failure in the present invention.
Fig. 5 is a schematic diagram of a circuit configuration for injecting faults into a differential voltage bus according to the present invention.
Fig. 6 is a schematic circuit diagram of a current mode bus injection fault according to the present invention.
Detailed Description
The multi-protocol bus fault injection system shown in fig. 1 comprises an upper computer module 1, a multi-protocol bus signal generation module 2 and a fault injection module 3;
the upper computer module 1 comprises a bus type selection module 4, a message information input module 5, a fault type selection module 6 and a message monitoring module 7; the bus type selection module 4 is used for selecting the message types of faults to be injected, wherein the message types specifically comprise 1553B, CAN, RS485, RS422 and the like; the message information input module 5 controls the input message information, which includes message content, message type, sending address, receiving address, etc.; the fault type selection module 6 is used for selecting different fault types; the message monitoring module 7 is used for checking the bus state after fault injection in real time so as to analyze the performance of the bus in the fault injection state;
the multi-protocol bus signal generation module 2 comprises a data link layer, a data memory 9 and a physical layer; the upper computer module is connected with a data link layer, the data link layer is composed of a message generation module 8 and is used for outputting a '0' 1' level signal which meets the bus requirement and reflects message information according to the message information selected by a user (input by the upper computer) and the bus type; the data memory 9 is used for storing data produced by coupling the message signal generated by the data link layer and the fault signal injected by the data link layer fault injection module 13, and injecting the data into the physical layer in sequence; the physical layer comprises a data preprocessing module 10, a level output module 11 and a level adjusting module 12, wherein the data preprocessing module 10 is used for converting the message into a required data format; the level output module 11 is used for outputting the message information processed by the data preprocessing module 10 in the form of a level signal, and the level adjusting module 12 is used for adjusting a 01 level signal of the digital output module into a level signal meeting the size of a corresponding message requirement; the message monitoring module is connected with the output end of the level adjusting module;
the fault injection module 3 comprises a data link layer fault injection module 13 and a physical layer fault injection module 14, wherein the data link layer fault injection module 13 is used for generating a specific fault signal according to the data link layer fault selected by the fault type selection module and injecting the specific fault signal into the multi-protocol bus signal generation module 2; the physical layer fault injection module 14 is used for generating a fault control signal according to the physical layer fault selected by the fault type selection module 6, injecting the fault control signal into a data memory of the multi-protocol bus signal generation module and a circuit element coupled and controlled with the physical layer, and controlling the generation of the physical layer fault.
The fault types in the fault type selection module 6 are divided into physical layer faults and data link layer faults, the physical layer faults comprise level amplitude change, signal jump time delay and the like, the data link layer faults comprise format errors, dislocation errors, response errors and the like, and the faults can be selected through the fault type selection module and sent to the fault injection module.
The physical layer fault injection module of the invention comprises a time module 15 and a level module 16, wherein the time module 15 is used for controlling the generation of faults related to time, and the level module 16 is used for generating faults related to level. The physical layer fault injection module 14 includes a physical layer fault injection controller (single chip) and a programmable potentiometer coupled within the level adjustment module.
The connection between the fault injection module 3 and the multi-protocol bus signal generation module 2 is composed of two parts, one part is that a digital signal generated by a data link layer fault injection module in the fault injection module is coupled with a digital signal generated by a data link layer part in the multi-protocol signal bus generation module in a binary operation mode; the other part is that a physical layer fault injection module in the fault injection module is coupled with a multi-protocol bus signal generation module, and the fault injection module is realized through hardware coupling, and specifically comprises the following steps: the time module is coupled with the data storage hardware and generates faults related to signal sending time; the level module is coupled with the level adjusting module hardware to generate level signal related faults.
A control method of a multi-protocol bus fault injection system is characterized by comprising the following steps:
the upper computer module transmits information such as message content, message type, sending address, receiving address and the like in the message information and the bus type information to the message generation module together according to the requirement of the message information input module and the bus type selected by the bus type selection module;
meanwhile, the upper computer module sends the fault type information selected by the fault type selection module to the fault injection module;
the fault injection module divides the fault types according to fault injection information transmitted by the upper computer module to obtain data link layer faults and physical layer faults, and the data link layer faults generate data link fault signals through the data link layer fault injection module and are injected into the multi-protocol signal bus generation module; the physical layer fault is injected into the multi-protocol bus signal generating module through the physical layer fault injection module to generate a fault control signal, so as to generate the physical layer fault.
The physical layer fault control signal comprises a time fault control signal and a level fault control signal;
step three, the message generating module generates a message file from the message information bus type information; the message file and the data link failure signal are coupled together in a binary operation mode, and the message file is input into a data memory after being generated once;
meanwhile, the physical layer fault injection module inputs a time fault control signal to a register of the data memory; the control of time delay or period change is carried out on the primary message file, and time failure is generated.
Coupling a primary message file in the data memory with a time fault control signal, carrying out time delay or period change on the primary message file based on the time fault signal, then transmitting the primary message file to a data preprocessing module for data preprocessing operation, converting message information into a message signal in a data format suitable for a bus type according to the bus type information in the primary message file, generating a secondary message file, and enabling data in the data memory to work according to the first-in first-out principle;
fifthly, the data preprocessing module transmits the secondary message file to a level output module; the level output module outputs the secondary message file into a level signal to generate a secondary message analog signal, and then the secondary message analog signal is transmitted into the level adjusting module;
meanwhile, the physical layer fault injection module inputs the level fault control signal to a programmable potentiometer coupled with the level adjustment module;
and step six, adjusting the secondary message analog signal into a level signal which accords with a required bus communication protocol through a level adjusting module, and controlling the programmable potentiometer to change through a level fault control signal to generate a message analog signal containing a level fault.
The physical layer fault injection module comprises a fault injection controller, the level module is a programmable potentiometer coupled (connected) with the level adjustment module, and the time module is a controller for changing the register value in the data memory. The barrier injection controller and the controller are single-chip microcomputers.
The level adjusting module adjusts the 01 level signal of the level output module into a level signal meeting the size of the corresponding message requirement. And different bus types adopt different level adjusting modules to realize level adjustment, and finally, the analog signal of the message is generated.
In the invention, the message analog signal is acquired and transmitted to a message monitoring module in the upper computer module through the AD, so that the real-time monitoring of the whole fault simulation process is realized.
The message signal of the 1553B, MIC bus is transmitted by a bipolar Manchester code, namely, the signal is represented by using the rising edge and the falling edge of the level; and the message information of CAN and RS232 is directly transmitted through high and low level signals. For bus data types requiring manchester transcoding, data preprocessing is required first, and this is not required for data transmission using high and low level signals. The data preprocessing method is that 1 in the original data is changed into 01, 0 in the original data is changed into 10, and the module can be realized in a single chip microcomputer.
The common bus type in the invention can be divided into a differential voltage type bus and a current type bus according to the type of the transmitted signal, and the level adjusting module comprises a differential voltage type bus level adjusting module and a current type bus level adjusting module. Such as CAN, RS485, RS422, differential voltage signals transmitted by MIC buses, such as current mode voltage signals transmitted by 1553B buses.
The level adjustment module of the present invention includes a differential voltage type bus level adjustment module and a current type bus level adjustment module, and the differential voltage type bus level adjustment module includes a subtractor module P as shown in fig. 2 1 And adder module P 2 Subtractor module P 1 Comprising an operational amplifier U 2 Resistance R 1 Resistance R 2 Resistance R 3 Resistance R 4 Resistance R 17 And a programmable potentiometer R 8 Resistance R 1 Second terminal and resistor R 2 First terminal of and operational amplifier U 2 Is connected to the inverting input terminal of the resistor R 3 Second terminal and resistor R 4 First terminal of and operational amplifier U 2 Is connected with the non-inverting input terminal of the resistor R 1 The first end of the resistor R is connected with the output end of the level output module 2 Second terminal of and operational amplifier U 2 Is connected to the output terminal of the resistor R 3 And a programmable Cheng Dianwei meter R 8 (variable terminal) connected to a resistor R 4 Is grounded, a programmable potentiometer R 8 The first end of the fixed end and the resistor R 17 First ofEnd-to-end, resistance R 17 The second end of the first switch is connected with a power supply; programmable potentiometer R 8 The second end of the fixed end is grounded; operational amplifier U 2 The positive power supply end is connected with a power supply, and the negative power supply end is grounded; operational amplifier U 2 The output end of the differential signal is a high-level signal output end in the differential signal; adder module P 2 Comprising an operational amplifier U 1 Resistance R 5 Resistance R 6 Resistance R 7 Resistance R 18 And a programmable potentiometer R 9 Resistance R 5 Second terminal of (2), resistor R 6 First terminal and resistor R 7 Second terminal of and operational amplifier U 1 Is connected to the reverse input terminal of the resistor R 5 The first end of the resistor R is connected with the output end of the level output module 6 Second terminal of and operational amplifier U 1 Is connected to the output terminal of the resistor R 7 First terminal of (1) and programmable potentiometer R 9 (variable terminal) connected to a resistor R 18 First terminal of (2) and programmable potentiometer R 9 The first ends of the fixed ends of the resistor R are connected with each other 18 Is grounded, a programmable potentiometer R 9 The second end of the fixed end of the switch is connected with a power supply; operational amplifier U 1 The non-inverting input terminal of the operational amplifier U is grounded 1 The positive power supply end is connected with a power supply, and the negative power supply end is grounded; operational amplifier U 1 The output terminal of (2) is a low level signal output terminal in the differential signal.
In a subtractor module P 1 And adder module P 2 In, R 1 、R 2 、R 3 、R 4 、R 5 、R 6 、R 7 Is a constant value, R 2 、R 3 、R 4 Equal resistance, R 5 、R 6 、R 7 Equal resistance R 8 、R 9 V _ H and V _ L represent a high-level signal line and a low-level signal line in the differential signal, respectively, for a programmable potentiometer. The level output module is used for converting the digital signals of 0 and 1 to generate voltages of 0V and 1V. The basic principle of the subtracter is used for realizing the V _ H signals in two lines in the differential signal. As shown in FIG. 2, R 1 ,R 2 ,R 3 ,R 4 ,R 8 And U 2 The basic subtractor circuit is formed as follows: operational amplifier U 2 The two input ends meet the basic principle of an operational amplifier of 'virtual short' and 'virtual break'. The term "virtual short" means that the potentials at the two inputs of the operational amplifier are equal in an ideal case, and the term "virtual cut" means that the current flowing into the input of the integrated operational amplifier is zero in an ideal case.
According to the basic principle of "virtual short",
V 6 =V 7 (1)
according to the basic principle of a virtual break,
I 1 =I 2 =0 (2)
the following can be obtained by using kirchhoff's law according to (2):
Figure BDA0003726402230000061
because R 2 =R 3 =R 4 When the temperature of the water is higher than the set temperature,
V 4 =V 2 -V 1 (4)
v2 is the supply voltage via potentiometer R 9 Voltage division for regulating the supply voltage to a desired high level, V 1 The voltage signals are converted from 0V to 1V, and finally, the high level and the low level of the H voltage are converted under the action of a subtracter.
With respect to V _ L signal in differential signal using R 5 ,R 6 ,R 7 ,R 9 The basic principle implementation of the constituent adders, as shown in the above figure
According to the basic principle of "virtual short",
V 8 =V 9 (5)
according to the basic principle of' virtual breaking
I 3 =I 4 =0 (6)
According to the formulas (5) and (6), the combination of kirchhoff's law can obtain:
Figure BDA0003726402230000071
because R is 5 =R 6 =R 7 When the temperature of the water is higher than the set temperature,
V 5 =V 1 +V 3 。 (8)
in the formula, V 1 Is the input voltage, V, of the level regulating module 2 Is a resistance R 3 First terminal voltage of, V 3 Is a resistance R 7 First terminal voltage of, V 4 Is an operational amplifier U 2 Voltage at the output terminal of (V) 5 Is an operational amplifier U 1 Voltage at the output terminal of (V) 6 For operation of amplifier U 2 At an inverting input terminal voltage of V 7 Is an operational amplifier U 2 Of the same phase input voltage, V 8 Is an operational amplifier U 1 At an inverting input terminal voltage of V 9 Is an operational amplifier U 1 Of the same phase input voltage, I 1 Is an operational amplifier U 2 Of the inverting input terminal current, I 2 Is an operational amplifier U 2 Current of non-inverting input terminal of 3 Is an operational amplifier U 1 Of the inverting input terminal current, I 4 For operation of amplifier U 1 The current of the non-inverting input terminal. R is 1 、R 2 … … is the resistance value.
V 1 The power supply voltage is regulated to a required low level, V, through the voltage division function of the programmable potentiometer 1 The voltage signals are converted from 0V to 1V, and finally, the high level and the low level of the voltage are converted through the action of an adder.
In summary, the electronic design module can be used to adjust the level of the differential voltage type signal.
The current type bus level adjusting module of the present invention is shown in fig. 3, and comprises an integrating module P1 and a current-voltage converting module P2; the integration module P1 comprises an operational amplifier U1, a resistor R10, a resistor R11 and a capacitor C1; the first end of the resistor R10 is connected with the level output module, the second end of the resistor R10 is connected with the inverting input end of the operational amplifier U1, the first end of the resistor R11 is connected with the non-inverting input end of the operational amplifier U1, the second end of the resistor R11 is grounded, the first end of the capacitor C1 is connected with the inverting input end of the operational amplifier U1, and the second end of the capacitor C1 is connected with the output end of the operational amplifier U1;
the current-voltage conversion module P2 comprises an operational amplifier U2, a resistor R13, a resistor R14, a resistor R16, a programmable potentiometer R15 and a triode Q1; the first end of the resistor R13 and the first end of the resistor R14 are connected with the non-inverting input end of the operational amplifier U2, the second end of the resistor R13 and the first end of the fixed end of the programmable potentiometer R15 are connected with the emitting electrode of the triode Q1, the second end of the resistor R14 is grounded, the second end of the fixed end of the programmable potentiometer R15 is connected with the first end of the resistor R16 and the first end of the mutual inductor, the second end of the mutual inductor is grounded, the programmable potentiometer R15 (variable end) is connected with the emitting electrode of the triode Q1, and the second end of the resistor R16 is connected with the inverting input end of the operational amplifier U2; the collector of the triode Q1 is connected with a power supply, and the base of the triode Q1 is connected with the output end of the operational amplifier U2; the output terminal of the operational amplifier U1 is connected to the inverting input terminal of the operational amplifier U2 via a resistor R12.
The main function of the P1 module is to change a level signal with a constant value into a voltage which changes with time in a linear function relationship, for example, a 1V voltage after passing through the level output module becomes: u (t) = -t.
The integration module has the following relations:
as can be seen from the "virtual shortness",
V 9 =V 10 =0 (9)
then according to the 'virtual break', the product is obtained
I 1 =I 2 =(V 0 -V 9 )/R 10 =-C*d(V 1 )/dt (10)
Therefore, the first and second electrodes are formed on the substrate,
Figure BDA0003726402230000072
the P2 module is a current-voltage conversion module and is composed of a resistor R 13 、R 14 、R 16 (ii) a Programmable potentiometer R 15 (ii) a An operational amplifier U2; triode Q1, coil L 1 、L 2 And (4) forming.
Setting resistance value R 13 =R 14 ,R 12 =R 16
The following relations exist:
known from "virtual break
I 3 =I 4 (12)
Namely, it is
(V 1 -V 7 )/R 12 =(V 7 -V 3 )/R 16 (13)
(V 2 -V 8 )/R 13 =V 8 /R 14 (14)
The principle of operational amplifier 'virtual short' is known as follows:
V 7 =V 8 (15)
can therefore obtain
V 2 -V 3 =V 1 (16)
Figure BDA0003726402230000081
Setting the turns ratio of the transformer as m:1, then
Figure BDA0003726402230000082
In the above formula, V 0 Regulating module input terminal voltage, V, for current-mode bus level 1 For the output voltage, V, of the operational amplifier U1 2 A first terminal voltage, V, being the fixed terminal of an electrically programmable potentiometer R15 3 A second terminal voltage, V, being the fixed terminal of the programmable potentiometer R15 4 Is a voltage at a first terminal of a mutual inductor, V 5 Is the third terminal voltage (first output terminal) of the mutual inductor V 6 Is the fourth end voltage (second output end) of the mutual inductor V 7 Is an operational amplifier U 2 At an inverting input terminal voltage of V 8 Is an operational amplifier U 2 Of the same phase input voltage, V 9 Is an operational amplifier U 1 At an inverting input terminal voltage of V 10 Is an operational amplifier U 1 Of the same phase input terminal voltage, I 1 Is an operational amplifier U 2 Of the inverting input terminal current, I 2 Is an operational amplifier U 2 Current of non-inverting input terminal of (1) 3 For operation of amplifier U 1 Of the inverting input terminal current, I 4 Is an operational amplifier U 1 C is the capacitance of the capacitor C1.
Common communication failure types can be divided into two types, namely data link layer failure and physical layer failure, and the injection of the data link layer failure occurs in a message generation stage, as shown in fig. 4. Common data link layer failures are shown in fig. 4, and the data link layer failures are of the following types: the method is divided into bit error faults, format error faults, data bit length error faults, check code error faults and data continuous error faults.
For the above fault types, fault injection is implemented as follows.
(1) Bit error injection:
the bit error refers to a fault caused by a bit in the message generating a potential signal different from the original signal, for example, the original message is changed from "1011" to "1001", which is the bit error fault. Bit error faults commonly occur in various bus types such as CAN,1553B, RS422, RS485 and the like, and are ubiquitous faults. Firstly, selecting the position and the digit of a bit error according to the original content of a message to be sent, and carrying out numerical value replacement of '0' and '1' on the value of a message signal with the selected digit;
(2) Format error injection
Each message has a predetermined format type, and a format error occurs when a illegal bit occurs in the fixed format type. Such errors also occur in most message types, such as the appearance of a significance level in the CRC delimiter, which should be a recessive bit, in the CAN bus. This error injection method is as follows: dividing each field of the message according to a communication protocol of a selected message type, confirming the data format of each field of the message, selecting and injecting an error field, and performing bit deletion or bit supplement operation on a specific field to cause data format errors;
(3) Data length error injection
The message has a fixed data length requirement, for example, a CAN bus has a standard frame and an extended frame, the standard frame has 11 bytes, the extended frame has 13 bytes, and the specific error injection method is to determine the specific bit number of the data according to the message type and perform bit deletion or bit supplement operation on the whole message;
(4) Checking error injection
The messages are checked in the transmission process, the checking method of 1553B, RS422 and RS485 is a checking method using parity bits (assuming that the number of 1 in the transmitted binary data is an odd number, the parity bits are set to 0, for example, the number of 1 in 7-bit binary data 1110000 is 3, and the parity bits are set to 0), and the specific error injection method of the CAN bus adopts a CRC checking method (only five identical bits appear continuously, an opposite bit needs to be additionally inserted in a CRC checking part) as follows: firstly, identifying the check bit of the message according to the message type, and carrying out bit supplementing or bit changing operation on the check bit of the message to destroy the check bit.
The data link layer fault is realized by programming of the single chip microcomputer.
Common physical layer failures include level signal amplitude offset, level signal delay, and level signal noise disturbances. The physical layer fault is injected by adopting a fault injection controller (a single chip microcomputer) and matching hardware (a programmable potentiometer). The specific circuit structure is shown in fig. 5 and 6.
The three physical layer fault injection modes are as follows:
from the foregoing equations (4) (8), it can be obtained: for level signal amplitude shift and noise disturbance fault of level signal, change V 3 And V 2 By changing the value of the programmable potentiometer R 8 And R 9 Thereby causing the level signals of V _ L and V _ H to change. Such a fault can be injected into the programmable potentiometer R by the fault injection controller as shown in FIG. 5 8 、R 9 The resistance value of (2) is further controlled.
By the formula
V 2 =V CC /R 8 (19)
V 3 =V CC /R 9 (20)
Can be obtained by changing R 8 、R 9 Resistance value of V 2 、V 3 The voltage value of (2) can be arbitrarily changed.
For a current mode bus level adjustment module, the three types of physical faults described above are produced as follows:
from equation (18), for the level signal amplitude offset and the noise disturbance fault of the level signal, the value of V5 is changed, i.e. the potentiometer R is changed by the fault injection register 15 And completing the realization of the fault.
(2) Level signal delay:
for such a failure, the data in the FIFO memory (data memory) is controlled in output rate by a failure injection controller (single chip microcomputer), and a failure with a delay in level signal can be made.
A level module for injecting a fault into a differential voltage bus level adjustment module includes a fault injection controller and a programmable level meter R 8 、R 9 (ii) a Fault injection controller and programmable potentiometer R 8 、R 9 Connecting and controlling the resistance value; the fault injection controller is connected with a register of the data memory and controls the value of the register.
A level module for injecting a fault into a current mode bus level adjustment module includes a fault injection controller and a programmable potentiometer R 15 Fault injection controller and programmable potentiometer R 15 Connecting and controlling the resistance value; the fault injection controller is connected with a register of the data memory and controls the value of the register. Fault injection controllerIs realized by using a singlechip.
The fault injection controller sends instructions to control the resistance value of the programmable potentiometer so as to change the magnitude of the potential. Time fault injection: the parameter configuration sent by the data memory to the data preprocessing module is realized through a register, and the singlechip configures the register related to data transmission so as to determine the data transmission quantity and the data transmission speed stored in the data memory. The fault injection controller changes the period of data transmission and other information by controlling the register related to the data transmission of the data memory.
In the using process of the invention, the upper computer module is an operation selection interface for carrying out various signal and fault simulation on the system and an interface for carrying out real-time detection on the system bus state, and the user can select message information, bus type and fault type and check the bus state after fault injection on the upper computer module. The bus type selection module is used for selecting message types needing fault injection, and specifically comprises 1553B, CAN, RS485, RS422 and the like; the message information input module controls input message information, which comprises message content, message type, sending address, receiving address and the like; the fault type selection module selects different fault types, the fault types can be divided into physical layer faults and data link layer faults, the physical layer faults comprise level amplitude change, signal jump time delay and the like, the data link layer faults comprise format errors, bit errors, response errors and the like, and the faults can be selected through the fault type selection module; and the message monitoring module checks the state of the bus after fault injection in real time so as to analyze the performance of the bus in the fault injection state. The multi-protocol bus signal generating module: the module is used for generating an actual message level signal meeting the requirement according to the instruction of the upper computer. The module is mainly divided into a data link layer and a physical layer. The data link layer is composed of a message generation module, and the module is mainly used for outputting a '0' 1' level signal which meets the bus requirement and reflects message information according to the message information and the bus type selected by a user. The main role of the data memory in the multi-protocol bus signal generation module is to store therein the signals generated through the data link layer and inject them in sequence to the physical layer. The modules in the physical layer mainly comprise a data preprocessing module, a level output module and a level adjusting module. The data preprocessing module is used for converting the message into a required data format, for example, a message signal of 1553B, MIC is transmitted by a bipolar manchester code, that is, a signal is represented by using a rising edge and a falling edge of a level. And the message information of CAN and RS232 is directly transmitted by high and low level signals. For bus data types requiring manchester transcoding, data preprocessing is required first, and this is not required for data transmission using high and low level signals. The data preprocessing method is to change 1 in the original data into 01 and 0 in the original data into 10, and the module can be realized in a single chip microcomputer. The level output module is used for outputting the message information processed by the data preprocessing module in the form of a level signal, and the module can be realized by utilizing the digital output function of the singlechip; the level adjusting module is used for adjusting the 01 level signal of the digital output module into a level signal meeting the size required by the corresponding message. A fault injection module: the fault injection module is mainly used for generating a fault type meeting the requirement according to the fault injection information of the upper computer; the unit consists of a data link layer fault injection module and a physical layer fault injection module, wherein the data link layer fault injection module is used for generating fault injection related to the aspect of a data link layer; the physical layer fault comprises physical layer fault injection controller control and is divided into a time module and a level module. Wherein the time module controls the generation of time-dependent faults. The level module generates a fault related to the level, and the connection between the fault injection module and the multi-protocol signal generation module consists of two parts, namely a digital signal generated by the data link layer fault injection module in the fault injection unit and a digital signal generated by the data link layer part in the multi-protocol signal bus generation module are coupled together in a binary operation mode; the other part is that the physical layer fault injection module in the fault injection module is coupled with the multi-protocol bus signal generation module, and the coupling is realized through the hardware coupling effect: the time module is coupled with the data memory hardware and generates faults related to the signal sending time; the level module is hardware coupled to the level adjustment module to generate a level signal related fault.
The invention realizes the fault simulation of a physical layer and a data link layer of various buses (1553B, RS, RS485 and CAN) by using a method for realizing the mutual matching of a software man-machine interaction mode and hardware fault injection system facilities, so that a user CAN set a fault injection mode and parameters on the software of an operation interface, and a fault injection system on a hardware layer realizes fault parameters transmitted from a software layer. The unit can simulate various buses and common faults commonly used by the current military, the verification of the fault unit during the design of most weapon buses can be met by using the unit, and the multiplexing of soft and hard parts can be realized when various bus signals are simulated. And various devices are not required to be purchased, the use is convenient, and the resources are saved.
Bus: the bus is a public communication trunk line for transmitting information among various functional components in a computer system, and is a transmission line bundle consisting of wires, and complex military products such as automobiles, airplanes and the like are connected with the functional components by a bus structure. Through the development of many years, bus technologies commonly used by military at present are 1553B, RS485, RS422, CAN and the like.
An upper computer: the computer can directly send out control commands, and the commands sent out by the computer control the whole system, so that the physical layer of the system is changed, and various states of the system can be displayed.
Fault injection: fault injection is a reliability verification work, which artificially introduces a fault into a system and observes the state of the system after fault injection to detect the reliability of the system.
Manchester code: is a coding method using level jumps to represent 1 or 0, and the variation rule is simple, i.e. each symbol is represented by two level signals with different phases, e.g. 0 is represented by a jump from high level to low level and 1 is represented by a jump from low level to high level
FIFO (First Input First Output) memory, a First-in First-out data memory, has a buffer function for continuous data streams, and is currently applied to a large number of electronic devices as a data storage unit.
Differential signaling: the differential signal is a signal that is transmitted by using two voltage lines instead of one voltage line, and the voltage difference between the two signal lines indicates the high or low level of the actual signal.

Claims (8)

1. A multi-protocol bus fault injection system is characterized by comprising an upper computer module, a multi-protocol bus signal generation module and a fault injection module;
the upper computer module comprises a bus type selection module, a message information input module, a fault type selection module and a message monitoring module; the bus type selection module is used for selecting the message type of the fault to be injected; the message information input module controls the input message information; the fault type selection module is used for selecting different fault types; the message monitoring module is used for checking the bus state after fault injection in real time so as to analyze the performance of the bus in the fault injection state;
the multi-protocol bus signal generating module comprises a data link layer, a data memory and a physical layer; the data link layer is composed of a message generation module and used for outputting a '0' 1' level signal which meets the bus requirement and reflects message information according to the message information selected by a user and the bus type; the data memory is used for storing data produced by coupling the message signal generated by the data link layer and the fault signal injected by the data link layer fault injection module and injecting the data into the physical layer in sequence; the physical layer comprises a data preprocessing module, a level output module and a level adjusting module, wherein the data preprocessing module is used for converting the message into a required data format; the level output module is used for outputting the message information processed by the data preprocessing module in a level signal form, and the level adjusting module is used for adjusting a 01 level signal of the digital output module into a level signal meeting the size of a corresponding message requirement;
the fault injection module comprises a data link layer fault injection module and a physical layer fault injection module, wherein the data link layer fault injection module is used for generating a specific fault signal according to the data link layer fault selected by the fault type selection module and injecting the specific fault signal into the multi-protocol bus signal generation module; the physical layer fault injection module is used for generating a fault control signal according to the physical layer fault selected by the fault type selection module, injecting the multi-protocol bus signal generation module and controlling the generation of the physical layer fault.
2. The system according to claim 1, wherein the fault types in the fault type selection module are classified into physical layer faults and data link layer faults, the physical layer faults include level amplitude variation, signal transition time delay, and the like, the data link layer faults include format errors, bit errors, response errors, and the like, and the faults can be selected through the fault type selection module.
3. The multi-protocol bus fault injection system of claim 1, wherein the physical layer fault injection module comprises a time module and a level module, the time module for controlling generation of a time-dependent fault and the level module for generating a level-dependent fault.
4. The multi-protocol bus fault injection system of claim 1, wherein the connection between the fault injection module and the multi-protocol bus signal generation module is composed of a portion in which the digital signal generated by the data link layer fault injection module in the fault injection module and the digital signal generated by the data link layer portion in the multi-protocol signal bus generation module are coupled together by means of binary operation; the other part is that the physical layer fault injection module in the fault injection module is coupled with the multi-protocol bus signal generation module, and the other part is realized through the hardware coupling effect, and specifically comprises the following steps: the time module is coupled with the data storage hardware and generates faults related to signal sending time; the level module is coupled with the level adjusting module hardware to generate level signal related faults.
5. The multi-protocol bus fault injection system of claim 1, wherein the level adjustment module comprises a differential voltage bus level adjustment module and a current bus level adjustment module, the differential voltage bus level adjustment module comprising a subtractor module P 1 And adder module P 2 Subtractor module P 1 Comprising an operational amplifier U 2 Resistance R 1 Resistance R 2 Resistance R 3 Resistance R 4 Resistance R 17 And a programmable potentiometer R 8 Resistance R 1 Second terminal and resistor R 2 First terminal of and operational amplifier U 2 Is connected to the inverting input terminal of the resistor R 3 Second terminal and resistor R 4 First terminal of and operational amplifier U 2 Is connected with the non-inverting input terminal of the resistor R 1 The first end of the resistor R is connected with the output end of the level output module 2 Second terminal of and operational amplifier U 2 Is connected to the output terminal of the resistor R 3 First terminal of (1) and programmable potentiometer R 8 Connected by a resistor R 4 Is grounded, a programmable potentiometer R 8 The first end of the fixed end and the resistor R 17 Is connected to a first terminal of a resistor R 17 The second end of the first switch is connected with a power supply; programmable potentiometer R 8 The second end of the fixed end is grounded; operational amplifier U 2 The positive power supply end is connected with a power supply, and the negative power supply end is grounded; operational amplifier U 2 The output end of the differential signal is a high level signal output end in the differential signal; adder module P 2 Comprising an operational amplifier U 1 Resistance R 5 Resistance R 6 Resistance R 7 Resistance R 18 And a programmable potentiometer R 9 Resistance R 5 Second terminal of (1), resistor R 6 First terminal and resistor R 7 Second terminal of and operational amplifier U 1 Is connected to the inverting input terminal of the resistor R 5 The first end of the resistor R is connected with the output end of the level output module 6 Second terminal of and operational amplifier U 1 Is connected to the output terminal of the resistor R 7 First terminal of (1) and programmable potentiometer R 9 Connected to a resistor R 18 First terminal of (1) and programmable potentiometer R 9 The first ends of the fixed ends of the resistor R are connected with each other 18 Is grounded, a programmable potentiometer R 9 The second end of the fixed end of the power supply is connected with a power supply; operational amplifier U 1 The non-inverting input terminal of the operational amplifier U is grounded 1 The positive power supply end is connected with a power supply, and the negative power supply end is grounded; operational amplifier U 1 The output terminal of (2) is a low level signal output terminal in the differential signal.
6. The multi-protocol bus fault injection system of claim 5, wherein the current-mode bus level adjustment module comprises an integration module P1 and a current-to-voltage conversion module P2; the integration module P1 comprises an operational amplifier U1, a resistor R10, a resistor R11 and a capacitor C1; the first end of the resistor R10 is connected with the level output module, the second end of the resistor R10 is connected with the inverting input end of the operational amplifier U1, the first end of the resistor R11 is connected with the non-inverting input end of the operational amplifier U1, the second end of the resistor R11 is grounded, the first end of the capacitor C1 is connected with the inverting input end of the operational amplifier U1, and the second end of the capacitor C1 is connected with the output end of the operational amplifier U1;
the current-voltage conversion module P2 comprises an operational amplifier U2, a resistor R13, a resistor R14, a resistor R16, a programmable potentiometer R15 and a triode Q1; the first end of the resistor R13 and the first end of the resistor R14 are connected with the non-inverting input end of the operational amplifier U2, the second end of the resistor R13 and the first end of the fixed end of the programmable potentiometer R15 are connected with the emitter of the triode Q1, the second end of the resistor R14 is grounded, the second end of the fixed end of the programmable potentiometer R15 is connected with the first end of the resistor R16 and the first end of the mutual inductor, the second end of the mutual inductor is grounded, the programmable potentiometer R15 (variable end) is connected with the emitter of the triode Q1, and the second end of the resistor R16 is connected with the inverting input end of the operational amplifier U2; the collector of the triode Q1 is connected with a power supply, and the base of the triode Q1 is connected with the output end of the operational amplifier U2; the output terminal of the operational amplifier U1 is connected to the inverting input terminal of the operational amplifier U2 via a resistor R12.
7. A control method of a multi-protocol bus fault injection system is characterized by comprising the following steps:
the upper computer module transmits information such as message content, message type, sending address, receiving address and the like in the message information and the bus type information to the message generation module together according to the requirement of the message information input module and the bus type selected by the bus type selection module;
meanwhile, the upper computer module sends the fault type information selected by the fault type selection module to the fault injection module;
the fault injection module divides the fault types according to fault injection information transmitted by the upper computer module to obtain data link layer faults and physical layer faults, and the data link layer faults generate data link fault signals through the data link layer fault injection module and inject the data link fault signals into the multi-protocol signal bus generation module; generating a fault control signal for a physical layer fault through a physical layer fault injection module, and injecting the fault control signal into a multi-protocol bus signal generation module to generate the physical layer fault;
the physical layer fault control signal comprises a time fault control signal and a level fault control signal;
step three, the message generating module generates a message file from the message information bus type information; the message file and the data link fault signal are coupled together, and the message file is input into the data storage after being generated once;
meanwhile, the physical layer fault injection module inputs a time fault control signal to a register of the data memory;
coupling the primary message file in the data storage with the time fault control signal, and then transmitting the primary message file to a data preprocessing module for data preprocessing operation to generate a secondary message file, wherein the data in the data storage works according to a first-in first-out principle;
fifthly, the data preprocessing module transmits the secondary message file to a level output module; the level output module outputs the secondary message file into a level signal to generate a secondary message analog signal, and then the secondary message analog signal is transmitted into the level adjustment module;
meanwhile, the physical layer fault injection module inputs the level fault control signal to a programmable potentiometer coupled with the level adjustment module;
and step six, adjusting the secondary message analog signal into a level signal which accords with a required bus communication protocol through a level adjusting module, and controlling the programmable potentiometer to change through a level fault control signal to generate a message analog signal containing a level fault.
8. The method of claim 7, wherein the physical layer fault injection module comprises a fault injection controller, the level module is a programmable potentiometer coupled to the level adjustment module, and the time module is a controller that changes register values in the data storage.
CN202210774765.5A 2022-07-01 2022-07-01 Multi-protocol bus fault injection system and control method thereof Pending CN115407744A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117370094A (en) * 2023-12-06 2024-01-09 苏州元脑智能科技有限公司 Test equipment, fault injection circuit and fault injection test method

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117370094A (en) * 2023-12-06 2024-01-09 苏州元脑智能科技有限公司 Test equipment, fault injection circuit and fault injection test method
CN117370094B (en) * 2023-12-06 2024-02-13 苏州元脑智能科技有限公司 Test equipment, fault injection circuit and fault injection test method

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