CN115360267A - Preparation method of heterojunction solar cell and heterojunction solar cell - Google Patents
Preparation method of heterojunction solar cell and heterojunction solar cell Download PDFInfo
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- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
- C23C16/24—Deposition of silicon only
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- C—CHEMISTRY; METALLURGY
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Abstract
The application discloses a preparation method of a heterojunction solar cell and the heterojunction solar cell, and belongs to the field of solar cells. A method of fabricating a heterojunction solar cell, comprising: forming a first intrinsic layer on a first surface of the semiconductor substrate, and forming a second intrinsic layer on a second surface of the semiconductor substrate, wherein the first surface is opposite to the second surface; forming an N-type doped layer on the surface of the first intrinsic layer, and forming a P-type doped layer on the surface of the second intrinsic layer; wherein, forming the N-type doped layer comprises: forming a first N-type doped layer on the first intrinsic layer by adopting a very high frequency plasma enhanced chemical vapor deposition process; and forming a second N-type doped layer on the first N-type doped layer by adopting a radio frequency plasma enhanced chemical vapor deposition process. According to the method, the production cost can be reduced on the premise of ensuring the film coating effect, and the problem that the existing single use of RF-PECVD or VHF-PECVD cannot meet the requirements of high efficiency, low cost and high stability of heterojunction battery industrialization can be solved.
Description
Technical Field
The application belongs to the technical field of solar cells, and particularly relates to a preparation method of a heterojunction solar cell and the heterojunction solar cell.
Background
With the increasing prominence of global energy problems, solar cell devices are widely popularized on a large scale and widely used throughout the world. Heterojunction solar cells, also known as HJT cells (Hetero-Junction with intrinsic Thin-layer) or SHJ cells, have many advantages such as simple structure or preparation process, high open-circuit voltage, high conversion efficiency, low temperature coefficient, and become a new hotspot in the photovoltaic field in recent years.
In the related art, the technology of mass-producing heterojunction solar cells on a large scale generally adopts radio frequency plasma enhanced chemical vapor deposition (RF-PECVD) to deposit an amorphous silicon N layer or P layer to form an emitter and a back field, and if the cell conversion efficiency is further improved, the N layer or P layer needs to be upgraded to a microcrystalline silicon process. At present, microcrystalline silicon deposition, particularly deposition of an N-type microcrystalline silicon layer, is generally prepared by RF-PECVD, but the method has the problems of thicker microcrystalline hatching layer, poor crystallinity, consumption of a large amount of hydrogen, other adverse effects on a solar cell caused by stronger ion bombardment and the like, and the development of a microcrystalline process and the breakthrough of cell efficiency are limited. In addition, part of enterprises apply very high frequency plasma enhanced chemical vapor deposition (VHF-PECVD) to microcrystalline silicon deposition, and the microcrystalline silicon deposition has the advantages of high crystallinity, small ion bombardment, high deposition rate and the like; however, VHF-PECVD also has the problems of high design and manufacturing cost, poor uniformity of large-area coating and the like, and whether the VHF-PECVD can be applied to large-scale mass production is still to be checked. Therefore, the requirements of high efficiency, low cost and high stability in the heterojunction battery industrialization cannot be met by using the RF-PECVD or the VHF-PECVD alone.
Disclosure of Invention
In view of the above-mentioned problems, the present invention is directed to solving, at least to some extent, one of the technical problems in the related art. Therefore, the invention provides a preparation method of a heterojunction solar cell and the heterojunction solar cell, which can ensure the film coating effect and reduce the cost, and at least can relieve the problem that the requirements of high efficiency, low cost and high stability of the industrialization of the heterojunction cell cannot be met by singly using RF-PECVD or VHF-PECVD.
In order to solve the technical problem, the present application is implemented as follows:
according to one aspect of the present application, there is provided a method of fabricating a heterojunction solar cell, the method comprising:
forming a first intrinsic layer on a first surface of a semiconductor substrate, and forming a second intrinsic layer on a second surface of the semiconductor substrate, wherein the first surface is opposite to the second surface;
forming an N-type doped layer on the surface of the first intrinsic layer, which is far away from the semiconductor substrate, and forming a P-type doped layer on the surface of the second intrinsic layer, which is far away from the semiconductor substrate;
wherein, forming the N-type doped layer comprises:
forming a first N-type doped layer on the first intrinsic layer by adopting a very high frequency plasma enhanced chemical vapor deposition process;
and forming a second N-type doped layer on the first N-type doped layer by adopting a radio frequency plasma enhanced chemical vapor deposition process.
In some embodiments, the first N-doped layer comprises 20% to 80% of the entire N-doped layer thickness.
In some embodiments, the ratio of the thickness of the first N-doped layer to the thickness of the second N-doped layer is 1:1.
in some embodiments, forming the first N-doped layer and forming the second N-doped layer are performed in different process chambers.
In some embodiments thereof, the process chambers include at least a first process chamber, a second process chamber, a third process chamber, and a fourth process chamber;
preparing a first N-type doped layer in the first process chamber and the second process chamber by adopting a very high frequency plasma enhanced chemical vapor deposition process;
and preparing a second N-type doped layer in the third process chamber and the fourth process chamber by adopting a radio frequency plasma enhanced chemical vapor deposition process.
In some embodiments, the process conditions for forming the first N-type doped layer include:
the frequency of the VHF power supply is 20-50 MHz, and the power density is 10-500 mW/cm 2 The surface temperature of the substrate is 120-300 ℃, the deposition time is 1-1500 s, and the pressure of the reaction gas is 0.5-10 Torr; wherein the gas participating in the reaction comprises silane, hydrogen, phosphane and carbon dioxide, the flow rate of the silane is 10-500 sccm, the flow rate of the hydrogen is 200-10000 sccm, the flow rate of the phosphane is 0-5000 sccm, and the flow rate of the carbon dioxide is 0-2000 sccm V; and/or the presence of a gas in the atmosphere,
the process conditions for forming the second N-type doped layer comprise:
the frequency of the radio frequency power supply is 13-14 MHz, and the power density is 10-500 mW/cm 2 The surface temperature of the substrate is 120-300 ℃, the deposition time is 1-1500 s, and the pressure of the reaction gas is 0.5-10 Torr; the gas participating in the reaction comprises silane, hydrogen, phosphane and carbon dioxide, the flow rate of the silane is 10-500 sccm, the flow rate of the hydrogen is 200-10000 sccm, the flow rate of the phosphane is 0-5000 sccm, and the flow rate of the carbon dioxide is 0-2000 sccm.
In some embodiments, forming the P-type doped layer comprises:
forming a first P-type doped layer on the second intrinsic layer by adopting a very high frequency plasma enhanced chemical vapor deposition process; forming a second P-type doped layer on the first P-type doped layer by adopting a radio frequency plasma enhanced chemical vapor deposition process;
or forming the P-type doped layer on the second intrinsic layer by using a very high frequency or radio frequency plasma enhanced chemical vapor deposition process.
In some embodiments, after forming the P-type doped layer on the surface of the second intrinsic layer facing away from the semiconductor substrate, the method further includes:
forming a first transparent conductive layer and a second transparent conductive layer on the N-type doped layer and the P-type doped layer respectively;
forming a first electrode and a second electrode on the first transparent conductive layer and the second transparent conductive layer, respectively.
According to another aspect of the present application, a heterojunction solar cell is provided, which is prepared by the above preparation method of the heterojunction solar cell, and the heterojunction solar cell includes:
a semiconductor substrate;
the first surface of the semiconductor substrate is sequentially provided with a first intrinsic layer, an N-type doped layer, a first transparent conductive layer and a first electrode;
the second surface of the semiconductor substrate is sequentially provided with a second intrinsic layer, a P-type doped layer, a second transparent conductive layer and a second electrode.
In some embodiments, the first intrinsic layer has a thickness of 5nm to 20nm, and the second intrinsic layer has a thickness of 5nm to 20nm;
and/or the first intrinsic layer and the second intrinsic layer are both intrinsic amorphous silicon layers;
and/or the N-type doped layer is a hydrogenated microcrystalline silicon layer doped with a V-group element and an oxygen element;
and/or the thickness of the N-type doped layer is 10 nm-35 nm;
and/or the thickness of the P-type doped layer is 5 nm-40 nm;
and/or the semiconductor substrate is an N-type silicon-based substrate.
In some embodiments, the P-type doped layer is an amorphous or microcrystalline silicon layer doped with a group iii element.
It should be noted that the above numerical ranges are inclusive of the endpoints.
The technical scheme of the invention at least has the following beneficial effects:
in an embodiment of the present application, the method for manufacturing a heterojunction solar cell includes a step of manufacturing an N-type doped layer, and a manner of forming the N-type doped layer includes: and forming a first N-type doping layer on the first intrinsic layer by adopting a very high frequency plasma enhanced chemical vapor deposition (VHF-PECVD) process, and forming a second N-type doping layer on the first N-type doping layer by adopting a radio frequency plasma enhanced chemical vapor deposition (RF-PECVD) process, wherein the first N-type doping layer and the second N-type doping layer form an N-type doping layer. Therefore, the N-type doping layer is prepared in a mode of combining the VHF-PECVD and the RF-PECVD, the permeability and the conductivity of the microcrystalline silicon film layer can be improved, the film quality of the N-type doping layer is guaranteed, the efficiency of the heterojunction solar cell is guaranteed, the cost is reduced, and the problem that the existing method for preparing the N-type doping layer by independently using the RF-PECVD or the VHF-PECVD cannot meet the requirements of high efficiency, low cost or high stability of the industrialization of the heterojunction cell can be solved.
Additional aspects and advantages of the present application will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the invention.
Drawings
Fig. 1 is a schematic flow diagram of a method of fabricating a heterojunction solar cell provided by some embodiments of the present invention;
fig. 2 is another schematic flow diagram of a method of fabricating a heterojunction solar cell according to some embodiments of the present invention;
FIG. 3 is a schematic flow chart of N-type doped layer coating according to some embodiments of the present invention;
FIG. 4 is a schematic illustration of microcrystalline silicon growth;
figure 5 is a schematic diagram of a heterojunction solar cell provided by some embodiments of the present invention.
Description of the reference numerals:
10-a semiconductor substrate;
20-a first intrinsic layer; a 30-N type doped layer; 40-a first transparent conductive layer; 50-a first electrode;
60-a second intrinsic layer; a 70-P type doped layer; 80-a second transparent conductive layer; 90-a second electrode.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are some, but not all, embodiments of the present application. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
The endpoints of the ranges and any values disclosed herein are not limited to the precise range or value, and such ranges or values should be understood to encompass values close to those ranges or values. For numerical ranges, one or more new numerical ranges may be obtained by combining the individual values, or by combining the individual values.
Plasma enhanced chemical vapor deposition (PEVCD) includes radio frequency enhanced plasma chemical vapor deposition (RF-PECVD) and very high frequency plasma chemical vapor deposition (VHF-PECVD), and in the related art, an N-type doped layer, namely an N-type doped microcrystalline silicon layer, is prepared by adopting an RF-PECVD or VHF-PECVD process, and the two modes respectively have advantages and disadvantages. For example, the RF-PECVD coating has poor crystallinity under the existing microcrystalline silicon process conditions, and needs to consume more hydrogen, and strong ion bombardment may cause other adverse effects on the solar cell; the VHF-PECVD has high cost and poor coating uniformity, and is possibly not suitable for large-scale mass production. Therefore, the current requirements of efficiency, cost and stability cannot be met by using two power supplies singly. The inventor of the application provides an improvement on the preparation process of the heterojunction solar cell on the basis of researching the advantages and the disadvantages of the mode.
In view of this, the technical solution of the embodiment of the present application provides a method for manufacturing a heterojunction solar cell and a heterojunction solar cell. According to the technical scheme of the embodiment of the application, according to the characteristic that a hatching layer is difficult to crystallize in the early stage in the growth process of microcrystalline silicon, a VHF + RF (very high frequency + radio frequency) power supply combination mode is adopted in the industrialized PECVD coating for continuous coating in a cavity-divided mode, and the problem can be relieved. See below for a description of specific solutions.
Referring to fig. 1 to 5, in some embodiments, a method for fabricating a heterojunction solar cell is provided, the method comprising:
forming a first intrinsic layer 20 on a first surface of the semiconductor substrate 10, and forming a second intrinsic layer 60 on a second surface of the semiconductor substrate 10, wherein the first surface is opposite to the second surface;
forming an N-type doped layer 30 on the surface of the first intrinsic layer 20 away from the semiconductor substrate 10, and forming a P-type doped layer 70 on the surface of the second intrinsic layer 60 away from the semiconductor substrate 10; that is, the N-type doped layer 30 is formed on the first intrinsic layer 20, and the P-type doped layer 70 is formed on the second intrinsic layer 60.
Wherein, forming the N-type doped layer 30 includes:
forming a first N-type doped layer on the first intrinsic layer by adopting a very high frequency plasma enhanced chemical vapor deposition process;
and forming a second N-type doped layer on the first N-type doped layer by adopting a radio frequency plasma enhanced chemical vapor deposition process. The N-type doped layer 30 is composed of a first N-type doped layer and a second N-type doped layer.
According to the preparation method of the heterojunction solar cell provided by the embodiment of the invention, on one hand, the VHF power supply is adopted to carry out film coating on the interface part where the N-type doped layer (microcrystalline N layer) is contacted with the first intrinsic layer (amorphous i layer), and compared with the RF power supply, the method can realize rapid crystallization, reduce the thickness of a hatching layer, improve the permeability and the conductivity of a microcrystalline silicon film layer and simultaneously reduce the bombardment of high-energy ions on the amorphous i layer. On the other hand, by utilizing the rule of microcrystalline silicon columnar growth, when a crystal image appears in the film, an RF power supply is used for continuously coating the film; therefore, on the basis of the existing crystal image, the RF-PECVD can realize the film coating effect close to a VHF power supply; that is, the microcrystalline silicon thin film having high crystallinity, good conductivity and excellent light transmittance can be obtained by using the RF power source in the latter stage. Meanwhile, the RF power supply has obvious advantages in large-area uniformity, is suitable for large-size cavities and is beneficial to realizing large-scale mass production. And the RF power supply has lower cost, simple cavity structure and good stability, and makes up the defects of the VHF power supply.
Therefore, the N-type doped layer is prepared in a mode of combining VHF-PECVD and RF-PECVD, the permeability and the conductivity of the microcrystalline silicon film layer can be improved, the film quality of the N-type doped layer is guaranteed, the efficiency of the heterojunction solar cell is guaranteed, and the cost is reduced.
The method provided by the embodiment of the invention is suitable for being applied to the field of solar cells and can be applied to the preparation of various solar cells, such as heterojunction cells (HIT/HJT). The method of the present invention will be described in detail below mainly by taking an HIT/HJT cell as an example, but it will be understood by those skilled in the art that the method of the present invention is not limited to the use in an HIT/HJT cell, but is suitable for use in various solar cells.
In some embodiments of the present application, the semiconductor substrate 10 is an N-type silicon-based substrate. In the embodiment of the present invention, the semiconductor substrate 10 may be a silicon substrate, such as a monocrystalline silicon substrate, a polycrystalline silicon substrate, or a quasi-monocrystalline silicon substrate, and the embodiment of the present invention is not limited to a specific type of the semiconductor substrate. The semiconductor substrate 10 may be P-type doped or N-type doped, i.e., the semiconductor substrate may be a P-type semiconductor substrate or an N-type semiconductor substrate. The heterojunction solar cell of the embodiment of the invention can be an N-type heterojunction solar cell or a P-type heterojunction solar cell. For example, in some embodiments, the heterojunction solar cell may be an N-type heterojunction solar cell, and the semiconductor substrate 10 is an N-type silicon-based substrate (also referred to as an N-type silicon wafer).
In some embodiments, the first intrinsic layer 20 and the second intrinsic layer 60 are both intrinsic amorphous silicon layers (intrinsic amorphous i layers).
In some embodiments, the N-type doped layer 30 is a hydrogenated microcrystalline silicon layer (μ c-Si: H) doped with a group V element and an oxygen element, and the oxygen doping is performed during the process of manufacturing the hydrogenated microcrystalline silicon layer, such as carbon dioxide gas providing an oxygen source to form silicon oxide, thereby improving the optical properties of the N-type doped layer 30, which may also be referred to as a hydrogenated microcrystalline silicon oxide layer (uc-SiO) in the solar field x H). Optionally, the group V element includes one or more of nitrogen, phosphorus, arsenic, and antimony. Preferably, this implementationIn the examples, the group V element is phosphorus. In this embodiment, the N-type doped layer 30 is a hydrogenated microcrystalline silicon layer doped with phosphorus and oxygen.
In some embodiments, the P-doped layer 70 is an amorphous or microcrystalline silicon layer doped with a group iii element. The group III element includes one or more of indium, boron, aluminum and gallium. Preferably, in this embodiment, the group iii element is boron. In this embodiment, the P-type doped layer 70 is an amorphous silicon layer or a microcrystalline silicon layer doped with boron.
In this embodiment, the materials of the film layers such as the first intrinsic layer 20, the second intrinsic layer 60, the N-type doped layer 30, and the P-type doped layer 70 are not particularly limited, and may be selected, for example, from the above-mentioned several types of materials, or in other embodiments, other types of materials may be used.
According to an embodiment, the semiconductor substrate 10 includes two oppositely disposed side surfaces, i.e., a first surface and a second surface, wherein the first surface may be a front surface of the semiconductor substrate and the second surface may be a back surface of the semiconductor substrate. The front surface (light-receiving surface) of the semiconductor substrate 10 is a surface facing the sun, that is, a surface facing the irradiation of sunlight, and the back surface (backlight surface) of the semiconductor substrate 10 is a surface facing away from the sun.
In some embodiments, a method of fabricating a heterojunction solar cell comprises:
s100, providing a semiconductor substrate 10, wherein the semiconductor substrate 10 comprises a first surface and a second surface which are oppositely arranged, the first surface is a front surface, and the second surface is a back surface; the first intrinsic layer 20 is formed on the front surface of the semiconductor substrate 10, and the second intrinsic layer 60 is formed on the back surface of the semiconductor substrate 10.
Optionally, the first intrinsic layer 20 and the second intrinsic layer 60 are both intrinsic amorphous i layers. The amorphous i layer refers to an undoped intrinsic amorphous silicon layer and mainly plays a role in passivating dangling bonds on the surface of the silicon wafer.
Note that, in the present embodiment, the method of depositing the first intrinsic layer 20 and the second intrinsic layer 60 is not particularly limited. For example, the deposition method may adopt Chemical Vapor Deposition (CVD), such as PEVCD or Cat-CVD (catalytic chemical vapor deposition), or may also adopt thermal oxidation method, or Atomic Layer Deposition (ALD), etc., and the specific working principle thereof is well known to those skilled in the art, and will not be described in detail herein.
Optionally, the provided semiconductor substrate 10 is a textured semiconductor substrate. Illustratively, providing the semiconductor substrate 10 includes: and providing an N-type silicon-based substrate, and cleaning and texturing the N-type silicon-based substrate to form a textured structure on the clean surface of the N-type silicon-based substrate. Then, an intrinsic amorphous i layer can be deposited on two sides of the N-type silicon-based substrate after being cleaned and textured.
It should be understood that the above-mentioned manner for cleaning and texturing silicon wafers is well known to those skilled in the art, and this embodiment is not limited thereto and will not be described herein again.
Optionally, the thickness of the first intrinsic layer 20 is 5nm to 20nm. Further, the thickness of the first intrinsic layer 20 may be 5nm to 10nm. For example, the first intrinsic layer may be 5nm, 6nm, 7nm, 8nm, 9nm, 10nm, 12nm, 15nm, 16nm, 18nm, 20nm, etc.
Optionally, the thickness of the second intrinsic layer 60 is 5nm to 20nm. Further, the thickness of the second intrinsic layer 60 may be 5nm to 8nm. For example, the first intrinsic layer may be 5nm, 5.5nm, 6nm, 6.5nm, 7nm, 8nm, 9nm, 10nm, 15nm, 18nm, 20nm, etc.
S200, preparing the N-type doping layer 30. That is, the N-type doped layer 30 is formed at the surface of the first intrinsic layer 20 facing away from the semiconductor substrate 10.
Alternatively, the N-type doped layer 30 is a hydrogenated microcrystalline silicon layer doped with phosphorus and oxygen. The N-doped layer 30 may serve as a window layer and a field passivation layer for the front side of the solar cell. The doping amounts of the oxygen element and the phosphorus element in the N-type doped layer 30 are not particularly limited, and may be selected and set according to actual requirements.
Optionally, the thickness of the N-type doped layer 30 is 10to 35nm. Further, the thickness of the N-type doped layer 30 is preferably 15 to 25nm. For example, the N-type doped layer can be 10nm, 12nm, 15nm, 16nm, 18nm, 20nm, 22nm, 25nm, 28nm, 30nm, 35nm, and the like. The thickness of the N-type doping layer is within the range, so that the method is easy to realize, the process operation conditions are convenient to regulate and control, the cost is reduced, and the phenomenon that the conversion efficiency of the heterojunction solar cell is influenced by over-thickness or over-thinness of the N-type doping layer can be avoided.
According to the embodiment, in the process of forming the N-type doped layer 30, a VHF-PECVD process is used to form a first N-type doped layer on the first intrinsic layer; and forming a second N-type doped layer on the first N-type doped layer by adopting an RF-PECVD process. And forming the first N-type doped layer and the second N-type doped layer in different process chambers. That is, the VHF-PECVD process and the RF-PECVD process may be performed in different process chambers. Therefore, the production speed and the yield can be improved by adopting a cavity-divided continuous coating mode for the N-type doped layer coating, for example, the N-type doped layer can be sequentially coated in sections in four PECVD machines.
The mode of continuous coating in different process chambers in different cavities is adopted, so that the process flow is smoother, the efficiency is higher, equipment parameter adjustment is not needed after the growth step of the first N-type doping layer is completed, and the next step is implemented to perform the growth step of the second N-type doping layer. In addition, if the same chamber is used for growth, the environments in the chamber are different due to different process conditions, the conversion from one environment to another environment requires time, the growth of the film is easily affected when the environment changes, the risk of cross contamination is easily generated, and the quality of the film and the efficiency of the battery may be affected.
Optionally, the process chambers include at least a first process chamber, a second process chamber, a third process chamber, and a fourth process chamber. For example, the first N-doped layer may be prepared using a VHF-PECVD process in the first process chamber and the second process chamber, and the second N-doped layer may be prepared using an RF-PECVD process in the third process chamber and the fourth process chamber.
It should be noted that, in this embodiment, the specific number of the process chambers is not limited, for example, four process chambers as described above may be used, and of course, in other embodiments, three, five, six, seven, or more process chambers may be used. When multiple process chambers are used, the power configurations of the tools may be changed as desired.
In other embodiments, the process chamber further comprises a fifth process chamber. For example, the first N-type doped layer may be prepared using a VHF-PECVD process in the first, second, and third process chambers, and the second N-type doped layer may be prepared using an RF-PECVD process in the fourth and fifth process chambers. In other example embodiments, the process chamber further includes a fifth process chamber and a sixth process chamber. For example, the first N-type doped layer may be prepared in the first, second, and third process chambers by using a VHF-PECVD process, and the second N-type doped layer may be prepared in the fourth, fifth, and sixth process chambers by using an RF-PECVD process; or, the first N-type doped layer may be prepared in the first process chamber, the second process chamber, the third process chamber and the fourth process chamber by using a VHF-PECVD process, and the second N-type doped layer may be prepared in the fifth process chamber and the sixth process chamber by using an RF-PECVD process.
The method of the present invention is described in detail below by taking four process chambers as an example, and the principle of coating with other number of process chambers is also the same, which is not described herein again.
Specifically, as shown in fig. 2 or fig. 3, in some embodiments, step S200 includes:
s210, growing a part of first N-type doped layer on a first intrinsic layer on the front surface of the semiconductor substrate by using VHF-PECVD (very high frequency-plasma enhanced chemical vapor deposition) in a first process chamber; and in the second process chamber, continuously growing another part of the first N-type doped layer on the generated part of the first N-type doped layer by using VHF-PECVD.
S220, in a third process chamber, continuously growing a part of a second N-type doped layer on the first N-type doped layer generated in the step S210 by adopting RF-PECVD; and in the fourth process chamber, continuing to grow another part of the second N-type doped layer on the generated part of the second N-type doped layer by using RF-PECVD.
In this embodiment, four PEVCD machines are used for sequential sectional coating, the four PEVCD machines can respectively complete a quarter of the coating thickness, the first two PEVCD machines can be VHF-PECVD machines, the second two PEVCD machines can be RF-PECVD machines, and the power supply configurations of the machines can be changed and modified as required.
For example, when the coating process is started, the N-type silicon wafer with amorphous i layers deposited on both sides, which is completed in step S100, is first placed in a tray corresponding to the VHF-PECVD carrier plate, and the carrier plate is transferred to the first process chamber by an automated apparatus through an LL chamber (e.g., a pre-treatment chamber) to start the coating (N-type doping layer coating) process.
The first coating cavity prepared by the N-type doping layer is a VHF-PECVD cavity, and the coating process comprises the steps of vacuumizing, ventilating and preheating an N-type silicon wafer, homogenizing reaction gas, starting glow discharge coating and the like. After the quarter of coating thickness is finished by the VHF-PECVD process in the first process chamber, the N-type silicon wafer is transmitted to the second process chamber by the carrier plate to be coated continuously, and the quarter of coating thickness is finished by the VHF-PECVD process in the second process chamber. Then, the carrier plate transmits the N-type silicon wafer to a third process chamber for film coating continuously, and in the third process chamber, a quarter of film coating thickness is completed by using an RF-PECVD process; and then, the carrier plate transmits the N-type silicon wafer to a fourth process chamber for continuous film coating, and the fourth process chamber completes the film coating thickness by utilizing an RF-PECVD process. Therefore, after sequentially passing through the four process chambers, the film plating work of all the N-type doped layers is completed. The operating parameters of each process chamber, such as the process duration, pressure, power, atmosphere and other conditions, can be independently adjusted, the power supply configuration of the four machines can be changed as required, and the specific PECVD coating process is not specifically required.
According to the growth rule of microcrystalline silicon shown in figure 4, the early hatching area is difficult to crystallize, so that the first process chamber and the second process chamber adopt VHF-PECVD with better crystallinity. While the latter section crystallizes more easily in the transition region and the columnar growth region, and RF-PECVD can be used to improve uniformity and reduce cost. According to different experimental requirements, the ratio of the thickness of the VHF-PECVD coating film to the total thickness of the N-type doped layer can be 0-100%, wherein 0% and 100% of the VHF-PECVD coating film are respectively a pure RF coating film and a pure VHF coating film, and the embodiment does not include 0% and 100%. The thickness of the part coated by VHF can be changed, and the rest parts are coated by RF.
It should be noted that the thickness of the N-type doped layer deposited in each process chamber can be adjusted according to actual requirements, that is, the ratio of the VHF-PECVD and RF-PECVD processes can be adjusted according to actual requirements.
Optionally, the first N-type doped layer is prepared by a VHF-PECVD process, and accounts for 20% -80% of the thickness of the whole N-type doped layer. Illustratively, the VHF-PECVD coating thickness can account for 25%, 40%, 50%, 60%, 75%, 80%, etc. of the total thickness of the N-doped layer, and the rest is coated by an RF-PECVD process. Preferably, the thickness ratio of the first N-type doped layer to the second N-type doped layer is 1:1. for example, the entire N-doped layer has a thickness d, and the first N-doped layer is co-fabricated in a thickness of 50% d in the first process chamber and the second process chamber by using a VHF-PECVD process. Specifically, in a first process chamber, a first N-type doped layer with the thickness of 25% d is prepared by a VHF-PECVD process; in the second process chamber, a first N-doped layer is prepared with a thickness of 25% d using a VHF-PECVD process. And preparing a second N-type doped layer with the thickness of 50% d in the third process chamber and the fourth process chamber by adopting an RF-PECVD process. Specifically, in the third process chamber, a second N-type doped layer with the thickness of 25% d is prepared by adopting an RF-PECVD process; in the fourth process chamber, a second N-doped layer is prepared with a thickness of 25% d using an RF-PECVD process.
In practical application, for example, the residence time of the N-type silicon wafer in each process chamber can be controlled according to the operation time. For example, if the total time required for preparing the N-type doped layer is 40s, the N-type silicon wafer may be left in each process chamber for 10s, so as to prepare the N-type doped layer with a thickness of 25% x d in each process chamber.
In this embodiment, when four process chambers are used for coating, the coating may be performed in an equally-divided manner, that is, the coating thickness of each process chamber may account for 25% of the total thickness of the N-type doped layer. Therefore, the operation and control are convenient, the uniformity is good, and the regulation and the control are easy. Of course, in other embodiments, the ratio is not limited thereto, and may be selectively set according to actual requirements.
Optionally, the process conditions for forming the first N-type doped layer, that is, the operating conditions for preparing the first N-type doped layer in the first process chamber and the second process chamber by using the VHF-PECVD process respectively, may include: the frequency of the VHF power supply is 20-50 MHz, and the power density is 10-500 mW/cm 2 The surface temperature of the substrate is 120-300 ℃, the deposition time is 1-1500 s, and the pressure of the reaction gas is 0.5-10 Torr; wherein the gas involved in the reaction comprises Silane (SiH) 4 ) Hydrogen (H) 2 ) Phosphane (PH) 3 ) And carbon dioxide (CO) 2 ) And the flow rate of the corresponding silane is 10-500 sccm, the flow rate of the hydrogen is 200-10000 sccm, the flow rate of the phosphine is 0-5000 sccm, and the flow rate of the carbon dioxide is 0-2000 sccm.
In addition, the N-type or P-type doping gas source is gas containing III/V group elements, and the oxygen element is derived from CO 2 And the like.
Optionally, the process conditions for forming the second N-type doped layer, that is, the operating conditions for preparing the second N-type doped layer in the third process chamber and the fourth process chamber by respectively using the RF-PECVD process, may include: the frequency of the radio frequency power supply is 13-14 MHz, preferably 13.56MHz, and the power density is 10-500 mW/cm 2 The surface temperature of the substrate is 120-300 ℃, the deposition time is 1-1500 s, and the pressure of the reaction gas is 0.5-10 Torr; wherein the gas involved in the reaction comprises Silane (SiH) 4 ) Hydrogen (H) 2 ) Phosphane (PH) 3 ) And carbon dioxide (CO) 2 ) And the flow rate of the corresponding silane is 10-500 sccm, the flow rate of the hydrogen is 200-10000 sccm, the flow rate of the phosphine is 0-5000 sccm, and the flow rate of the carbon dioxide is 0-2000 sccm. In addition, the N-type or P-type doping gas source is a gas containing III/V group elements, and oxygen elements are derived from CO 2 And the like.
It should be understood that the process conditions for forming the first N-type doped layer and the process conditions for forming the second N-type doped layer are mainly different from each other in that the power supply frequency is different, and other parameter conditions may be the same or slightly different. Illustratively, the frequency of the VHF power source is 20MHz to 50MHz, and may be, for example, 20MHz, 25MHz, 30MHz, 35MHz, 40MHz, 50MHz, etc. The frequency of the radio frequency power source is 13 to 14MHz, and may be, for example, 13.0MHz, 13.2MHz, 13.4MHz, 13.56MHz, 13.8MHz, 14MHz or the like, and preferably 13.56MHz.
Under the operating conditions, the N-type doped layer prepared under the frequency range of the very high frequency power supply and the frequency range of the radio frequency power supply can have high permeability and conductivity of the microcrystalline silicon film layer, and the film quality of the N-type doped layer can be ensured.
In addition, the specific operating conditions of the above VHF-PECVD process and RF-PECVD process can be adjusted according to practical situations without limiting the object of the present invention.
In this embodiment, can be automatic aggregate unit between each process cavity, need not artifical the transfer, can realize the automated transport of silicon chip, if break the vacuum back at first process cavity, the silicon chip in the first process cavity can be automatically transported to the second process cavity in, and degree of automation is high, and production efficiency is high. In addition, a clean shed can be built between the first process chamber and the second process chamber, and a linkage table between the first process chamber and the second process chamber is built through the clean shed to control the environment cleanliness.
S300, preparing the P-type doping layer 70. That is, the P-type doped layer 70 is formed at a surface of the second intrinsic layer 60 facing away from the semiconductor substrate 10.
Optionally, the P-type doped layer 70 is an amorphous silicon layer or a microcrystalline silicon layer doped with boron.
Optionally, the thickness of the P-type doped layer 70 is 5 to 40nm. Further, the thickness of the P-type doped layer 70 is preferably 8 to 35nm. For example, the P-type doped layer 70 may be 5nm, 8nm, 10nm, 12nm, 15nm, 20nm, 25nm, 28nm, 30nm, 35nm, 40nm, etc. The P-type doping layer is easy to realize in the range, the process operation conditions are convenient to regulate and control, the cost is reduced, and the phenomenon that the conversion efficiency of the heterojunction solar cell is influenced by over-thickness or over-thinness of the P-type doping layer can be avoided.
It should be noted that the method for depositing the P-type doped layer 70 is not particularly limited in this embodiment. For example, the deposition method may employ Chemical Vapor Deposition (CVD), such as PEVCD or Cat-CVD (catalytic chemical vapor deposition), and the specific working principle thereof is well known to those skilled in the art, and will not be described in detail herein.
Optionally, forming the P-type doped layer 70 includes: forming a first P-type doped layer on the second intrinsic layer by adopting a very high frequency plasma enhanced chemical vapor deposition process; and forming a second P-type doped layer on the first P-type doped layer by adopting a radio frequency plasma enhanced chemical vapor deposition process.
According to the embodiment, when the P-type doped layer 70 is prepared, a similar manner of preparing an N-type doped layer, that is, a manner of combining VHF-PECVD and RF-PECVD may be adopted to prepare the P-type doped layer, and the specific operation manner and principle thereof may refer to the description of preparing the N-type doped layer, which is not described herein again.
Optionally, a P-type doped layer 70 is formed on the second intrinsic layer 60 using a very high frequency plasma enhanced chemical vapor deposition process. Optionally, a P-type doped layer 70 is formed on the second intrinsic layer 60 using a radio frequency plasma enhanced chemical vapor deposition process.
S400, preparing a transparent conducting layer and a metal electrode.
Specifically, step S400 includes:
forming a first transparent conductive layer 40 and a second transparent conductive layer 80 on the N-type doped layer 30 and the P-type doped layer 70, respectively; that is, the first transparent conductive layer 40 is formed on the N-type doped layer 30, and the second transparent conductive layer 80 is formed on the P-type doped layer 70.
Forming a first electrode 50 and a second electrode 90 on the first transparent conductive layer 40 and the second transparent conductive layer 80, respectively; that is, the first electrode 50 is formed on the first transparent conductive layer 40, and the second electrode 90 is formed on the second transparent conductive layer 80.
In this embodiment, a method of forming the first transparent conductive layer 40, the second transparent conductive layer 80, the first electrode 50, and the second electrode 90 is not particularly limited. For example, the first and second transparent conductive layers 40 and 80 may be prepared by PVD (physical vapor deposition), and the first and second electrodes 50 and 90 may be prepared by screen printing.
Illustratively, in a PVD process chamber, a physical vapor deposition process is used to deposit a first transparent conductive layer 40 on the N-doped layer 30 and a second transparent conductive layer 80 on the P-doped layer 70. The first transparent conductive layer 40 and the second transparent conductive layer 80 are both transparent oxide conductive layers. And then, printing silver paste on the transparent oxide conducting layers on the front surface and the back surface of the semiconductor substrate in a screen printing mode, and sintering to form corresponding silver grid line electrodes.
In this embodiment, the material of the first transparent conductive layer 40 is not particularly limited, and may be set by itself. For example, the material of the first transparent conductive layer 40 may be tin-doped indium oxide (ITO), fluorine-doped tin oxide (FTO), aluminum-doped zinc oxide (AZO), boron-doped zinc oxide (BZO), or the like. Similarly, in this embodiment, the material of the second transparent conductive layer 80 is not particularly limited, and can be set by itself. For example, the material of the second transparent conductive layer 80 may be tin-doped indium oxide (ITO), or fluorine-doped tin oxide (FTO), or aluminum-doped zinc oxide (AZO), or boron-doped zinc oxide (BZO).
The material of the first electrode 50 and the second electrode 90 is a metal electrode, and the material of the metal electrode may be silver (Ag), nickel (Ni), copper (Cu), etc., but the present application does not limit the material.
Referring to fig. 5, in some embodiments, a heterojunction solar cell is provided, comprising: the semiconductor device comprises a semiconductor substrate 10, wherein the semiconductor substrate 10 comprises a first surface and a second surface which are oppositely arranged, wherein the first surface is a front surface, and the second surface is a back surface;
the front surface of the semiconductor substrate 10 is sequentially provided with a first intrinsic layer 20, an N-type doped layer 30, a first transparent conductive layer 40 and a first electrode 50;
the back surface of the semiconductor substrate 10 is sequentially provided with a second intrinsic layer 60, a P-type doped layer 70, a second transparent conductive layer 80, and a second electrode 90.
It will be understood by those skilled in the art that the heterojunction solar cell is based on the same inventive concept as the method for manufacturing the heterojunction solar cell, and the features and advantages described above with respect to the method for manufacturing the heterojunction solar cell are also applicable to the heterojunction solar cell, so that the heterojunction solar cell has at least the same features and advantages as the method for manufacturing the heterojunction solar cell, and will not be described herein again.
Optionally, the semiconductor substrate 10 is an N-type silicon-based substrate.
Optionally, the thickness of the first intrinsic layer 20 is 5 to 20nm, preferably 5 to 10nm; the thickness of the second intrinsic layer 60 is 5 to 20nm; preferably 5 to 8nm. Optionally, the first intrinsic layer 20 and the second intrinsic layer 60 are both intrinsic amorphous silicon layers.
Optionally, the thickness of the N-type doped layer 30 is 10to 35nm, preferably 15 to 25nm. Alternatively, the N-type doped layer 30 is a hydrogenated microcrystalline silicon layer doped with phosphorus and oxygen.
Optionally, the thickness of the P-type doped layer 70 is 5 to 40nm, preferably 8 to 35nm. Optionally, the P-type doped layer 70 is an amorphous or microcrystalline silicon layer doped with boron.
According to the method provided by the embodiment of the present application, in step S200, the ratio of VHF-PECVD or RF-PECVD with different ratios during the coating process has a certain effect on the coating effect, and for this reason, this embodiment has performed multiple sets of tests to verify that the ratio of the VHF-PECVD coating thickness to the total thickness of the N-type doped layer can be 100% (all VHF-PECVD), 50%, 25%, and 0% (all RF-PECVD), and the test results are shown in table 1 below.
TABLE 1
| Condition | Eta | Voc(V) | Isc(A) | FF |
| All VHF coatings | 25.60％ | 0.748 | 10.97 | 85.5 |
| VHF | ||||
| 50% | 25.55％ | 0.749 | 10.92 | 85.7％ |
| VHF 25% | 25.44％ | 0.748 | 10.93 | 85.3％ |
| All RF coatings | 25.22％ | 0.748 | 10.83 | 85.4％ |
As can be seen from the data in Table 1, the effect of oxidizing the microcrystalline N-layer film by using the VHF-PECVD and RF-PECVD combined method can be obtained, and the efficiency of the solar cell obtained by using the VHF-PECVD and the RF-PECVD is almost the same.
In the invention, in the process of preparing the N-type doped layer, the front part is beneficial to the high crystallinity of VHF to reduce the thickness of an amorphous hatching layer and reduce ion bombardment, the rear part is replaced by an RF power supply to ensure the uniformity of the coating, the cost is lower, and the comprehensive coating effect is close to that of a pure VHF power supply; therefore, the problem that the existing method for preparing the N-type doped layer by singly using the RF-PECVD or VHF-PECVD cannot meet the requirements of high efficiency, low cost or high stability of the industrialization of the heterojunction battery can be solved.
The terms first, second and the like in the description and in the claims of the present application are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It will be appreciated that the data so used may be interchanged under appropriate circumstances such that embodiments of the application may be practiced in sequences other than those illustrated or described herein, and that the terms "first," "second," and the like are generally used herein in a generic sense and do not limit the number of terms, e.g., the first term can be one or more than one. Further, the term "and/or" as used herein is merely one type of association that describes an associated object, meaning that three relationships may exist, e.g., a and/or B, may mean: a exists alone, A and B exist simultaneously, and B exists alone.
While the present embodiments have been described with reference to the accompanying drawings, it is to be understood that the invention is not limited to the precise embodiments described above, which are meant to be illustrative and not restrictive, and that various changes may be made therein by those skilled in the art without departing from the spirit and scope of the invention as defined by the appended claims.
Claims (10)
1. A method of fabricating a heterojunction solar cell, the method comprising:
forming a first intrinsic layer on a first surface of a semiconductor substrate, and forming a second intrinsic layer on a second surface of the semiconductor substrate, wherein the first surface is opposite to the second surface;
forming an N-type doped layer on the surface of the first intrinsic layer, which is far away from the semiconductor substrate, and forming a P-type doped layer on the surface of the second intrinsic layer, which is far away from the semiconductor substrate;
wherein, forming the N-type doped layer comprises:
forming a first N-type doped layer on the first intrinsic layer by adopting a very high frequency plasma enhanced chemical vapor deposition process;
and forming a second N-type doped layer on the first N-type doped layer by adopting a radio frequency plasma enhanced chemical vapor deposition process.
2. The method of claim 1, wherein the first N-doped layer comprises 20-80% of the entire thickness of the N-doped layer.
3. The method of claim 2, wherein a thickness ratio of the first N-type doped layer to the second N-type doped layer is 1:1.
4. the method of claim 1, wherein forming the first N-doped layer and forming the second N-doped layer are performed in different process chambers.
5. The method of claim 4, wherein the process chambers comprise at least a first process chamber, a second process chamber, a third process chamber, and a fourth process chamber;
preparing a first N-type doped layer in the first process chamber and the second process chamber by adopting a very high frequency plasma enhanced chemical vapor deposition process;
and preparing a second N-type doped layer in the third process chamber and the fourth process chamber by adopting a radio frequency plasma enhanced chemical vapor deposition process.
6. The method of claim 1, wherein the process conditions for forming the first N-type doped layer comprise:
the frequency of the VHF power supply is 20-50 MHz, and the power density is 10-500 mW/cm 2 The surface temperature of the substrate is 120-300 ℃, the deposition time is 1-1500 s, and the pressure of the reaction gas is 0.5-10 Torr; wherein the gas participating in the reaction comprises silane, hydrogen, phosphane and carbon dioxide, the flow rate of the silane is 10-500 sccm, the flow rate of the hydrogen is 200-10000 sccm, the flow rate of the phosphane is 0-5000 sccm, and the flow rate of the carbon dioxide is 0-2000 sccm V; and/or the presence of a gas in the atmosphere,
the process conditions for forming the second N-type doped layer comprise:
the frequency of the radio frequency power supply is 13-14 MHz, and the power density is 10-500 mW/cm 2 The surface temperature of the substrate is 120-300 ℃, the deposition time is 1-1500 s, and the pressure of the reaction gas is 0.5-10 Torr; the gas participating in the reaction comprises silane, hydrogen, phosphane and carbon dioxide, the flow rate of the silane is 10-500 sccm, the flow rate of the hydrogen is 200-10000 sccm, the flow rate of the phosphane is 0-5000 sccm, and the flow rate of the carbon dioxide is 0-2000 sccm.
7. The method of fabricating a heterojunction solar cell of any of claims 1 to 6, wherein forming the P-type doped layer comprises:
forming a first P-type doped layer on the second intrinsic layer by adopting a very high frequency plasma enhanced chemical vapor deposition process; forming a second P-type doped layer on the first P-type doped layer by adopting a radio frequency plasma enhanced chemical vapor deposition process;
or, forming the P-type doped layer on the second intrinsic layer by using a very high frequency or radio frequency plasma enhanced chemical vapor deposition process.
8. The method for manufacturing a heterojunction solar cell according to any of claims 1 to 6, wherein after the P-type doped layer is formed on the surface of the second intrinsic layer facing away from the semiconductor substrate, the method further comprises:
forming a first transparent conductive layer and a second transparent conductive layer on the N-type doped layer and the P-type doped layer respectively;
forming a first electrode and a second electrode on the first transparent conductive layer and the second transparent conductive layer, respectively.
9. A heterojunction solar cell manufactured by the method for manufacturing a heterojunction solar cell according to any one of claims 1 to 8, comprising:
a semiconductor substrate;
the first surface of the semiconductor substrate is sequentially provided with a first intrinsic layer, an N-type doped layer, a first transparent conductive layer and a first electrode;
the second surface of the semiconductor substrate is sequentially provided with a second intrinsic layer, a P-type doped layer, a second transparent conductive layer and a second electrode.
10. The heterojunction solar cell of claim 9, wherein the thickness of the first intrinsic layer is between 5nm and 20nm, and the thickness of the second intrinsic layer is between 5nm and 20nm;
and/or the first intrinsic layer and the second intrinsic layer are both intrinsic amorphous silicon layers;
and/or the N-type doped layer is a hydrogenated microcrystalline silicon layer doped with a V-group element and an oxygen element;
and/or the thickness of the N-type doped layer is 10 nm-35 nm;
and/or the thickness of the P-type doped layer is 5 nm-40 nm;
and/or the semiconductor substrate is an N-type silicon-based substrate.
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| CN115995512B (en) * | 2023-02-08 | 2024-05-14 | 通威太阳能（安徽）有限公司 | Solar cell and preparation method thereof |
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