CN115343602A - Timing deviation detection circuit and method - Google Patents
Timing deviation detection circuit and method Download PDFInfo
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Abstract
The application provides a timing deviation detection circuit and a timing deviation detection method, and relates to the technical field of envelope tracking power amplifiers. A timing deviation detection circuit comprising: the envelope tracking power amplifier circuit is used for receiving a section of continuous input signals comprising N input signal segments and outputting a corresponding section of output signals comprising N output signal segments; the processing circuit is used for obtaining a 1 st timing deviation according to a 1 st input signal segment in the input signals and an output signal segment corresponding to the 1 st input signal segment, and obtaining an ith timing deviation according to an ith input signal segment in the N input signal segments, an output signal segment corresponding to the ith input signal segment and the (i-1) th timing deviation until the ith timing deviation meets a preset condition, wherein the ith timing deviation is the timing deviation of the envelope tracking power amplifier circuit.
Description
Technical Field
The present application relates to the field of envelope tracking power amplifiers, and in particular, to a timing offset detection circuit and method.
Background
An envelope tracking Power Amplifier is an Amplifier which greatly improves the efficiency of a Radio Frequency Power Amplifier (RFPA), and output performance parameters of the envelope tracking Power Amplifier, such as an EVM (Error Vector multiplier), an ACLR (Adjacent Channel Leakage Ratio), and the like, are very sensitive to the timing deviation between an envelope branch and an input branch of the envelope tracking Power Amplifier, but the timing deviation is difficult to directly and accurately measure in the prior art.
Disclosure of Invention
The application provides a timing deviation detection circuit and a method, which aim to solve the problem that the prior art is difficult to directly and accurately measure and obtain the timing deviation.
In a first aspect, the present application provides a timing deviation detection circuit, comprising: the envelope tracking power amplifier circuit is used for receiving N sections of input signals which are continuously input and outputting corresponding N output signal segments, wherein N is a positive integer greater than or equal to 2; a processing circuit, configured to obtain a 1 st timing offset according to a 1 st input signal segment of the N input signal segments and an output signal segment corresponding to the 1 st input signal segment, and obtain an i-th timing offset according to an i-th input signal segment of the N input signal segments, an output signal segment corresponding to the i-th input signal segment, and an i-1 st timing offset, until the i-th timing offset satisfies a preset condition, where the i-th timing offset is a function of timing offsets of the envelope tracking power amplifier circuit, i sequentially takes from 2 to M, and M is a positive integer less than or equal to N; obtaining the timing offset based on the ith timing offset; and the output signal segment corresponding to the ith input signal segment is a signal which is output by the envelope tracking power amplifier circuit according to the envelope signal corresponding to the ith input signal segment adjusted by the i-1 st timing deviation and the envelope signal corresponding to the ith input signal segment and the adjusted ith input signal segment.
In the embodiment of the application, the processing circuit processes the ith input signal segment, the output signal segment corresponding to the ith input signal segment and the (i-1) th timing deviation to obtain the ith timing deviation, and the obtained interpolation coefficient is closer to the real timing deviation as the iterative processing is carried out for a plurality of times, until the interpolation coefficient meets the preset condition, the interpolation coefficient can be determined to be approximate to the timing deviation, and the interpolation coefficient is taken as the timing deviation, so that the accurate timing deviation can be obtained.
With reference to the technical solution provided by the first aspect, in some possible implementations, the processing circuit is specifically configured to: determining a cross-correlation modulus value for each of the N input signal segments and each of the N output signal segments; the input signal segment corresponding to the maximum cross-correlation modulus is the 1 st input signal segment, and the output signal segment corresponding to the maximum cross-correlation modulus is the output signal segment corresponding to the 1 st input signal segment.
In the embodiment of the application, the cross-correlation modulus represents the correlation degree between the two signal segments, so that the input signal segment and the output signal segment corresponding to the maximum cross-correlation modulus are the two signal segments with the highest correlation degree, thereby reducing errors caused by signal transmission, enabling the subsequently obtained 1 st group of interpolation coefficients to be closer to real timing deviation, and improving the accuracy of the subsequently obtained interpolation coefficients calculated according to the 1 st group of interpolation coefficients.
With reference to the technical solution provided by the first aspect, in some possible implementations, the processing circuit is specifically configured to: and acquiring a frequency spectrum of an output signal segment corresponding to the 1 st input signal segment, and taking a corresponding delay difference as an initial delay deviation for interpolation according to the minimum frequency spectrum distortion (such as adjacent channel leakage) to obtain the 1 st timing deviation.
In this embodiment of the present application, the spectrum of the output signal segment corresponding to the 1 st input signal segment may reflect a timing difference between the 1 st input signal segment and the output signal segment corresponding to the 1 st input signal segment, and then a point with minimum spectral distortion may be found through the spectrum of the output signal segment corresponding to the 1 st input signal segment, and a delay difference corresponding to the point is used as an initial delay deviation, so that the 1 st timing deviation is closer to a real timing deviation, and the accuracy of a subsequent interpolation coefficient calculated according to the 1 st timing deviation is improved.
With reference to the technical solution provided by the first aspect, in some possible implementations, the processing circuit is specifically configured to: obtaining a filter coefficient based on the i-1 th timing deviation and a preset filter parameter; and obtaining the ith timing deviation based on the ith-1 timing deviation, the filter coefficient, the ith input signal segment and an output signal segment corresponding to the ith input signal segment.
In the embodiment of the application, when the ith timing deviation is calculated, the influence of noise and interference is eliminated by presetting filter parameters, so that the obtained ith timing deviation is more accurate.
With reference to the technical solution provided by the first aspect, in some possible implementations, the processing circuit is specifically configured to: for each signal value in an output signal segment corresponding to the ith input signal segment, obtaining a first filtering output value corresponding to the signal value based on the signal value and a filter coefficient corresponding to the signal value; obtaining a first deviation value corresponding to the signal value based on a first filtering output value and an input signal value corresponding to the signal value; and obtaining the ith timing deviation based on a first deviation value corresponding to each signal value in an output signal segment corresponding to the ith input signal segment and the (i-1) th timing deviation, the ith input signal segment and the output signal segment corresponding to the ith input signal segment.
In the embodiment of the application, the deviation value of each signal value in the output signal segment corresponding to the ith input signal segment is fully considered, so that the finally obtained ith timing deviation can accurately reflect the timing deviation, and the obtained ith timing deviation is more accurate.
With reference to the technical solution provided by the first aspect, in some possible implementations, the preset condition includes: the ith timing deviation is the Mth timing deviation, or the ith timing deviation is smaller than or equal to a preset interpolation coefficient threshold value.
In the embodiment of the application, the interpolation coefficient can be iteratively calculated for multiple times by presetting the iteration times, so that the finally obtained Mth timing deviation, namely the timing deviation is more accurate. Or, by presetting an interpolation coefficient threshold, when the ith timing deviation is less than or equal to the preset interpolation coefficient threshold, the interpolation coefficient can be determined to accurately reflect the timing deviation, so that the timing deviation is more accurate.
With reference to the technical solution provided by the first aspect, in some possible implementations, the envelope tracking power amplifier circuit is further configured to adjust an envelope signal corresponding to an ith input signal segment according to an i-1 th timing offset, and output an output signal segment corresponding to the ith input signal segment according to the ith input signal segment and the adjusted envelope signal corresponding to the ith input signal segment.
In the embodiment of the application, the envelope tracking power amplifier circuit adjusts the envelope signal corresponding to the ith section of input signal through the (i-1) th timing deviation, so that the timing error between the ith input signal segment and the output signal segment corresponding to the ith input signal segment is reduced, and the finally obtained ith timing deviation can accurately reflect the timing deviation by continuously reducing the timing error between the ith input signal segment and the output signal segment corresponding to the ith input signal segment, so that the timing deviation is more accurate.
In combination with the technical solution provided by the first aspect, in some possible implementations, the envelope tracking power amplifier circuit includes: the envelope detection module is used for detecting the ith input signal segment to obtain an ith envelope signal corresponding to the ith input signal segment; the interpolation module is used for inserting interpolation at a target position in the ith envelope signal according to the (i-1) th timing deviation to obtain an ith interpolated envelope signal; the modulation voltage is used for outputting a modulation voltage corresponding to the ith interpolated envelope signal according to the ith interpolated envelope signal; and the power amplifier is used for amplifying the ith envelope signal corresponding to the ith input signal segment by taking the modulation voltage corresponding to the interpolated ith envelope signal as a self power supply to obtain an output signal segment corresponding to the ith input signal segment.
In the embodiment of the application, the interpolation module is arranged in the envelope tracking power amplifier circuit, so that the envelope tracking power amplifier circuit can adjust the envelope signal corresponding to the ith input signal segment through the (i-1) th timing deviation, and further, the time sequence error between the ith input signal segment and the output signal segment corresponding to the ith input signal segment is reduced, so that the finally obtained ith timing deviation can accurately reflect the timing deviation, and the timing deviation is more accurate.
In combination with the technical solution provided by the first aspect, in some possible implementations, the envelope tracking power amplifier circuit further includes: the first delayer is connected with the input end of the power amplifier and is used for delaying the ith envelope signal corresponding to the ith input signal segment and transmitting the delayed ith envelope signal to the power amplifier; and the second delayer is connected with the input end of the envelope detection module and is used for delaying the ith envelope signal corresponding to the ith input signal segment and transmitting the delayed ith envelope signal to the envelope detection module.
In the embodiment of the application, the first delayer and the second delayer are arranged in the envelope tracking power amplifier circuit, so that the time sequence of the ith envelope signal input to the power amplifier and the ith envelope signal input to the envelope detection module can be adjusted, the delay error of the ith signal on two branches of the envelope tracking power amplifier circuit is reduced, the obtained ith timing deviation can accurately reflect the timing deviation, and the timing deviation is more accurate.
In combination with the technical solution provided by the first aspect, in some possible implementations, the envelope tracking power amplifier circuit further includes: and the pre-compensation module is connected with the input end of the power amplifier and is used for compensating the ith envelope signal corresponding to the ith input signal segment and transmitting the compensated ith envelope signal to the power amplifier.
In the embodiment of the application, the ith envelope signal corresponding to the ith input signal segment of the input power amplifier is compensated through the pre-compensation module, so that the influence of nonlinear distortion on the output signal segment corresponding to the ith input signal segment can be effectively reduced, and the ith timing deviation obtained through subsequent calculation is more accurate.
In a second aspect, the present application provides a timing offset detection method for detecting a timing offset of an envelope tracking power amplifier circuit, the envelope tracking power amplifier circuit being configured to receive N input signal segments that are continuously input and output corresponding N output signal segments, N being a positive integer greater than or equal to 2, the method comprising: obtaining a 1 st timing deviation according to a 1 st input signal segment in the N input signal segments and an output signal segment corresponding to the 1 st input signal segment; obtaining an ith timing deviation according to an ith input signal segment in the N input signal segments, an output signal segment corresponding to the ith input signal segment and the (i-1) th timing deviation until the ith timing deviation meets a preset condition, wherein i sequentially takes 2 to M, M is a positive integer less than or equal to N, the output signal segment corresponding to the ith input signal segment is a signal which is output according to the ith input signal segment and the envelope signal corresponding to the ith input signal segment after adjustment and is adjusted according to the (i-1) th timing deviation, and the ith timing deviation is a function of the timing deviation of the envelope tracking power amplifier circuit; and obtaining the timing deviation of the envelope tracking power amplifier circuit based on the ith timing deviation meeting the preset condition.
With reference to the foregoing technical solution provided by the second aspect, in some possible embodiments, the obtaining an ith timing offset according to an ith input signal segment in the N input signal segments, an output signal segment corresponding to the ith input signal segment, and an ith-1 timing offset includes: obtaining a filter coefficient based on the i-1 th timing deviation and a preset filter parameter; and obtaining the ith timing deviation based on the ith-1 timing deviation, the filter coefficient, the ith input signal segment and the output signal segment corresponding to the ith input signal segment.
With reference to the technical solution provided by the second aspect, in some possible implementations, the obtaining the ith timing offset based on the i-1 th timing offset, the filter coefficient, the ith input signal segment, and an output signal segment corresponding to the ith input signal segment includes: for each signal value in an output signal segment corresponding to the ith input signal segment, obtaining a first filtering output value corresponding to the signal value based on the signal value and a filter coefficient corresponding to the signal value; obtaining a first deviation value based on a first filtering output value corresponding to the signal value and an input signal value corresponding to the signal value; and obtaining an ith timing offset based on a first offset value corresponding to each signal value in an output signal segment corresponding to the ith input signal segment, the ith timing offset, the ith input signal segment and the output signal segment corresponding to the ith input signal segment.
In a third aspect, the present application provides an envelope signal adjusting method for adjusting an envelope signal output by a power amplifier in a timing deviation detecting circuit according to the first aspect, the method comprising: determining an interpolation coefficient for the envelope tracking power amplifier circuit based on the first timing offset and the second timing offset; the first timing deviation is obtained through a first preset signal, the second timing deviation is obtained through a second preset signal, and the first preset signal is different from the second preset signal; and adjusting the envelope signal output by the power amplifier based on the interpolation coefficient.
In the embodiment of the application, the interpolation coefficient is determined through the first timing deviation and the second timing deviation, so that the envelope signal output by the power amplifier is adjusted, the time delay of the signal output by the envelope tracking amplifier can be reduced, and the accuracy of the output envelope signal is improved.
With reference to the technical solution provided by the third aspect, in some possible implementations, the process of obtaining the first timing offset, where the first preset signal is a non-envelope signal, includes: applying a fixed voltage to the power amplifier to obtain a first timing deviation corresponding to the first preset signal; correspondingly, the process of obtaining the second timing deviation, where the second preset signal is an envelope signal, includes: and applying an envelope voltage to the power amplifier to obtain a second timing deviation corresponding to the second preset signal.
In the embodiment of the application, by obtaining the first timing deviation of the power amplifier under the fixed voltage and the second timing deviation of the power amplifier under the envelope voltage, the interpolation coefficient can be further obtained according to the first timing deviation and the second timing deviation, and the envelope signal output by the power amplifier is adjusted based on the interpolation coefficient, so that the adjusted envelope signal output by the power amplifier is more accurate.
With reference to the technical solution provided by the third aspect, in some possible implementations, the first preset signal and the second preset signal are envelope signals, and the first preset signal and the second preset signal are different signal segments of the same envelope signal.
In the embodiment of the application, the interpolation coefficient is determined by calculating the timing deviation of different signal segments of the same input signal to obtain the first timing deviation and the second timing deviation, so that the envelope signals output by the power amplifier are adjusted, the timing deviations of the different signal segments are consistent, the time delay of the signals output by the envelope tracking amplifier is reduced, and the accuracy of the output envelope signals is improved.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are required to be used in the embodiments will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present application and therefore should not be considered as limiting the scope, and for those skilled in the art, other related drawings can be obtained from the drawings without inventive effort.
Fig. 1 is a schematic structural diagram of a timing deviation detecting circuit according to an embodiment of the present application;
fig. 2 is a signal diagram illustrating a 1 st input signal segment and a corresponding output signal segment according to an embodiment of the present application;
FIG. 3 is a schematic diagram of a timing deviation detection circuit according to an embodiment of the present application;
FIG. 4 is a schematic diagram of a timing deviation detecting circuit according to an embodiment of the present application;
fig. 5 is a schematic flow chart illustrating a timing deviation detection method according to an embodiment of the present application;
fig. 6 is a flowchart illustrating an envelope signal adjustment method according to an embodiment of the present application;
fig. 7 is a schematic diagram illustrating an envelope signal output by a power amplifier according to an embodiment of the present application;
fig. 8 is a schematic diagram of a signal input to a power amplifier according to an embodiment of the present application.
Detailed Description
In the description of the present application, unless expressly stated or limited otherwise, the terms "connected" and "connected" are to be construed broadly, e.g., as meaning a fixed connection, a removable connection, or an integral connection; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements.
The technical solution of the present application will be described in detail below with reference to the accompanying drawings.
In order to solve the problem that it is difficult to directly and accurately measure the timing offset in the prior art, the present application provides a timing offset detection circuit, which includes an envelope tracking power amplifier circuit and a processing circuit, and for easy understanding, please refer to fig. 1.
The envelope tracking power amplifier circuit is used for receiving N sections of input signals which are continuously input and outputting corresponding N output signal sections, wherein N is a positive integer greater than or equal to 2. It will be appreciated that the N input signal segments that are input consecutively are sequential in time and that each input signal segment is the same length, i.e., each input signal segment includes the same number of signal values.
The processing circuit is used for obtaining a 1 st timing deviation according to the 1 st input signal segment and the output signal segment corresponding to the 1 st input signal segment, obtaining an ith timing deviation according to the ith input signal segment, the output signal segment corresponding to the ith input signal segment and the (i-1) th timing deviation, and obtaining the ith timing deviation until the ith timing deviation meets a preset condition, wherein i is sequentially 2-M, and M is a positive integer less than or equal to N.
The ith timing offset is a timing offset of the envelope tracking power amplifier circuit, wherein an output signal segment corresponding to an ith input signal segment is a signal which is output by the envelope tracking power amplifier circuit according to the ith-1 timing offset, the envelope signal corresponding to the ith input signal segment is adjusted by the envelope tracking power amplifier circuit according to the ith input signal segment and the envelope signal corresponding to the adjusted ith input signal segment.
After the ith timing offset is obtained, the processing circuit may determine whether the ith timing offset satisfies a preset condition, and set a parameter θ corresponding to the timing offset as the timing offset when the preset condition is satisfied.
Wherein the preset condition may be that the ith timing deviation is the mth timing deviation. By presetting the iteration times, the interpolation coefficient can be iteratively calculated for multiple times, so that the finally obtained Mth timing deviation, namely the timing deviation is more accurate.
Alternatively, the preset condition may be that the cost function obtained under the ith timing deviation is less than or equal to a preset threshold. By presetting an interpolation error threshold, when the ith timing deviation is less than or equal to a preset interpolation coefficient threshold, the interpolation coefficient can be determined to accurately reflect the timing deviation, so that the timing deviation is more accurate. And when no interpolation coefficient which is less than or equal to a preset interpolation coefficient threshold value exists, taking the Mth timing deviation as the timing deviation.
The preset interpolation coefficient threshold may be set according to actual requirements, but it should be noted that the smaller the preset interpolation coefficient threshold is, the more accurate the finally obtained timing deviation is.
In order to better understand the above process of acquiring the timing offset of the envelope tracking power amplifier circuit, the following example is provided.
Assuming that N is 5, the preset condition is that the ith timing offset is the mth timing offset, and when M is equal to 3, the process of obtaining the timing offset of the envelope tracking power amplifier circuit is as follows:
the envelope tracking power amplifier circuit processes the received 1 st input signal to obtain an output signal segment corresponding to the 1 st input signal segment. The processing circuit obtains a 1 st timing deviation according to the 1 st input signal segment and the output signal segment corresponding to the 1 st input signal segment.
And then, the envelope tracking power amplifier circuit adjusts the envelope signal corresponding to the 2 nd input signal segment according to the 1 st timing deviation, and obtains an output signal segment corresponding to the 2 nd input signal segment according to the adjusted envelope signal corresponding to the 2 nd input signal segment. The processing circuit obtains a 2 nd timing offset according to the 2 nd input signal segment, an output signal segment corresponding to the 2 nd input signal segment and the 1 st timing offset.
Therefore, the envelope tracking power amplifier circuit adjusts the envelope signal corresponding to the 3 rd input signal segment according to the 2 nd timing offset, and obtains the output signal segment corresponding to the 3 rd input signal segment according to the adjusted envelope signal corresponding to the 3 rd input signal segment. And the processing circuit obtains a 3 rd timing deviation according to the 3 rd input signal segment, an output signal segment corresponding to the 3 rd input signal segment and the 2 nd timing deviation. This 3 rd timing offset is the timing offset of the envelope tracking power amplifier circuit.
Or, assuming that N is 5 and M is equal to 5, and when the preset condition is that the ith timing offset is less than or equal to the preset interpolation coefficient threshold, the process of obtaining the timing offset of the envelope tracking power amplifier circuit is as follows:
the envelope tracking power amplifier circuit processes the received 1 st input signal to obtain an output signal segment corresponding to the 1 st input signal segment. The processing circuit obtains a 1 st timing deviation according to the 1 st input signal segment and the output signal segment corresponding to the 1 st input signal segment.
Then, the envelope tracking power amplifier circuit adjusts the envelope signal corresponding to the 2 nd input signal segment according to the 1 st timing offset, and obtains the output signal segment corresponding to the 2 nd input signal segment according to the adjusted envelope signal corresponding to the 2 nd input signal segment. The processing circuit obtains a 2 nd timing offset according to the 2 nd input signal segment, an output signal segment corresponding to the 2 nd input signal segment and the 1 st timing offset.
And judging whether the cost function obtained under the 2 nd timing deviation is less than or equal to a preset threshold value or not, and if the 2 nd timing deviation is less than or equal to a preset interpolation coefficient threshold value, determining the 2 nd timing deviation as the timing deviation of the envelope tracking power amplifier circuit. If the 2 nd timing deviation is larger than the preset interpolation coefficient threshold, the envelope tracking power amplifier circuit adjusts the envelope signal corresponding to the 3 rd input signal segment according to the 2 nd timing deviation, and obtains an output signal segment corresponding to the 3 rd input signal segment according to the adjusted envelope signal corresponding to the 3 rd input signal segment. And the processing circuit obtains a 3 rd timing deviation according to the 3 rd input signal segment, an output signal segment corresponding to the 3 rd input signal segment and the 2 nd timing deviation.
And judging whether the 3 rd timing deviation is less than or equal to a preset interpolation coefficient threshold value, if the cost function obtained by the 3 rd timing deviation is less than or equal to the preset threshold value, the 3 rd timing deviation is the timing deviation of the envelope tracking power amplifier circuit. If the 3 rd timing deviation is larger than the preset interpolation coefficient threshold, the envelope tracking power amplifier circuit adjusts the envelope signal corresponding to the 4 th input signal segment according to the 3 rd timing deviation, and obtains an output signal segment corresponding to the 4 th input signal segment according to the adjusted envelope signal corresponding to the 4 th input signal segment. The processing circuit obtains a 4 th timing offset according to the 4 th input signal segment, an output signal segment corresponding to the 4 th input signal segment and the 3 rd timing offset.
And judging whether the 4 th timing deviation is less than or equal to a preset interpolation coefficient threshold value, if the 4 th timing deviation is less than or equal to the preset interpolation coefficient threshold value, the 4 th timing deviation is the timing deviation of the envelope tracking power amplifier circuit. If the 4 th timing deviation is larger than the preset interpolation coefficient threshold, the envelope tracking power amplifier circuit adjusts the envelope signal corresponding to the 5 th input signal segment according to the 4 th timing deviation, and obtains an output signal segment corresponding to the 5 th input signal segment according to the adjusted envelope signal corresponding to the 5 th input signal segment. The processing circuit obtains a 5 th timing offset according to the 5 th input signal segment, an output signal segment corresponding to the 5 th input signal segment and the 4 th timing offset. This 5 th timing offset is the timing offset of the envelope tracking power amplifier circuit, since i has reached the value of M.
It is to be understood that specific values of N and M may be set according to actual requirements, and the above examples are only for convenience of understanding and should not be taken as limitations of the present application.
In one embodiment, the specific process of obtaining the 1 st timing offset according to the 1 st input signal segment and the output signal segment corresponding to the 1 st input signal segment by the processing circuit may be: and aligning the first input signal segment with the 1 st input signal segment, thereby obtaining the minimum difference of signal sampling points in the two signal segments, wherein the minimum difference is the 1 st timing deviation.
In one embodiment, the processing circuit is further configured to determine a cross-correlation modulus for each of the N input signal segments and each of the N output signal segments; and taking the input signal segment corresponding to the maximum cross-correlation modulus as the 1 st input signal segment, and taking the output signal segment corresponding to the maximum cross-correlation modulus as the 1 st output signal segment. Because the cross-correlation module value represents the correlation degree between the two signal segments, the input signal segment and the output signal segment corresponding to the largest cross-correlation module value are the two signal segments with the highest correlation degree, so that the error caused by signal transmission can be reduced, the subsequently obtained 1 st group of interpolation coefficients are closer to the real timing deviation, and the accuracy of the subsequently obtained interpolation coefficients calculated according to the 1 st group of interpolation coefficients can be improved.
Wherein, using r [ k ]]Representing the cross-correlation value, xin [ n-i]A signal value representing the n-i th signal point in the input signal,
the signal value of the n + k-i signal point in the output signal, the cross-correlation value of the two
This is a correlation formula, two sequences xin [ n-i ] spaced by k in time]And
conjugate multiplication is carried out, and then N points are accumulated and summed to obtain the cross-correlation modulus of the input signal and the output signal. Maximum modulus value r k]It represents the correlation peak and the corresponding k represents the deviation of the two sequences in time.
For easy understanding of the above-mentioned specific process of synchronizing the 1 st input signal segment and the output signal segment corresponding to the 1 st input signal segment according to the first target point and the second target point to obtain the 1 st timing offset, please refer to fig. 2.
As shown in FIG. 2, an offset value θ exists in the ith input signal segment P1 and the ith input signal segment-corresponding output signal P2 0 That is, signal point-1 in P1 is different from signal point-1 in P2 in time sequence by theta 0 Then theta is equal to 0 I.e., the 1 st timing offset.
It will be appreciated that in order for the processing circuitry to carry out the above-described functions, the processing circuitry comprises a processing module by which the above-described functions are carried out.
The processing module may be an integrated circuit chip having signal processing capability. The Processing module may be a general-purpose Processor, including a Central Processing Unit (CPU), a Network Processor (NP), and the like; but also Digital Signal Processors (DSPs), application Specific Integrated Circuits (ASICs), field Programmable Gate Arrays (FPGAs) or other Programmable logic devices, discrete Gate or transistor logic devices, discrete hardware components.
Or, the processing circuit can also comprise a cross-correlation module value calculation module and a synchronization module.
Wherein the cross-correlation module is configured to determine a cross-correlation module value for each of the N input signal segments and each of the N output signal segments; the input signal segment corresponding to the maximum cross-correlation modulus is the 1 st input signal segment, and the output signal segment corresponding to the maximum cross-correlation modulus is the output signal segment corresponding to the 1 st input signal segment.
The synchronization module is used for synchronizing the 1 st input signal segment and the output signal segment corresponding to the 1 st input signal segment to obtain the 1 st timing deviation.
The processing module is configured to communicate the 1 st timing offset to the envelope tracking power amplifier circuit.
The implementation principle and the generated technical effect of the cross-correlation module and the synchronization module are the same as those of the foregoing, and are not repeated here for the sake of brief description.
In addition to the method for obtaining the 1 st timing offset by the processing circuit synchronizing the 1 st input signal segment and the output signal segment corresponding to the 1 st input signal segment by using the cross-correlation modulus, the processing circuit may further calculate a frequency spectrum of the output signal segment corresponding to the 1 st input signal segment, and use a corresponding delay difference as an initial delay offset for interpolation when the frequency spectrum distortion is minimum to obtain the 1 st timing offset.
When the signals between the envelope branch and the input branch have time sequence deviation, obvious adjacent channel leakage exists on the calculated frequency spectrum, and the larger the deviation is, the larger the adjacent channel leakage ratio is. And the leakage ratio of the adjacent channel is approximate to a parabola, the smaller the leakage ratio of the adjacent channel is at the lowest point of the parabola, the smaller the leakage ratio of the adjacent channel is, the corresponding deviation is the smallest, and the delay difference corresponding to the deviation is used as the initial delay deviation for interpolation to obtain the 1 st timing deviation.
The spectrum of the output signal segment corresponding to the 1 st input signal segment may be calculated by Fast Fourier Transform (FFT), and the specific principle and method for calculating the spectrum by fast Fourier transform are well known to those skilled in the art and will not be described herein again for brevity.
Accordingly, in order for the processing circuit to implement the above-described functions, the processing circuit includes a processing module, and the above-described functions are implemented by the processing module.
Or, the processing circuit may further include a spectrum calculation module, where the spectrum calculation module is configured to calculate a spectrum of an output signal segment corresponding to the 1 st input signal segment, and when distortion of the spectrum is minimum, a corresponding delay difference is used as an initial delay deviation for interpolation, so as to obtain the 1 st timing deviation.
At this point, the processing module is configured to transmit the 1 st timing offset to the envelope tracking power amplifier circuit.
After obtaining the 1 st timing offset, the processing circuit may obtain a filter coefficient based on the i-1 st timing offset and a preset filter parameter; and then obtaining the ith timing deviation based on the (i-1) th timing deviation, the filter coefficient, the ith input signal segment and the output signal segment corresponding to the ith input signal segment.
Wherein by theta i-1 Denotes the i-1 st timing deviation, denotes the preset filter parameter by alpha, and denotes alpha 1 (θ)、α 0 (θ)、α -1 (θ)、α -2 (theta), filter coefficient, then
The specific process of obtaining the ith timing offset by the processing circuit based on the i-1 th timing offset, the filter coefficient, the ith input signal segment, and the output signal segment corresponding to the ith input signal segment may be: first, for each signal value in an output signal segment corresponding to the ith input signal segment, a first filtered output value corresponding to the signal value is obtained based on the signal value and a filter coefficient corresponding to the signal value. Then, a first deviation value is obtained based on the first filtered output value corresponding to the signal value and the input signal value corresponding to the signal value. And finally, obtaining the ith timing deviation based on a first deviation value corresponding to each signal value in an output signal segment corresponding to the ith input signal segment, the (i-1) th timing deviation, the ith input signal segment and the output signal segment corresponding to the ith input signal segment.
By x fb-i (n) denotes the nth signal value in the output signal segment corresponding to the ith input signal segment by y fb-i (n) represents a first filtered output value corresponding to the nth signal value in the output signal segment corresponding to the ith input signal segment, the first filtered output value
With e i (n) a first deviation value, denoted by x, for the nth signal value in the output signal segment corresponding to the ith input signal segment in-i (n) represents the nth signal value in the ith input signal segment, the first deviation value e i (n)＝|x in-i (n)|-|y fb-i (n)|。
Using theta i to represent the estimated value of the ith time delay, then the ith estimated value
Where L is the number of signal values in the ith input signal segment. (beta is here a scaling factor related to the error)
Correspondingly, in order to enable the processing circuit to realize the functions, the processing circuit may comprise a processing module, so that the processing module can obtain the filter coefficient based on the i-1 st timing deviation and the preset filter parameter; and then obtaining the ith timing deviation based on the (i-1) th timing deviation, the filter coefficient, the ith input signal segment and the output signal segment corresponding to the ith input signal segment.
After the processing circuit obtains the i-1 th timing deviation, the envelope tracking power amplifier circuit is further configured to adjust an envelope signal corresponding to the i-th input signal segment according to the i-1 th timing deviation, and output an output signal segment corresponding to the i-th input signal segment according to the i-th input signal segment and the envelope signal corresponding to the adjusted i-th input signal segment.
In order for the envelope tracking power amplifier circuit to achieve the above functions, the envelope tracking power amplifier circuit includes an envelope detection module, an interpolation module, a power supply modulator, and a power amplifier.
The envelope detection module is used for detecting the ith input signal segment to obtain the ith envelope signal corresponding to the ith input signal segment.
And the interpolation module is used for inserting interpolation in the target position in the ith envelope signal according to the (i-1) th timing deviation to obtain the ith interpolated envelope signal.
And the power supply modulator is used for outputting a modulation voltage corresponding to the interpolated ith envelope signal according to the interpolated ith envelope signal.
And the power amplifier is used for amplifying the ith envelope signal corresponding to the ith input signal segment by taking the modulation voltage corresponding to the interpolated ith envelope signal as a self power supply so as to obtain an output signal segment corresponding to the ith input signal segment.
By the mutual cooperation of the envelope detection module, the interpolation module, the power supply modulator and the power amplifier, the envelope tracking power amplifier circuit can adjust the envelope signal corresponding to the ith input signal segment according to the (i-1) th timing deviation, and output the output signal segment corresponding to the ith input signal segment according to the ith input signal segment and the envelope signal corresponding to the adjusted ith input signal segment.
The power supply modulator is specifically configured to perform table lookup according to each signal value in the received envelope signal, and output a modulation voltage corresponding to the signal value to the power amplifier.
Wherein the interpolation module may be a Farrow inter module. The envelope detection module may be an ABS module. The power supply modulator can be an Envelope Shaping module and an SMPS module which are connected in sequence, the Envelope Shaping module is used for performing table lookup according to each signal value in the received Envelope signals to obtain a voltage value, and the SMPS module is used for generating a modulation voltage according to the voltage value. The power amplifier may be any type of power amplifier.
The specific working principle and implementation of the interpolation module, the envelope detection module, the power amplifier, and the power modulator are well known to those skilled in the art, and are not described herein again for brevity.
In order to reduce the error of the ith input signal segment on the two branches of the envelope tracking power amplifier circuit and enable the obtained ith timing deviation to accurately reflect the timing deviation, the timing deviation is more accurate, and a first delayer and a second delayer can be arranged on the envelope tracking power amplifier circuit.
The first delayer is connected with the input end of the power amplifier and is used for delaying the ith envelope signal corresponding to the ith input signal segment and transmitting the delayed ith envelope signal to the power amplifier.
The second delayer is connected with the input end of the envelope detection module and is used for delaying the ith envelope signal corresponding to the ith input signal segment and transmitting the delayed ith envelope signal to the envelope detection module.
The first delayer and the second delayer can be any type of delayer, and the specific type is not limited herein. The working principle and implementation of the delayer are well known to those skilled in the art, and are not described herein again for the sake of brevity.
In order to reduce the influence of nonlinear distortion on an output signal segment corresponding to an ith input signal segment, so that an ith timing offset obtained by subsequent calculation is more accurate, in an embodiment, the envelope tracking power amplifier circuit further includes a pre-compensation module, where the pre-compensation module is connected to an input end of the power amplifier, and is configured to compensate an ith envelope signal corresponding to the ith input signal segment, and transmit the compensated ith envelope signal to the power amplifier.
The pre-compensation module may be a DPD module, and the working principle and implementation manner of the pre-compensation module are well known to those skilled in the art, and are not described herein again for brevity.
Referring to fig. 3, fig. 3 is a schematic structural diagram of a coherent timing deviation detection circuit according to an embodiment of the present disclosure.
In the timing deviation detecting circuit shown in fig. 3, at the input end of the input signal, the envelope detecting module is configured to detect a received input signal (e.g., a 1 st input signal segment or an ith input signal segment) to obtain an ith envelope signal corresponding to the ith input signal segment. And then the interpolation module inserts interpolation at the target position in the ith envelope signal according to the (i-1) th timing deviation to obtain the ith interpolated envelope signal. And then the power supply modulator amplifies the interpolated ith envelope signal to enable the ith envelope signal amplified by the power amplifier to serve as a self power supply, and amplifies the ith envelope signal corresponding to the ith input signal segment to obtain an output signal segment corresponding to the ith input signal segment.
The processing circuit determines a cross-correlation modulus for each of the N input signal segments and each of the N output signal segments; the input signal segment corresponding to the maximum cross-correlation module value is the 1 st input signal segment, and the output signal segment corresponding to the maximum cross-correlation module value is the output signal segment corresponding to the 1 st input signal segment. And then, synchronizing the 1 st input signal segment and the output signal segment corresponding to the 1 st input signal segment to obtain the 1 st timing deviation.
The processing module obtains a filter coefficient based on the i-1 th timing deviation and a preset filter parameter; and then obtaining the ith timing deviation based on the (i-1) th timing deviation, the filter coefficient, the ith input signal segment and the output signal segment corresponding to the ith input signal segment.
The specific functions and implementation manners of the envelope detection module, the interpolation module, the power modulator, the power amplifier, and the processing module are described above clearly, and are not described herein again for brevity.
Referring to fig. 4, fig. 4 is a schematic structural diagram of a coherent timing deviation detection circuit according to an embodiment of the present disclosure.
As the specific implementation principle and process of the envelope tracking power amplifier circuit in the timing deviation detecting circuit shown in fig. 4 are the same as those described above, and are not repeated here for brevity.
The processing circuit determines a cross-correlation modulus for each of the N input signal segments and each of the N output signal segments; the input signal segment corresponding to the maximum cross-correlation modulus is the 1 st input signal segment, and the output signal segment corresponding to the maximum cross-correlation modulus is the output signal segment corresponding to the 1 st input signal segment. And then the synchronization module is used for synchronizing the 1 st input signal segment and the output signal segment corresponding to the 1 st input signal segment according to the first target point and the second target point to obtain the 1 st timing deviation.
The processing module obtains a filter coefficient based on the i-1 th timing deviation and a preset filter parameter; and then obtaining the ith timing deviation based on the (i-1) th timing deviation, the filter coefficient, the ith input signal segment and the output signal segment corresponding to the ith input signal segment.
The specific functions and implementation manners of the envelope detection module, the interpolation module, the power modulator, the power amplifier, the cross-correlation module, the synchronization module, and the processing module are described above clearly, and are not described herein again for brevity.
It should be noted that the timing deviation detecting circuit shown in fig. 4 is only for facilitating understanding of the aforementioned timing deviation detecting circuit and should not be taken as a limitation of the present application.
Referring to fig. 5, fig. 5 is a schematic flow chart of a timing offset detection method according to an embodiment of the present application, where the timing offset detection method is used to detect a timing offset of an envelope tracking power amplifier circuit, the envelope tracking power amplifier circuit is used to receive N input signal segments that are continuously input and output corresponding N output signal segments, where N is a positive integer greater than or equal to 2. The steps involved will be described below in conjunction with fig. 5.
S100: and obtaining the 1 st timing deviation according to the 1 st input signal segment in the N input signal segments and the output signal segment corresponding to the 1 st input signal segment.
In an embodiment, in S100, a specific implementation process of obtaining the 1 st timing offset according to the 1 st input signal segment of the N input signal segments and the output signal segment corresponding to the 1 st input signal segment may be: firstly, determining a cross-correlation modulus of each of N input signal segments and each of N output signal segments; the input signal segment corresponding to the maximum cross-correlation modulus is the 1 st input signal segment, and the output signal segment corresponding to the maximum cross-correlation modulus is the output signal segment corresponding to the 1 st input signal segment. And then the synchronization module is used for synchronizing the 1 st input signal segment and the output signal segment corresponding to the 1 st input signal segment according to the first target point and the second target point to obtain the 1 st timing deviation. .
Or, in S100, the specific implementation process of obtaining the 1 st timing offset according to the 1 st input signal segment of the N input signal segments and the output signal segment corresponding to the 1 st input signal segment may also be: and acquiring the frequency spectrum of an output signal segment corresponding to the 1 st section of input signal, and taking the corresponding delay difference as initial delay deviation for interpolation according to the minimum frequency spectrum distortion to obtain the 1 st timing deviation.
S200: and obtaining an ith timing deviation according to an ith input signal segment in the N input signal segments, an output signal segment corresponding to the ith input signal segment and the (i-1) th timing deviation until the ith timing deviation meets a preset condition.
And i is 2-M in sequence, M is a positive integer less than or equal to N, the output signal segment corresponding to the ith input signal segment is a signal which is output according to the ith input signal segment and the envelope signal corresponding to the ith input signal segment which is adjusted according to the (i-1) th timing deviation.
In one embodiment, in S200, a specific implementation process of obtaining the ith timing offset according to the ith input signal segment of the N input signal segments, the output signal segment corresponding to the ith input signal segment, and the (i-1) th timing offset may be: firstly, obtaining a filter coefficient based on the i-1 th timing deviation and a preset filter parameter; and then obtaining the ith timing deviation based on the (i-1) th timing deviation, the filter coefficient, the ith input signal segment and the output signal segment corresponding to the ith input signal segment.
The specific process of obtaining the ith timing offset based on the i-1 th timing offset, the filter coefficient, the ith input signal segment, and the output signal segment corresponding to the ith input signal segment may be: firstly, aiming at each signal value in an output signal segment corresponding to the ith input signal segment, obtaining a first filtering output value corresponding to the signal value based on the signal value and a filter coefficient corresponding to the signal value; then, a first deviation value is obtained based on a first filtering output value corresponding to the signal value and an input signal value corresponding to the signal value; and then obtaining the ith timing deviation based on a first deviation value corresponding to each signal value in an output signal segment corresponding to the ith input signal segment and the (i-1) th timing deviation, the ith input signal segment and the output signal segment corresponding to the ith input signal segment.
S300: and taking the ith timing deviation meeting the preset condition as the timing deviation of the envelope tracking power amplifier circuit.
However, the above S100, S200, and S300 can be applied to a processing circuit in the above timing deviation detecting circuit.
The implementation principle and the resulting technical effect of the timing deviation detecting method provided in the embodiment of the present application are the same as those of the timing deviation detecting circuit embodiment, and for the sake of brief description, the corresponding contents in the embodiment of the timing deviation determining apparatus can be referred to where the method embodiment is not mentioned.
Referring to fig. 6, fig. 6 is a flowchart illustrating an envelope signal adjusting method according to an embodiment of the present application, wherein the envelope signal adjusting method is used for adjusting an envelope signal output by a power amplifier in the timing deviation detecting circuit, and the steps included in the envelope signal adjusting method will be described with reference to fig. 6.
S400: an interpolation coefficient for the envelope tracking power amplifier circuit is determined based on the first timing offset and the second timing offset.
The first timing deviation is obtained through a first preset signal, the second timing deviation is obtained through a second preset signal, and the first preset signal is different from the second preset signal.
The first preset signal and the second preset signal may have the following two embodiments.
In a first embodiment, the first preset signal is a non-envelope signal, and the process of obtaining the first timing deviation may be: a fixed voltage is applied to the envelope tracking power amplifier to obtain a first timing offset corresponding to the first preset signal.
Correspondingly, the second preset signal is an envelope signal, and the process of obtaining the second timing deviation may be: and applying an envelope voltage to the envelope tracking power amplifier to obtain a second timing deviation corresponding to a second preset signal.
As shown in fig. 7, fig. 7 shows an amplified signal output when a fixed voltage is applied to the envelope tracking power amplifier, i.e., a signal indicated by a dotted line in fig. 7, and an amplified signal output when an envelope voltage is applied to the envelope tracking power amplifier, i.e., a signal indicated by a solid line in fig. 7. By adjusting the interpolation coefficient of the envelope tracking power amplifier circuit, the dotted line and the solid line can be completely superposed, so that the time delay of the signal output by the envelope tracking amplifier is reduced, and the accuracy of the output envelope signal is improved.
It is understood that, at this time, the first preset signal and the second preset signal are both used for inputting into the power amplifier in the timing deviation detection circuit, and the difference is that, when the first preset signal is input into the power amplifier, a fixed voltage is applied to the power interface terminal of the power amplifier. And when the second preset signal is input into the power amplifier, the envelope voltage is applied to the power interface end of the power amplifier.
In a second embodiment, the first preset signal and the second preset signal are envelope signals, and the first preset signal and the second preset signal are different signal segments of the same envelope signal.
As shown in fig. 8, fig. 8 shows an input signal for inputting to the timing deviation detecting circuit, wherein the first preset signal may be a signal segment included in the area a in fig. 8, and the second preset signal may be a signal segment included in the area B in fig. 8.
S500: and adjusting the envelope signal output by the power amplifier based on the interpolation coefficient.
By adjusting the interpolation coefficient of the power amplifier, the envelope signal output by the power amplifier can be adjusted, the time delay of the signal output by the envelope tracking amplifier is reduced, and the accuracy of the output envelope signal is improved.
The above description is only a preferred embodiment of the present application and is not intended to limit the present application, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, improvement and the like made within the spirit and principle of the present application shall be included in the protection scope of the present application.
Claims (16)
1. A timing deviation detection circuit, comprising:
an envelope tracking power amplifier circuit for receiving a segment of a continuous input signal comprising N input signal segments and outputting a corresponding segment of an output signal comprising N output signal segments;
the processing circuit is used for obtaining a 1 st timing deviation according to a 1 st input signal segment in the input signals and an output signal segment corresponding to the 1 st input signal segment, and obtaining an ith timing deviation according to an ith input signal segment in the N input signal segments, an output signal segment corresponding to the ith input signal segment and the (i-1) th timing deviation until the ith timing deviation meets a preset condition, wherein the ith timing deviation is the timing deviation of the envelope tracking power amplifier circuit;
and the output signal segment corresponding to the ith input signal segment is a signal which is output by the envelope tracking power amplifier circuit according to the ith-1 timing deviation and the envelope signal corresponding to the ith input signal segment and the adjusted ith input signal segment.
2. The timing skew detection circuit of claim 1, wherein the processing circuit is further configured to:
determining a cross-correlation modulus value for each of the N input signal segments and each of the N output signal segments;
wherein, the input signal segment corresponding to the maximum cross-correlation module value is the 1 st input signal segment, and the output signal segment corresponding to the maximum cross-correlation module value is the output signal segment corresponding to the 1 st input signal segment.
3. The timing deviation detection circuit of claim 1, wherein the processing circuit is specifically configured to:
and acquiring the frequency spectrum of an output signal segment corresponding to the 1 st section of input signal, and taking the corresponding delay difference as initial delay deviation for interpolation according to the minimum distortion of the frequency spectrum to obtain the 1 st timing deviation.
4. The timing skew detection circuit of claim 1, wherein the processing circuit is specifically configured to:
obtaining a filter coefficient based on the i-1 th timing deviation and a preset filter parameter;
and obtaining the ith timing deviation based on the ith-1 timing deviation, the filter coefficient, the ith input signal and an output signal segment corresponding to the ith input signal.
5. The timing skew detection circuit of claim 4, wherein the processing circuit is specifically configured to:
for each signal value in an output signal segment corresponding to the ith input signal segment, obtaining a first filtering output value corresponding to the signal value based on the signal value and a filter coefficient corresponding to the signal value;
obtaining a first deviation value corresponding to the signal value based on a first filtering output value and an input signal value corresponding to the signal value;
and obtaining an ith timing offset based on a first offset value corresponding to each signal value in an output signal segment corresponding to the ith input signal segment, the ith timing offset, the ith input signal segment and the output signal segment corresponding to the ith input signal segment.
6. The timing deviation detection circuit of claim 1, wherein the preset condition comprises: the ith timing deviation is Mth timing deviation, or the ith timing deviation is smaller than or equal to a preset interpolation coefficient threshold value.
7. The timing deviation detection circuit of claim 1, wherein the envelope tracking power amplifier circuit is further configured to adjust an envelope signal corresponding to an i-th input signal segment according to the i-1-th timing deviation, and output an output signal segment corresponding to the i-th input signal segment according to the i-th input signal segment and the adjusted envelope signal corresponding to the i-th input signal segment.
8. The timing deviation detection circuit of claim 7, wherein the envelope tracking power amplifier circuit comprises:
the envelope detection module is used for detecting the ith section of input signal to obtain an ith envelope signal corresponding to the ith input signal section;
the interpolation module is used for inserting interpolation at a target position in the ith envelope signal according to the (i-1) th timing deviation to obtain an ith interpolated envelope signal;
the power supply modulator is used for outputting a modulation voltage corresponding to the interpolated ith envelope signal according to the interpolated ith envelope signal;
and the power amplifier is used for amplifying the ith envelope signal corresponding to the ith input signal segment by taking the modulation voltage corresponding to the interpolated ith envelope signal as a self power supply so as to obtain an output signal segment corresponding to the ith input signal segment.
9. The timing deviation detection circuit of claim 8, wherein the envelope tracking power amplifier circuit further comprises:
the first delayer is connected with the input end of the power amplifier and is used for delaying the ith envelope signal corresponding to the ith input signal segment and transmitting the delayed ith envelope signal to the power amplifier;
and the second delayer is connected with the input end of the envelope detection module and is used for delaying the ith envelope signal corresponding to the ith input signal segment and sending the delayed ith envelope signal to the envelope detection module.
10. The timing deviation detection circuit of claim 8, wherein the envelope tracking power amplifier circuit further comprises:
and the pre-compensation module is connected with the input end of the power amplifier and is used for compensating the ith envelope signal corresponding to the ith input signal segment and transmitting the compensated ith envelope signal to the power amplifier.
11. A timing offset detection method for detecting a timing offset of an envelope tracking power amplifier circuit, the envelope tracking power amplifier circuit receiving N input signal segments input consecutively and outputting corresponding N output signal segments, N being a positive integer equal to or greater than 2, the method comprising:
obtaining a 1 st timing deviation according to a 1 st input signal segment in the N input signal segments and an output signal segment corresponding to the 1 st input signal segment;
obtaining an ith timing deviation according to an ith input signal segment in the N input signal segments, an output signal segment corresponding to the ith input signal segment and the (i-1) th timing deviation until the ith timing deviation meets a preset condition, wherein i sequentially takes 2 to M, M is a positive integer less than or equal to N, the output signal segment corresponding to the ith input signal segment is a signal which is output according to the ith input signal segment and the envelope signal corresponding to the ith input signal segment after adjustment and is adjusted according to the (i-1) th timing deviation, and the ith timing deviation is a function of the timing deviation of the envelope tracking power amplifier circuit;
and obtaining the timing deviation of the envelope tracking power amplifier circuit based on the ith timing deviation meeting the preset condition.
12. The method of claim 11, wherein obtaining the ith timing offset according to the ith input signal segment of the N input signal segments, the output signal segment corresponding to the ith input signal segment, and the (i-1) th timing offset comprises:
obtaining a filter coefficient based on the i-1 th timing deviation and a preset filter parameter;
and obtaining the ith timing deviation based on the ith-1 timing deviation, the filter coefficient, the ith input signal segment and the output signal segment corresponding to the ith input signal segment.
13. The method of claim 12, wherein the obtaining the ith timing offset based on the ith-1 timing offset, the filter coefficients, the ith input signal segment, and an output signal segment corresponding to the ith input signal segment comprises:
for each signal value in an output signal segment corresponding to the ith input signal segment, obtaining a first filtering output value corresponding to the signal value based on the signal value and a filter coefficient corresponding to the signal value;
obtaining a first deviation value based on a first filtering output value corresponding to the signal value and an input signal value corresponding to the signal value;
and obtaining the ith timing deviation based on a first deviation value corresponding to each signal value in an output signal segment corresponding to the ith input signal segment and the (i-1) th timing deviation, the ith input signal segment and the output signal segment corresponding to the ith input signal segment.
14. An envelope signal adjusting method for adjusting an envelope signal output from a power amplifier in a timing deviation detecting circuit according to any one of claims 1 to 10, the method comprising:
determining an interpolation coefficient for the envelope tracking power amplifier circuit based on the first timing offset and the second timing offset; the first timing deviation is obtained through a first preset signal, the second timing deviation is obtained through a second preset signal, and the first preset signal is different from the second preset signal;
and adjusting the envelope signal output by the power amplifier based on the interpolation coefficient.
15. The method of claim 14, wherein the first predetermined signal is a non-envelope signal, and obtaining the first timing offset comprises:
applying a fixed voltage to the power amplifier to obtain a first timing deviation corresponding to the first preset signal;
correspondingly, the process of obtaining the second timing offset, where the second preset signal is an envelope signal, includes:
and applying an envelope voltage to the power amplifier to obtain a second timing deviation corresponding to the second preset signal.
16. The method according to claim 14, wherein the first predetermined signal and the second predetermined signal are envelope signals, and the first predetermined signal and the second predetermined signal are different signal segments of the same envelope signal.
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