CN115311493A - Method, system, memory and equipment for judging direct current circuit state - Google Patents

Method, system, memory and equipment for judging direct current circuit state Download PDF

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CN115311493A
CN115311493A CN202210935477.3A CN202210935477A CN115311493A CN 115311493 A CN115311493 A CN 115311493A CN 202210935477 A CN202210935477 A CN 202210935477A CN 115311493 A CN115311493 A CN 115311493A
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肖小龙
史明明
袁晓冬
苏伟
孙健
郭佳豪
孙天奎
姜云龙
方鑫
吴凡
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Electric Power Research Institute of State Grid Jiangsu Electric Power Co Ltd
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Abstract

The invention discloses a method, a system, a memory and equipment for judging the state of a direct current circuit. The invention can be widely applied to the fields of photovoltaic power generation systems, electric automobiles, direct-current power distribution systems and the like.

Description

Method, system, memory and equipment for judging direct current circuit state
Technical Field
The invention relates to a method, a system, a memory and equipment for judging the state of a direct current circuit, and belongs to the technical field of photovoltaic module detection.
Background
The photovoltaic power generation system comprises a large number of photovoltaic modules, and the conditions of module aging, line aging, connection looseness and the like can occur in long-term operation, so that series or parallel arc faults of a photovoltaic module array can occur. These faults may cause accidents such as fire, and the safe and reliable operation of the photovoltaic power generation system is seriously affected.
Disclosure of Invention
The invention aims to provide a method, a system, a memory and equipment for judging the state of a direct current circuit, which classify the state of loop current in a direct current system based on a ResNet algorithm and identify arc faults, load sudden changes and loop switching actions in the direct current system.
In order to achieve the purpose, the technical scheme adopted by the invention is as follows:
the first aspect of the present invention provides a method for determining a dc circuit state, comprising:
acquiring a group of direct current system loop current waveform images;
preprocessing the acquired loop current waveform image;
and inputting the preprocessed loop current waveform image into a pre-constructed ResNet classification model to obtain the states of the direct current circuit, including a stable state, the occurrence of arc faults and load sudden changes in the loop.
Further, the acquiring a set of dc system loop current waveform images includes:
and acquiring the loop current of the direct current system, drawing a frame of current waveform image for every 25ms of loop current, and drawing a plurality of frames of current waveform images as a group of input according to the time sequence.
Further, the preprocessing the acquired loop current waveform image includes:
and performing convolution and maximum pooling operations on the loop current waveform image.
Further, a ResNet classification model is constructed in advance, and the method comprises the following steps:
acquiring 3 currents in different states in a direct current system through experiments, wherein the currents comprise a current in a stable state, a current in which an arc fault occurs and a current in which load in a loop is suddenly changed;
drawing a frame of current waveform image at every 25ms of current, and taking the current waveform image and the state corresponding to the image as a sample to obtain a training sample set;
performing convolution and maximum pooling operation on the training sample set;
and inputting the output of the maximum pooling operation into a ResNet model, and training to obtain a trained ResNet classification model.
Further, the steady state current includes: a steady state current waveform with a protrusion and a steady state current waveform without a protrusion.
Further, the performing convolution and max-pooling operations on the training sample set includes:
inputting samples in a training set into a convolutional layer according to a time sequence, and combining a current waveform image drawn by 25ms minus a current waveform image drawn by 25ms to form a new image as the input of the next step;
carrying out axisymmetric copying on the input combined new image;
vertically cutting each copied picture into a plurality of parts, and calculating the unit number of pixel points of each part to be used as a characteristic diagram;
and performing maximum pooling operation on the feature map.
A second aspect of the present invention provides a system for determining a state of a dc circuit, comprising:
the sampling module is used for acquiring a group of direct current system loop current waveform images;
the preprocessing module is used for preprocessing the acquired loop current waveform image as the input of a classification model;
and the classification module is used for classifying the state of the direct current circuit, and outputting classification results including a stable state, an arc fault and sudden load change in a loop.
Furthermore, the sampling module is specifically configured to,
and acquiring the loop current of the direct current system, drawing a frame of current waveform image for every 25ms of loop current, and drawing a plurality of frames of current waveform images as a group of input according to the time sequence.
Further, the preprocessing module comprises:
the convolution layer is used for combining the current waveform image drawn by 25ms input currently minus the current waveform image drawn by 25ms to form a new image as the input of the next step; performing axisymmetric copying on the input combined new image; vertically cutting each copied picture into a plurality of parts, and calculating the unit number of pixel points of each part to be used as a characteristic diagram;
and the maximum pooling layer is used for performing maximum pooling operation on the feature map.
Further, the classification module comprises: a ResNet model;
the ResNet model comprises a four-layer network, a maximum pooling layer, a full connection layer and a Softmax layer;
the first layer consists of 3 residual modules;
the second layer consists of a down-sampling residual module and 3 residual modules;
the third layer consists of a down-sampling residual error module and 5 residual error modules;
the fourth layer consists of a downsampling residual module and 2 residual modules.
Further, the down-sampled residual module is configured to down-sample the input by one-half.
A third aspect of the invention provides a memory storing one or more programs, the one or more programs comprising instructions, which when executed by a computing device, cause the computing device to perform a method according to any of the methods described previously.
A fourth aspect of the present invention provides a computing device characterized by: comprises the steps of (a) preparing a substrate,
one or more processors, memory, and one or more programs stored in the memory and configured to be executed by the one or more processors, the one or more programs including instructions for performing any of the foregoing methods.
The beneficial effects of the invention are as follows:
the invention adopts loop current of a certain period of time to draw a frame of current waveform image as input, constructs a classification model based on ResNet, can be used for detecting arc faults, load sudden changes and switching actions of a direct current system, and can also be applied to the fields of photovoltaic power generation systems, electric automobiles, direct current power distribution systems and the like.
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Fig. 1 is a flowchart of a method for determining a dc circuit state according to an embodiment of the present invention;
FIG. 2 is a steady state current waveform of 25ms in accordance with an embodiment of the present invention;
FIG. 3 is a diagram of another steady state current waveform of 25ms in accordance with an embodiment of the present invention;
FIG. 4 is a 25ms current waveform plot for an arc fault in an embodiment of the present invention;
FIG. 5 is a 25ms current waveform illustrating a sudden load change in an embodiment of the present invention;
FIG. 6 is a graph of training set loss values in an embodiment of the present invention;
FIG. 7 is a graph of test set loss values in an embodiment of the present invention;
FIG. 8 is a graph of recognition accuracy after 20 training rounds in an embodiment of the present invention.
Detailed Description
The invention is further described below. The following examples are only for illustrating the technical solutions of the present invention more clearly, and the protection scope of the present invention is not limited thereby.
Example 1
The embodiment provides a method for judging the state of a direct current circuit, which comprises the following steps:
acquiring a group of direct current system loop current waveform images;
preprocessing the acquired loop current waveform image;
and inputting the preprocessed loop current waveform image into a pre-constructed ResNet classification model to obtain the states of the direct current circuit, including a stable state, the occurrence of arc faults and load sudden changes in the loop.
In this embodiment, obtaining a set of dc system loop current waveform images means,
one frame of current waveform image is drawn for every 25ms of loop current, and multiple frames of current waveform images are drawn in time sequence as a group of inputs.
In this embodiment, a ResNet classification model is pre-constructed, and the specific implementation process is as follows:
s1, acquiring 3 currents in different states in a direct current system through experiments, wherein the currents comprise currents in a stable state, currents in which arc faults occur and currents in sudden load changes in a loop;
s2, drawing a frame of current waveform image at every 25ms of current, and taking the current waveform image and the state corresponding to the image as a sample to obtain a training sample set;
specifically, there are two waveforms for the steady state current, one of which contains a bump waveform as shown in FIG. 2 and a normal current without bumps as shown in FIG. 3; the current waveform image containing the arc fault and the current waveform image of the load jump are shown in fig. 4 and 5.
Each frame of current waveform image is taken as a sample, in this embodiment, 2574 samples are selected as a training set, and 286 samples are selected as a test set.
S3, carrying out convolution and maximum pooling operation on the input image to obtain a feature map,
s31, inputting samples in a training set into a convolutional layer according to a time sequence, and combining a current waveform image drawn by 25ms minus a current waveform image drawn by 25ms to form a new image as the input of the next step, wherein the step can keep the current change characteristics of the current time period compared with the current change characteristics of the previous time period.
The input new combined image is subjected to axisymmetric copying, the upper partial image data image and the lower partial image data image of the image are the same, and when the current is operated, the characteristic points of the image are increased, so that the useful information content of the image is increased. In the present embodiment, the axisymmetric copying refers to copying about a center line which is aligned vertically in the picture.
Each copied picture is vertically cut into a plurality of parts (the number is represented by po), and the unit number of pixels of each part (represented by pix (x)) is calculated to be used as a feature map.
S32, performing maximum pooling operation
Pooling can be seen as a linear weighting of the activation values within a sliding window.
Let F be the pooling function, I be the characteristic diagram of the input, and O be the pooled output, considering that in the case of a single channel, I is x,y 、O x,y Representing the activation values of the input and output, respectively, at coordinates (x, y), Ω is the index set of the pooling window, e.g. the pooling range is 2 × 2, then Ω = {0,1,2}, and all pooling modes can be considered as:
Figure BDA0003781615270000041
wherein, delta x,y Is the differential at coordinates (x, y), I x For activation values in the x-axis direction, F (I) x The exp function is to prevent negative numbers for x-axis sliding window weights, and multiplication represents linear weighting.
S4, inputting the output of the maximum pooling operation into a ResNet model, and training to obtain a trained ResNet classification model;
in this embodiment, the ResNet model includes a four-layer network, as well as a max pooling layer, a full connection layer, and a Softmax layer,
the first layer consists of 3 residual modules;
the second layer consists of a down-sampling residual module and 3 residual modules;
the third layer consists of a down-sampling residual module and 5 residual modules;
the fourth layer consists of a down-sampling residual module and 2 residual modules;
the residual structure is an initial result of the partial output of the upper layer feature diagram x, and the output result is H (x) = F (x) + x, and when F (x) =0, the result becomes an identity map. Therefore, such a structure is equivalent to learning the H (x) -x part, i.e. the residual, and the latter level is to approximate the residual result to 0.
It should be noted that the type processing function F (x) of each residual block is different and is specifically selected according to actual situations.
The down-sampling function aims to pool the shapes of preact with the same input channel, and the shapes are the same.
It should be noted that each down-sampling residual module down-samples the input by one-half.
After the four-layer network, the maximum pooling is carried out again, and the classification result is output through the full connection layer and the Softmax.
And comparing the classification result with the actual state, optimizing network parameters, and performing iterative training until a termination condition is reached.
In this embodiment, the training is performed for 20 rounds, for example, fig. 6 is a training set loss value, fig. 7 is a test set loss value, and fig. 8 is a recognition accuracy rate after 20 rounds of training, which reaches 98.3% and is stably maintained.
Example 2
The present embodiment provides a system for determining a dc circuit state, including:
the sampling module is used for acquiring a group of direct current system loop current waveform images;
the preprocessing module is used for preprocessing the acquired loop current waveform image as the input of a classification model;
and the classification module is used for classifying the state of the direct current circuit, and outputting classification results including a stable state, an arc fault and sudden load change in a loop.
In this embodiment, the sampling module is specifically configured to,
and acquiring the loop current of the direct current system, drawing a frame of current waveform image for every 25ms of loop current, and drawing a plurality of frames of current waveform images as a group of input according to the time sequence.
In this embodiment, the preprocessing module includes:
the convolution layer is used for combining the current waveform image drawn by 25ms input at present with the current waveform image drawn by the last 25ms to form a new image as the input of the next step; carrying out axisymmetric copying on the input combined new image; vertically cutting each copied picture into a plurality of parts, and calculating the unit number of pixel points of each part to be used as a characteristic diagram;
and the maximum pooling layer is used for performing maximum pooling operation on the feature map.
In this embodiment, the classification module includes: a ResNet model;
the ResNet model comprises a four-layer network, a maximum pooling layer, a full connection layer and a Softmax layer;
the first layer consists of 3 residual modules;
the second layer consists of a down-sampling residual module and 3 residual modules;
the third layer consists of a down-sampling residual error module and 5 residual error modules;
the fourth layer consists of a downsampling residual module and 2 residual modules.
In this embodiment, the down-sampling residual module is configured to down-sample the input by one-half.
Example 3
The present embodiment provides a memory storing one or more programs, the one or more programs comprising instructions, which when executed by a computing device, cause the computing device to perform any of the methods according to embodiment 1 as described above.
Example 4
The present embodiments provide a computing device comprising,
one or more processors, memory, and one or more programs stored in the memory and configured to be executed by the one or more processors, the one or more programs including instructions for performing any of the methods according to embodiment 1 described above.
As will be appreciated by one skilled in the art, embodiments of the present application may be provided as a method, system, or computer program product. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.
The present application is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the application. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
Finally, it should be noted that: the above embodiments are only for illustrating the technical solutions of the present invention and not for limiting the same, and although the present invention is described in detail with reference to the above embodiments, those of ordinary skill in the art should understand that: modifications and equivalents may be made to the embodiments of the invention without departing from the spirit and scope of the invention, which is to be covered by the claims.

Claims (13)

1. A method of determining a state of a dc circuit, comprising:
acquiring a group of direct current system loop current waveform images;
preprocessing the acquired loop current waveform image;
and inputting the preprocessed loop current waveform image into a pre-constructed ResNet classification model to obtain the states of the direct current circuit, including a stable state, the occurrence of arc faults and load sudden changes in the loop.
2. The method of claim 1, wherein the obtaining a set of dc system loop current waveform images comprises:
and acquiring the loop current of the direct current system, drawing a frame of current waveform image for every 25ms of loop current, and drawing a plurality of frames of current waveform images as a group of input according to the time sequence.
3. The method of claim 1, wherein the pre-processing the acquired loop current waveform image comprises:
and performing convolution and maximum pooling operations on the loop current waveform image.
4. The method according to claim 1, wherein the step of pre-constructing the ResNet classification model comprises:
acquiring 3 currents in different states in a direct current system through experiments, wherein the currents comprise a current in a stable state, a current in which an arc fault occurs and a current in which load in a loop is suddenly changed;
drawing a frame of current waveform image at every 25ms of current, and taking the current waveform image and the state corresponding to the image as a sample to obtain a training sample set;
performing convolution and maximum pooling operation on the training sample set;
and inputting the output of the maximum pooling operation into a ResNet model, and training to obtain a trained ResNet classification model.
5. The method of claim 4, wherein the steady state current comprises: a steady state current waveform with a protrusion and a steady state current waveform without a protrusion.
6. The method of claim 4, wherein the convolving and max-pooling operation of the training sample set comprises:
inputting samples in a training set into a convolutional layer according to a time sequence, and combining a current waveform image drawn by 25ms minus a current waveform image drawn by 25ms to form a new image as the input of the next step;
carrying out axisymmetric copying on the input combined new image;
vertically cutting each copied picture into a plurality of parts, and calculating the unit number of pixel points of each part to be used as a characteristic diagram;
and performing maximum pooling operation on the feature map.
7. A system for determining a state of a dc circuit, comprising:
the sampling module is used for acquiring a group of direct current system loop current waveform images;
the preprocessing module is used for preprocessing the acquired loop current waveform image as the input of a classification model;
and the classification module is used for classifying the state of the direct current circuit and outputting classification results including a stable state, an arc fault and a load mutation in a loop.
8. The system according to claim 7, wherein the sampling module is configured to, in particular,
and acquiring the loop current of the direct current system, drawing a frame of current waveform image for every 25ms of loop current, and drawing a plurality of frames of current waveform images as a group of input according to the time sequence.
9. The system of claim 7, wherein the preprocessing module comprises:
the convolution layer is used for combining the current waveform image drawn by 25ms input at present with the current waveform image drawn by the last 25ms to form a new image as the input of the next step; carrying out axisymmetric copying on the input combined new image; vertically cutting each copied picture into a plurality of parts, and calculating the unit number of pixel points of each part to be used as a characteristic diagram;
and the maximum pooling layer is used for performing maximum pooling operation on the feature map.
10. The system of claim 7, wherein the classification module comprises: a ResNet model;
the ResNet model comprises a four-layer network, a maximum pooling layer, a full connection layer and a Softmax layer;
the first layer consists of 3 residual modules;
the second layer consists of a down-sampling residual error module and 3 residual error modules;
the third layer consists of a down-sampling residual error module and 5 residual error modules;
the fourth layer consists of a downsampling residual module and 2 residual modules.
11. The system of claim 10, wherein the down-sampled residual module is configured to down-sample the input by one-half.
12. A memory storing one or more programs, wherein: the one or more programs include instructions that, when executed by a computing device, cause the computing device to perform any of the methods of claims 1-6.
13. A computing device, characterized by: comprises the steps of (a) preparing a mixture of a plurality of raw materials,
one or more processors, memory, and one or more programs stored in the memory and configured to be executed by the one or more processors, the one or more programs including instructions for performing any of the methods of claims 1-6.
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