CN115270425B - Processing method and device for fault characteristic mapping relation between logic model and physical model - Google Patents
Processing method and device for fault characteristic mapping relation between logic model and physical model Download PDFInfo
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Abstract
The application relates to a processing method, a processing device, computer equipment, a storage medium and a computer program product of a logical model and physical model fault characteristic mapping relation. The method comprises the following steps: establishing a logic model for representing equipment system performance faults and a physical simulation model for representing equipment physical characteristics; acquiring first failure information and second failure information generated according to a logic model; the first failure information is to determine a performance impact based on a failure mode; the second failure information is to determine at least one failure mode based on a performance impact; respectively inputting the first failure information and the second failure information into the expanded physical simulation model, and outputting a simulation result; and verifying the first failure information and the second failure information through simulation results, and finishing the correction of the failure transmission path of the logic model. By adopting the method, the accuracy and the integrity of the logic model can be ensured by correcting the fault transmission path in the logic model.
Description
Technical Field
The present invention relates to the field of device security technologies, and in particular, to a method, an apparatus, a computer device, a storage medium, and a computer program product for processing a mapping relationship between failure characteristics of a logic model and a physical model.
Background
Model-based system engineering (hereinafter referred to as MBSE) is a trend of development of complex equipment and system development modes in recent years, and MBSE mainly follows RFLP analysis methods (requirements R, functions F, logic L, physical P) though there are numerous methodologies. In the analysis stage of requirements, functions and logics, the MBSE mainly builds functional logic models of equipment and systems, in the physical design stage, mainly builds physical models of the equipment and the systems, and certain differences exist between the equipment and the systems in connotation, the logic models abstract and model system functions, logic behaviors and the like, and mainly characterize the system functions and system behavior logics. The physical model refers to a model of geometric characteristics and physical laws of equipment and system products, and can reflect the response of the equipment and the system under physical fields such as heat, electricity, magnetism, force and the like.
The system performance fault can be represented by the logic model, the fault characteristic expressed by the logic model is greatly different from the actual performance of the system, and the safety of the system can be determined according to the logic model, so that the accuracy of the logic model is very important. However, the correctness of the existing verification logic model can only be verified by a manual mode, and cannot be accurately verified.
Disclosure of Invention
In view of the foregoing, it is desirable to provide a method, an apparatus, a computer device, a computer-readable storage medium, and a computer program product for processing a logical model and physical model failure characteristic mapping relationship, which can improve accuracy of a logical model.
In a first aspect, the present application provides a method for processing a mapping relationship between failure characteristics of a logic model and a physical model. The method comprises the following steps:
establishing a logic model for representing the performance faults of the equipment system, and performing fault expansion on a physical simulation model for representing the physical characteristics of the equipment according to the fault modes of all the components identified by the logic model to obtain an expanded physical simulation model;
establishing a logic model for representing equipment system performance faults and a physical simulation model for representing equipment physical characteristics;
acquiring first failure information and second failure information generated according to the logic model; the first failure information is to determine a performance impact according to a failure mode; the second failure information is used for determining at least one failure mode according to a performance influence;
the first failure information and the second failure information are respectively input into the physical simulation model, and a simulation result is output;
And verifying the first failure information and the second failure information through the simulation result to finish the correction of the fault transmission path of the logic model.
In one embodiment, building a physical simulation model characterizing the physical characteristics of the equipment includes:
according to the fault modes of the components identified by the logic model, changing the performance parameters of the physical model of each component by setting a zone bit to form a physical component with an extended fault mode;
and connecting the physical components of the extended fault mode to obtain an extended physical simulation model.
In one embodiment, the inputting the first failure information and the second failure information to the physical simulation model respectively, and outputting a simulation result includes:
generating a first fault sequence according to the first failure information, and generating a second fault sequence according to the second failure information;
inputting the first fault sequence into the physical simulation model, and outputting a fault mode and performance influence of the fault mode;
and inputting the second fault sequence into the physical simulation model, and outputting a fault mode and performance influence of the fault mode.
In one embodiment, the generating a first failure sequence according to the first failure information includes:
Obtaining failure modes of all components from the first failure information to obtain the number n of the failure modes;
generating an n-order identity matrix according to the fault mode;
generating n rows of first fault sequences according to the n-order identity matrix.
In one embodiment, the generating a second failure sequence according to the second failure information includes:
acquiring a minimum cut set generated by the second failure information; the minimal cut set includes at least one performance impact;
determining a fault mode corresponding to each performance impact;
and generating a physical simulation model fault sequence corresponding to the performance influence according to the serial numbers of the fault modes to obtain a second fault sequence.
In one embodiment, the verifying the first failure information and the second failure information through the simulation result, completing the correction of the failure transmission path of the logic model, includes:
verifying the first failure information and the second failure information according to the simulation result;
and when the simulation result is different from the first failure information and/or the second failure information, correcting the fault transmission path of the logic model according to the simulation result.
In a second aspect, the application further provides a processing device for the mapping relation between the fault characteristics of the logic model and the physical model. The device comprises:
the modeling module is used for establishing a logic model for representing the performance faults of the equipment system, and performing fault expansion on a physical simulation model for representing the physical characteristics of the equipment according to the fault modes of all the components identified by the logic model to obtain an expanded physical simulation model;
the information acquisition module is used for acquiring first failure information and second failure information generated according to the logic model; the first failure information is to determine a performance impact according to a failure mode; the second failure information is used for determining at least one failure mode according to a performance influence;
the simulation module is used for inputting the first failure information and the second failure information into the physical simulation model respectively and outputting a simulation result;
and the correction module is used for completing the correction of the fault transmission path of the logic model through the verification of the first failure information and the second failure information by the simulation result.
In a third aspect, the present application also provides a computer device. The computer device comprises a memory storing a computer program and a processor which when executing the computer program performs the steps of:
Establishing a logic model for representing equipment system performance faults and a physical simulation model for representing equipment physical characteristics;
acquiring first failure information and second failure information generated according to the logic model; the first failure information is to determine a performance impact according to a failure mode; the second failure information is used for determining at least one failure mode according to a performance influence;
the first failure information and the second failure information are respectively input into the physical simulation model, and a simulation result is output;
and verifying the first failure information and the second failure information through the simulation result to finish the correction of the fault transmission path of the logic model.
In a fourth aspect, the present application also provides a computer-readable storage medium. The computer readable storage medium having stored thereon a computer program which when executed by a processor performs the steps of:
establishing a logic model for representing equipment system performance faults and a physical simulation model for representing equipment physical characteristics;
acquiring first failure information and second failure information generated according to the logic model; the first failure information is to determine a performance impact according to a failure mode; the second failure information is used for determining at least one failure mode according to a performance influence;
The first failure information and the second failure information are respectively input into the physical simulation model, and a simulation result is output;
and verifying the first failure information and the second failure information through the simulation result to finish the correction of the fault transmission path of the logic model.
In a fifth aspect, the present application also provides a computer program product. The computer program product comprises a computer program which, when executed by a processor, implements the steps of:
establishing a logic model for representing equipment system performance faults and a physical simulation model for representing equipment physical characteristics;
acquiring first failure information and second failure information generated according to the logic model; the first failure information is to determine a performance impact according to a failure mode; the second failure information is used for determining at least one failure mode according to a performance influence;
the first failure information and the second failure information are respectively input into the physical simulation model, and a simulation result is output;
and verifying the first failure information and the second failure information through the simulation result to finish the correction of the fault transmission path of the logic model.
The processing method, the processing device, the computer equipment, the storage medium and the computer program product of the mapping relation between the fault characteristics of the logic model and the physical model are realized by establishing a logic model and a physical simulation model of equipment; and inputting the failure mode and the performance influence thereof, the failure combination and the performance influence thereof output by the logic model into a physical simulation model for simulation, and correcting the logic model according to a simulation result. Through data transmission and simulation between the logic model and the physical model, the consistency of the logic model and the physical simulation model in the mode of model-based system engineering is ensured, and through correction of a fault transmission path in the logic model, the accuracy and the integrity of the logic model are ensured.
Drawings
FIG. 1 is a flow chart of a method for processing a mapping relationship between failure characteristics of a logical model and a physical model in one embodiment;
FIG. 2 is a flow diagram of a simulation method of model-based system engineering in one embodiment;
FIG. 3 is a flow chart illustrating a method for processing a mapping relationship between failure characteristics of a logical model and a physical model according to another embodiment;
FIG. 4 is a schematic diagram of the mapping of a logical model and a physical simulation model in one embodiment;
FIG. 5 is a block diagram of a processing device for mapping fault characteristics of a logical model and a physical model in one embodiment;
fig. 6 is an internal structural diagram of a computer device in one embodiment.
Detailed Description
In order to make the objects, technical solutions and advantages of the present application more apparent, the present application will be further described in detail with reference to the accompanying drawings and examples. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the present application.
In one embodiment, as shown in fig. 1, a method for processing a mapping relationship between failure characteristics of a logic model and a physical model is provided, where the method is applied to a terminal for illustration, it can be understood that the method may also be applied to a server, and may also be applied to a system including the terminal and the server, and implemented through interaction between the terminal and the server. In this embodiment, the method includes the steps of:
The system engineering based on the model can be understood as that all aspects related to the whole life cycle including design, development and the like are established in a mode of a computer data model at the beginning of generating a concept of designing a certain product/platform, so as to form a unified system model. The logic model is used for abstracting and modeling system functions, logic behaviors and the like and mainly characterizing the system functions and the system behavior logic. The modeling language of the logic model may be Sysml (System modeling language, systems Modeling Language). A performance failure transfer path of the equipment may be established based on the logic model to determine a system performance failure, in other words, based on the logic model, a failure analysis that achieves reliability safety concerns may be performed. The physical model is based on a logical model to further refine the components of the equipment (e.g., refine the component parameters and performance).
The physical model is a model of geometric characteristics and physical laws of equipment and system products, and mainly refers to a multi-domain physical simulation model which adopts Modelica (Modelica is a dynamic performance simulation model secondary development language calculated based on differential algebra equations) language for modeling.
Specifically, by determining constituent components of equipment, functions of all the components, abstract behaviors and association among the components, a logic model for representing the performance faults of an equipment system is established, and a physical simulation model for representing the physical characteristics of the equipment is subjected to fault expansion according to the fault modes of all the components identified by the logic model, so that an expanded physical simulation model is obtained.
And 104, acquiring first failure information and second failure information generated according to the logic model.
The first failure information and the second failure information are determined by processing the logic model according to specific functional behaviors of the system and fault processing logic. The first failure information is based on the algorithm failure analysis of the logic model from bottom to top, and the failure modes possibly generated by each component in the system and all possible influences on the system are analyzed. The second failure information is Fault Tree Analysis (FTA) which is a top-down deductive failure analysis that uses brin logic to combine low-order events to analyze the failure modes occurring in the system.
The first failure information includes failure modes of components in the equipment and performance effects corresponding to the failure modes, namely failure modes and performance effects thereof (FMEA). The second failure information includes a Fault Tree Analysis (FTA) that causes a corresponding combination of fault modes for each component performance impact, that is, the combination of fault modes and their performance impact included in the second failure information. The fault tree is a special inverted tree logic causal relationship graph, and the causal relationship among various events in the system is described by event symbols, logic gate symbols and transition symbols. The fault analysis tree includes combinations of fault modes that can produce performance effects in the equipment. Wherein the performance impact is "fruit" and the failure mode is "cause". That is, the first failure information refers to determining a performance impact according to a failure mode, and may be understood as determining a performance impact caused by the failure mode according to the failure mode; the second failure information refers to determining at least one failure mode based on a performance impact, which may be understood as being based on which failure modes this performance impact is caused by.
And 106, respectively inputting the first failure information and the second failure information into a physical simulation model, and outputting a simulation result.
According to the first failure information and the second failure information, the first failure information and the second failure information are respectively input into a physical simulation model, a corresponding failure sequence can be generated through data processing of the first failure information and the second failure information, and the failure sequence is input into the physical simulation model for simulation, so that a simulation result is obtained. In the simulation process, specific functional behaviors and fault processing logic of a system are called through an interface to simulate, the specific functional behaviors and fault processing logic of the system are packaged into an FMU through an FMI interface, and the FMU is imported into a physical simulation model simulation environment to be reused, namely, the physical simulation model and the logic model can call the specific functional behaviors and fault processing logic of the system through the interface.
Specifically, the first failure information and the second failure information are output through the logic model, the function Modelica interface is called through the fault injection and physical model driving unit, the first failure information and the second failure information are respectively input into the physical simulation model for simulation, and a simulation result of the first failure information and a simulation result of the second failure information are obtained. Further, generating a first failure sequence according to the first failure information, and generating a second failure sequence according to the second failure information; inputting the first fault sequence into a physical simulation model, and outputting a fault mode and performance influence of the corresponding simulation; and inputting the second fault sequence into a physical simulation model, and outputting a fault mode and performance influence of the corresponding simulation.
And step 108, verifying the first failure information and the second failure information through simulation results, and finishing the correction of the failure transmission path of the logic model.
Specifically, the simulation result of the first failure information and the simulation result of the second failure information are used for verifying the first failure information and the second failure information, namely, according to the failure mode in the first failure information, the physical simulation model is used for simulating, the output performance influence is matched with the performance influence in the first failure information, and if the output performance influence is different, the performance influence of the simulation output is corrected to the performance influence corresponding to the failure mode in the first failure information; and determining a corresponding fault mode combination according to the performance influence in the second failure information, simulating according to the fault mode combination, matching the output performance influence with the performance influence in the second failure information, and if the output performance influence is different, correcting the performance influence corresponding to the fault mode in the second failure information by the simulated output performance influence, so as to complete the correction of the fault transmission path of the logic model.
In the processing method of the fault characteristic mapping relation between the logic model and the physical model, the logic model and the physical simulation model of the equipment are established; and inputting the failure mode and the performance influence thereof, the failure combination and the performance influence thereof output by the logic model into a physical simulation model for simulation, and correcting the logic model according to a simulation result. Through data transmission and simulation between the logic model and the physical model, the consistency of the logic model and the physical simulation model in the mode of model-based system engineering is ensured, and through correction of a fault transmission path in the logic model, the accuracy and the integrity of the logic model are ensured.
And correcting the logic model by acquiring the fault mode of each component generated by the logic model and the performance influence corresponding to the fault mode and combining the performance influence of each component and the corresponding fault mode. Further, it is necessary to determine in which way the logic model is modified according to the failure mode and the corresponding performance impact of the failure mode for each component, and the combination of the performance impact of each component and the corresponding failure mode. When the correction is carried out, the data processing is carried out on the fault mode of each component, the performance influence corresponding to the fault mode and the combination of the performance influence of each component and the corresponding fault mode, so that a fault sequence is obtained, and the logic model is corrected in a fault sequence mode.
In one embodiment, as shown in fig. 2, a simulation method of a model-based system engineering is provided, where the method is applied to a terminal for illustration, it is understood that the method may also be applied to a server, and may also be applied to a system including the terminal and the server, and implemented through interaction between the terminal and the server. In this embodiment, the method includes the steps of:
Specifically, failure modes of each component are obtained from the first failure information, the number n of failure modes is obtained, an n-order identity matrix is generated according to the failure modes, and the n-order identity matrix can be expressed as:
Specifically, generating n rows of first fault sequences according to each row of the n-order identity matrix, wherein the first fault sequences can be expressed as E1[0 ]; 5-En [ n-1 ]; ].
The fault tree is generally represented by a conventional logic gate symbol, and a path from an initial event (initiator) to an event in the fault tree is called a partition set (cut set). The shortest possible path from an initial event to an event is called the minimum Cut Set (minimum Cut Set). The second failure information includes a fault tree analysis tree.
Specifically, a minimum path causing each performance influence is determined according to the second fault analysis tree, a fault mode on the minimum path is determined according to the minimum path, and a minimum cut set is obtained. Wherein the causal relationship between the fault modes is predetermined And (3) determining. For example, the acquisition of the minimal cut set generated by the second failure information may be expressed as mc= { fm_serial 1 ，fm_serial 2 ，…fm_serial n Wherein fm_serial n Indicating a combination of failure modes, including at least two failure modes.
And 212, generating a physical simulation model fault sequence corresponding to the performance influence according to the serial numbers of the fault modes to obtain a second fault sequence.
Specifically, determining a fault mode combination of each performance influence according to the obtained minimum cut set, determining a position corresponding to a specific fault mode according to the fault mode combination, obtaining a second fault sequence corresponding to the corresponding performance influence, and sequentially obtaining the second fault sequence corresponding to each performance influence. For example, fm_serial i The corresponding failure mode in (i) is { FMi, FMj }, the corresponding series of physical model failures is:
Specifically, the first fault sequence and the second fault sequence are respectively input into an expanded physical simulation model, and the physical simulation model respectively outputs a simulated fault mode and performance influence thereof corresponding to the first fault sequence, and a simulated fault mode and performance influence thereof corresponding to the second fault sequence. And verifying the performance influence of the logic model according to the obtained performance influence.
In the simulation method of the model-based system engineering, the first failure information and the second failure information are acquired through the logic model, and the first failure information and the second failure information are processed to generate the first failure sequence based on the failure mode of the FMEA and the second failure sequence based on the failure mode of the FTA. And simulating based on the first fault sequence and the second fault sequence to obtain corresponding performance influence. The first failure information and the second failure information are processed to obtain a failure sequence, simulation is carried out in a failure sequence mode to ensure the accuracy of simulation data processing, and the failure mode and the performance influence in the logic model are verified through data transmission and simulation between the logic model and the physical model to ensure the accuracy of the logic model.
In another embodiment, as shown in fig. 3, a method for processing a mapping relationship between failure characteristics of a logic model and a physical model is provided, where the method is applied to a terminal for illustration, it may be understood that the method may also be applied to a server, and may also be applied to a system including the terminal and the server, and implemented through interaction between the terminal and the server. In this embodiment, the method includes the steps of:
And step 304, changing the performance parameters of the physical model of each component by setting a zone bit according to the fault mode of each component identified by the logic model, and forming the physical component with the extended fault mode.
Wherein the physical components that extend the failure mode may be extended according to the failure mode identified by the logical model. For example, it is recognized that the component 1 has a failure mode, and the component 2 has a failure mode, and in the corresponding physical model, the performance parameters of the physical model of each component are changed by setting the flag bit, so as to form a physical component with an extended failure mode.
And 306, connecting the physical components of the extended fault mode to obtain an extended physical simulation model.
Step 308, generating a first failure sequence according to the first failure information, and generating a second failure sequence according to the second failure information.
Specifically, the fault mode of the first fault sequence is input into the expanded physical simulation model, and the fault mode and the performance influence thereof corresponding to simulation are output; and inputting the second fault sequence into the expanded physical simulation model, and outputting a fault mode and performance influence thereof corresponding to simulation.
And step 312, verifying the first failure information and the second failure information according to the simulation result.
The verification means that the simulation is performed based on the fault mode and the performance impact (FMEA) thereof, and the simulation is performed based on the fault mode combination and the performance impact (FTA) thereof, so as to obtain a simulation result to verify whether the FMEA and the FTA are the same. If the two are the same, the logic model does not need to be corrected if the two are the same; if the simulation results are different, the logic model is corrected according to the simulation results after simulation, and the fault transmission path of the logic model is corrected.
And step 314, when the simulation result is different from the first failure information and/or the second failure information, correcting the fault transmission path of the logic model according to the simulation result.
Specifically, simulation is performed based on a fault mode and performance influence (FMEA), the fault mode and the performance influence thereof corresponding to the simulation are output, verification is performed on the fault mode and the performance influence thereof output by the logic model, and when the fault mode and the performance influence thereof are different, the fault transmission path of the logic model is corrected according to the fault mode and the performance influence thereof obtained through simulation. And simulating based on the fault mode combination and the performance influence (FTA) thereof, outputting a fault mode and the performance influence corresponding to the simulation, verifying the fault mode combination and the performance influence output by the logic model, and correcting the fault transmission path of the logic model according to the fault mode combination and the performance influence obtained by the simulation when the fault mode combination and the performance influence are different, so as to complete the correction of the logic model.
In one embodiment, as shown in fig. 4, a mapping diagram of a logic model and a physical simulation model in a logic model correction method of model-based system engineering includes a logic model, a physical simulation model, a fault injection and physical model driving unit, a Modelica API, an FMI interface and an FMU unit, where specific functional behaviors of the system and fault processing logic are packaged into the FMU unit through the FMI interface and can be imported into a physical model simulation environment for multiplexing. The fault modes of all components of the equipment and the corresponding fault rates are input into a logic model, fault logic processing is carried out by calling an FMU unit, and the fault modes and the performance effects (FMEA) and the fault mode combinations and the performance effects (FTA) are output. Determining fault modes and performance influences (FMEA) and fault mode combinations and fault modes and performance influences (FTA) of the fault modes respectively, generating a first fault sequence and a second fault sequence by calling a fault input and physical model driving unit, inputting the first fault sequence and the second fault sequence into a physical simulation model respectively, carrying out fault logic processing by calling an FMU unit, and outputting a fault mode and performance influences corresponding to the first fault sequence after simulation and a fault mode combination and performance influences corresponding to the second fault sequence. And comparing the simulation result output by the physical simulation model with the fault mode and the performance influence (FMEA) and the fault mode combination and the performance influence (FTA) output by the logic model, and correcting the fault transmission path of the logic model according to the simulation result when the simulation result is different from the first failure information and/or the second failure information.
In the processing method of the fault characteristic mapping relation between the logic model and the physical model, the logic model and the physical simulation model of the equipment are established; and processing the fault mode and the performance influence thereof, the fault mode combination and the performance influence thereof according to the fault mode and the performance influence thereof, the fault mode combination and the performance influence thereof output by the logic model to obtain a corresponding fault sequence, inputting the fault sequence into a physical simulation model for simulation, and correcting the logic model according to a simulation result. Through data transmission and simulation between the logic model and the physical model, the consistency of the logic model and the physical simulation model in the mode of model-based system engineering is ensured, and through correction of a fault transmission path in the logic model, the accuracy and the integrity of the logic model are ensured.
It should be understood that, although the steps in the flowcharts related to the embodiments described above are sequentially shown as indicated by arrows, these steps are not necessarily sequentially performed in the order indicated by the arrows. The steps are not strictly limited to the order of execution unless explicitly recited herein, and the steps may be executed in other orders. Moreover, at least some of the steps in the flowcharts described in the above embodiments may include a plurality of steps or a plurality of stages, which are not necessarily performed at the same time, but may be performed at different times, and the order of the steps or stages is not necessarily performed sequentially, but may be performed alternately or alternately with at least some of the other steps or stages.
Based on the same inventive concept, the embodiment of the application also provides a processing device for realizing the logical model and physical model fault characteristic mapping relation of the processing method of the logical model and physical model fault characteristic mapping relation. The implementation scheme of the device for solving the problem is similar to the implementation scheme described in the above method, so the specific limitation in the embodiments of the processing device for mapping the fault characteristics of one or more logic models and physical models provided below can be referred to the limitation of the processing method for mapping the fault characteristics of the logic models and the physical models hereinabove, and will not be repeated herein.
In one embodiment, as shown in fig. 5, there is provided a processing apparatus for mapping a logical model to a physical model fault characteristic, including: a modeling module 502, an information acquisition module 504, a simulation module 506, and a correction module 508, wherein:
the modeling module 502 is configured to build a logical model characterizing a performance failure of an equipment system and a physical simulation model characterizing physical characteristics of the equipment.
An information obtaining module 504, configured to obtain first failure information and second failure information generated according to a logic model; the first failure information is to determine a performance impact based on a failure mode; the second failure information refers to determining at least one failure mode based on a performance impact.
The simulation module 506 is configured to input the first failure information and the second failure information to the physical simulation model, and output a simulation result.
And the correction module 508 is used for completing the correction of the fault transmission path of the logic model through the verification of the first failure information and the second failure information by the simulation result.
The processing device of the mapping relation between the fault characteristics of the logic model and the physical model establishes a logic model and a physical simulation model of the equipment; and inputting the failure mode and the performance influence thereof, the failure combination and the performance influence thereof output by the logic model into a physical simulation model for simulation, and correcting the logic model according to a simulation result. Through data transmission and simulation between the logic model and the physical model, the consistency of the logic model and the physical simulation model in the mode of model-based system engineering is ensured, and through correction of a fault transmission path in the logic model, the accuracy and the integrity of the logic model are ensured.
In another embodiment, a processing apparatus for mapping a logical model to a physical model fault characteristic is provided, where the processing apparatus includes, in addition to a modeling module 502, an information obtaining module 504, a simulation module 506, and a correction module 508: a fault sequence processing module, wherein:
The modeling module 502 is further configured to change performance parameters of a physical model of each component by setting a flag bit according to the failure mode of each component identified by the logic model, so as to form a physical component with an extended failure mode;
and connecting the physical components of the extended fault mode to obtain an extended physical simulation model.
The fault sequence processing module is used for generating a first fault sequence according to the first failure information and generating a second fault sequence according to the second failure information;
the simulation module 506 is further configured to input the first fault sequence into a physical simulation model, and output a fault mode and a performance impact thereof corresponding to the simulation;
and inputting the second fault sequence into a physical simulation model, and outputting a fault mode and performance influence of the corresponding simulation.
The fault sequence processing module is also used for acquiring fault modes of all the components from the first failure information to obtain the number n of the fault modes;
generating an n-order identity matrix according to the fault mode;
generating n rows of first fault sequences according to the n-order identity matrix.
The fault sequence processing module is also used for acquiring a minimum cut set generated by the second failure information; the minimal cut set includes at least one performance impact;
determining a fault mode corresponding to each performance influence;
And generating a physical simulation model fault sequence corresponding to the performance influence according to the serial numbers of the fault modes to obtain a second fault sequence.
The correction module 508 is further configured to verify the first failure information and the second failure information according to the simulation result;
and when the simulation result is different from the first failure information and/or the second failure information, correcting the fault transmission path of the logic model according to the simulation result.
The above-mentioned processing means of the logical model and physical model fault characteristic mapping relationship may be implemented in whole or in part by software, hardware, and combinations thereof. The above modules may be embedded in hardware or may be independent of a processor in the computer device, or may be stored in software in a memory in the computer device, so that the processor may call and execute operations corresponding to the above modules.
In one embodiment, a computer device is provided, which may be a terminal, and the internal structure of which may be as shown in fig. 6. The computer device includes a processor, a memory, a communication interface, a display screen, and an input device connected by a system bus. Wherein the processor of the computer device is configured to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a computer program. The internal memory provides an environment for the operation of the operating system and computer programs in the non-volatile storage media. The communication interface of the computer device is used for carrying out wired or wireless communication with an external terminal, and the wireless mode can be realized through WIFI, a mobile cellular network, NFC (near field communication) or other technologies. The computer program, when executed by a processor, implements a method for processing a mapping relationship between fault characteristics of a logical model and a physical model. The display screen of the computer equipment can be a liquid crystal display screen or an electronic ink display screen, and the input device of the computer equipment can be a touch layer covered on the display screen, can also be keys, a track ball or a touch pad arranged on the shell of the computer equipment, and can also be an external keyboard, a touch pad or a mouse and the like.
It will be appreciated by those skilled in the art that the structure shown in fig. 6 is merely a block diagram of some of the structures associated with the present application and is not limiting of the computer device to which the present application may be applied, and that a particular computer device may include more or fewer components than shown, or may combine certain components, or have a different arrangement of components.
In one embodiment, a computer device is provided comprising a memory and a processor, the memory having stored therein a computer program, the processor when executing the computer program performing the steps of:
establishing a logic model for representing equipment system performance faults and a physical simulation model for representing equipment physical characteristics;
acquiring first failure information and second failure information generated according to a logic model; the first failure information is to determine a performance impact based on a failure mode; the second failure information is to determine at least one failure mode based on a performance impact;
the first failure information and the second failure information are respectively input into a physical simulation model, and a simulation result is output;
and verifying the first failure information and the second failure information through simulation results, and finishing the correction of the failure transmission path of the logic model.
In one embodiment, the processor when executing the computer program further performs the steps of:
according to the fault modes of the components identified by the logic model, changing the performance parameters of the physical model of each component by setting a flag bit to form a physical component with an extended fault mode;
and connecting the physical components of the extended fault mode to obtain an extended physical simulation model.
In one embodiment, the processor when executing the computer program further performs the steps of:
generating a first fault sequence according to the first failure information, and generating a second fault sequence according to the second failure information;
inputting the first fault sequence into a physical simulation model, and outputting a fault mode and performance influence of the corresponding simulation;
and inputting the second fault sequence into a physical simulation model, and outputting a fault mode and performance influence of the corresponding simulation.
In one embodiment, the processor when executing the computer program further performs the steps of:
obtaining failure modes of all components from the first failure information to obtain the number n of the failure modes;
generating an n-order identity matrix according to the fault mode;
generating n rows of first fault sequences according to the n-order identity matrix.
In one embodiment, the processor when executing the computer program further performs the steps of:
Acquiring a minimum cut set generated by the second failure information; the minimal cut set includes at least one performance impact;
determining a fault mode corresponding to each performance influence;
and generating a physical simulation model fault sequence corresponding to the performance influence according to the serial numbers of the fault modes to obtain a second fault sequence.
In one embodiment, the processor when executing the computer program further performs the steps of:
verifying the first failure information and the second failure information according to the simulation result;
and when the simulation result is different from the first failure information and/or the second failure information, correcting the fault transmission path of the logic model according to the simulation result.
In one embodiment, a computer readable storage medium is provided having a computer program stored thereon, which when executed by a processor, performs the steps of:
establishing a logic model for representing equipment system performance faults and a physical simulation model for representing equipment physical characteristics;
acquiring first failure information and second failure information generated according to a logic model; the first failure information is to determine a performance impact based on a failure mode; the second failure information is to determine at least one failure mode based on a performance impact;
The first failure information and the second failure information are respectively input into a physical simulation model, and a simulation result is output;
and verifying the first failure information and the second failure information through simulation results, and finishing the correction of the failure transmission path of the logic model.
In one embodiment, the computer program when executed by the processor further performs the steps of:
according to the fault modes of the components identified by the logic model, changing the performance parameters of the physical model of each component by setting a flag bit to form a physical component with an extended fault mode;
and connecting the physical components of the extended fault mode to obtain an extended physical simulation model.
In one embodiment, the computer program when executed by the processor further performs the steps of:
generating a first fault sequence according to the first failure information, and generating a second fault sequence according to the second failure information;
inputting the first fault sequence into a physical simulation model, and outputting a fault mode and performance influence of the corresponding simulation;
and inputting the second fault sequence into a physical simulation model, and outputting a fault mode and performance influence of the corresponding simulation.
In one embodiment, the computer program when executed by the processor further performs the steps of:
Obtaining failure modes of all components from the first failure information to obtain the number n of the failure modes;
generating an n-order identity matrix according to the fault mode;
generating n rows of first fault sequences according to the n-order identity matrix.
In one embodiment, the computer program when executed by the processor further performs the steps of:
acquiring a minimum cut set generated by the second failure information; the minimal cut set includes at least one performance impact;
determining a fault mode corresponding to each performance influence;
and generating a physical simulation model fault sequence corresponding to the performance influence according to the serial numbers of the fault modes to obtain a second fault sequence.
In one embodiment, the computer program when executed by the processor further performs the steps of:
verifying the first failure information and the second failure information according to the simulation result;
and when the simulation result is different from the first failure information and/or the second failure information, correcting the fault transmission path of the logic model according to the simulation result.
In one embodiment, a computer program product is provided comprising a computer program which, when executed by a processor, performs the steps of:
establishing a logic model for representing equipment system performance faults and a physical simulation model for representing equipment physical characteristics;
Acquiring first failure information and second failure information generated according to a logic model; the first failure information is to determine a performance impact based on a failure mode; the second failure information is to determine at least one failure mode based on a performance impact;
the first failure information and the second failure information are respectively input into a physical simulation model, and a simulation result is output;
and verifying the first failure information and the second failure information through simulation results, and finishing the correction of the failure transmission path of the logic model.
In one embodiment, the computer program when executed by the processor further performs the steps of:
according to the fault modes of the components identified by the logic model, changing the performance parameters of the physical model of each component by setting a flag bit to form a physical component with an extended fault mode;
and connecting the physical components of the extended fault mode to obtain an extended physical simulation model.
In one embodiment, the computer program when executed by the processor further performs the steps of:
generating a first fault sequence according to the first failure information, and generating a second fault sequence according to the second failure information;
inputting the first fault sequence into a physical simulation model, and outputting a fault mode and performance influence of the corresponding simulation;
And inputting the second fault sequence into a physical simulation model, and outputting a fault mode and performance influence of the corresponding simulation.
In one embodiment, the computer program when executed by the processor further performs the steps of:
obtaining failure modes of all components from the first failure information to obtain the number n of the failure modes;
generating an n-order identity matrix according to the fault mode;
generating n rows of first fault sequences according to the n-order identity matrix.
In one embodiment, the computer program when executed by the processor further performs the steps of:
acquiring a minimum cut set generated by the second failure information; the minimal cut set includes at least one performance impact;
determining a fault mode corresponding to each performance influence;
and generating a physical simulation model fault sequence corresponding to the performance influence according to the serial numbers of the fault modes to obtain a second fault sequence.
In one embodiment, the computer program when executed by the processor further performs the steps of:
verifying the first failure information and the second failure information according to the simulation result;
and when the simulation result is different from the first failure information and/or the second failure information, correcting the fault transmission path of the logic model according to the simulation result.
It should be noted that, user information (including but not limited to user equipment information, user personal information, etc.) and data (including but not limited to data for analysis, stored data, presented data, etc.) referred to in the present application are information and data authorized by the user or sufficiently authorized by each party.
Those skilled in the art will appreciate that implementing all or part of the above described methods may be accomplished by way of a computer program stored on a non-transitory computer readable storage medium, which when executed, may comprise the steps of the embodiments of the methods described above. Any reference to memory, database, or other medium used in the various embodiments provided herein may include at least one of non-volatile and volatile memory. The nonvolatile Memory may include Read-Only Memory (ROM), magnetic tape, floppy disk, flash Memory, optical Memory, high density embedded nonvolatile Memory, resistive random access Memory (ReRAM), magnetic random access Memory (Magnetoresistive Random Access Memory, MRAM), ferroelectric Memory (Ferroelectric Random Access Memory, FRAM), phase change Memory (Phase Change Memory, PCM), graphene Memory, and the like. Volatile memory can include random access memory (Random Access Memory, RAM) or external cache memory, and the like. By way of illustration, and not limitation, RAM can be in the form of a variety of forms, such as static random access memory (Static Random Access Memory, SRAM) or dynamic random access memory (Dynamic Random Access Memory, DRAM), and the like. The databases referred to in the various embodiments provided herein may include at least one of relational databases and non-relational databases. The non-relational database may include, but is not limited to, a blockchain-based distributed database, and the like. The processors referred to in the embodiments provided herein may be general purpose processors, central processing units, graphics processors, digital signal processors, programmable logic units, quantum computing-based data processing logic units, etc., without being limited thereto.
The technical features of the above embodiments may be arbitrarily combined, and all possible combinations of the technical features in the above embodiments are not described for brevity of description, however, as long as there is no contradiction between the combinations of the technical features, they should be considered as the scope of the description.
The above examples only represent a few embodiments of the present application, which are described in more detail and are not to be construed as limiting the scope of the present application. It should be noted that it would be apparent to those skilled in the art that various modifications and improvements could be made without departing from the spirit of the present application, which would be within the scope of the present application. Accordingly, the scope of protection of the present application shall be subject to the appended claims.
Claims (10)
1. A processing method of a mapping relation between fault characteristics of a logic model and a physical model is characterized by comprising the following steps:
establishing a logic model for representing equipment system performance faults and a physical simulation model for representing equipment physical characteristics;
acquiring first failure information and second failure information generated according to the logic model; the first failure information is to determine a performance impact according to a failure mode; the second failure information is used for determining at least one failure mode according to a performance influence;
Obtaining failure modes of all components from the first failure information to obtain the number n of the failure modes;
generating an n-order identity matrix according to the fault mode;
generating n rows of first fault sequences according to the n-order identity matrix;
acquiring a minimum cut set generated by the second failure information; the minimal cut set includes at least one performance impact;
determining a fault mode corresponding to each performance impact;
generating a physical simulation model fault sequence corresponding to the performance influence according to the serial numbers of the fault modes to obtain a second fault sequence;
inputting the first fault sequence into the physical simulation model, and outputting a fault mode and performance influence of the fault mode; and
inputting the second fault sequence into the physical simulation model, outputting a fault mode and performance influence of the corresponding simulation, and obtaining a simulation result;
and verifying the first failure information and the second failure information through the simulation result to finish the correction of the fault transmission path of the logic model.
2. The method of claim 1, wherein building a physical simulation model characterizing physical characteristics of the equipment comprises:
According to the fault modes of the components identified by the logic model, changing the performance parameters of the physical model of each component by setting a zone bit to form a physical component with an extended fault mode;
and connecting the physical components of the extended fault mode to obtain an extended physical simulation model.
3. The method according to claim 1, wherein the verifying the first failure information and the second failure information by the simulation result, completing the correction of the failure transfer path of the logic model, includes:
verifying the first failure information and the second failure information according to the simulation result;
and when the simulation result is different from the first failure information and/or the second failure information, correcting the fault transmission path of the logic model according to the simulation result.
4. The method of claim 1, wherein the first failure information and the second failure information are determined by a logic model based on a specific functional behavior of the system and fault handling logic.
5. A processing apparatus for mapping a logical model to a physical model fault characteristic, the apparatus comprising:
The modeling module is used for establishing a logic model for representing the performance fault of the equipment system and a physical simulation model for representing the physical characteristics of the equipment;
the information acquisition module is used for acquiring first failure information and second failure information generated according to the logic model; the first failure information is to determine a performance impact according to a failure mode; the second failure information is used for determining at least one failure mode according to a performance influence;
the fault sequence processing module is used for acquiring fault modes of all the components from the first failure information to obtain the number n of the fault modes;
generating an n-order identity matrix according to the fault mode;
generating n rows of first fault sequences according to the n-order identity matrix;
acquiring a minimum cut set generated by the second failure information; the minimal cut set includes at least one performance impact;
determining a fault mode corresponding to each performance impact;
generating a physical simulation model fault sequence corresponding to the performance influence according to the serial numbers of the fault modes to obtain a second fault sequence;
the simulation module is used for inputting the first fault sequence into the physical simulation model and outputting a fault mode and performance influence of the fault mode; and
Inputting the second fault sequence into the physical simulation model, outputting a fault mode and performance influence of the corresponding simulation, and obtaining a simulation result;
and the correction module is used for completing the correction of the fault transmission path of the logic model through the verification of the first failure information and the second failure information by the simulation result.
6. The device according to claim 5, wherein the modeling module is further configured to form a physical component with an extended failure mode by setting a flag bit to change a performance parameter of a physical model of each component according to the failure mode of each component identified by the logic model;
and connecting the physical components of the extended fault mode to obtain an extended physical simulation model.
7. The apparatus of claim 5, wherein the correction module is further configured to verify the first failure information and the second failure information based on the simulation result;
and when the simulation result is different from the first failure information and/or the second failure information, correcting the fault transmission path of the logic model according to the simulation result.
8. A computer device comprising a memory and a processor, the memory storing a computer program, characterized in that the processor implements the steps of the method of any of claims 1 to 4 when the computer program is executed.
9. A computer readable storage medium, on which a computer program is stored, characterized in that the computer program, when being executed by a processor, implements the steps of the method of any of claims 1 to 4.
10. A computer program product comprising a computer program, characterized in that the computer program, when executed by a processor, implements the steps of the method of any of claims 1 to 4.
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