CN115249757A - Step-free mini LED chip and manufacturing method thereof - Google Patents
Step-free mini LED chip and manufacturing method thereof Download PDFInfo
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- CN115249757A CN115249757A CN202211140048.3A CN202211140048A CN115249757A CN 115249757 A CN115249757 A CN 115249757A CN 202211140048 A CN202211140048 A CN 202211140048A CN 115249757 A CN115249757 A CN 115249757A
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 31
- 239000004642 Polyimide Substances 0.000 claims abstract description 72
- 229920001721 polyimide Polymers 0.000 claims abstract description 72
- 239000004065 semiconductor Substances 0.000 claims abstract description 57
- 239000000758 substrate Substances 0.000 claims abstract description 23
- 229910052594 sapphire Inorganic materials 0.000 claims abstract description 17
- 239000010980 sapphire Substances 0.000 claims abstract description 17
- 238000002161 passivation Methods 0.000 claims abstract description 14
- 239000000243 solution Substances 0.000 claims description 21
- 238000000034 method Methods 0.000 claims description 15
- 238000000151 deposition Methods 0.000 claims description 14
- 238000000137 annealing Methods 0.000 claims description 12
- 238000001704 evaporation Methods 0.000 claims description 12
- 239000012670 alkaline solution Substances 0.000 claims description 10
- 238000005530 etching Methods 0.000 claims description 10
- 229920002120 photoresistant polymer Polymers 0.000 claims description 10
- HEMHJVSKTPXQMS-UHFFFAOYSA-M Sodium hydroxide Chemical compound [OH-].[Na+] HEMHJVSKTPXQMS-UHFFFAOYSA-M 0.000 claims description 9
- LIVNPJMFVYWSIS-UHFFFAOYSA-N silicon monoxide Chemical compound [Si-]#[O+] LIVNPJMFVYWSIS-UHFFFAOYSA-N 0.000 claims description 9
- 229910001218 Gallium arsenide Inorganic materials 0.000 claims description 8
- KWYUFKZDYYNOTN-UHFFFAOYSA-M Potassium hydroxide Chemical compound [OH-].[K+] KWYUFKZDYYNOTN-UHFFFAOYSA-M 0.000 claims description 8
- QFWPJPIVLCBXFJ-UHFFFAOYSA-N glymidine Chemical compound N1=CC(OCCOC)=CN=C1NS(=O)(=O)C1=CC=CC=C1 QFWPJPIVLCBXFJ-UHFFFAOYSA-N 0.000 claims description 6
- 238000007788 roughening Methods 0.000 claims description 6
- 238000004528 spin coating Methods 0.000 claims description 6
- 238000005520 cutting process Methods 0.000 claims description 4
- 238000001312 dry etching Methods 0.000 claims description 4
- 239000007769 metal material Substances 0.000 claims description 4
- 239000000126 substance Substances 0.000 claims description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 3
- 238000007747 plating Methods 0.000 claims description 3
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 3
- 238000003466 welding Methods 0.000 abstract description 8
- 238000009616 inductively coupled plasma Methods 0.000 description 8
- 239000007771 core particle Substances 0.000 description 5
- 238000011049 filling Methods 0.000 description 5
- MHAJPDPJQMAIIY-UHFFFAOYSA-N Hydrogen peroxide Chemical compound OO MHAJPDPJQMAIIY-UHFFFAOYSA-N 0.000 description 4
- 239000003292 glue Substances 0.000 description 4
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 3
- 238000009987 spinning Methods 0.000 description 3
- VHUUQVKOLVNVRT-UHFFFAOYSA-N Ammonium hydroxide Chemical compound [NH4+].[OH-] VHUUQVKOLVNVRT-UHFFFAOYSA-N 0.000 description 2
- 239000000853 adhesive Substances 0.000 description 2
- 230000001070 adhesive effect Effects 0.000 description 2
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- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
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- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/36—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/44—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
- H01L2933/0016—Processes relating to electrodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
- H01L2933/0025—Processes relating to coatings
Abstract
The invention relates to the technical field of LEDs (light emitting diode), in particular to a step-free mini LED chip and a manufacturing method thereof, wherein the chip comprises a sapphire substrate, a bonding layer, a P-type semiconductor layer, a light emitting layer, an N-type semiconductor layer, a passivation layer, a polyimide layer, a P electrode and an N electrode; the polyimide layer is positioned between the P electrode and the P type semiconductor layer, is flush with the surface of the passivation layer and fills the whole step. According to the invention, the step is filled and leveled by using the polyimide, so that the surface of the chip becomes flat, the step-free mini LED chip is obtained, the problems of upwarp and thrust difference of the chip during welding can be effectively solved, and the reliability is good.
Description
Technical Field
The invention relates to the technical field of LEDs, in particular to a step-free mini LED chip and a manufacturing method thereof.
Background
The Mini LED is a Mini LED, and compared with a common LED display screen, the Mini LED has higher unit area density of the display screen and smaller unit size of a light source, thereby bringing higher brightness and controllable color gamut. The mini LED chip is generally in a flip-chip structure, electrodes are arranged on the same side, and an epitaxial structure needs to be etched in the manufacturing process, so that a step of 6 microns is generated on one side of the chip. When the chip is welded, the core particles are easy to upwarp due to the step on one side, so that the light-emitting angle is deviated; meanwhile, the existence of the step can also cause the forward thrust and the reverse thrust of the chip to generate obvious difference, and the reliability of the chip is influenced.
Disclosure of Invention
Aiming at the defects of the prior art, the invention provides a step-free mini LED chip and a manufacturing method thereof, wherein polyimide is used for filling and leveling the step, so that the surface of the chip becomes flat, the step-free mini LED chip is obtained, and the problems of upwarp and thrust difference of the chip during welding can be effectively solved.
The invention aims to provide a method for manufacturing a step-free mini LED chip, which comprises the following specific steps:
s1, providing a GaAs substrate, and epitaxially growing an N-type semiconductor layer, a light emitting layer and a P-type semiconductor layer from bottom to top in sequence;
s2, roughening the surface of the P-type semiconductor layer through an iodic acid solution;
s3, depositing a bonding layer SiO on the roughened surface of the P-type semiconductor layer 2 ;
S4, providing a sapphire substrate, and depositing a bonding layer SiO on the smooth side of the sapphire substrate 2 ;
S5, aligning and contacting one surface of the bonding layer deposited on the surface of the P-type semiconductor layer with one surface of the sapphire bonding layer, and bonding the two surfaces at high temperature and high pressure;
s6, corroding and removing the GaAs substrate through chemical solution to expose the N-type semiconductor layer;
s7, etching the N-type semiconductor layer and the light emitting layer without the photoresist coverage area cleanly by utilizing ICP (inductively coupled plasma etching) dry etching to expose the P-type semiconductor layer;
s8, evaporating a P contact electrode on the surface of the exposed P type semiconductor layer;
s9, evaporating an N contact electrode on the surface of the N-type semiconductor layer;
s10, depositing a layer of passivation layer silicon oxide on the surface of the chip;
s11, spin-coating polyimide on the surface of the chip, and then removing the polyimide on the table top through a developing solution to leave the polyimide under the table top to fill and level the step;
s12, etching a P contact hole and an N contact hole through ICP;
s13, completely curing the polyimide at high temperature;
s14, treating the polyimide with an alkaline solution;
s15, simultaneously evaporating and plating metal materials required for manufacturing the P electrode and the N electrode to manufacture the P electrode and the N electrode;
s16, annealing the chip;
and S17, cutting to finish the manufacture of the mini LED chip.
Compared with the method for filling the steps with metal, the method for manufacturing the polyimide flat-filling structure is simpler in process of filling the steps with polyimide, and the steps can be filled only by spin-coating the polyimide on the surface of the chip and then removing the polyimide on the table board through the developing solution; through using alkaline solution to handle the polyimide surface, increased the roughness on polyimide surface, rethread annealing makes coarse polyimide and P, N electrode closely combine, can effectual increase P electrode and N electrode and polyimide's adhesion, and then makes the obvious increase of chip thrust, and the difference between forward thrust and the reverse thrust can be eliminated completely.
Further, in the above technical scheme S2, the roughening time is 2min to 3min. According to the technical scheme, the iodic acid solution is used for coarsening the epitaxial wafer, so that the subsequent deposition of the bonding layer is facilitated, and the stability is good.
Further, in the technical scheme S11, after the polyimide is coated on the surface of the chip in a spinning mode, the polyimide is baked at 120 ℃ for 10min to 12min to perform pre-imidization.
Further, in the above technical solution S13, the curing conditions are: baking at 260 deg.C for 25-35 min.
Further, in the above technical scheme S14, the alkaline solution is potassium hydroxide or sodium hydroxide, and the treatment time is 2min to 3min. According to the invention, the polyimide is treated by using the alkaline solution, so that the surface roughness of the polyimide is increased, and the bonding property is improved.
Further, in S16 in the above technical solution, the annealing conditions are: annealing at 280 deg.C for 8-12 min. In the technical scheme, the high-temperature annealing treatment can improve the tight combination of the polyimide and the P, N electrode, effectively increase the adhesive force of the P electrode and the N electrode with the polyimide, further obviously increase the thrust of the chip and completely eliminate the difference between the forward thrust and the reverse thrust.
The invention has a second purpose of providing a step-free mini LED chip prepared by the manufacturing method, which comprises a sapphire substrate, a bonding layer, a P-type semiconductor layer, a light-emitting layer, an N-type semiconductor layer, a passivation layer, a polyimide layer, a P electrode and an N electrode;
the polyimide layer is located between the P electrode and the P type semiconductor layer, is flush with the surface of the passivation layer and fills the whole step.
Polyimide is a polymer with good comprehensive performance, good thermal stability and high insulation, the table top at the P electrode of the chip is filled and leveled by using the polyimide to obtain the mini LED without steps, the upwarping and the short circuit risk at the steps can be effectively avoided, and the reliability of the chip is improved.
Compared with the prior art, the invention has the following beneficial effects:
1. according to the invention, the table top is filled with polyimide to obtain the mini LED without steps, the mini LED is not tilted during welding, and meanwhile, the polyimide is not conductive, so that the short circuit risk at the steps can be effectively avoided; in addition, the polyimide has good thermal stability, so that deformation cannot occur during welding, and the stability of the welding process is ensured.
2. The manufacturing method of the invention uses the polyimide filling process to be simpler, and steps can be filled by only spin-coating the polyimide on the surface of the chip and then removing the polyimide on the table board through the developing solution; the surface of the polyimide is treated by using an alkaline solution, so that the roughness of the surface of the polyimide is increased; and then the rough polyimide and the P, N electrode are tightly combined through annealing treatment, so that the bonding force between the P electrode and the N electrode and the polyimide can be effectively increased, the chip thrust is obviously increased, and the difference between the forward thrust and the reverse thrust can be completely eliminated.
3. The manufacturing method provided by the invention is simple in process, and the obtained step-free mini LED has small difference between the forward thrust and the reverse thrust and high reliability.
Drawings
FIG. 1 is a schematic top view of a fully cured polyimide core pellet of S13 of the present invention;
FIG. 2 is a schematic cross-sectional view of a core particle manufactured by S17 of the present invention.
Number designations in the schematic drawings illustrate that:
1. a P-type semiconductor layer; 2. a light emitting layer; 3. an N-type semiconductor layer; 4. a bonding layer; 5. a sapphire substrate; 6. a passivation layer; 7. a polyimide layer; 8. a P electrode; 9. an N electrode; 10. an N contact electrode; 11. the P contacts the electrode.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. The following description of at least one exemplary embodiment is merely illustrative in nature and is in no way intended to limit the application, its application, or uses. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
In the description of the present application, it should be understood that the terms "first", "second", etc. are used to define the components, and are used only for the convenience of distinguishing the corresponding components, and if not otherwise stated, the terms have no special meaning, and thus, should not be construed as limiting the scope of the present application.
In the description of the present application, it is to be understood that the orientation or positional relationship indicated by the directional terms such as "front, rear, upper, lower, left, right", "lateral, vertical, horizontal" and "top, bottom", etc., are generally based on the orientation or positional relationship shown in the drawings, and are used for convenience of description and simplicity of description only, and in the case of not making a reverse description, these directional terms do not indicate and imply that the device or element being referred to must have a particular orientation or be constructed and operated in a particular orientation, and therefore, should not be considered as limiting the scope of the present application; the terms "inner and outer" refer to the inner and outer relative to the profile of the respective component itself.
Referring to fig. 1 to 2, it should be noted that the drawings provided in the present embodiment are only schematic illustrations of the basic idea of the present invention, and only show the components related to the present invention rather than drawn according to the number, shape and size of the components in actual implementation, the shape, number and ratio of the components in actual implementation may be changed arbitrarily, and the layout of the components may be more complicated.
The embodiment of the invention provides a method for manufacturing a step-free mini LED chip, which comprises the following specific steps of:
s1, providing a GaAs substrate, putting the substrate into MOCVD (metal organic chemical vapor deposition), and epitaxially growing an N-type semiconductor layer, a light-emitting layer and a P-type semiconductor layer from bottom to top in sequence;
s2, roughening the surface of the P-type semiconductor layer through an iodic acid solution; specifically, the epitaxial wafer is soaked in an iodic acid solution for 2min-3min, taken out and washed by water for spin-drying, and the surface of the P-type semiconductor is roughened;
s3, depositing a bonding layer SiO on the surface of the coarsened P-type semiconductor layer 2 (ii) a In particular, siO is deposited 2 The thickness is 3 mu m;
s4, providing a sapphire substrate, and depositing a bonding layer SiO on the smooth side of the sapphire substrate 2 (ii) a Utensil for cleaning buttockBulk, deposition of SiO 2 The thickness is 3 μm;
s5, aligning and contacting one surface of the bonding layer deposited on the surface of the P-type semiconductor layer with one surface of the sapphire bonding layer, and bonding the two surfaces at high temperature and high pressure; specifically, the bonding conditions were: the temperature is 450 ℃, and the pressure is 15000kg;
s6, corroding and removing the GaAs substrate through chemical solution to expose the N-type semiconductor layer; specifically, the chemical solution is a mixed solution of ammonia water and hydrogen peroxide;
s7, using positive photoresist as a mask image on the surface of the N-type semiconductor, and etching the N-type semiconductor layer and the light emitting layer without the photoresist coverage area by utilizing ICP dry etching to expose the P-type semiconductor layer;
s8, evaporating a P contact electrode 11 on the surface of the exposed P type semiconductor layer by using negative glue as a mask pattern;
s9, evaporating an N contact electrode 10 on the side, far away from the P contact electrode, of the surface of the N-type semiconductor layer by using the negative glue as a mask pattern;
s10, depositing a layer of passivation layer silicon oxide on the surface of the chip; specifically, siO was deposited on the surface of the chip by PECVD (plasma enhanced chemical vapor deposition) to a thickness of 4 μm 2 As a passivation layer;
s11, spin-coating polyimide on the surface of the chip, and then removing the polyimide on the table top through a developing solution to leave the polyimide under the table top to fill and level the step; specifically, the polyimide is coated on the surface of a chip in a spinning mode, the chip is baked for 10min-12min at 120 ℃ for pre-imidization, then positive photoresist is continuously coated in a spinning mode to manufacture a mask pattern to protect the polyimide below the table board, and the polyimide on the table board is removed through developing solution to enable the table board to be filled and leveled;
s12, etching a P contact hole and an N contact hole through ICP; specifically, positive photoresist is used as a mask pattern, polyimide under a table top also exposes the position of a contact hole during development, and an ICP is used for etching the contact hole to expose a P contact electrode and an N contact electrode;
s13, completely curing the polyimide at high temperature; specifically, the curing conditions were: baking at 260 deg.C for 25-35 min; the schematic top view of the core pellet after the polyimide is completely cured is shown in FIG. 1;
s14, treating the polyimide with an alkaline solution; specifically, the alkaline solution is a potassium hydroxide solution or a sodium hydroxide solution, and the treatment time is 2min-3min; according to the invention, the polyimide is treated by the alkaline solution, so that the surface roughness of the polyimide is increased, and the cohesiveness is improved;
s15, simultaneously evaporating and plating metal materials required for manufacturing the P electrode and the N electrode to manufacture the P electrode and the N electrode; specifically, the N electrode and the P electrode are respectively connected with respective contact electrodes through contact holes;
s16, annealing the chip; specifically, the chip is annealed at 280 ℃ for 8-12 min, and the bonding force between the P electrode and the N electrode and the rough polyimide can be increased through high-temperature annealing treatment;
s17, cutting to finish the manufacture of the mini LED chip, wherein the schematic cross-sectional structure of the manufactured core particle is shown in figure 2.
In another embodiment of the present invention, a schematic cross-sectional structure diagram of a step-less mini LED chip prepared by the above manufacturing method is shown in fig. 2, and includes a sapphire substrate 5, a bonding layer 4, a P-type semiconductor layer 1, a light emitting layer 2, an N-type semiconductor layer 3, a passivation layer 6, a polyimide layer 7, a P-electrode 8, and an N-electrode 9;
specifically, the polyimide layer 7 is located between the P-electrode 8 and the P-type semiconductor layer 1, is flush with the surface of the passivation layer 6 and fills the entire step. Filling a platform of the chip with polyimide to obtain a step-free mini LED chip, wherein the chip is not warped during welding, and meanwhile, the polyimide is non-conductive, so that the short circuit risk at the step can be effectively avoided; in addition, the polyimide has good thermal stability, so that deformation cannot occur during welding, the stability of a welding process is ensured, and the reliability of a chip is improved.
In a specific embodiment of the present invention, a method for manufacturing a step-less mini LED chip is provided, which includes the following specific steps:
s1, providing a GaAs substrate, putting the substrate into MOCVD, and epitaxially growing an N-type semiconductor layer, a light-emitting layer and a P-type semiconductor layer from bottom to top in sequence;
s2, soaking the epitaxial wafer in an iodic acid solution for 2min, taking out the epitaxial wafer, flushing and spin-drying the epitaxial wafer to finish the roughening treatment on the surface of the P-type semiconductor;
s3, depositing SiO with the thickness of 3 mu m on the surface of the coarsened P-type semiconductor layer 2 A bonding layer;
s4, providing a sapphire substrate, and depositing SiO with the thickness of 3 mu m on the smooth side of the sapphire substrate 2 A bonding layer;
s5, aligning and contacting one surface of the bonding layer deposited on the surface of the P-type semiconductor layer with one surface of the bonding layer of the sapphire, and bonding the two at the temperature of 450 ℃ and under the pressure of 15000kg;
s6, corroding and removing the GaAs substrate by using a mixed solution of ammonia water and hydrogen peroxide to expose the N-type semiconductor layer;
s7, using positive photoresist as a mask image on the surface of the N-type semiconductor, and etching the N-type semiconductor layer and the light emitting layer without the photoresist coverage area by utilizing ICP dry etching to expose the P-type semiconductor layer;
s8, evaporating a P contact electrode on the surface of the exposed P-type semiconductor layer by using negative glue as a mask pattern;
s9, evaporating an N contact electrode on the side, far away from the P contact electrode, of the surface of the N-type semiconductor layer by using the negative glue as a mask pattern;
s10, depositing SiO with the thickness of 4 mu m on the surface of the chip through PECVD 2 As a passivation layer;
s11, spin-coating polyimide on the surface of a chip, baking for 10min at 120 ℃ for pre-imidization, then continuing to spin-coat positive photoresist to manufacture mask patterns to protect the polyimide under the table board, and removing the polyimide on the table board through developing solution to fill and level the table board;
s12, using the positive photoresist as a mask pattern, exposing the position of the contact hole by the polyimide under the table top during development, and etching the contact hole through ICP to expose the P contact electrode and the N contact electrode;
s13, baking for 30min at the temperature of 260 ℃ to completely cure the polyimide;
s14, treating the polyimide for 2min by using a potassium hydroxide solution;
s15, simultaneously evaporating metal materials required for manufacturing the P electrode and the N electrode to manufacture the P electrode and the N electrode;
s16, annealing the chip at 280 ℃ for 10min to increase the adhesive force between the P electrode and the N electrode and the rough polyimide;
and S17, cutting to finish the manufacture of the mini LED chip.
The mini LED chip manufactured in this embodiment and a conventional mini LED chip are subjected to a thrust test, and the test results are shown in table 1, where the test method is as follows: and pushing the core particles at the same height by using a push broach until the core particles are pushed.
TABLE 1 test results
Chip structure | Forward thrust (g) | Reverse thrust (g) |
Conventional chip | 43 | 15 |
Chip of the embodiment | 56 | 54 |
As can be seen from the results in Table 1, the mini LED obtained by the manufacturing method of the invention has small difference between the forward thrust and the reverse thrust, can almost completely eliminate the difference, has the thrust obviously larger than that of the conventional mini LED chip, and has good reliability.
Finally, it should be emphasized that the above-described preferred embodiments of the present invention are merely examples of implementations, rather than limitations, and that many variations and modifications of the invention are possible to those skilled in the art, without departing from the spirit and scope of the invention.
Claims (8)
1. A method for manufacturing a step-free mini LED chip is characterized by comprising the following specific steps:
s1, providing a GaAs substrate, and epitaxially growing an N-type semiconductor layer, a light emitting layer and a P-type semiconductor layer from bottom to top in sequence;
s2, roughening the surface of the P-type semiconductor layer through an iodic acid solution;
s3, depositing a bonding layer SiO on the surface of the coarsened P-type semiconductor layer 2 ;
S4, providing a sapphire substrate, and depositing a bonding layer SiO on the smooth side of the sapphire substrate 2 ;
S5, aligning and contacting one surface of the bonding layer deposited on the surface of the P-type semiconductor layer with one surface of the sapphire bonding layer, and bonding the two surfaces at high temperature and high pressure;
s6, corroding and removing the GaAs substrate through chemical solution to expose the N-type semiconductor layer;
s7, etching the N-type semiconductor layer and the light emitting layer without the photoresist coverage area completely by utilizing ICP dry etching to expose the P-type semiconductor layer;
s8, evaporating a P contact electrode on the surface of the exposed P type semiconductor layer;
s9, evaporating an N contact electrode on the surface of the N-type semiconductor layer;
s10, depositing a layer of passivation layer silicon oxide on the surface of the chip;
s11, spin-coating polyimide on the surface of the chip, and then removing the polyimide on the table top through a developing solution to leave the polyimide under the table top to fill and level the step;
s12, etching a P contact hole and an N contact hole through ICP;
s13, completely curing the polyimide at high temperature;
s14, treating the polyimide with an alkaline solution;
s15, simultaneously evaporating and plating metal materials required for manufacturing the P electrode and the N electrode to manufacture the P electrode and the N electrode;
s16, annealing the chip;
and S17, cutting to finish the manufacture of the mini LED chip.
2. The method of claim 1, wherein the roughening time in S2 is 2min to 3min.
3. The method of claim 1, wherein in S11, the polyimide is spin-coated on the surface of the chip and then baked at 120 ℃ for 10min to 12min to perform pre-imidization.
4. The method according to claim 1, wherein in S13, the curing conditions are: baking at 260 deg.C for 25-35 min.
5. The method according to claim 1, wherein in S14, the alkaline solution is potassium hydroxide or sodium hydroxide, and the treatment time is 2min to 3min.
6. The method according to claim 1, wherein in S16, the annealing conditions are: annealing at 280 deg.C for 8-12 min.
7. A step-less mini LED chip manufactured by the manufacturing method of any one of claims 1 to 6.
8. The stepless mini LED chip according to claim 7, which comprises a sapphire substrate, a bonding layer, a P-type semiconductor layer, a light emitting layer, an N-type semiconductor layer, a passivation layer, a polyimide layer, a P electrode and an N electrode;
the polyimide layer is located between the P electrode and the P type semiconductor layer, is flush with the surface of the passivation layer and fills the whole step.
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CN117253953A (en) * | 2023-11-16 | 2023-12-19 | 南昌凯捷半导体科技有限公司 | Inverted red light Mini-LED chip and manufacturing method thereof |
Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1659310A (en) * | 2002-06-04 | 2005-08-24 | 新加坡科技研究局 | Method for electroless metalisation of polymer substrate |
US20110073900A1 (en) * | 2009-09-25 | 2011-03-31 | Kabushiki Kaisha Toshiba | Semiconductor device and method for manufacturing same |
US20110284910A1 (en) * | 2010-05-24 | 2011-11-24 | Kabushiki Kaisha Toshiba | Semiconductor light emitting device |
US20190319015A1 (en) * | 2014-10-31 | 2019-10-17 | eLux Inc. | Emissive Display Substrate for Surface Mount Micro-LED Fluidic Assembly |
CN110713169A (en) * | 2019-10-21 | 2020-01-21 | 中北大学 | Method for improving flatness of polyimide sacrificial layer in radio frequency MEMS switch |
CN112956038A (en) * | 2018-11-16 | 2021-06-11 | 堺显示器制品株式会社 | Micro LED device and manufacturing method thereof |
CN114759136A (en) * | 2022-06-14 | 2022-07-15 | 南昌凯捷半导体科技有限公司 | miniLED chip and manufacturing method thereof |
-
2022
- 2022-09-20 CN CN202211140048.3A patent/CN115249757A/en active Pending
Patent Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1659310A (en) * | 2002-06-04 | 2005-08-24 | 新加坡科技研究局 | Method for electroless metalisation of polymer substrate |
US20110073900A1 (en) * | 2009-09-25 | 2011-03-31 | Kabushiki Kaisha Toshiba | Semiconductor device and method for manufacturing same |
US20110284910A1 (en) * | 2010-05-24 | 2011-11-24 | Kabushiki Kaisha Toshiba | Semiconductor light emitting device |
US20190319015A1 (en) * | 2014-10-31 | 2019-10-17 | eLux Inc. | Emissive Display Substrate for Surface Mount Micro-LED Fluidic Assembly |
CN112956038A (en) * | 2018-11-16 | 2021-06-11 | 堺显示器制品株式会社 | Micro LED device and manufacturing method thereof |
CN110713169A (en) * | 2019-10-21 | 2020-01-21 | 中北大学 | Method for improving flatness of polyimide sacrificial layer in radio frequency MEMS switch |
CN114759136A (en) * | 2022-06-14 | 2022-07-15 | 南昌凯捷半导体科技有限公司 | miniLED chip and manufacturing method thereof |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN117253953A (en) * | 2023-11-16 | 2023-12-19 | 南昌凯捷半导体科技有限公司 | Inverted red light Mini-LED chip and manufacturing method thereof |
CN117253953B (en) * | 2023-11-16 | 2024-04-05 | 南昌凯捷半导体科技有限公司 | Inverted red light Mini-LED chip and manufacturing method thereof |
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