CN115236908A - Array substrate, display panel and display device - Google Patents
Array substrate, display panel and display device Download PDFInfo
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- CN115236908A CN115236908A CN202210917985.9A CN202210917985A CN115236908A CN 115236908 A CN115236908 A CN 115236908A CN 202210917985 A CN202210917985 A CN 202210917985A CN 115236908 A CN115236908 A CN 115236908A
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- 239000000758 substrate Substances 0.000 title claims abstract description 45
- 239000003086 colorant Substances 0.000 claims abstract description 6
- 125000004122 cyclic group Chemical group 0.000 claims description 3
- 238000000034 method Methods 0.000 description 13
- 238000010586 diagram Methods 0.000 description 8
- 230000007547 defect Effects 0.000 description 6
- 230000009286 beneficial effect Effects 0.000 description 3
- 239000004973 liquid crystal related substance Substances 0.000 description 2
- 239000004988 Nematic liquid crystal Substances 0.000 description 1
- 230000009977 dual effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
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- 239000000203 mixture Substances 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136222—Colour filters incorporated in the active matrix substrate
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Abstract
The embodiment of the application provides an array substrate, a display panel and a display device. The array substrate includes: the display device comprises a plurality of data lines, a plurality of gate lines and a plurality of sub-pixel units, wherein two sides of each row of sub-pixel units are respectively provided with one gate line, and the plurality of sub-pixel units comprise sub-pixel units with a plurality of light-emitting colors; in any row of sub-pixel units, the sub-pixel units of the first light-emitting color are connected with the first gate line, and the sub-pixel units of the second light-emitting color are connected with the second gate line; the first gate line and the second gate line are located on two sides of the row of sub-pixel units. The array substrate provided by the embodiment of the application can solve the problem that vertical stripes appear on a picture in the prior art.
Description
Technical Field
The application relates to the technical field of display, in particular to an array substrate, a display panel and a display device.
Background
For a display panel with a conventional single-gate structure, each column of sub-pixels needs one Data (Data) line for driving, and with the continuous improvement of the market requirement on high resolution and the requirement on a narrow frame, a double-gate (dual gate) pixel design mode appears. The Display panel with the double-grid structure adopts one data line to drive two columns of sub-pixels, so that the wiring of a fan-out area of a lower frame of the Display panel is changed into half of the original wiring, the lower frame of the Display panel is greatly reduced, and meanwhile, because pins of an integrated circuit chip are correspondingly reduced, the whole length of the integrated circuit chip is also shortened, and the Display panel can be applied to small-size high-resolution LCD (Liquid Crystal Display) products.
However, in the current commonly used dual-gate pixel design method, the vertical stripes appear on the picture.
Disclosure of Invention
The application aims at the defects of the prior art and provides an array substrate, a display panel and a display device, which are used for solving the technical problem that vertical stripes appear on a picture in the prior art.
In a first aspect, an embodiment of the present application provides an array substrate, including: the display device comprises a plurality of data lines, a plurality of gate lines and a plurality of sub-pixel units, wherein two sides of each row of sub-pixel units are respectively provided with one gate line, and the plurality of sub-pixel units comprise sub-pixel units with a plurality of light-emitting colors;
in any row of the sub-pixel units, the sub-pixel units of the first light-emitting color are connected with the first gate line, and the sub-pixel units of the second light-emitting color are connected with the second gate line;
the first gate line and the second gate line are located on two sides of the row of sub-pixel units.
Optionally, the plurality of sub-pixel units comprises a plurality of red sub-pixel units, a plurality of green sub-pixel units and a plurality of blue sub-pixel units;
in any row of the sub-pixel units, the red sub-pixel units are connected with the first gate line, and the green sub-pixel units are connected with the second gate line;
the blue sub-pixel unit is alternately connected with the first gate line and the second gate line.
Optionally, in any row of the sub-pixel units, the sub-pixel units are arranged in a cyclic manner;
in any column of the sub-pixel units, the light emitting colors of the sub-pixel units are the same.
Optionally, any row of the sub-pixel units includes a plurality of pixel unit groups, each pixel unit group includes the red sub-pixel unit, the green sub-pixel unit, the blue sub-pixel unit, the red sub-pixel unit, the green sub-pixel unit, and the blue sub-pixel unit, which are sequentially arranged;
each pixel unit group is correspondingly connected with the first gate line and the second gate line, and correspondingly connected with three sequentially arranged data lines.
Optionally, in the pixel unit group, a first red subpixel unit and a second red subpixel unit are both connected to the first gate line, the first red subpixel unit is connected to a first data line, and the second red subpixel unit is connected to a second data line;
the first green sub-pixel unit and the second green sub-pixel unit are both connected with the second gate line, the first green sub-pixel unit is connected with the first data line, and the second green sub-pixel unit is connected with the third data line;
the first blue sub-pixel unit is connected with the second grid line, the second blue sub-pixel unit is connected with the first grid line, the first blue sub-pixel unit is connected with the second data line, and the second blue sub-pixel unit is connected with the third data line.
Optionally, the array substrate further includes a GOA circuit, and the GOA circuit is located on two sides of the display area of the array substrate;
each gate line all with GOA circuit connection.
Optionally, the array substrate further includes a plurality of touch leads, the touch leads are disposed between two adjacent data lines, and the distances between the touch leads and the data lines adjacent to the touch leads are equal.
Optionally, the touch lead and the data line are disposed on the same layer.
In a second aspect, an embodiment of the present application provides a display panel, including the array substrate.
In a third aspect, an embodiment of the present application provides a display device, which includes the display panel described above.
The beneficial technical effects brought by the technical scheme provided by the embodiment of the application comprise:
when the array substrate provided by the embodiment of the application adopts a 1+2 dot inversion mode or a 2 dot inversion mode, in any row of sub-pixel units, the sub-pixel units of the first light-emitting color are connected with the first gate line, and the sub-pixel units of the second light-emitting color are connected with the second gate line; the design mode has no brightness difference in the light emission of the sub-pixel units with the first light-emitting color connected with different columns of data lines, and has no brightness difference in the light emission of the sub-pixel units with the second light-emitting color connected with different columns of data lines, so that the sub-pixel units cannot macroscopically display poor vertical stripes.
Additional aspects and advantages of the present application will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the present application.
Drawings
The foregoing and/or additional aspects and advantages of the present application will become apparent and readily appreciated from the following description of the embodiments, taken in conjunction with the accompanying drawings of which:
fig. 1 is a schematic structural diagram of an array substrate according to the related patent;
FIG. 2a is a schematic diagram showing the polarities corresponding to the sub-pixel units when the display panel is turned over by 1+2 dots;
FIG. 2b is a schematic diagram showing the polarity of each sub-pixel unit when the display panel is turned over by 2 dots;
FIG. 3 is a schematic structural diagram of a display panel of the related patent undergoing a point flip of 1+ 2;
fig. 4 is a schematic structural diagram of a display panel of the related patent when 2-dot inversion occurs;
fig. 5 is a schematic structural diagram of an array substrate according to an embodiment of the present disclosure;
FIG. 6 is a schematic structural diagram of the array substrate turned by 1+2 dots according to the embodiment of the present application;
fig. 7 is a schematic structural diagram of the array substrate provided in the embodiment of the present application when 2-point inversion occurs.
Description of the reference numerals:
11-red subpixel unit; 12-green sub-pixel cell; 13-blue sub-pixel unit; 14-touch control lead.
Detailed Description
Embodiments of the present application are described below in conjunction with the drawings in the present application. It should be understood that the embodiments set forth below in connection with the drawings are exemplary descriptions for explaining technical solutions of the embodiments of the present application, and do not limit the technical solutions of the embodiments of the present application.
As used herein, the singular forms "a", "an", "the" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and/or "comprising," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of other features, information, data, steps, operations, elements, components, and/or groups thereof that are already known in the art. The term "and/or" as used herein means at least one of the items defined by the term, e.g., "a and/or B" may be implemented as "a", or as "B", or as "a and B".
As shown in fig. 1, the conventional dual-gate pixel design is that odd-numbered gate lines (e.g., G1, G3, G5, etc.) control odd-numbered columns of sub-pixels, even-numbered gate lines (e.g., G2, G4, G6, etc.) control even-numbered columns of sub-pixels, that is, in the same row of sub-pixels, each R (red) sub-pixel (red sub-pixel unit 11) is connected to a different gate line, each G (green) sub-pixel (green sub-pixel unit 12) is connected to a different gate line, and each B (blue) sub-pixel (blue sub-pixel unit 13) is connected to a different gate line. In the display panel with the double-gate design, when the display panel is matched with 1+2 point inversion (shown in figure 2 a) or 2 point inversion (shown in figure 2 b) and other inversion modes, the single-color or color-mixed picture has the condition that the charging amplitudes (Margin) of the sub-pixels in odd columns and the sub-pixels in even columns are different due to the inversion difference of the pre-charging polarities of the adjacent sub-pixels on one data line, and the vertical stripes of the display panel occur due to the fact that the starting voltage (Ion) of the thin film transistor is reduced by 60% at low temperature (-20 ℃), the dielectric constant of the liquid crystal is increased by 30%, and the charging rate is reduced.
Specifically, as shown in fig. 1, fig. 2a, fig. 2B and fig. 3, the display panel is turned over by 1+2 dots, the turn-on sequence of the gate lines G1, G2, G3, etc. is turned on line by line during the display of the screen, and in the TN (Twist Nematic liquid crystal) display mode, when the first column data line S1 is turned on to display the monochrome screen red (R), the G sub-pixel and the B sub-pixel are not bright, that is, the G sub-pixel and the B sub-pixel are in the L0 gray scale, and the R sub-pixel is in the L127 gray scale; the first row and first column R sub-pixels are started by the first row gate line G1, the second row and first column R sub-pixels are started by the third row gate line G3, the third row and first column R sub-pixels are started by the fifth row gate line G5, the polarity of the first column data line S1 is reversed to be +/-and when the second row and first column R sub-pixels are bright, the polarity of the second row and first column R sub-pixels is reversed to be from-to-i.e. the charging of the R sub-pixels started by the third row gate line G3 is changed from the negative polarity-L0 of the G sub-pixels controlled by the second row gate line G2 to the negative polarity-L127 of the R sub-pixels, the voltage difference is small, the charging of the pixels is relatively sufficient, and the pixels are dark.
With continued reference to fig. 1, 2a, 2B and 3, when the second row data line S2 is turned on, the first row and fourth column R sub-pixels are turned on by the second row gate line G2, the second row and fourth column R sub-pixels are turned on by the fourth row gate line G4, the third row and fourth column R sub-pixels are turned on by the sixth row gate line G6, the polarity of the second row data line S2 is reversed to- + - -, when the second row and fourth column R sub-pixels are turned on, the polarity of the second column data line S2 is reversed from + to-, that is, the charging of the R sub-pixel turned on by the fourth row gate line G4 is changed from the positive polarity of the B sub-pixel controlled by the third row gate line G3 + L0 to the negative polarity of the R sub-pixel-L127, the voltage difference is large, the charging of the pixel is relatively insufficient, and the pixel is turned on; for the seventh column of R sub-pixels, there is also a case where the pixels are dark.
When the display mode of the display panel is Advanced Super Dimension Switch (ADS), similar to the TN mode of the display panel, the brightness of the pixels is also different, and details are not repeated here.
In addition, as shown in fig. 4, the display panel is turned over by 2 dots, during the display of the image, the gate lines G1, G2, G3, etc. are turned on line by line, and in the TN display mode, when the first row of data lines S1 is turned on and a monochrome image red (R) is displayed, the G sub-pixel and the B sub-pixel are not bright, that is, the G sub-pixel and the B sub-pixel are in the L0 gray scale, and the R sub-pixel is in the L127 gray scale; the first row and first column R sub-pixels are opened by the first row gate line G1, the second row and first column R sub-pixels are opened by the third row gate line G3, the third row and first column R sub-pixels are opened by the fifth row gate line G5, the polarity of the first column data line S1 is reversed to be +++ - ++, when the second row and first column R sub-pixels are bright, the polarity of the second row and first column R sub-pixels is reversed from + to-namely the charging of the R sub-pixels opened by the third row gate line G3 is changed from the positive polarity + L0 of the G sub-pixels controlled by the second row gate line G2 to the negative polarity-L127 of the R sub-pixels, the voltage difference is large, the charging of the pixels is relatively insufficient, and the pixels are bright.
As shown in fig. 4, when the second row data line S2 is turned on, the first row and the fourth column of R sub-pixels are turned on by the second row gate line G2, the second row and the fourth column of R sub-pixels are turned on by the fourth row gate line G4, the third row and the fourth column of R sub-pixels are turned on by the sixth row gate line G6, the polarity of the second column data line S2 is inverted to be + or + when the second row and the fourth column of R sub-pixels are bright, the polarity inversion of the second column data line S2 is from + to + i, that is, the charging of the R sub-pixels turned on by the fourth row gate line G4 is changed from the positive polarity + L0 of the B sub-pixels controlled by the third row gate line G3 to the positive polarity + L127 of the R sub-pixels, the voltage difference is small, the charging of the pixels is relatively sufficient, and the pixels are dark.
According to the above description, no matter the display panel adopts a 1+2 dot inversion mode or a 2 dot inversion mode, because there is a difference between brightness of the R subpixel connected to the first row of data lines S1 and brightness of the R subpixel connected to the second row of data lines S2, the display panel macroscopically displays a vertical stripe defect; similarly, the vertical streak failure occurs in the G single color picture and the B single color picture.
In order to solve the technical problem that vertical stripes appear on a picture in the prior art, the embodiment of the application provides a novel design mode of an array substrate.
The array substrate provided by the embodiments of the present application is described in detail below with reference to the accompanying drawings.
The embodiment of the application provides an array substrate, includes: the display device comprises a plurality of data lines, a plurality of gate lines and a plurality of sub-pixel units, wherein two sides of each row of sub-pixel units are respectively provided with one gate line, and the plurality of sub-pixel units comprise sub-pixel units with a plurality of light-emitting colors; in any row of sub-pixel units, the sub-pixel units of the first light-emitting color are connected with the first gate line, and the sub-pixel units of the second light-emitting color are connected with the second gate line; the first gate line and the second gate line are located on two sides of the row of sub-pixel units.
Specifically, the array substrate in the embodiment of the present application is designed in a dual-gate manner, and may use one data line to drive two rows of sub-pixel units, where the specific arrangement manner of the data line and the gate line is the same as that in the prior art, specifically, as shown in fig. 1, two sides of each row of sub-pixel units are respectively provided with one gate line, for example: a first gate line G1 and a second gate line G2 are respectively disposed on two sides of the first row of sub-pixel units, and a third gate line G3 and a fourth gate line G4 are respectively disposed on two sides of the second row of sub-pixel units.
When the array substrate provided by the embodiment of the application is turned over by using the 1+2 dot turning manner or the 2 dot turning manner, in any row of sub-pixel units, the sub-pixel units of the first light-emitting color are connected to the first gate line, and the sub-pixel units of the second light-emitting color are connected to the second gate line; the design mode has no brightness difference in light emission of the sub-pixel units of the first light-emitting color connected with the data lines in different rows, and has no brightness difference in light emission of the sub-pixel units of the second light-emitting color connected with the data lines in different rows, so that the sub-pixel units cannot be macroscopically displayed as poor vertical stripes.
When the array substrate provided in the embodiment of the present application is turned over by 1+2 dot or by 2 dot, the specific reason why the light emission of the sub-pixel units of the first light emission color connected to the data lines in different rows does not have a brightness difference and the light emission of the sub-pixel units of the second light emission color connected to the data lines in different rows does not have a brightness difference will be described in detail later with reference to the drawings.
In a specific embodiment, as shown in fig. 5, the plurality of sub-pixel units of the embodiment of the present application includes a plurality of red sub-pixel units 11, a plurality of green sub-pixel units 12, and a plurality of blue sub-pixel units 13; in any row of sub-pixel units, the red sub-pixel unit 11 is connected with the first gate line, and the green sub-pixel unit 12 is connected with the second gate line; the blue sub-pixel unit 13 alternately connects the first gate line and the second gate line.
It should be noted that, in the embodiment of the present application, the first gate line refers to a gate line located above a row of sub-pixel units and connected to a part of the sub-pixel units in the row of sub-pixel units, and the second gate line refers to a gate line located below the row of sub-pixel units and connected to the rest of the sub-pixel units in the row of sub-pixel units, for example: for the first row of sub-pixel units, the first gate line refers to the first gate line G1, the second gate line refers to the second gate line G2, and for the second row of sub-pixel units, the first gate line refers to the third gate line G3, and the second gate line refers to the fourth gate line G4.
In practical design, not limited to the above design, for any row of sub-pixel units, the green sub-pixel units 12 may be connected to the first gate line, and the blue sub-pixel units 13 may be connected to the second gate line; the red subpixel unit 13 is alternately connected to the first gate line and the second gate line.
Specifically, in the first row of sub-pixel units, the red sub-pixel units 11 are connected to the first gate line G1, the green sub-pixel units 12 are connected to the second gate line G2, and the blue sub-pixel units 13 are alternately connected to the second gate line G2 and the first gate line G1; in the second row of sub-pixel units, the red sub-pixel units 11 are all connected to the third gate line G3, the green sub-pixel units 12 are all connected to the fourth gate line G4, the blue sub-pixel units 13 are alternately connected to the fourth gate line G4 and the third gate line G3, and the connection manners of the red sub-pixel units 11, the green sub-pixel units 12 and the blue sub-pixel units 13 in other rows are similar and will not be described herein again.
Specifically, as shown in fig. 5, in the embodiment of the present application, in any row of sub-pixel units, the sub-pixel units in red, the sub-pixel units in green, and the sub-pixel units in blue are arranged in a cyclic manner; in any column of sub-pixel units, the emission colors of the sub-pixel units are the same. For example: each row of sub-pixel units comprises a red sub-pixel unit 11, a green sub-pixel unit 12, a blue sub-pixel unit 13, a red sub-pixel unit 11, a green sub-pixel unit 12, a blue sub-pixel unit 13 and the like which are arranged in sequence, and the sub-pixel units in the row are repeatedly arranged according to the arrangement mode of the red sub-pixel unit 11, the green sub-pixel unit 12 and the blue sub-pixel unit 13.
In an alternative embodiment, as shown in fig. 5, in any row of sub-pixel units, a plurality of pixel unit groups are included, and each pixel unit group includes a red sub-pixel unit 11, a green sub-pixel unit 12, a blue sub-pixel unit 13, a red sub-pixel unit 11, a green sub-pixel unit 12, and a blue sub-pixel unit 13, which are sequentially arranged; each pixel unit group is correspondingly connected with the first gate line and the second gate line and correspondingly connected with three sequentially arranged data lines; specifically, in any row of sub-pixel units, only two pixel unit groups are shown in fig. 5, each pixel unit group includes two red sub-pixel units 11, two green sub-pixel units 12, and two blue sub-pixel units 13, the two red sub-pixel units 11 are connected to the same gate line and are connected to different data lines, the two green sub-pixel units 12 are connected to the same gate line and are connected to different data lines, and the two blue sub-pixel units 13 are connected to different gate lines and are connected to different data lines.
Specifically, in any pixel unit group in the embodiment of the present application, the first red subpixel unit 11 and the second red subpixel unit 11 are both connected to the first gate line, the first red subpixel unit 11 is connected to the first data line, and the second red subpixel unit 11 is connected to the second data line; the first green sub-pixel unit 12 and the second green sub-pixel unit 12 are both connected to a second gate line, the first green sub-pixel unit 12 is connected to a first data line, and the second green sub-pixel unit 12 is connected to a third data line; the first blue sub-pixel unit 13 is connected to the second gate line, the second blue sub-pixel unit 13 is connected to the first gate line, the first blue sub-pixel unit 13 is connected to the second data line, and the second blue sub-pixel unit 13 is connected to the third data line.
For example: in a first pixel cell group (i.e., the pixel cell group at the upper left corner in the figure) included in the first row of sub-pixel units, a first red sub-pixel unit 11 and a second red sub-pixel unit 11 are both connected to the first gate line G1, the first red sub-pixel unit 11 is connected to the first data line S1, and the second red sub-pixel unit 11 is connected to the second data line S2; the first green sub-pixel unit 12 and the second green sub-pixel unit 12 are both connected to the second gate line G2, the first green sub-pixel unit 12 is connected to the first data line S1, and the second green sub-pixel unit 12 is connected to the third data line S3; the first blue sub-pixel unit 13 is connected to the second gate line G2, the second blue sub-pixel unit 13 is connected to the first gate line G1, the first blue sub-pixel unit 13 is connected to the second data line S2, and the second blue sub-pixel unit 13 is connected to the third data line S3.
Specifically, as shown in fig. 6, the display panel is turned over by 1+2 dots, during the display of the image, the gate lines G1, G2, G3, etc. are turned on line by line, and in the TN display mode, when the first row of data lines S1 is turned on to display the monochrome image red (R), the G and B sub-pixels are not bright, that is, the G and B sub-pixels are in the L0 gray scale, and the R sub-pixel is in the L127 gray scale; when the R sub-pixels in the first row and the first column are started by the first row gate line G1, the R sub-pixels in the second row and the first column are started by the third row gate line G3, the R sub-pixels in the third row and the first column are started by the fifth row gate line G5, the polarity of the data line S1 in the first column is reversed to be +/-and when the R sub-pixels in the second row and the first column are bright, the polarity reversal of the R sub-pixels in the second row and the first column is from-to-, that is, the charging of the R sub-pixels started by the third row gate line G3 is changed from the negative polarity-L0 of the G sub-pixels controlled by the second row gate line G2 to the negative polarity-L127 of the R sub-pixels, the pressure difference is small, the charging of the pixels is relatively sufficient, and the pixels are dark.
As shown in fig. 6, when the second row data line S2 is turned on, the first row and the fourth row R sub-pixels are turned on by the first row gate line G1, the second row and the fourth row R sub-pixels are turned on by the third row gate line G3, the third row and the fourth row R sub-pixels are turned on by the fifth row gate line G5, the polarity of the second row data line S2 is inverted to "+", when the second row and the fourth row R sub-pixels are bright, the polarity inversion of the second row data line S2 is from "to", that is, the charging of the R sub-pixels turned on by the third row gate line G3 is changed from the negative polarity-L0 of the B sub-pixels controlled by the second row gate line G2 to the negative polarity-L127 of the R sub-pixels, the voltage difference is small, the charging of the pixels is relatively sufficient, and the pixels are dark.
Therefore, when the display panel is turned over by 1+2 dots, the light emission of the R subpixel connected to the first row of data lines S1 and the light emission of the R subpixel connected to the second row of data lines S2 do not have a difference in brightness (and are simultaneously dark), so that the display panel does not macroscopically display a vertical stripe defect; similarly, the G monochrome picture can not generate vertical stripe defect.
Further, as shown in fig. 7, the display panel is turned over by 2 dots, during the display of the image, the gate lines G1, G2, G3, etc. are turned on line by line, and in the TN display mode, when the first row of data lines S1 is turned on and the monochrome image red (R) is displayed, the G sub-pixel and the B sub-pixel are not bright, that is, the G sub-pixel and the B sub-pixel are in the L0 gray scale, and the R sub-pixel is in the L127 gray scale; when the R sub-pixels in the first row and the first column are opened by the first row gate line G1, the R sub-pixels in the second row and the first column are opened by the third row gate line G3, the R sub-pixels in the third row and the first column are opened by the fifth row gate line G5, the polarity of the data line S1 in the first column is inverted to be +++ - +++, when the R sub-pixels in the second row and the first column are bright, the polarity inversion of the R sub-pixels in the second row and the first column is from + to-, namely the charging of the R sub-pixels opened by the third row gate line G3 is changed from the positive polarity + L0 of the G sub-pixels controlled by the second row gate line G2 to the negative polarity-L127 of the R sub-pixels, the voltage difference is large, the charging of the pixels is relatively insufficient, and the pixels are bright.
As shown in fig. 7, when the second row data line S2 is turned on, the first row and the fourth row of R sub-pixels are turned on by the first row gate line G1, the second row and the fourth row of R sub-pixels are turned on by the third row gate line G3, the third row and the fourth row of R sub-pixels are turned on by the fifth row gate line G5, the polarity of the second row data line S2 is reversed to — + -, when the second row and the fourth row of R sub-pixels are bright, the polarity of the second row data line S2 is reversed from-to +, that is, the charging of the R sub-pixel turned on by the third row gate line G3 is changed from the negative polarity-L0 of the B sub-pixel controlled by the second row gate line G2 to the positive polarity + L127 of the R sub-pixel, the voltage difference is large, the charging of the pixel is relatively insufficient, and the pixel is bright.
Therefore, when the display panel is turned over by 2-point turning, the R sub-pixels connected to the first row of data lines S1 and the R sub-pixels connected to the second row of data lines S2 emit light without a difference in brightness (simultaneously emit light), and thus do not macroscopically display a vertical stripe defect; similarly, the G monochrome picture does not have the stripe defect. Under the condition that the existing process and specification design are not changed, the pixel structure design method provided by the embodiment of the application can solve the problem that vertical stripes appear on a picture under the low-temperature condition of a conventional double-gate pixel structure.
In addition, the applicant finds through experiments that the array substrate provided by the embodiment of the application does not have poor vertical stripes no matter the array substrate adopts a 1+ 2-point overturning mode or a 2-point overturning mode, and further confirms the feasibility of the design mode of the embodiment of the application.
In a specific embodiment, the array substrate provided in the embodiment of the present application further includes a GOA circuit, where the GOA circuit is located on two sides of the display area of the array substrate; each gate line is connected with the GOA circuit. The specific arrangement of the GOA circuit, i.e., the Gate Driver On Glass (GOA) or the Array substrate row Driver circuit (GOA), is similar to the prior art and is not described herein again.
In an embodiment, as shown in fig. 6 and 7, the array substrate provided in the embodiment of the present application further includes a plurality of touch leads 14, the touch leads 14 are disposed between two adjacent data lines, and the distances between the touch leads 14 and the adjacent data lines of the touch leads are equal; for example: the distance between the first touch lead 14 and the first data line S1 is a first distance, the distance between the first touch lead 14 and the second data line S2 is a second distance, and the value of the first distance is equal to the value of the second distance.
Specifically, the touch lead and the data line are arranged on the same layer in the embodiment of the application, so that the touch lead and the data line can be manufactured simultaneously through one-time composition process, the production cost can be reduced, the process time can be saved, and the competitiveness of a product can be improved. The array substrate provided by the embodiment of the application comprises the touch lead, so that the array substrate has a touch function, and the requirements of customers are better met.
Based on the same inventive concept, embodiments of the present application provide a display panel, which includes the array substrate. Since the display panel includes the array substrate, the display panel has the same beneficial effects as the array substrate, and the description thereof is omitted here.
Based on the same inventive concept, embodiments of the present application provide a display device, which includes the display panel described above. Since the display device includes the display panel, the display device has the same advantages as the display panel, and the description thereof is omitted here.
In summary, the application of the embodiment of the present application can at least achieve the following beneficial effects:
when the array substrate provided by the embodiment of the application adopts a 1+2 dot inversion mode or a 2 dot inversion mode, in any row of sub-pixel units, the sub-pixel units of the first light-emitting color are connected with the first gate line, and the sub-pixel units of the second light-emitting color are connected with the second gate line; the design mode has no brightness difference in light emission of the sub-pixel units of the first light-emitting color connected with the data lines in different rows, and has no brightness difference in light emission of the sub-pixel units of the second light-emitting color connected with the data lines in different rows, so that the sub-pixel units cannot be macroscopically displayed as poor vertical stripes.
Those of skill in the art will appreciate that the various operations, methods, steps in the processes, acts, or solutions discussed in this application can be interchanged, modified, combined, or eliminated. Further, various operations, methods, steps, measures, schemes in the various processes, methods, procedures that have been discussed in this application may be alternated, modified, rearranged, decomposed, combined, or eliminated. Further, steps, measures, schemes in the prior art having various operations, methods, procedures disclosed in the present application may also be alternated, modified, rearranged, decomposed, combined, or deleted.
In the description of the present application, the directions or positional relationships indicated by the words "center", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", and the like are for convenience of description or simplicity of describing the embodiments of the present application based on the exemplary directions or positional relationships shown in the drawings, and do not indicate or imply that the devices or components referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore, are not to be construed as limiting the present application.
The terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the present application, "a plurality" means two or more unless otherwise specified.
In the description of the present application, it should be noted that, unless otherwise explicitly stated or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, and may be, for example, a fixed connection, a detachable connection, or an integral connection; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meaning of the above terms in the present application can be understood in a specific case by those of ordinary skill in the art.
In the description herein, particular features, structures, materials, or characteristics may be combined in any suitable manner in any one or more embodiments or examples.
The foregoing is only a part of the embodiments of the present application, and it should be noted that it is within the scope of the embodiments of the present application that other similar implementation means based on the technical idea of the present application can be adopted by those skilled in the art without departing from the technical idea of the present application.
Claims (10)
1. An array substrate, comprising: the display device comprises a plurality of data lines, a plurality of gate lines and a plurality of sub-pixel units, wherein one gate line is arranged on each row of two sides of each sub-pixel unit respectively;
in any row of the sub-pixel units, the sub-pixel units of the first light-emitting color are connected with the first gate line, and the sub-pixel units of the second light-emitting color are connected with the second gate line;
the first gate line and the second gate line are located on two sides of the row of sub-pixel units.
2. The array substrate of claim 1, wherein the plurality of sub-pixel units comprises a plurality of red sub-pixel units, a plurality of green sub-pixel units, and a plurality of blue sub-pixel units;
in any row of the sub-pixel units, the red sub-pixel units are connected with the first gate line, and the green sub-pixel units are connected with the second gate line;
the blue sub-pixel unit is alternately connected with the first gate line and the second gate line.
3. The array substrate of claim 2, wherein the red, green and blue sub-pixel units are arranged in a cyclic manner in any row of the sub-pixel units;
in any column of the sub-pixel units, the light emitting colors of the sub-pixel units are the same.
4. The array substrate according to claim 3, wherein a plurality of pixel unit groups are included in any row of the sub-pixel units, each pixel unit group comprising the red sub-pixel unit, the green sub-pixel unit, the blue sub-pixel unit, the red sub-pixel unit, the green sub-pixel unit and the blue sub-pixel unit which are sequentially arranged;
each pixel unit group is correspondingly connected with the first gate line and the second gate line, and correspondingly connected with three sequentially arranged data lines.
5. The array substrate of claim 4, wherein in the pixel unit group, a first red sub-pixel unit and a second red sub-pixel unit are connected to the first gate line, the first red sub-pixel unit is connected to a first data line, and the second red sub-pixel unit is connected to a second data line;
the first green sub-pixel unit and the second green sub-pixel unit are both connected with the second gate line, the first green sub-pixel unit is connected with the first data line, and the second green sub-pixel unit is connected with the third data line;
the first blue sub-pixel unit is connected with the second grid line, the second blue sub-pixel unit is connected with the first grid line, the first blue sub-pixel unit is connected with the second data line, and the second blue sub-pixel unit is connected with the third data line.
6. The array substrate of claim 1, further comprising GOA circuits on two sides of the display area of the array substrate;
each gate line is connected with the GOA circuit.
7. The array substrate of any one of claims 1 to 5, further comprising a plurality of touch leads, wherein the touch leads are disposed between two adjacent data lines, and the touch leads are spaced from the adjacent data lines by the same distance.
8. The array substrate of claim 7, wherein the touch lead and the data line are disposed on the same layer.
9. A display panel comprising the array substrate according to any one of claims 1 to 8.
10. A display device characterized by comprising the display panel according to claim 9.
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