CN115173994A

CN115173994A - PBCH receiving method, apparatus, device, storage medium, and program product

Info

Publication number: CN115173994A
Application number: CN202210757204.4A
Authority: CN
Inventors: 柳敦
Original assignee: Zeku Technology Beijing Corp Ltd
Current assignee: Zeku Technology Beijing Corp Ltd
Priority date: 2022-06-29
Filing date: 2022-06-29
Publication date: 2022-10-11
Anticipated expiration: 2042-06-29
Also published as: CN115173994B

Abstract

The embodiment of the application discloses a PBCH receiving method, a PBCH receiving device, PBCH receiving equipment, a PBCH storage medium and a PBCH program product, and belongs to the technical field of wireless communication. The method comprises the following steps: receiving a first PBCH signal according to a first period in a round of PBCH detection process; the length of the first period is 1/N of 20 milliseconds, and N is an integer greater than or equal to 2; and under the condition that the first PBCH signal is the PBCH signal received at the ith time in the process of the PBCH detection of the current round and i is not an integral multiple of N, decoding the first PBCH signal by using a decoding strategy when the sending period of the PBCH signal is the first period, otherwise, decoding the first PBCH signal by using the decoding strategy when the sending period of the PBCH signal is 20ms.

Description

PBCH receiving method, apparatus, device, storage medium, and program product

Technical Field

The present invention relates to the field of wireless communications technologies, and in particular, to a PBCH receiving method, apparatus, device, storage medium, and program product.

Background

In a cellular wireless communication system, during a process of accessing a network, a terminal device needs to analyze a Physical Broadcast Channel (PBCH) signal sent by a network side.

In the related art, during the process of receiving the PBCH signal, the terminal device may fail to resolve the PBCH signal due to interference or noise, and in this case, the terminal device needs to re-receive and resolve the PBCH signal.

Disclosure of Invention

The embodiment of the application provides a PBCH receiving method, a PBCH receiving device, PBCH receiving equipment, a PBCH storage medium and a PBCH program product. The technical scheme comprises the following steps:

in one aspect, an embodiment of the present application provides a PBCH receiving method, where the method is performed by a terminal device, and the method includes:

receiving a first PBCH signal according to a first period in a round of PBCH detection process; the length of the first period is 1/N of 20 milliseconds, and N is an integer greater than or equal to 2;

when the first PBCH signal is the PBCH signal received at the ith time in the process of the PBCH detection of the current round and i is not an integral multiple of N, decoding the first PBCH signal by using a decoding strategy when the sending period of the PBCH signal is the first period;

and under the condition that the first PBCH signal is the PBCH signal received at the ith time in the process of the PBCH detection of the current round and i is an integral multiple of N, decoding the first PBCH signal by using a decoding strategy when the sending period of the PBCH signal is 20ms.

In one aspect, an embodiment of the present application provides a PBCH receiving apparatus, where the apparatus includes:

the device comprises a signal receiving module, a first PBCH detecting module and a second PBCH detecting module, wherein the signal receiving module is used for receiving a first PBCH signal according to a first period in a round of PBCH detection process; the length of the first period is 1/N of 20 milliseconds, and N is an integer greater than or equal to 2;

a decoding module, configured to decode the first PBCH signal according to a decoding strategy when a sending period of the PBCH signal is the first period when the first PBCH signal is the PBCH signal received the ith time in the PBCH detection process of the current round and i is not an integer multiple of N;

the decoding module is further configured to decode the first PBCH signal according to a decoding strategy when a transmission cycle of the PBCH signal is 20ms when the first PBCH signal is the PBCH signal received i-th time in the PBCH detection process of this round and i is an integer multiple of N.

In another aspect, an embodiment of the present application provides a processing chip, where the processing chip is configured to execute the PBCH receiving method as described above.

On the other hand, an embodiment of the present application provides a processing chip, where the PBCH receiving apparatus is disposed in the processing chip.

In another aspect, an embodiment of the present application provides a computer device, where the computer device includes a processor and a memory, and the processor and the memory are connected through a bus; the processor executes computer instructions stored in the memory to cause the computer device to implement the PBCH reception method as described above.

In another aspect, an embodiment of the present application further provides a computer-readable storage medium, where computer instructions are stored in the storage medium, and the computer instructions are used for being executed by a processor, so as to implement the PBCH receiving method.

In yet another aspect, the present application provides a computer program product comprising computer instructions stored in a computer readable storage medium. The computer program product is used for realizing the PBCH receiving method.

In yet another aspect, the present application provides a computer program to be executed by a processor of a computer device to implement the PBCH receiving method described above.

The technical scheme provided by the embodiment of the application at least comprises the following beneficial effects:

the terminal equipment can receive the PBCH signals according to a first period of 20 milliseconds 1/N, correspondingly, when the soft combination of the PBCH signals is carried out, the PBCH signals are received for the ith time in the current round of PBCH detection process, and under the condition that i is not an integral multiple of N, the sending period of the PBCH signals is taken as a decoding strategy when the first period, the first PBCH signals received this time are decoded, otherwise, the first PBCH signals received this time are decoded by the decoding strategy when the sending period of the PBCH signals is taken as 20 ms; by the scheme, under the condition that the system supports the PBCH period less than 20 milliseconds, the PBCH signal decoding can be rapidly carried out without waiting for 20 milliseconds after the PBCH analysis of the terminal equipment fails every time, so that the PBCH receiving efficiency of the terminal is improved.

Drawings

Fig. 1 is a schematic diagram of a network architecture of a communication system provided in an exemplary embodiment of the present application;

FIG. 2 is a schematic diagram of time domain and frequency domain resources to which the present application relates;

fig. 3 and 4 are schematic diagrams illustrating a procedure of transmitting end processing of PBCH according to the present application;

FIG. 5 is an exploded view of the transmission process to which the present application relates;

figure 6 shows a flow diagram of PBCH soft combining referred to herein;

fig. 7 is a flowchart illustrating a PBCH receiving method according to an exemplary embodiment of the present application;

fig. 8 shows a flow chart of a PBCH receiving method provided in an exemplary embodiment of the present application;

figure 9 is a flow chart of PBCH reception in relation to the embodiment shown in figure 8;

fig. 10 is a schematic structural diagram of a PBCH receiving apparatus according to an exemplary embodiment of the present application;

fig. 11 is a schematic structural diagram of a computer device according to an exemplary embodiment of the present application.

Detailed Description

To make the objects, technical solutions and advantages of the present application more clear, embodiments of the present application will be described in further detail below with reference to the accompanying drawings.

Reference herein to "a plurality" means two or more. "and/or" describes the association relationship of the associated object, indicating that there may be three relationships, for example, a and/or B, which may indicate: a exists alone, A and B exist simultaneously, and B exists alone. The character "/" generally indicates that the former and latter associated objects are in an "or" relationship.

It should be understood that "indication" mentioned in the embodiments of the present application may be a direct indication, an indirect indication, or an indication of an association relationship. For example, a indicates B, which may indicate that a directly indicates B, e.g., B may be obtained by a; it may also mean that a indicates B indirectly, e.g. a indicates C, by which B may be obtained; it can also be shown that there is an association between a and B.

In the description of the embodiments of the present application, the term "correspond" may indicate that there is a direct correspondence or an indirect correspondence between the two, may also indicate that there is an association between the two, and may also indicate and is indicated, configure and is configured, and the like.

In the embodiment of the present application, "predefining" may be implemented by saving a corresponding code, table, or other manners that may be used to indicate related information in advance in a device (for example, including a terminal device and a network device), and the present application is not limited to a specific implementation manner thereof. Such as predefined, may refer to what is defined in the protocol.

Referring to fig. 1, a schematic diagram of a network architecture of a communication system according to an embodiment of the present application is shown. The network architecture may include: a user terminal 10 and a base station 20.

The number of the user terminals 10 is usually plural, and one or more user terminals 10 may be distributed in a cell managed by each base station 20. The User terminal 10 may include various handheld devices, vehicle-mounted devices, wearable devices, computing devices or other processing devices connected to a wireless modem having wireless communication functions, as well as various forms of User Equipment (UE), mobile Stations (MS), terminal Equipment (terminal device), and so on. For convenience of description, in the embodiments of the present application, the above-mentioned devices are collectively referred to as a terminal.

The base station 20 is a device deployed in an access network to provide wireless communication functions for the user terminal 10. The base station 20 may include various forms of satellite base stations, macro base stations, micro base stations, relay stations, access points, and the like. In systems using different Radio access technologies, names of devices having a base station function may be different, for example, in a 5G New Radio (NR) system, called a nodeb or a gNB. The name "base station" may change as communication technology evolves. For convenience of description, in the embodiment of the present application, the above-mentioned apparatuses providing the terminal 20 with the wireless communication function are collectively referred to as a base station.

Optionally, not shown in fig. 1, the network architecture further includes other network devices, such as: a Central Network Control (CNC), an Access and Mobility Management Function (AMF) device, a Session Management Function (SMF) or User Plane Function (UPF) device, and so on.

The "5G NR system" in the embodiment of the present disclosure may also be referred to as a 5G system or an NR system, but those skilled in the art can understand its meaning. The technical solution described in the embodiment of the present disclosure may be applicable to a 5G NR system, or may be applicable to a subsequent Evolution system of the 5G NR system, or may be applicable to a system before the 5G NR system, such as a Long Term Evolution (LTE) system.

The 5G NR system is a new generation of wireless communication system proposed based on user requirements for rate, delay, high-speed mobility, energy efficiency of wireless communication, and diversity and complexity of wireless communication services in future life. In a 5G network environment, in order to reduce air interface signaling, and quickly recover Radio connection and data service, a new Radio Resource Control (RRC) state, that is, an RRC INACTIVE state (RRC _ INACTIVE) state is defined, where the new Radio Resource Control (RRC) state is different from an RRC IDLE state (RRC _ IDLE) and an RRC connected state (RRC _ ACTIVE).

When a User Equipment (UE) accesses an NR network or switches between NR networks, first a Primary Synchronization Signal (PSS) and a Secondary Synchronization Signal (SSS) need to be searched to obtain a network cell ID (Identity ), and then the UE demodulates and decodes a cell broadcast channel (PBCH) to obtain time Synchronization of a Primary Information Block (MIB) and a System Frame Number (System Frame Number, SFN) carried in the PBCH. Searching, demodulating and decoding PSS, SSS, PBCH, are the first synchronization process to be done by a UE initially accessing the NR network.

In the NR network, PSS, SSS and PBCH are transmitted in a bundled Block, called SSB (Synchronization Signal and PBCH Block ) Signal, please refer to fig. 2, which shows a schematic diagram of time domain and frequency domain resources related to the present application. As shown in fig. 1, the PSS and SSS use pseudo-random sequences determined by cell ID, and the PBCH is composed of MIB information, which is then Polar-encoded, interleaved, rate-matched, scrambled, and QPSK (quadrature-Phase Shift keying) -modulated data.

Please refer to fig. 3 and fig. 4, which illustrate a diagram of a procedure of transmitting end processing of PBCH according to the present application. As shown in fig. 2, the payload generation phase (payload generation) generates a total of 32bits of NR PBCH payload. First-level scrambling (1 st-level scrambling) using cell ID and SFN _2:1 Generate scrambling codes, for 32-bit payload data, except SFN _2:1 Bits other than HF and SSB MSB (Most Significant Bit) are scrambled. Wherein the SFN _2:1 Bit2 and bit1 of the system Frame number SFN of 10 bits (indicated by bit9 to bit 0) in payload, and HF (Half Frame) is a bit indicating a Half Frame in payload, and the value of the bit is 0 or 1, which is used for indicating whether PBCH is transmitted in the first Half Frame or the second Half Frame.

The NR and LTE both use scrambling codes that vary with SFN, and different scrambling codes are applied to data of the whole PBCH TTI (Transmission Time Interval) at different Time periods, wherein the length of the NR PBCH TTI is 80ms, and the length of the LTE PBCH TTI is 40ms. But NR and LTE PBCH scrambling differ in that NR PBCH is scrambled before encoding and LTE PBCH is scrambled after encoding.

Another point of difference between NR and LTE PBCH transmissions is that: the LTE PBCH is fixedly transmitted every 10ms, and the SSB period of NR is configurable by the network and can be 5ms,10ms,20ms,40ms,80ms and 160ms.

If the UE fails to receive the PBCH decoding, the characteristic of SSB periodic transmission can be utilized to select the next period to receive the SSB again and perform proper soft combining so as to improve the PBCH decoding performance. Because the system frame numbers SFN corresponding to PBCH of different periods are different, different scrambling codes are used, and in the soft combining, the combining needs to be performed after considering the influence of respectively removing the corresponding scrambling code sequences.

In one aspect of the disclosure, when PBCH coding fails, the UE may save the current data and combine with the data of the next PBCH period. The principle of PBCH soft combining is as follows.

In the NR PBCH coding transmission shown in fig. 3 or fig. 4, the steps of scrambling, CRC (Cyclic Redundancy Check), interleaving, polar coding, and rate matching are all linear processes with parameter determination, and the generation of PBCH is practically equivalent to mod 2 addition of a two-part data process, please refer to fig. 5, which shows a decomposition diagram of the transmission process involved in the present application.

As shown in fig. 5, mod 2 sums of two equivalent portions of data, the upper half of which corresponds to payload portion and only reserves SFN _2:1 Other parts are all set to 0, using SFN _2:1 After scrambling code bits are generated, performing subsequent CRC, interleaving, polar coding and other similar steps; the lower half corresponds to the SFN of the original payload _2:1 Setting the two bits as 0, skipping the scrambling processing, and directly implementing the subsequent CRC, interleaving, polar coding and other similar steps. The purpose of this decomposition is: the lower half of the decomposition is the same for different PBCH data with 20ms interval, except for SFN on the left _2:1 And the data part is generated by processes of scrambling, CRC, interleaving, polar coding and the like. After the data of different parts are eliminated, the data of the common part can be subjected to soft combination so as to improve the signal-to-noise ratio and the possibility of successful decoding.

Let PBCH data received for the first time (time t) correspond to payload data generated on the network side as

Which comprises

(allowed values of 00,01,10, 11), and the other payload bits are

Namely have

The scrambling process can be expressed as:

wherein

To use

Generated scrambling bits, note due to SFN _2:1 It is not scrambled and therefore its corresponding position scrambling bit is 0. Where a represents a bit-by-bit xor.

At the current SFN _2:1 Data received at = n

Can be represented as follows, wherein

For interference and noise:

wherein G represents a linear process that is invariant to SFN variations, as determined by CRC, interleaving, polar coding, bit mapping, etc.

And the bit mapping result can be represented by +1/-1 at the transmitting end, and respectively represents the bit mapping result of logic 0 and logic 1.

Without loss of generality, two sets of logical bits are written as

And

after the same CRC, interleaving, polar coding and bit mapping, the data are respectively

And with

Note that the logical bit and mapping data relationship is 0<->+1，1<->1, multiplication of two sets of data, i.e.

Is equivalent to

If it is not

In the form of a payload logic bit,

in order to scramble the bits of the code,

performing linear operations such as CRC, interleaving, polar coding, bit mapping and the like represented by G after scrambling equivalent to payload; if it is not

Are scrambled logic bits and the scrambling bits used are

Then

Performing linear operation represented by G on the original payload after descrambling; if it is used

For logic bits already scrambled, but using scrambling bits other than

Then

After twice scrambling, the original payload is equivalent toThen, the linear operation represented by G was performed. If we use the received soft value data with positive and negative representation and the data representing +1/-1

The point-by-point multiplication is equivalent to retaining or changing the sign bit of the soft value data. Without loss of generality, use

This operation is referred to as the Z operation.

When is to

Decoding (equivalent to implementing G) ^-1 Change) was successful, can be selected from

Extracting to obtain

(unscrambled) and used to generate similarly scrambled data

Then obtaining the descrambled payload data

That is, at the receiving end, after decoding the CRC pass, a local scrambling sequence is generated to descramble and recover the originally transmitted sequence.

When caused by noise or interference

In case of decoding failure, the same scrambling and encoding process is done locally with a special payload to try to eliminate the effect of scrambling. Each payload contains a different SFN _2:1 The value (denoted as p) and the other bits are all 0's, i.e.

After scrambling, obtaining

Performing Z operations

From the foregoing, it can be seen that:

it is clear that when p = n, the effect of the scrambling code is cancelled, resulting in

And when p ≠ n, it is equivalent to superimposing the scrambling codes twice.

Of PBCH data corresponding to time t

00,01 or 10, time t after 20ms ^′ For t +20ms

(01, 10 or 11), otherwise, the PBCH payload remaining bits and time t are unchanged, i.e.:

similarly, the local portable deviceSame possible SFN _2:1 And the payload with the rest bits of 0 generates scrambling codes and executes Z operation to obtain different soft bit data. When attempted scrambling code assumes SFN _2:1 At a value of q = n +1,

comparing Eq7 and Eq 4, it can be seen that the signal portions are identical except for the noise term, so when the attempted scrambling code hypotheses match, i.e., { p = n, q = n +1}, and the PBCH data corresponding at time t corresponds thereto

At time t' of 00,01 or 10, the data at intervals of 20ms may be coherently combined to improve the signal-to-noise ratio and the decoding success probability. Specifically, the attempted merge pairs are:

merging data corresponding to p =00 at time t with data corresponding to q =01 at time t';

merging data corresponding to p =01 at time t with data corresponding to q =10 at time t';

data corresponding to p =10 at time t is merged with data corresponding to q =11 at time t'.

A combined pair satisfying { p = n, q = n +1} will result in an enhanced signal, whereas for other { p, q } hypothesized pairs, the soft value combining is an incoherent combining, the signal portion decays inversely and is more difficult to decode successfully. Note that when t corresponds to PBCH data

At 11, no suitable scrambling code assumption can be combined and matched after 20ms, since the high order bits of SFN also change at this time (but t 'can be combined with t "= t' +20ms data). Please refer to fig. 6, which shows a flow chart of PBCH soft combining involved in the present application.

The 3GPP specification 38.213 suggests that the UE assumes an SSB period of 20ms at initial access. That is, the UE also combines PBCH with 20ms as period when decoding PBCH without other SFN, since 20ms period can ensure undisturbed removalCode-influenced SFN _2:1 Besides, other payload parts are consistent, and PBCH received soft values in different time periods can be correlated and combined to enhance the signal-to-noise ratio.

In the NR specification, it is true that shorter SSB transmission periods are allowed, such as 10ms and 5ms. However, the SFN before and after the interval of 10ms is taken as an example ₀ Are different, and SFN ₀ The bits are to be scrambled, which results in the combining configuration and technique of the Eq 1-Eq 7 procedures of the previous section not being directly usable.

However, in the processes such as cell handover, power on and network camping, if the network configuration is already obtained (for example, in a handover scenario), or a denser period such as 10ms or 5ms is obtained according to the priori configuration conjecture of the surrounding cells, after the PBCH decoding is failed to be received for the first time, if the PBCH decoding still waits for 20ms combination, the handover or access delay will be brought, and if in a handover scenario, a larger delay may remain in a strongly interfered cell for a longer time of the end user, resulting in a poor user experience.

Referring to fig. 7, a flow chart of a PBCH receiving method according to an exemplary embodiment of the present application is shown. The method may be performed by a terminal device; wherein the terminal device may be the terminal device 10 in the system shown in fig. 1. The method may include the following steps.

Step 701, in a round of PBCH detection process, receiving a first PBCH signal according to a first cycle; the length of the first period is 1/N of 20 milliseconds, and N is an integer greater than or equal to 2.

In one possible implementation, the length of the first period is 5ms or 10ms.

Step 702, decoding the first PBCH signal by using a decoding strategy when a sending period of the PBCH signal is a first period, when the first PBCH signal is the PBCH signal received in the ith time in the current round of PBCH detection process and i is not an integer multiple of N.

In one possible implementation manner, with a coding strategy when the transmission period of the PBCH signal is the first period, the process of coding the first PBCH signal may be as follows:

generating each first scrambling code load according to the first period; the value of the other positions except the position corresponding to the first variable position in the first scrambling code load is 0; the first variable position comprises a position corresponding to a half frame indication bit, a system frame number bit0, a system frame number bit1 and a system frame number bit 2; and the value at the first variable position is an optional value in the case where the transmission period of the PBCH is the first period.

And respectively carrying out Z operation on each first scrambling code load and the first PBCH signal to obtain a first Z operation result of each first scrambling code load.

Respectively carrying out soft combination on the first Z operation result of each first scrambling code load and the corresponding operation result in each second Z operation result; obtaining each soft combining result; the second Z operation result is that the second scrambling code load and the second PBCH signal are subjected to Z operation; the second PBCH signal is a PBCH signal which is before the first PBCH signal and fails in resolution; the value of the second scrambling code load at the position other than the position corresponding to the second variable position is 0; the second variable position comprises a position corresponding to a system frame number bit1 and a system frame number bit 2; and the value at the second variable position is an optional value in the case where the transmission period of the PBCH is 20 milliseconds.

And decoding the first PBCH signal according to each soft combining result.

And 703, decoding the first PBCH signal by using a decoding strategy when the transmission period of the PBCH signal is 20ms under the condition that the first PBCH signal is the i-th PBCH signal received in the current round of PBCH detection process and i is an integer multiple of N.

In the embodiment of the present application, if i is an integer multiple of N, the soft combining and decoding of the first PBCH signal may be performed according to the scheme shown in fig. 6.

To sum up, in the scheme shown in the embodiment of the present application, the terminal device may perform PBCH signal reception according to a first cycle of 20ms 1/N, and correspondingly, when performing soft combining of PBCH signals, receive PBCH signals for the ith time in the current round of PBCH detection process, and when i is not an integer multiple of N, decode the currently received first PBCH signal by using a decoding strategy in which the sending cycle of PBCH signals is the first cycle, otherwise decode the currently received first PBCH signal by using a decoding strategy in which the sending cycle of PBCH signals is 20 ms; by the scheme, under the condition that the system supports the PBCH period less than 20 milliseconds, the terminal equipment can quickly decode the PBCH signal without waiting for 20 milliseconds after the PBCH analysis fails every time, so that the PBCH receiving efficiency of the terminal is improved.

Referring to fig. 8, a flow chart of a PBCH receiving method according to an exemplary embodiment of the present application is shown. The method may be performed by a terminal device; wherein the terminal device may be the terminal device 10 in the system shown in fig. 1. The method may include the following steps.

Step 801, in a round of PBCH detection process, receiving a first PBCH signal according to a first cycle; the length of the first period is 1/N of 20 milliseconds, and N is an integer greater than or equal to 2.

In the embodiment of the application, the terminal device may determine or predict the PBCH transmission period of the currently accessed/to-be-accessed cell. When the PBCH period is determined or predicted to be the first period less than 20ms (specifically 1/N of the 20ms period, such as 10ms or 5 ms), the steps in the embodiment of the present application may be performed.

In the embodiment of the present application, if the terminal device has previously accessed the network, the PBCH period of the current access cell may be determined or predicted. For example, when cell handover occurs, configuration information of a new target cell (i.e., a cell currently accessed/to be accessed) is sent to the UE through the source cell, and at this time, the UE may determine a sending period of the PBCH according to the configuration information of the currently accessed cell.

Or when the cell is reestablished and the PBCH needs to be received again, the terminal device already stores the configuration information of the current access/cell to be accessed, and at this time, the PBCH period of the current access/cell to be accessed may be determined.

Or, the terminal device may predict the PBCH transmission period of the currently accessed/to-be-accessed cell according to the PBCH transmission periods of one or more cells accessed before the current time. For example, the terminal device may obtain an average value of PBCH transmission periods of one or more previously accessed cells, and use a possible PBCH transmission period with the closest average value as the transmission period of the PBCH of the currently accessed/to-be-accessed cell.

For example, if the transmission periods of PBCHs of several previously accessed cells are all 10ms periods, the terminal device may predict that the transmission period of the PBCH of the currently accessed/to-be-accessed cell is also 10ms.

In this embodiment, the first PBCH signal is a PBCH signal that is received again after a received PBCH signal has failed to be resolved in a round of PBCH reception.

Step 802, generating each first scrambling code load according to a first period when the first PBCH signal is the PBCH signal received in the ith time in the PBCH detection process of the current round and i is not an integer multiple of N; the value of the first scrambling code load at the position other than the position corresponding to the first variable position is 0; the first variable position comprises positions corresponding to a half frame indication bit, a system frame number bit0, a system frame number bit1 and a system frame number bit 2; and the value at the first variable position is an optional value in the case where the transmission period of the PBCH is the first period.

In the embodiment of the present application, the first period may be 5ms or 10ms.

In the embodiment of the present application, taking the first period as 10ms as an example, the values of the corresponding field indication bit and the system frame number bit0 at the first variable position are 0 and 1, respectively. The value of the position corresponding to the system frame number bit1 and the system frame number bit2 is 00, 10 or 11.

In this embodiment, when the first period is 10ms, the first scrambling code load is a 32-bit sequence in which, except the first variable position, there are 3 combinations of values at positions corresponding to the sfn bit1 and the sfn bit2, and values at other positions are 0. That is, in the embodiment of the present application, when the first period is 10ms, there are 3 possible cases of the first scrambling code payload.

That is, in the first scrambling code load, the values of the system frame number bit0 are 0 and 1, respectively, and the values at other positions are all 0.

In this embodiment, when the first period is 5ms, in the first variable position, the position of the corresponding field indication bit at the first variable position is 0 or 1, the values of the positions corresponding to the sfn bit0, sfn bit1 and sfn bit2 are possible combinations, and the values of the other positions of the first scrambling code load are 0.

Step 803, Z operation is performed on each first scrambling code load and the first PBCH signal, so as to obtain a first Z operation result of each first scrambling code load.

In the embodiment of the present application, the Z operation may refer to the description in the scheme shown in fig. 6, and is not described herein again.

And 804, performing soft combining on the first Z operation result of each first scrambling code load and the corresponding operation result in each second Z operation result respectively to obtain each soft combining result.

Performing Z operation on the second scrambling code load and the second PBCH signal according to a second Z operation result; the second PBCH signal is a PBCH signal which precedes the first PBCH signal and fails to resolve; the value of the second scrambling code load at the position other than the position corresponding to the second variable position is 0; the second variable position comprises a position corresponding to a system frame number bit1 and a system frame number bit 2; and the value at the second variable position is an optional value in the case where the transmission period of the PBCH is 20 milliseconds.

For a group of the first Z operation result and the second Z operation result of the soft combination, the numerical value of the system frame number bit1 and the numerical value of the system frame number bit2 at the first variable position in the corresponding first scrambling code load are the same as the numerical value at the second variable position in the corresponding second scrambling code load; or, the values of the sfn bit1 and sfn bit2 at the first variable position in the corresponding first scrambling code load are the next group of values of the values at the second variable position in the corresponding second scrambling code load.

In a round of PBCH receiving process in the embodiment of the present application, when the terminal device receives the second PBCH signal and fails to analyze the PBCH signal, and the terminal device receives the first PBCH signal, after Z operation is performed on the first PBCH signal and possible scrambling code loads, soft combining is performed on Z operation results obtained by scrambling code load calculation constructed by possible combinations of corresponding frame number bit1 and system frame number bit2 in Z operation results obtained by the Z operation results obtained according to the scheme shown in fig. 6 and the Z operation results obtained by the second PBCH signal.

In one possible implementation, the reception interval between the first PBCH signal and the second PBCH signal is less than 20 milliseconds.

When the reception interval between the first PBCH signal and the second PBCH signal is less than 20ms, the Z operation result of the first PBCH signal and the corresponding Z operation result of the second PBCH signal may be soft-combined. That is, when the first period is 10ms, the second PBCH signal is a previously received PBCH signal of the first PBCH signal.

Step 805, decoding the first PBCH signal according to each soft combining result.

In the embodiment of the present application, since the soft combining in step 804 has multiple soft combining manners, multiple soft combining results correspondingly exist, and correspondingly, each soft combining result is decoded during decoding to find a correct soft combining result therein.

And 806, after successfully decoding the first PBCH signal according to each soft combining result, descrambling the target soft combining result through the first descrambling scrambling code to obtain a first descrambling result.

The first descrambling scrambling code is generated according to the third scrambling code load; the numerical value at the second variable position in the third scrambling code load is the same as the numerical value at the second variable position in the second scrambling code load corresponding to the target soft combining result, the numerical value of the system frame number bit0 in the third scrambling code load is 1, and the numerical values at other positions in the first descrambling scrambling code are 0; the target soft combining result is a soft combining result of successful decoding.

In step 807, the values of the sfn bit1 and sfn bit2 of the first PBCH signal are obtained from the first descrambling result.

And 808, descrambling the first descrambling result according to the numerical values of the system frame number bit1 and the system frame number bit2 of the first PBCH signal to obtain the load of the first PBCH signal.

In this embodiment of the present application, descrambling the first descrambling result according to the value of the system frame number bit1 and the value of the system frame number bit2 of the first PBCH signal to obtain the load of the first PBCH signal includes:

generating a fourth descrambling scrambling code; the numerical value at the second variable position in the fourth scrambling code load is the same as the numerical value of the system frame number bit1 and the system frame number bit2 of the first PBCH signal, the numerical value of the system frame number bit0 in the fourth scrambling code load is 0, and the numerical values at other positions in the first descrambling scrambling code are 0;

and descrambling the first descrambling result through the fourth descrambling scrambling code to obtain the load of the first PBCH signal.

The scheme shown in the examples of the present application is directed to different possible SFNs for SSBs with 10ms period ₀ How PBCH combining is implemented at 10ms periods is achieved.

Let f be SFN at time t when PBCH is received for the first time ₀ Can be further decomposed

Wherein

SFN removal for payload data still generated on the network side _2:1 The number of bits of (a) is,

is composed of

In which SFN is removed ₀ Is provided with bits of

Order for doing the same

Is composed of

Medium pair SFN ₀ The bits of the scrambling code are then transmitted,

is composed of

Removing in

The other bits. The Eq1 process can be expressed as:

at the time t of first receiving PBCH, if the decoding fails, using the same Z operation method as the traditional scheme, using a group of special payload to remove the influence of the scrambling code and storing the obtained data, wherein the pth data is:

where f may be 0 or 1. The scheme shown in the embodiment of the present application can consider the following two cases:

case a: at time t, f =0; case B: at time t, f =1. The UE tries separately for both possibilities.

Case a:

eq 9 can be described as:

at time t1= t +10ms, when only SFN is present ₀ From 0 to 1, the remaining bits in the scrambling code payload are unchanged, thus producing a sequence of scrambled bits

Nor changed. The sending data is as follows:

receiving end is used locally to carry different possible SFN _2:1 ，SFN ₀ =1, the payload with the remaining bits being 0 performs Z operation on the received data, resulting in:

comparing eq 10 and eq 11, note that:

therefore, as long as the data at the time of p = q, t and t1 can be coherently combined, thereby improving the signal-to-noise ratio and the decoding success probability. The difference from the conventional 20ms merging is that different { p, q } pairs do not need to be tried to satisfy { p = n, q = n +1}, and only a fixed value such as { p =00, q =00} needs to be used, but after decoding is successful, since the selected p is not necessarily the same as n on the network side, that is, the scrambling code influence is not completely eliminated like the conventional 20ms merging scenario, the following steps need to be performed to obtain the correct payload:

using the trial q as SFN _2:1 ，SFN ₀ =1, payload with rest bits 0 generates scrambling code and descrambles for the first time, removes

An exclusive or operation of;

extracting true SFN _2:1 And use of SFN in combination ₀ =0, the payload with the rest bits of 0 generates scrambling codes and carries out descrambling for the second time, and the scrambling codes are removed

Of (2)Or operation is carried out to obtain real payload

Note that: since case a is only one of the possibilities, only one possible data of p =00 cannot be saved at time t, and three possible data of p =00,01,10 still need to be saved.

Case B:

eq 9 is described as:

at time t1= t +10ms, this time SFN ₀ From 1 to 0, at time t SFN _2:1 If 00,01,10, respectively, then it becomes 01,10, 11 at t1, and the remaining bits are unchanged.

At this time, the scrambled data on the network side is:

the receiving end is still used to carry different possible SFN _2:1 ，SFN ₀ =1, the payload with the remaining bits of 0 performs Z operation on the received data, and the following result is obtained:

when the merge pair satisfies { p = n, q = n +1}, (Eq 12) and (Eq 14) become:

and (c) a second step of,

it can be seen that this time

And

having the same signal portion can be improved by combining. If the decoding is successful, the real payload can be extracted by the steps similar to the case A:

An exclusive or operation of;

extracting true SFN _2:1 And use of SFN in combination ₀ =0, payload with the rest bits 0 generates scrambling code and descrambles for the second time, removes

To obtain the real payload

Unlike case A, this is due to the SFN _2:1 At time t1, a change occurs, so a different scrambling code phase pair { p, q }, i.e. p = q +1, needs to be tried.

For SFN _2:1 In the case of time t being 11, more high-order SFN bits will change after 10ms, and therefore, as in the case of the ordinary 20ms period combination, the combination cannot provide enhanced signal energy and decoding performance at time t 1.

And under the condition that the first PBCH signal is the PBCH signal received in the ith time in the process of the PBCH detection of the current round and i is an integral multiple of N, decoding the first PBCH signal by using a decoding strategy when the transmission period of the PBCH signal is 20ms. I.e. soft combining decoding according to the scheme shown in fig. 6.

In summary, please refer to fig. 9, which illustrates a PBCH receiving flow chart according to an embodiment of the present application. As shown in fig. 9, taking the first period as 10ms as an example, the scheme shown in the embodiment of the present application can be summarized as follows:

if the decoding is successful, the UE normally extracts payload and quits at the initial time t; if the fault occurs, the Z operation is executed according to the conventional method, and various possible SFN is saved _2:1 Removing data influenced by scrambling codes;

if the UE knows that the SSB period is 10ms, or presumably 10ms period and therefore it is worth trying to combine, at time t1= t +10ms, different possible SFNs are tried according to the above possible cases a and B, respectively _2:1 And SFN ₀ =1 carries on local payload generation and Z operation merging and decoding, if there is a possible decoding success, removes the scrambling code influence and extracts the payload according to the above method, then quits. If the decoding still fails, because it is uncertain which situation is the case, in order to avoid that the wrong merged data covers the available data stored at the moment t, the merged data tried at this time is not stored;

if the attempt fails at the time t1, the Z operation is carried out in a conventional mode after waiting for t '= t +20ms, and the data at the time t' and the time t are merged.

In the embodiment of the present application, the scheme shown in fig. 10 utilizes the characteristics of SFN bits in the NR PBCH to perform improved combined signal processing and extraction processing on the PBCH, and accelerates the detection of the 3GPP protocol recommendation and the scheme of 20ms period PBCH combined detection adopted by the general terminal to 10ms period detection, thereby accelerating the cell handover or power-on dwell speed.

That is to say, when it is determined that the SSB transmission period is 10ms, or when it is determined according to detection and experience that the most probable SSB transmission period is 10ms, the scheme shown in the embodiment of the present application can accelerate PBCH detection under the condition of weak signal or strong interference, improve the handover speed or the power-on residence speed, and improve the user experience.

In addition, the scheme shown in fig. 9 is described by taking the first period as 10ms as an example, and when the first period is 5ms, the processing may be performed through the same idea, that is, when the first period is 5ms, based on possible combinations at positions corresponding to the field indicator bit, the system frame number bit0, the system frame number bit1, and the system frame number bit2, the first scrambling code loads are respectively constructed (except values at positions corresponding to the field indicator bit, the system frame number bit0, the system frame number bit1, and the system frame number bit2, values at other positions are all 0), multiple possible first scrambling code loads are obtained, and after Z operation is performed on each scrambling code load and the first PBCH signal, the multiple possible first scrambling code loads and the second PBCH signal are subjected to soft combining according to the Z operation result calculated by the scheme shown in fig. 6, and then are analyzed and descrambled.

To sum up, in the solution shown in the embodiment of the present application, the terminal device may receive the PBCH signal according to the first cycle of 1/N of 20 milliseconds, and correspondingly, when performing soft combining on the PBCH signal, perform Z operation on the newly received PBCH signal through the scrambling code load that may occur under the condition of the first cycle, combine the Z operation result with the Z operation result of the PBCH signal that has failed to be resolved before, and perform decoding according to the combined result; by the scheme, under the condition that the system supports the PBCH period less than 20 milliseconds, the terminal equipment can quickly carry out PBCH signal soft combining without waiting for 20 milliseconds after the PBCH analysis fails every time, so that the PBCH receiving efficiency of the terminal is improved.

Please refer to fig. 10, which illustrates a schematic structural diagram of a PBCH receiving apparatus according to an exemplary embodiment of the present application. The PBCH receiving apparatus 1000 may be configured to perform all or part of the steps performed by the terminal device in the embodiments shown in fig. 7 or fig. 8; the device includes:

a signal receiving module 1001, configured to receive a first PBCH signal according to a first period in a round of PBCH detection; the first period is 1/N of 20 milliseconds, and N is an integer greater than or equal to 2;

a decoding module 1002, configured to, when the first PBCH signal is the PBCH signal received in the ith time in the PBCH detection process in this round and i is not an integer multiple of N, decode the first PBCH signal by using a decoding strategy when a sending period of the PBCH signal is the first period;

the decoding module 1002 is further configured to, when the first PBCH signal is a PBCH signal received in the ith round of PBCH detection process, and i is an integer multiple of N, decode the first PBCH signal according to a decoding strategy when a transmission period of the PBCH signal is 20ms.

In one possible implementation, the length of the first period is 5ms or 10ms.

In a possible implementation manner, the decoding module 1002 includes:

a generation submodule, configured to generate each first scrambling code load according to the first period when the first PBCH signal is a PBCH signal received for the ith time in the current round of PBCH detection process and i is not an integer multiple of N; the value of the other positions except the corresponding first variable positions in the first scrambling code load is 0; the first variable position comprises a position corresponding to a half frame indication bit, a system frame number bit0, a system frame number bit1 and a system frame number bit 2; and the value at the first variable position is an optional value when the sending period of PBCH is the first period;

the operation submodule is used for respectively carrying out Z operation on each first scrambling code load and the first PBCH signal to obtain a first Z operation result of each first scrambling code load;

a combining submodule, configured to perform soft combining on the first Z operation result of each first scrambling code load and a corresponding operation result in each second Z operation result, respectively, to obtain each soft combining result; the second Z operation result is that the second scrambling code load and a second PBCH signal are subjected to Z operation; the second PBCH signal is a PBCH signal which is before the first PBCH signal and fails in resolution; the value of the second scrambling code load at the position other than the position corresponding to the second variable position is 0; the second variable position comprises a position corresponding to a system frame number bit1 and a system frame number bit 2; and the value at the second variable position is an optional value in the case that the transmission period of the PBCH is 20 milliseconds;

and a decoding sub-module, configured to decode the first PBCH signal according to each soft combining result.

In one possible implementation, in the case where the first period is 10 milliseconds,

the values of the corresponding field indication bit and the system frame number bit0 at the first variable position are 0 and 1 respectively;

for a group of first Z operation results and second Z operation results of soft combination, the numerical values of the system frame number bit1 and the system frame number bit2 at the first variable position in the corresponding first scrambling code load are the same as the numerical values at the second variable position in the corresponding second scrambling code load; or, the values of the sfn bit1 and sfn bit2 at the first variable position in the corresponding first scrambling code load are the next group of values of the values at the second variable position in the corresponding second scrambling code load.

In one possible implementation, the apparatus further includes:

a first descrambling module, configured to descramble the target soft combining result through a first descrambling scrambling code after the first PBCH signal is successfully decoded according to each soft combining result, so as to obtain a first descrambling result; the first descrambling scrambling code is generated according to a third scrambling code load; the numerical value at the second variable position in the third scrambling code load is the same as the numerical value at the second variable position in the second scrambling code load corresponding to the target soft combining result, the numerical value of the system frame number bit0 in the third scrambling code load is 1, and the numerical values at other positions in the first descrambling scrambling code are 0; the target soft combining result is a soft combining result of successful decoding;

a value obtaining module, configured to obtain values of a system frame number bit1 and a system frame number bit2 of the first PBCH signal from the first descrambling result;

and the second descrambling module is used for descrambling the first descrambling result according to the numerical values of the system frame number bit1 and the system frame number bit2 of the first PBCH signal to obtain the load of the first PBCH signal.

In one possible implementation manner, the second descrambling module is configured to,

generating a fourth descrambling scrambling code; the value of the second variable position in the fourth scrambling code load is the same as the value of the system frame number bit1 and the system frame number bit2 of the first PBCH signal, the value of the system frame number bit0 in the fourth scrambling code load is 0, and the values of the other positions in the first descrambling scrambling code are 0;

It should be noted that, when the apparatus provided in the foregoing embodiment implements the functions thereof, only the division of the above functional modules is illustrated, and in practical applications, the above functions may be distributed by different functional modules according to actual needs, that is, the content structure of the device is divided into different functional modules, so as to complete all or part of the functions described above.

With regard to the apparatus in the above embodiment, the specific manner in which each module performs the operation has been described in detail in the embodiment related to the method, and will not be described in detail here.

Referring to fig. 11, a schematic structural diagram of a computer device 1100 according to an embodiment of the present application is shown. The computer device 1100 may include: a processor 1101, a receiver 1102, a transmitter 1103, a memory 1104, and a bus 1105.

The processor 1101 includes one or more processing cores, and the processor 1101 executes various functional applications and information processing by running software programs and modules.

The receiver 1102 and the transmitter 1103 may be implemented as one communication component, which may be one communication chip. The communication chip may also be referred to as a transceiver.

The memory 1104 is coupled to the processor 1101 by a bus 1105.

The memory 1104 may be used for storing a computer program, which the processor 1101 is used to execute in order to implement the individual steps in the above-described method embodiments.

Further, memory 1104 may be implemented by any type or combination of volatile or non-volatile storage devices, including, but not limited to: magnetic or optical disks, electrically erasable programmable read-only memories, static random access memories, read-only memories, magnetic memories, flash memories, programmable read-only memories.

In an exemplary aspect, when the computer device 1100 is implemented as a terminal device, the transceiver is configured to receive a first PBCH signal according to a first periodicity; the length of the first period is 1/N of 20 milliseconds, and N is an integer greater than or equal to 2;

the processor 1101 is configured to, when the first PBCH signal is a PBCH signal received in an ith time in a PBCH detection process of the current round and i is not an integer multiple of N, decode the first PBCH signal by using a decoding strategy in which a transmission cycle of the PBCH signal is the first cycle; and under the condition that the first PBCH signal is the PBCH signal received at the ith time in the process of the PBCH detection of the current round and i is an integral multiple of N, decoding the first PBCH signal by using a decoding strategy when the sending period of the PBCH signal is 20ms.

The process executed by the processor 1101 and/or the transceiver in the computer device 1100 may refer to the steps executed by the terminal device in the foregoing method embodiments.

The embodiment of the present application further provides a computer-readable storage medium, where the storage medium stores computer instructions, and the computer instructions are loaded and executed by a processor to implement all or part of the steps executed by the terminal device in the foregoing method embodiments.

The present application further provides a chip, where the chip is configured to run in a computer device, so that the computer device executes all or part of the steps performed by the terminal device in the foregoing method embodiments.

The present application also provides a computer program product, or computer program, comprising computer instructions, the computer instructions being stored in a computer readable storage medium. The computer program product may be used to implement all or part of the steps performed by the terminal device in the various method embodiments described above.

The present application also provides a computer program product, or computer program, comprising computer instructions, the computer instructions being stored in a computer readable storage medium. The processor of the computer device reads the computer instructions from the computer-readable storage medium, and the processor executes the computer instructions, so that the computer device executes all or part of the steps performed by the terminal device in the various method embodiments.

The present application further provides a computer program, which is executed by a processor of a computer device to implement all or part of the steps performed by the terminal device in the above method embodiments.

Those skilled in the art will recognize that, in one or more of the examples described above, the functions described in the embodiments of the present application may be implemented in hardware, software, firmware, or any combination thereof. When implemented in software, the functions may be stored on or transmitted over as one or more instructions or code on a computer-readable medium. Computer-readable media includes both computer storage media and communication media including any medium that facilitates transfer of a computer program from one place to another. A storage media may be any available media that can be accessed by a general purpose or special purpose computer.

The above description is only exemplary of the present application and should not be taken as limiting the present application, and any modifications, equivalents, improvements and the like that are made within the spirit and principle of the present application should be included in the protection scope of the present application.

Claims

1. A method for receiving a Physical Broadcast Channel (PBCH), the method being performed by a terminal device, the method comprising:

2. The method of claim 1, wherein the first period has a length of 5ms or 10ms.

3. The method of claim 1 or 2, wherein the decoding the first PBCH signal according to a decoding strategy when a transmission period of the PBCH signal is the first period when the first PBCH signal is the i-th PBCH signal received in the current round of PBCH detection and i is not an integer multiple of N, comprises:

generating each first scrambling code load according to the first period under the condition that the first PBCH signal is the PBCH signal received in the ith time in the process of the PBCH detection of the current round and i is not an integral multiple of N; the values of the other positions except the corresponding first variable position in the first scrambling code load are 0; the first variable position comprises positions corresponding to a half frame indication bit, a system frame number bit0, a system frame number bit1 and a system frame number bit 2; and the value at the first variable position is an optional value when the sending period of PBCH is the first period;

performing Z operation on each first scrambling code load and the first PBCH signal respectively to obtain a first Z operation result of each first scrambling code load;

respectively carrying out soft combination on the first Z operation result of each first scrambling code load and the corresponding operation result in each second Z operation result to obtain each soft combination result; the second Z operation result is that the second scrambling code load and a second PBCH signal are subjected to Z operation; the second PBCH signal is a PBCH signal which is before the first PBCH signal and fails in resolution; the value of the second scrambling code load at the position other than the corresponding second variable position is 0; the second variable position comprises a position corresponding to a system frame number bit1 and a system frame number bit 2; and the value at the second variable position is an optional value in the case that the transmission period of the PBCH is 20 milliseconds;

and decoding the first PBCH signal according to each soft combining result.

4. The method according to claim 3, characterized in that, in the case where the first period is 10 milliseconds,

the numerical values of the corresponding field indication bit and the system frame number bit0 at the first variable position are respectively 0 and 1;

for a group of first Z operation results and second Z operation results of soft combination, the numerical values of the system frame number bit1 and the system frame number bit2 at the first variable position in the corresponding first scrambling code load are the same as the numerical values at the second variable position in the corresponding second scrambling code load; or, the values of the sfn bit1 and sfn bit2 at the first variable position in the corresponding first scrambling code load are the next group of values at the second variable position in the corresponding second scrambling code load.

5. The method of claim 4, further comprising:

after the first PBCH signal is successfully decoded according to each soft combining result, descrambling a target soft combining result through a first descrambling scrambling code to obtain a first descrambling result; the first descrambling scrambling code is generated according to a third scrambling code load; the numerical value at the second variable position in the third scrambling code load is the same as the numerical value at the second variable position in the second scrambling code load corresponding to the target soft combining result, the numerical value of the system frame number bit0 in the third scrambling code load is 1, and the numerical values at other positions in the first descrambling scrambling code are 0; the target soft combining result is a soft combining result of successful decoding;

acquiring numerical values of a system frame number bit1 and a system frame number bit2 of the first PBCH signal from the first descrambling result;

and descrambling the first descrambling result according to the numerical values of the system frame number bit1 and the system frame number bit2 of the first PBCH signal to obtain the load of the first PBCH signal.

6. The method of claim 5, wherein the descrambling the first descrambling result according to the value of the sfn bit1 and sfn bit2 of the first PBCH signal to obtain the payload of the first PBCH signal comprises:

7. Method according to any of claims 3 to 5, characterized in that the reception interval between a first PBCH signal and said second PBCH signal is less than 20 milliseconds.

8. An apparatus for PBCH reception, the apparatus comprising:

the device comprises a signal receiving module, a first receiving module and a second receiving module, wherein the signal receiving module is used for receiving a first PBCH signal according to a first period in the process of one round of PBCH detection; the length of the first period is 1/N of 20 milliseconds, and N is an integer greater than or equal to 2;

9. The apparatus of claim 8, wherein the length of the first period is 5ms or 10ms.

10. The apparatus of claim 8 or 9, wherein the decoding module comprises:

a generation submodule, configured to generate each first scrambling code load according to the first period when the first PBCH signal is a PBCH signal received for the ith time in the current round of PBCH detection process and i is not an integer multiple of N; the value of the other positions except the corresponding first variable positions in the first scrambling code load is 0; the first variable position comprises a position corresponding to a half frame indication bit, a system frame number bit0, a system frame number bit1 and a system frame number bit 2; and the value at the first variable position is a selectable value in the case that the sending period of PBCH is the first period;

a merging submodule, configured to perform soft merging on the first Z operation result of each first scrambling code load and the corresponding operation result in each second Z operation result, respectively, to obtain each soft merging result; the second Z operation result is that the second scrambling code load and a second PBCH signal are subjected to Z operation; the second PBCH signal is a PBCH signal which is before the first PBCH signal and fails in resolution; the value of the second scrambling code load at the position other than the corresponding second variable position is 0; the second variable position comprises a position corresponding to a system frame number bit1 and a system frame number bit 2; and the value at the second variable position is an optional value in the case that the transmission period of the PBCH is 20 milliseconds;

11. A terminal device, characterized in that the terminal device comprises a processor, a memory and a transceiver;

the memory stores a computer program, and the processor executes the computer program to enable the terminal device to realize the PBCH receiving method according to any claim 1 to 7.

12. A computer-readable storage medium having stored thereon computer instructions for execution by a processor for implementing the PBCH reception method according to any one of claims 1 to 7.

13. A chip for running in a computer device to cause the computer device to perform the PBCH reception method of any of claims 1 to 7.

14. A computer program product, characterized in that the computer program product comprises computer instructions, the computer instructions being stored in a computer readable storage medium; the computer program product is for implementing a PBCH reception method as claimed in any of claims 1 to 7.