CN115166474A - Method for testing chip pins in ATE system - Google Patents

Abstract

A method for testing and protecting pins of a chip in an ATE system, the method comprising determining that the ATE system is maintaining pin data information of the chip by using a graphical page or an editor If the pin data information of the chip is maintained by using the graphical page, normally opening a corresponding graphical interface, and executing a process for testing the pins of the chip, otherwise, analyzing the pin data information line by line, and when the pin data information of the chip has a null value, returning an analysis result of editor data to an upper computer by a lower computer and directly giving error information that the graphical page cannot be opened; otherwise, the corresponding graphical interface is normally opened. Therefore, the method for testing the chip pins in the ATE system can avoid the problems of data disorder and the like when some fields of pin data information are null values when the editor maintains the pin data.

Description

Method for testing chip pins in ATE system

Technical Field

The invention relates to the field of Automatic Test Equipment (ATE for short), in particular to a method for testing chip pins in an ATE system for semiconductor testing.

Background

ATE is a device that performs tests on devices, circuit boards, subsystems, etc. under computer control, and replaces manual labor with computer programming, automatically completing test sequences. ATE exists in each link of a former procedure and a latter procedure, and the ATE is specifically determined by the requirements of process design. The method aims to screen defective products, prevent the defective products from entering the next procedure and reduce redundant manufacturing cost in the next procedure.

In a semiconductor test ATE system, generally, the quality of a plurality of chips needs to be tested in batch, and a single chip also has a plurality of pins, so that the pin data information can be divided into graphical page maintenance and editor maintenance pin data information for the convenience of a user, when the pin information of the chip is maintained in an editor, when the data information such as the name or type of some chips or the name of the pin has a null value (namely, some fields are null values when the editor maintains the pin data), the pin data information in the editor is not analyzed line by line at present, and no feedback error is generated; if the corresponding graphical interface is opened at the moment, the row information with null values and the pin data information which is normally displayed cannot be edited, so that the problems of data disorder and the like occur.

Disclosure of Invention

The invention aims to provide a method for testing chip pins in an ATE system, which is used for solving the problem that when an editor maintains pin data and data information such as the name or the type of the pin is null, a corresponding graphical interface is opened, and the system fails.

In order to achieve the purpose, the technical scheme of the invention is as follows:

a method of testing chip pins in an ATE system, comprising:

step S1: is the ATE system judged to be maintaining pin data information of the chip by using a graphical page or an editor? If the pin data information of the chip is maintained by using the graphical page, executing the step S2; otherwise, executing step S3;

step S2: normally opening a corresponding graphical interface, and executing a test flow for testing the chip pins until the test flow is finished;

and step S3: analyzing the pin data information line by line, and executing the step S4 when the pin data information of the chip has a null value; otherwise, executing step S2;

and step S4: and the lower computer returns the analysis result of the editor data to the upper computer, directly gives error information that the graphical page cannot be opened, and ends the test flow.

Further, if the first line of the pin data information of the chip maintained by the editor is N fields, the analyzing the pin data information line by line in step S3 specifically includes:

determine whether each row subsequent to the pin data information is also pin data information of N fields? If the number of the editor is equal to N, the data in the editor is considered to be normal, when the corresponding graphical interface is opened, the lower computer returns the analysis result of the editor data to the upper computer, and then the corresponding graphical interface is opened;

if the number of the pins is larger than N, redundant pin data information can be ignored, when the corresponding graphical interface is opened, the lower computer returns the analysis result of the editor data to the upper computer, and then the corresponding graphical interface is opened;

otherwise; if the number of the input terminals is smaller than N, error information can be directly given, namely, a null value exists in the editor, and when the graphical interface is opened, a prompt that the graphical interface cannot be opened is given.

Further, the pin data information is a chip name, a chip type and/or a pin name.

According to the technical scheme, the method for testing the chip pins in the ATE system can prompt the information that the graphical interface cannot be opened when a user maintains the information of the chip pins in the editor and if the name or the type of the chip or the name of the pin has a null value and the corresponding graphical interface is saved and opened, and the coping capability of the ATE system when some fields are empty when the pins of the chip are maintained in the editor of the chip is improved.

Drawings

FIG. 1 is a flow chart illustrating a method for testing chip pins in an ATE system according to an embodiment of the present invention

Detailed Description

The following describes the present invention in further detail with reference to fig. 1.

In a semiconductor test ATE system, generally, the quality of a plurality of chips needs to be tested in batch, and a single chip also has a plurality of pins, so that the pin data information can be maintained by a user conveniently, and the pin data information can be divided into graphical page maintenance pin data information and editor maintenance pin data information.

In the embodiment of the invention, if the pin data information is maintained by the graphical page, whether the corresponding graphical interface can be opened or not is directly fed back, and if the pin data information is maintained by the editor, whether the pin data information in the editor has a null value or not needs to be judged. If there is a null, it is the problem that the present invention needs to solve.

Referring to fig. 1, fig. 1 is a flow chart illustrating a method for testing chip pins in an ATE system according to an embodiment of the invention. As shown in figure 1 of the drawings, in which,

step S1: step S1: is the ATE system judged to be maintaining pin data information of the chip by using a graphical page or an editor? If the pin data information of the chip is maintained by using the graphical page, executing the step S2; otherwise, step S3 is executed.

Step S2: and normally opening the corresponding graphical interface, and executing a test flow for testing the chip pins until the test flow is finished.

Specifically, in the embodiment of the present invention, the pin data information may be a chip name, a chip type, and/or a pin name. However, when the editor is used to maintain the pin data information, if the first row is N fields, the following states may exist in other rows of the pin data information:

(1) n or more (no null value appears in the data information of the row of pins);

(2) less than N (null value of the row pin data information)

And step S3: analyzing the pin data information line by line, and executing the step S4 when the pin data information of the chip has a null value; otherwise, step S2 is performed.

That is to say, in the embodiment of the present invention, if the first line of the pin data information of the editor maintenance chip is N fields, the analyzing the pin data information line by line in step S3 specifically includes:

determine whether each row subsequent to the pin data information is also pin data information of N fields? If the number of the editor is equal to N, the data in the editor is considered to be normal, when the corresponding graphical interface is opened, the lower computer returns the analysis result of the editor data to the upper computer, and then the corresponding graphical interface is opened; if the number of the pins is larger than N, redundant pin data information can be ignored, when the corresponding graphical interface is opened, the lower computer returns the analysis result of the editor data to the upper computer, and then the corresponding graphical interface is opened. Therefore, in the above two cases, the data in the editor is normal, and the data is processed as follows without special processing.

Otherwise; if the number of the input terminals is smaller than N, error information can be directly given, namely, a null value exists in the editor, and when the graphical interface is opened, a prompt that the graphical interface cannot be opened is given. That is to say, when a user maintains the information of the chip pins in the editor, the name or type of the chip or the name of the pin has a null value and the corresponding graphical interface is saved and opened, the lower computer performs verification processing on data analysis in the editor, when the null value exists, the information is returned to the upper computer and is prompted, the corresponding graphical interface is opened, and the interface is prompted to be incapable of being opened.

For example: when the name of a chip in the editor is empty, the corresponding graphical interface is opened, the row information with the empty value cannot be edited, and the data display and display of the pins have problems, so that the content can be prompted to have the empty value, and the corresponding interface cannot be opened, namely the following operations are required to be executed:

and step S4: and the lower computer returns the analysis result of the editor data to the upper computer, directly gives error information that the graphical page cannot be opened, and ends the test flow.

In summary, the method for testing the chip pins in the ATE system of the present invention can avoid the problem of data disorder when some fields of the pin data information are null values when the editor maintains the pin data.

The above description is only for the preferred embodiment of the present invention, and the embodiment is not intended to limit the scope of the present invention, so that all the equivalent structural changes made by using the contents of the description and the drawings of the present invention should be included in the scope of the present invention.

Claims (3)

1. A method for testing chip pins in an ATE system, comprising:

step S1: is the ATE system judged to be maintaining pin data information of the chip by using a graphical page or an editor? If the pin data information of the chip is maintained by using the graphical page, executing the step S2; otherwise, executing step S3;

step S2: normally opening a corresponding graphical interface, and executing a test flow for testing the chip pins until the test flow is finished;

and step S3: analyzing the pin data information line by line, and executing the step S4 when the pin data information of the chip has a null value; otherwise, executing step S2;

and step S4: and the lower computer returns the analysis result of the editor data to the upper computer, directly gives error information that the graphical page cannot be opened, and ends the test flow.

2. The method according to claim 1, wherein if the first line of the pin data information of the chip maintained by the editor is N fields, the parsing the pin data information line by line in step S3 specifically comprises:

determine whether each row subsequent to the pin data information is also pin data information of N fields? If the number of the editor data is equal to N, the data in the editor is considered to be normal, when the corresponding graphical interface is opened, the lower computer returns the analysis result of the editor data to the upper computer, and then the corresponding graphical interface is opened;

if the number of the pins is larger than N, redundant pin data information can be ignored, when the corresponding graphical interface is opened, the lower computer returns the analysis result of the editor data to the upper computer, and then the corresponding graphical interface is opened;

otherwise; if the number of the input terminals is smaller than N, error information can be directly given, namely, a null value exists in the editor, and when the graphical interface is opened, a prompt that the graphical interface cannot be opened is given.

3. The method for testing chip pins in an ATE system of claim 1, wherein the pin data information is a chip name, a chip type, and/or a pin name.

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