CN115148834A - Solar cell and photovoltaic module - Google Patents
Solar cell and photovoltaic module Download PDFInfo
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- CN115148834A CN115148834A CN202110351174.2A CN202110351174A CN115148834A CN 115148834 A CN115148834 A CN 115148834A CN 202110351174 A CN202110351174 A CN 202110351174A CN 115148834 A CN115148834 A CN 115148834A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0224—Electrodes
- H01L31/022408—Electrodes for devices characterised by at least one potential jump barrier or surface barrier
- H01L31/022425—Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
Abstract
The invention provides a solar cell and a photovoltaic module, and relates to the technical field of solar photovoltaics. The solar cell includes: the gate structure comprises a semiconductor substrate, and a main gate electrode and a fine gate electrode which are electroplated on the semiconductor substrate; the main grid electrode extends along a first direction of the surface of the semiconductor substrate, the fine grid electrode extends along a second direction of the surface of the semiconductor substrate, and the first direction is not parallel to the second direction; the cross section of the main grid electrode and the cross section of the fine grid electrode are in mushroom structures. In the application, the cross sections of the main grid electrode and the fine grid electrode are in mushroom-shaped structures, so that when the main grid electrode and the fine grid electrode are connected with each other to achieve current convergence, the main grid electrode and the fine grid electrode can be prevented from being connected with each other to form a straight angle contact, the connection reliability between the electrodes is improved, the current density of a connection part is reduced, and the efficiency of the solar cell is improved.
Description
Technical Field
The invention relates to the technical field of solar photovoltaics, in particular to a solar cell and a photovoltaic module.
Background
The crystalline silicon solar cell is the solar cell with the highest market share at present due to high energy conversion efficiency.
At present, in a large-scale silicon solar cell manufacturing technology, a screen printing method is usually adopted to prepare a metal grid line electrode of a silicon solar cell, that is, metal electrode slurry is printed on the surface of a silicon substrate in a screen printing method, and a main grid electrode and a fine grid electrode which are connected with each other are prepared on the silicon substrate after sintering, so that the solar cell is obtained, wherein the fine grid electrode is mainly used for collecting current generated in the silicon substrate and transmitting the collected current to a main grid electrode connected with the fine grid electrode, the main grid electrode is mainly used for collecting current collected by each fine grid electrode, and the main grid electrode and the fine grid electrode prepared in the screen printing method are usually rectangular in shape.
However, in the process of transmitting current, the connection portion of the main gate electrode and the fine gate electrode having a rectangular structure is in a straight angle contact, and the straight angle contact may cause a stress concentration and a current concentration phenomenon, which may result in a decrease in connection reliability between the electrodes, and at the same time, an increase in current density may cause an increase in resistance, thereby decreasing the efficiency of the solar cell.
Disclosure of Invention
The invention provides a solar cell and a photovoltaic module, and aims to solve the problems that the connection reliability between electrodes is reduced and the efficiency of the solar cell is reduced due to right-angle contact formed by mutually connecting a main grid electrode and a fine grid electrode in the solar cell.
In a first aspect, an embodiment of the present invention provides a solar cell, where the solar cell includes:
the device comprises a semiconductor substrate, and a main grid electrode and a fine grid electrode which are electroplated on a backlight surface and/or a light-facing surface of the semiconductor substrate;
the main grid electrode extends along a first direction of the surface of the semiconductor substrate, the fine grid electrode extends along a second direction of the surface of the semiconductor substrate, and the first direction is not parallel to the second direction;
the shape of the cross section of the main grid electrode and the shape of the cross section of the fine grid electrode are both mushroom-shaped structures.
Optionally, the mushroom-like structure comprises a mushroom stem part and a mushroom umbrella part which are connected with each other;
the mushroom stem part is of a rectangular structure, the mushroom stem part is connected with the semiconductor substrate, the mushroom umbrella part is of an arc structure, and the mushroom umbrella part is arranged on one side, far away from the semiconductor substrate, of the mushroom stem part.
Optionally, the curvature of the mushroom-shaped umbrella part of the main grid electrode is larger than that of the mushroom-shaped umbrella part of the fine grid electrode.
Optionally, the main gate electrode comprises a plurality of first main gate electrode subsections and a plurality of second main gate electrode subsections;
the first main gate electrode subsections are arranged in a dot-shaped structure, and a plurality of the first main gate electrode subsections are arranged at intervals along the first direction;
the second main gate electrode subsections are arranged into a strip-shaped structure, extend along the first direction, and are connected with two adjacent first main gate electrode subsections at two ends;
a dimension of the second main gate electrode subsection in a third direction perpendicular to the surface of the semiconductor substrate is equal to a dimension of the first main gate electrode subsection in the third direction, and a dimension of the second main gate electrode subsection in the second direction is smaller than a dimension of the first main gate electrode subsection in the second direction.
Optionally, the main gate electrode further comprises a third main gate electrode subsection;
the third main gate electrode subsection is arranged into a strip-shaped structure and extends along the second direction;
one end of the third main gate electrode subsection is connected with the first main gate electrode subsection or the second main gate electrode subsection, and the other end of the third electrode subsection is connected with the fine gate electrode;
a dimension of the third main gate electrode subsection in the third direction is equal to a dimension of the first main gate electrode subsection in the third direction, and a dimension of the third main gate electrode subsection in the first direction is smaller than a dimension of the second main gate electrode subsection in the second direction and larger than a dimension of the fine gate electrode subsection in the first direction.
Optionally, a dimension of the third main gate electrode subsection in the first direction gradually decreases in a direction away from the first main gate electrode subsection or the second main gate electrode subsection.
Optionally, the mushroom shaped portion of the second main grid electrode section has a curvature that is less than a curvature of the mushroom shaped portion of the first main grid electrode section.
Optionally, the shape of the first main gate electrode subsection is any one of a circle, a rectangle, an ellipse, a ring and an irregular figure, and the area of the first main gate electrode subsection is 0.1-10 square millimeters.
Optionally, the main gate electrode comprises a coated electrode subsection and a plated electrode subsection;
the coating electrode part is used as a mushroom stem part of the main grid electrode, and the electroplating electrode part is used as a mushroom umbrella part of the main grid electrode;
the coated electrode subsection is an electrode subsection prepared by a coating technology, and the plated electrode subsection is an electrode subsection prepared by plating, wherein at least part of the coated electrode subsection is electrically connected with a plating device when plating is carried out.
Optionally, the thickness of the coated electrode subsection is 5-30 microns, and the thickness of the plated electrode subsection is 1-15 microns.
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The first main gate metal electrode layer is arranged on one surface of the coating electrode subsection far away from the semiconductor substrate, the second main gate metal electrode layer is arranged on one surface of the first main gate metal electrode layer far away from the coating electrode subsection, and the third main gate metal electrode layer is arranged on one surface of the second main gate metal electrode layer far away from the first main gate metal electrode layer;
the first main gate metal electrode layer contains nickel, tungsten, titanium or cobalt, the second main gate metal electrode layer comprises an alloy component formed by aluminum, copper, silver and gold and/or an alloy component formed by nickel, tungsten, titanium and cobalt, and the third main gate metal electrode layer comprises tin or silver.
Optionally, the thickness of the second main gate metal electrode layer is greater than the sum of the thicknesses of the first main gate metal electrode layer and the third main gate metal electrode layer;
the thickness of the first main gate metal electrode layer is 1-3 microns, the thickness of the second main gate metal electrode layer is 5-10 microns, and the thickness of the third main gate metal electrode layer is 1-5 microns.
Optionally, the solar cell further includes: a passivation layer;
the passivation layer is arranged on a backlight surface and/or a light-facing surface of the semiconductor substrate;
a main grid opening structure and a fine grid opening structure are arranged in the passivation layer, a mushroom stem part of the main grid electrode is arranged in the main grid opening structure and connected with the semiconductor substrate, a mushroom umbrella part of the main grid electrode is arranged on one side, away from the semiconductor substrate, of the mushroom stem part, extends out of the passivation layer and covers one side, away from the semiconductor substrate, of the passivation layer;
the mushroom stem part of the thin gate electrode is arranged in the thin gate opening structure and connected with the semiconductor substrate, and the mushroom umbrella part of the thin gate electrode is arranged on one side, away from the semiconductor substrate, of the mushroom stem part, extends out of the passivation layer and covers one side, away from the semiconductor substrate, of the passivation layer.
In a second aspect, embodiments of the present invention provide a photovoltaic module, which includes any one of the solar cells described above.
Based on above-mentioned solar cell and photovoltaic module, there is following beneficial effect in this application: in the solar cell, the cross sections of the main grid electrode and the thin grid electrode are of mushroom-shaped structures, so that when the main grid electrode and the thin grid electrode are connected with each other to achieve current convergence, the main grid electrode and the thin grid electrode can be prevented from being connected with each other to form straight angle contact, the connection reliability between the electrodes is improved, the current density of a connection part is reduced, in addition, the contact area of the main grid electrode and the thin grid electrode can be increased, the current density of the connection part is further reduced, and the efficiency of the solar cell is improved.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required to be used in the description of the embodiments of the present invention will be briefly introduced below, and it is obvious that the drawings in the description below are only some embodiments of the present invention, and it is obvious for those skilled in the art that other drawings can be obtained according to the drawings without inventive labor.
Fig. 1 shows a schematic structural diagram of a solar cell in an embodiment of the invention;
FIG. 2 shows a cross-sectional view of a solar cell in an embodiment of the invention in the E-E direction;
FIG. 3 illustrates a cross-sectional view of a solar cell in an embodiment of the present invention in the D-D direction;
FIG. 4 shows a schematic structural diagram of another solar cell in an embodiment of the invention;
FIG. 5 is a flow chart illustrating steps of a method of fabricating a solar cell in an embodiment of the invention;
fig. 6 shows a schematic structural diagram of a solar cell precursor in an embodiment of the invention;
FIG. 7 is a flow chart illustrating steps in another method of fabricating a solar cell in an embodiment of the present invention;
FIG. 8 is a diagram showing the result of a first fine gate electrode in an embodiment of the present invention;
FIG. 9 shows a graph of a result of a second fine-gate electrode in an embodiment of the invention;
fig. 10 shows a graph of the result of the third fine gate electrode in the embodiment of the present invention.
Description of the figure numbering:
10-semiconductor substrate, 20-main gate electrode, 21-first main gate electrode subsection, 22-second main gate electrode subsection, 23-third main gate electrode subsection, 24-coating electrode subsection, 241-contact, 242-coating metal layer, 25-electroplating electrode subsection, 251-first main gate metal electrode layer, 252-second main gate metal electrode layer, 253-third main gate metal electrode layer, 30-fine gate electrode, 31-first fine gate metal electrode layer, 32-second fine gate metal electrode layer, 33-third fine gate metal electrode layer, 40-passivation layer, 50-main gate electroplating region, 60-fine gate electroplating region.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The following describes a solar cell and a photovoltaic module provided by the present invention in detail by exemplifying several specific embodiments.
Fig. 1 is a schematic structural diagram of a solar cell according to an embodiment of the present invention, and referring to fig. 1, the solar cell may include: the semiconductor device comprises a semiconductor substrate 10, and a main gate electrode 20 and a fine gate electrode 30 which are electroplated on a backlight surface and/or a light-facing surface of the semiconductor substrate 10.
Wherein the main gate electrode 20 is extended along a first direction a of the surface of the semiconductor substrate 10, and the fine gate electrode 30 is extended along a second direction B of the surface of the semiconductor substrate 10, the first direction being non-parallel to the second direction, such that the main gate electrode 20 and the fine gate electrode 30 are connected to each other.
Specifically, the semiconductor substrate 10 may be composed of monocrystalline silicon or polycrystalline silicon, and the surface of the semiconductor substrate 10 may be a textured structure having a regular or irregular shape, so as to scatter incident light and reduce the amount of light reflected from the surface of the solar cell, thereby increasing the radiation collection effect of the solar cell. After the solar rays are irradiated on the semiconductor substrate 10, current may be generated on the semiconductor substrate 10 by a photovoltaic effect, and the thin gate electrode 30 disposed on the light-facing surface and/or the backlight surface of the semiconductor substrate 10 may collect the current generated on the semiconductor substrate 10 and concentrate the current to the main gate electrode 20 by the interconnection of the thin gate electrode 30 and the main gate electrode 20, thereby completing the collection and concentration of the current of the solar cell.
Fig. 2 shows a cross-sectional view of a solar cell in the E-E direction according to an embodiment of the present invention, as shown in fig. 2, the cross-sectional shape of a main gate electrode is mushroom-shaped, fig. 3 shows a cross-sectional view of a solar cell in the D-D direction according to an embodiment of the present invention, as shown in fig. 3, the cross-sectional shape of a fine gate electrode is also mushroom-shaped, so that when the main gate electrode and the fine gate electrode are connected to each other to achieve current convergence, the main gate electrode 20 and the fine gate electrode 30 are prevented from being connected to each other to form a straight angle contact, the stress concentration and the current concentration at the connection portion of the main gate electrode 20 and the fine gate electrode 30 are reduced, thereby improving the connection reliability between the electrodes and reducing the current density at the connection portion; in addition, under the condition that the surface area of the solar cell and the number of the main grid electrodes and the thin grid electrodes are not changed, the contact area of the main grid electrodes and the thin grid electrodes can be increased, the current density of the connection parts can be further reduced, and therefore the efficiency of the solar cell is improved.
In an embodiment of the present invention, a solar cell includes: the device comprises a semiconductor substrate, and a main grid electrode and a fine grid electrode which are electroplated on a backlight surface and/or a light-facing surface of the semiconductor substrate; the main grid electrode extends along a first direction of the surface of the semiconductor substrate, the fine grid electrode extends along a second direction of the surface of the semiconductor substrate, and the first direction is not parallel to the second direction; the shape of the cross section of the main grid electrode and the shape of the cross section of the fine grid electrode are both mushroom-shaped structures. In the solar cell, the cross sections of the main grid electrode and the thin grid electrode are of mushroom-shaped structures, so that when the main grid electrode and the thin grid electrode are connected with each other to achieve current convergence, the main grid electrode and the thin grid electrode can be prevented from being connected with each other to form straight angle contact, the connection reliability between the electrodes is improved, the current density of a connection part is reduced, in addition, the contact area of the main grid electrode and the thin grid electrode can be increased, the current density of the connection part is further reduced, and the efficiency of the solar cell is improved.
Alternatively, referring to fig. 2 and 3, the mushroom-shaped structure may include a mushroom stem portion and a mushroom umbrella portion connected to each other.
The mushroom stem part can be of a rectangular structure and is connected with the semiconductor substrate, the mushroom umbrella part can be of an arc structure, and the mushroom umbrella part is arranged on one side, far away from the semiconductor substrate, of the mushroom stem part.
In the embodiment of the invention, if the surface of the semiconductor substrate is provided with the passivation layer, the main grid electrode and the fine grid electrode of the mushroom-shaped structure can penetrate through the passivation layer, one end of the main grid electrode and one end of the fine grid electrode are in contact with the semiconductor substrate, and the other end of the main grid electrode and the fine grid electrode extend out of the surface of the passivation layer.
In addition, the height of the mushroom stem part in the mushroom-shaped structure and the curvature of the mushroom umbrella part can be adjusted to change the structures of the main grid electrode and the fine grid electrode and adjust the structure of the connection part of the main grid electrode and the fine grid electrode, so that the connection reliability between the electrodes is further improved, and the current density of the connection part is reduced.
Alternatively, the curvature of the mushroom portion of the main grid electrode may be greater than the curvature of the mushroom portion of the fine grid electrode.
Specifically, since the fine gate electrode mainly functions to collect current generated on the semiconductor substrate, the number of fine gate electrodes distributed on the surface of the semiconductor substrate is large, but the transmitted current is small. Correspondingly, the mushroom umbrella part of the thin gate electrode can be provided with smaller curvature, so that the mushroom umbrella part of the thin gate electrode is steeper, the area of the cross section of the mushroom umbrella part is smaller, the shielding of the thin gate electrode on solar rays is reduced, the incident solar rays are absorbed by the solar cell again after being reflected for multiple times on the surface of the mushroom umbrella part of the thin gate electrode, and the light utilization rate of the solar cell can be improved. The main grid electrodes are mainly used for collecting the current collected by each thin grid electrode and are connected with the connecting wires so as to realize the connection of the adjacent solar cells, so that the number of the main grid electrodes is small, and the transmitted current is large. Correspondingly, a larger curvature can be set for the mushroom umbrella part of the main gate electrode, so that the mushroom umbrella part of the main gate electrode is more gentle, the area of the cross section of the mushroom umbrella part is larger, the current density in the main gate electrode is reduced, the contact area of the main gate electrode and connecting wires such as welding strips is increased, the welding strength between the main gate electrode and the connecting wires is improved, and the connection reliability between adjacent solar cells is ensured.
Alternatively, referring to fig. 1, the main gate electrode 20 may include a plurality of first main gate electrode subsections 21 and a plurality of second main gate electrode subsections 22.
The first main gate electrode subsections 21 may be arranged in a dot-shaped structure, the plurality of first main gate electrode subsections 21 are arranged at intervals along the first direction a, the second main gate electrode subsections 22 may be arranged in a stripe-shaped structure, the second main gate electrode subsections 22 extend along the first direction a of the surface of the semiconductor substrate 10, two ends of the second main gate electrode subsections 22 are connected to two adjacent first main gate electrode subsections 21, a dimension of the second main gate electrode subsections 22 in a third direction C perpendicular to the surface of the semiconductor substrate 10 is equal to a dimension of the first main gate electrode subsections 21 in the third direction C, and a dimension of the second main gate electrode subsections 22 in the second direction B of the surface of the semiconductor substrate 10 is smaller than a dimension of the first main gate electrode subsections 21 in the second direction B of the surface of the semiconductor substrate 10.
In the embodiment of the present invention, the size, i.e., the width, of the main gate electrode 20 along the second direction B is not uniform, but the width of the first main gate electrode subsection 21 is greater than the width of the second main gate electrode subsection 22, so that when the main gate electrode 20 is soldered to a connection line, the contact area between the first main gate electrode subsection 21 with the greater width and the connection line is greater, so as to ensure the soldering strength between the main gate electrode 20 and the connection line, and the second main gate electrode subsection 22 with the smaller width is mainly used for conducting the adjacent first main gate electrode subsection 21, so as to reduce the amount of conductive paste used for preparing the electrode in the solar cell, and reduce the production cost of the solar cell.
Wherein the dimension, i.e. the width, of the first main gate electrode subsection 21 in the second direction may be equal to 3-10 times the width of the second main gate electrode subsection 22. For example, the width of the first main gate electrode subsection 21 may be 0.5-1.5 mm, the width of the second main gate electrode subsection 22 may be 0.1-0.5 mm, the dimensions, i.e. the height, of the first main gate electrode subsection 21 and the second main gate electrode subsection 22 in the third direction C may be 5-35 microns, and the height of the fine gate electrode 30 may be 5-15 microns.
Alternatively, the curvature of the mushroom-shaped portion of the second main gate electrode section 22 may be smaller than the curvature of the mushroom-shaped portion of the first main gate electrode section 21. The mushroom umbrella part of the first main grid electrode subsection 21 is more gentle, so that the contact area of the main grid electrode and the connecting wires such as the welding strips is increased, the welding strength between the main grid electrode and the connecting wires is improved, and the connection reliability between the adjacent solar cells is ensured.
Further, the curvature of the mushroom-shaped portion of the third main gate electrode part 23 may be smaller than that of the mushroom-shaped portion of the second main gate electrode part 22. The mushroom umbrella part of the third main grid electrode subsection 23 is more gentle and steep, so that the shielding of the third main grid electrode subsection 23 on solar rays is reduced, and the light utilization rate of the solar cell is improved.
Optionally, the main gate electrode may further include a third main gate electrode subsection, fig. 4 shows a schematic structural diagram of another solar cell in the embodiment of the present invention, as shown in fig. 4, the third main gate electrode subsection 23 may be disposed in a stripe structure, the third main gate electrode subsection 23 is disposed to extend along the second direction B of the surface of the semiconductor substrate 10, one end of the third main gate electrode subsection 23 is connected to the first main gate electrode subsection 21 or the second main gate electrode subsection 22, and the other end of the third main gate electrode subsection 23 is connected to the fine gate electrode 30, wherein a dimension of the third main gate electrode subsection 23 in the third direction C, that is, a height is equal to a dimension of the first main gate electrode subsection 21 in the third direction C.
In the embodiment of the present invention, since one end of the third main gate electrode subsection 23 is connected to the first main gate electrode subsection 21 or the second main gate electrode subsection 22, and the other end of the third main gate electrode subsection 23 is connected to the fine gate electrode 30, the third main gate electrode subsection 23 can achieve the purpose of isolating the fine gate electrode 30, and prevent the connection line from contacting the fine gate electrode 30, thereby preventing the fine gate electrode from being disconnected by welding. Since the height of the third main gate electrode subsection 23 is equal to the height of the first main gate electrode subsection 21, the volume of the third main gate electrode subsection 23 that takes over the contact of the fine gate electrode 30 with the connection line is increased compared to the volume of the fine gate electrode 30, so that the reliability of the connection with the connection line can be improved.
Further, the size of the third main gate electrode subsection 23 in the first direction a may be smaller than the size of the second main gate electrode subsection 22 in the second direction B, so that excessive conductive paste may be prevented from being used in preparing the main gate electrode 20, and at the same time, the size of the third main gate electrode subsection 23 in the first direction a may be larger than the size of the fine gate electrode 30 in the first direction a, so that connection reliability between the third main gate electrode subsection 23 and the connection line may be ensured when the third main gate electrode subsection 23 is in contact with the connection line.
Alternatively, referring to fig. 4, the dimension, i.e. the width, of the third main gate electrode subsection 23 in the first direction a gradually decreases in a direction away from the first main gate electrode subsection 21 or the second main gate electrode subsection 22. Since the third main gate electrode subsection 23 is less likely to contact the connection line in a direction away from the first main gate electrode subsection 21 or the second main gate electrode subsection 22, a portion of the third main gate electrode subsection 23 close to the first main gate electrode subsection 21 or the second main gate electrode subsection 22 may be set to have a larger width to improve the connection reliability between the third main gate electrode subsection 23 and the connection line, and a portion of the third main gate electrode subsection 23 away from the first main gate electrode subsection 21 or the second main gate electrode subsection 22 may be set to have a smaller width to save the conductive paste.
In an embodiment of the present invention, a ratio of the width of the wide portion to the width of the narrow portion of the third main gate electrode subsection 23 may be greater than 2. The third main gate electrode subsection 23 may be discontinuously arranged between the first main gate electrode subsection 21 or the second main gate electrode subsection 22 and the fine gate electrode 30.
Optionally, the shape of the first main gate electrode subsection may comprise: the area of the first main gate electrode subsection may be 0.1-10 square millimeters in any one of a circular, rectangular, oval, annular, and irregular pattern.
For example, a first main gate electrode subsection of rectangular configuration may be provided, which may have dimensions of 1.2 mm x 1 mm, 0.7 mm x 0.8 mm, or 1 mm x 0.5 mm.
In the embodiment of the present invention, the size of the first main gate electrode subsection in the first direction a or the area of the first main gate electrode subsection may be determined according to actual conditions, and if the size is too large or the area is too large, the cost of the solar cell increases, and if the length is too short or the area is too small, the bonding strength between the first main gate electrode subsection and the connection line decreases, the connection reliability between the first main gate electrode subsection and the connection line decreases, and the first main gate electrode subsection is likely to be detached, so that an appropriate length or area can be determined by combining the cost and the bonding strength.
In the embodiment of the present invention, the number of the first main gate electrode branches in the main gate electrode may be determined by integrating the cost and the welding strength, if the number of the first main gate electrode branches in the main gate electrode is too large, the cost of the solar cell increases, and if the number of the first main gate electrode branches in the main gate electrode is too small, the welding strength between the first main gate electrode branches and the connecting wire decreases, the connection reliability between the first main gate electrode branches and the connecting wire decreases, and the first main gate electrode branches are easily detached. Preferably, 6-10 first main gate electrode subsections can be arranged in one main gate electrode, adjacent first main gate electrode subsections are connected through a second main gate electrode subsection, and the size of the first main gate electrode subsection along the first direction is smaller than that of the second main gate electrode subsection along the first direction.
In addition, when the first main grid electrode subsection is welded with the connecting wire, the tensile force between the first main grid electrode subsection positioned at the edge of the solar cell and the connecting wire is larger, so when a plurality of first main grid electrode subsections are arranged in one main grid electrode, the first main grid electrode subsections can be uniformly arranged along the first direction, the first main grid electrode subsections with higher density can also be arranged at the edge of the solar cell, the first main grid electrode subsections with lower density are arranged at the middle part of the solar cell, namely, the spacing distance between the first main grid electrode subsections is gradually reduced from the central position to the edge position in the solar cell, the bonding force between the first main grid electrode subsections and the connecting wire at the positions with larger tensile force is increased, and the connection reliability between the first main grid electrode subsections and the connecting wire is improved.
Alternatively, the main gate electrode may comprise a coated electrode section and a plated electrode section.
Referring to fig. 2, the main grid electrode 20 includes a coated electrode subsection 24 and a plated electrode subsection 25, wherein the coated electrode subsection 24 may serve as a mushroom stem portion of the main grid electrode 20 and the plated electrode subsection 25 may serve as a mushroom umbrella portion of the main grid electrode 20.
Specifically, the coated electrode subsection 24 is an electrode subsection prepared by a coating technique, and the plated electrode subsection 25 is an electrode subsection prepared by plating, wherein at least a portion of the coated electrode subsection 24 is electrically connected with a plating apparatus when plating is performed. Therefore, in the preparation of the solar cell, the coated electrode subsection 24 as the mushroom stem part of the main grid electrode 20 is firstly prepared on the surface of the semiconductor substrate 10 by the coating technology, and at least part of the coated electrode subsection 24 is electrically connected with the electroplating equipment, so that the electroplated electrode subsection 25 is prepared by electroplating on the side of the coated electrode subsection 24 far away from the semiconductor substrate 10 as the mushroom umbrella part of the main grid electrode 20. Wherein the electroplating process is a deposition process in an acidic electroplating solution.
Alternatively, the dimension, i.e. the height, of the coated electrode sections 24 in the third direction C may be 5-30 microns and the height of the plated electrode sections 25 may be 1-15 microns, preferably the height of the plated electrode sections 25 may be 5-10 microns.
Referring to fig. 1, the thickness of the solar cell may be 175 micrometers, and the size of the solar cell in both the first direction a and the second direction B may be 166 millimeters. On the light-facing surface and/or the backlight surface of the solar cell, 4 sets of main grid electrodes 20 are arranged at equal intervals of 39 mm, and the main grid electrodes 20 are arranged to extend in the first direction a. Each group of main gate electrodes 20 has a width of 1 mm and a length of 155 mm, and the main gate electrodes 20 may include a first main gate electrode subsection 21 and a second main gate electrode subsection 22, wherein the first main gate electrode subsection 21 from head to tail in each group of main gate electrodes 20 may be located at the edge portion of the solar cell. Meanwhile, the light facing surface and/or the backlight surface of the solar cell are provided with the fine grid electrodes 30 with the width of 30-100 micrometers, the length of 154 millimeters and the height of 10-20 micrometers, and the fine grid electrodes 30 extend along the second direction B, so that the main grid electrodes and the fine grid electrodes are perpendicularly intersected, 78-155 fine grid electrodes 30 are arranged in the solar cell, the fine grid electrodes 30 are arranged at equal intervals at intervals of 1-2 millimeters, and the interval between the adjacent fine grid electrodes 30 can be 6 millimeters.
It should be noted that, the structures and positions of the main grid electrode and the fine grid electrode in the light-facing surface and the backlight surface of the solar cell can be consistent with each other.
Alternatively, referring to fig. 2, the plating electrode subsection 25 may have a multi-layer structure including a first main gate metal electrode layer 251, a second main gate metal electrode layer 252, and a third main gate metal electrode layer 253, each of which may have an arc-shaped structure.
Specifically, a first main gate metal electrode layer 251, a second main gate metal electrode layer 252 and a third main gate metal electrode layer 253 are sequentially disposed on one surface of the semiconductor substrate, the first main gate metal electrode layer 251 is disposed on one surface of the coated electrode subsection 24 away from the semiconductor substrate 10, the second main gate metal electrode layer 252 is disposed on one surface of the first main gate metal electrode layer 251 away from the coated electrode subsection 24, and the third main gate metal electrode layer 253 is disposed on one surface of the second main gate metal electrode layer 252 away from the first main gate metal electrode layer 251.
In addition, the first main gate metal electrode layer may contain nickel, tungsten, titanium, or cobalt, and the first main gate metal electrode layer may form a low-resistance metal silicide at an interface with the semiconductor substrate or the conductive layer (e.g., a doped polysilicon layer) through an annealing heat treatment, thereby improving ohmic contact performance; the second main gate metal electrode layer may include an alloy composition of aluminum, copper, silver, gold, and/or an alloy composition of nickel, tungsten, titanium, cobalt, and thus have a low resistance (e.g., a lower resistance than the first main gate metal electrode layer) property, and thus may function to improve electrical characteristics; the third main gate metal electrode layer is a portion connected to the connection line, and thus, the third main gate metal electrode layer may include tin or silver, so that the third main gate metal electrode layer has excellent solderability, thereby enhancing the soldering strength between the third main gate metal electrode layer and the connection line.
Accordingly, referring to fig. 3, the fine gate electrode 30 may include only the electrolytically prepared electrode subsection, and the fine gate electrode subsection may be after the coated electrode subsection 24 is prepared as the mushroom stem portion of the main gate electrode 20 on the surface of the semiconductor substrate 10 by the coating technique, and then at least a portion of the coated electrode subsection 24 is electrically connected to the electroplating device, so that the fine gate electrode 30 including the mushroom stem portion and the mushroom umbrella portion is electrolytically prepared on the fine gate electroplating area of the surface of the semiconductor substrate 10. Wherein the area of the cross section of the fine gate electrode may be less than or equal to 300 square micrometers.
Further, the fine gate electrode 30 may also be a multilayer structure including a first fine gate metal electrode layer 31, a second fine gate metal electrode layer 32, and a third fine gate metal electrode layer 33.
Specifically, the first fine gate metal electrode layer 31, the second fine gate metal electrode layer 32 and the third fine gate metal electrode layer 33 are sequentially disposed on one surface of the semiconductor substrate, the first fine gate metal electrode layer 31 is disposed on the surface of the semiconductor substrate 10, the second fine gate metal electrode layer 32 is disposed on one surface of the first fine gate metal electrode layer 31 away from the semiconductor substrate 10, and the third fine gate metal electrode layer 33 is disposed on one surface of the second fine gate metal electrode layer 32 away from the first fine gate metal electrode layer 31, wherein the second fine gate metal electrode layer 32 and the third fine gate metal electrode layer 33 may be disposed in an arc structure.
In addition, the first fine gate metal electrode layer and composition may be the same as that of the first main gate metal electrode layer, the second fine gate metal electrode layer and composition may be the same as that of the second main gate metal electrode layer, and the third fine gate metal electrode layer and composition may be the same as that of the third main gate metal electrode layer.
Optionally, the thickness of the second main gate metal electrode layer may be greater than the sum of the thicknesses of the first main gate metal electrode layer and the third main gate metal electrode layer, for example, the thickness of the first main gate metal electrode layer is 1 to 3 micrometers, the thickness of the second main gate metal electrode layer is 5 to 10 micrometers, and the thickness of the third main gate metal electrode layer is 1 to 5 micrometers.
Optionally, referring to fig. 2 and 3, the solar cell may further include a passivation layer 40. The passivation layer 40 may be simultaneously disposed on the backlight surface and/or the light-facing surface of the semiconductor substrate 10.
Specifically, the passivation layer 40 is provided with a main gate opening structure and a fine gate opening structure, and the main gate opening structure and the fine gate opening structure may form an opening structure penetrating or not penetrating the passivation layer 40 in the passivation layer 40 by using a wet etching technique or a laser ablation technique.
In the embodiment of the present invention, a main gate opening structure and a fine gate opening structure penetrating the passivation layer 40 may be formed in the passivation layer 40, so that the main gate electrode 20 may be directly disposed in the main gate opening structure, and the fine gate electrode 30 may be directly disposed in the fine gate opening structure; a non-through main gate opening structure and a through fine gate opening structure may also be formed in the passivation layer 40, so that a fire-through conductive paste (e.g., aluminum paste) may be first coated in the non-through main gate opening structure, and during the firing process to obtain the coated electrode subsection 24, the conductive paste may fire through the non-through main gate opening structure, thereby exposing the semiconductor substrate 10 at the bottom of the passivation layer 40, so that the finally obtained main gate electrode 20 may still be electrically connected to the semiconductor substrate 10, and in this process, damage to the semiconductor substrate 10 when forming the through opening structure in the passivation layer 40 by using wet etching or laser ablation, etc. may be reduced.
Wherein, the mushroom stem part of the main grid electrode 20 is arranged in the main grid opening structure and connected with the semiconductor substrate 10, and the mushroom umbrella part of the main grid electrode 20 is arranged on the side of the mushroom stem part far away from the semiconductor substrate 10, extends out of the passivation layer 40 and covers the side of the passivation layer 40 far away from the semiconductor substrate. Therefore, the mushroom portion of the main gate electrode 20 may cover the surface of the passivation layer 40 to increase the contact area of the main gate electrode 20 with the solar cell, reduce the possibility of the main gate electrode 20 being peeled off from the solar cell, and improve the structural reliability of the solar cell.
Accordingly, the mushroom stem portion of the thin gate electrode 30 is disposed in the thin gate opening structure and connected to the semiconductor substrate 10, and the mushroom stem portion of the thin gate electrode 30 is disposed on a side of the mushroom stem portion away from the semiconductor substrate 10, protrudes from the passivation layer 40, and covers a side of the passivation layer 40 away from the semiconductor substrate 10. Therefore, the mushroom portion of the fine grid electrode 30 can cover the surface of the passivation layer 40 to increase the contact area of the fine grid electrode 30 with the solar cell, reduce the possibility of the fine grid electrode 30 peeling from the solar cell, and improve the structural reliability of the solar cell.
In the embodiment of the invention, different passivation layers can be respectively prepared on the light-facing surface and the backlight surface of the semiconductor substrate, for example, a passivation layer containing silicon oxide and silicon nitride can be prepared on the light-facing surface of the semiconductor substrate, and a passivation layer containing aluminum oxide and silicon nitride can be prepared on the backlight surface of the semiconductor substrate, so that the passivation effect of the light-facing surface of the solar cell is improved, and the conversion efficiency of the solar cell is improved.
In the embodiment of the present invention, the height of the main gate electrode 20 may be 5 to 35 micrometers, the height of the fine gate electrode 30 may be 5 to 15 micrometers, the thickness of the passivation layer 40 may be 50 to 150 nanometers, and the volume of the mushroom-shaped portion of the main gate electrode 20 and the fine gate electrode 30 in the mushroom-shaped structure is much greater than the volume of the mushroom stem portion filled in the main gate opening structure and the fine gate opening structure, so that, as for the main gate electrode 20 and the fine gate electrode 30, the mushroom-shaped portion is mainly embodied as the mushroom-shaped portion from the cross-sectional shape, and the mushroom-shaped portion is in the circular arc structure, it is possible to avoid that the main gate electrode 20 and the fine gate electrode 30 connected with each other directly form more right-angle contacts, and reduce the current density at the connection portion.
Optionally, the solar cell may further include a conductive layer, where the conductive layer may be disposed on the light facing surface and the backlight surface of the semiconductor substrate, and the conductive layer located at the bottom of the passivation layer is exposed when the fine gate opening structure and the main gate opening structure are through structures, so that the main gate electrode and the fine gate electrode can contact the conductive layer.
In the embodiment of the present invention, the conductive layer may be formed by depositing a dopant in the semiconductor substrate through a conventional doping process, or may be prepared through a Chemical Vapor Deposition (CVD) process, a Low Pressure CVD (LPCVD), an Atmospheric Pressure CVD (APCVD), a Plasma Enhanced CVD (PECVD), a thermal growth, or a sputtering technique.
In an embodiment of the present invention, a solar cell includes: the device comprises a semiconductor substrate, and a main gate electrode and a fine gate electrode which are electroplated on a backlight surface and/or a light-facing surface of the semiconductor substrate; the main grid electrode extends along a first direction of the surface of the semiconductor substrate, the fine grid electrode extends along a second direction of the surface of the semiconductor substrate, and the first direction is not parallel to the second direction; the shape of the cross section of the main grid electrode and the shape of the cross section of the fine grid electrode are both mushroom-shaped structures. In the solar cell, the cross sections of the main grid electrode and the thin grid electrode are of mushroom-shaped structures, so that when the main grid electrode and the thin grid electrode are connected with each other to achieve current convergence, the main grid electrode and the thin grid electrode can be prevented from being connected with each other to form straight angle contact, the connection reliability between the electrodes is improved, the current density of a connection part is reduced, in addition, the contact area of the main grid electrode and the thin grid electrode can be increased, the current density of the connection part is further reduced, and the efficiency of the solar cell is improved.
In addition, an embodiment of the present invention further provides a method for manufacturing a solar cell, fig. 5 shows a flowchart of steps of the method for manufacturing a solar cell according to the embodiment of the present invention, and referring to fig. 5, the method may include the following steps:
In this step, after the semiconductor substrate for manufacturing the solar cell is obtained, a main gate plating region for manufacturing the main gate electrode and a fine gate plating region for manufacturing the fine gate electrode may be determined in the light-facing surface and/or the backlight surface of the semiconductor substrate.
Fig. 9 shows a schematic structural diagram of a solar cell precursor according to an embodiment of the present invention, and referring to fig. 9, the solar cell precursor may be a precursor of a solar cell obtained after a semiconductor substrate 10 is subjected to a pretreatment and before an electroplating process, a main gate electroplating region 50 is arranged to extend along a first direction a of a surface of the semiconductor substrate 10, during a subsequent electroplating process, the main gate electroplating region 50 in the semiconductor substrate 10 is used for electroplating to form a main gate electrode, and a fine gate electroplating region 60 is arranged to extend along a second direction B of the surface of the semiconductor substrate 10, during a subsequent electroplating process, the fine gate electroplating region 60 in the semiconductor substrate 10 is used for electroplating to form a fine gate electrode. The first direction A is not parallel to the second direction B, so that the prepared main grid electrode and the prepared fine grid electrode can be connected with each other, and the collection and the convergence of current in the solar cell are completed.
The semiconductor substrate may be a silicon substrate having a carrier separation function, for example, the semiconductor substrate may include a monocrystalline silicon wafer or a polycrystalline silicon wafer having a first conductivity type, and correspondingly, a first conductive layer and a second conductive layer may be respectively disposed on a light facing surface and a light backlight surface of the semiconductor substrate, where the first conductive layer and the second conductive layer have the first conductivity type and the second conductivity type, respectively, so that when sunlight irradiates on the monocrystalline silicon wafer or the polycrystalline silicon wafer, an electron-hole pair is generated in the monocrystalline silicon wafer or the polycrystalline silicon wafer due to a photovoltaic effect, and further, the first conductive layer and the second conductive layer having the first conductivity type and the second conductivity type respectively have an electron selectivity and a hole selectivity, so that the electron-hole pair in the monocrystalline silicon wafer or the polycrystalline silicon wafer can be separated, and electrodes on the light facing surface and the light backlight surface of the semiconductor substrate can collect and lead out carriers having different charges, thereby converting optical energy into electric energy.
In the embodiment of the present invention, the monocrystalline silicon wafer or the polycrystalline silicon wafer having the first conductivity type may be an n-type silicon substrate, that is, the doping type of the monocrystalline silicon wafer or the polycrystalline silicon wafer is n-type doping, and the corresponding dopant may include any one or more of phosphorus (P), arsenic (As), bismuth (Bi), and antimony (Sb) in group V elements; the silicon substrate may also be a p-type silicon substrate, that is, the doping type of the monocrystalline silicon wafer or the polycrystalline silicon wafer is p-type doping, and the corresponding dopant may include any one or more of boron (B), aluminum (Al), gallium (Ga), and indium (In) among group III elements.
Correspondingly, the main grid electroplating area and the fine grid electroplating area are arranged on the conducting layer on the surface of the semiconductor substrate.
102, preparing a main grid electrode in the main grid electroplating area, and preparing a fine grid electrode in the fine grid electroplating area to obtain the solar cell, wherein the shape of the cross section of the main grid electrode and the shape of the cross section of the fine grid electrode are both in a mushroom-shaped structure.
In this step, a main gate electrode may be prepared in a main gate plating region on the semiconductor substrate, and a fine gate electrode may be prepared in a fine gate plating region on the semiconductor substrate, and both the shape of the cross section of the main gate electrode and the shape of the cross section of the fine gate electrode may be in a mushroom-like structure.
As shown in fig. 2 and 3, the cross-sectional shapes of the main gate electrode 20 and the fine gate electrode 30 are mushroom-shaped structures, so that when the main gate electrode 20 and the fine gate electrode 30 are connected to each other to realize current convergence, the main gate electrode 20 and the fine gate electrode 30 can be prevented from being connected to each other to form a straight angle contact, and stress concentration and current concentration at the part where the main gate electrode 20 and the fine gate electrode 30 are connected to each other are reduced, thereby improving the connection reliability between the electrodes and reducing the current density at the connection part; in addition, under the condition that the surface area of the solar cell and the number of the main gate electrodes and the fine gate electrodes are not changed, the contact area of the main gate electrodes and the fine gate electrodes can be increased, the current density of the connection part can be further reduced, and the efficiency of the solar cell can be improved.
In the embodiment of the invention, the main gate electrode can be prepared by combining a coating technology and an electroplating technology, and the fine gate electrode can be prepared by the electroplating technology. Compared with the traditional technology of forming the electrode of the solar cell by sintering the silver paste through screen printing, the electrode of the solar cell can be formed by electroplating the low-cost metal layer, so that the use of precious metal silver materials is greatly reduced, and the manufacturing cost of the solar cell is remarkably reduced.
Specifically, the process of preparing the main gate electrode and the fine gate electrode by electroplating may specifically use a direct current electroplating method or a pulse electroplating method, or a method combining direct current electroplating and pulse electroplating, and since pulse electroplating is favorable for starting electroplating, pulse electroplating may be performed for a short time first, and then direct current electroplating may be performed. The frequency in the pulse plating process can be 5-200 Hz, the duty ratio is 50-95%, and the pulse plating time is 10-50 seconds. The ratio of the anodized area to the cathodically plated area during plating can be 1.5, 3, or 4.5.
In the embodiment of the invention, the battery piece to be plated, such as the solar battery precursor, can be electrified and then placed in the electroplating bath for electroplating, or the battery piece to be plated is placed in the electroplating bath and then electrified. In an embodiment of the present invention, a method for manufacturing a solar cell includes: determining a main grid electroplating area and a fine grid electroplating area on a light facing surface and/or a backlight surface of a semiconductor substrate, wherein the main grid electroplating area extends along a first direction of the surface of the semiconductor substrate, the fine grid electroplating area extends along a second direction of the surface of the semiconductor substrate, and the first direction is not parallel to the second direction; preparing a main grid electrode in the main grid electroplating area, and preparing a fine grid electrode in the fine grid electroplating area to obtain the solar cell; wherein, the shape of the cross section of the main grid electrode and the shape of the cross section of the fine grid electrode are both mushroom-shaped structures. In the solar cell prepared by the method, the cross sections of the main grid electrode and the fine grid electrode are in mushroom-shaped structures, so that when the main grid electrode and the fine grid electrode are connected with each other to achieve current convergence, the main grid electrode and the fine grid electrode can be prevented from being connected with each other to form straight angle contact, the connection reliability between the electrodes is improved, the current density of a connection part is reduced, in addition, the contact area of the main grid electrode and the fine grid electrode can be increased, the current density of the connection part is further reduced, and the efficiency of the solar cell is improved.
Fig. 7 is a flowchart illustrating steps of another method for manufacturing a solar cell according to an embodiment of the present invention, and referring to fig. 7, the method may include the following steps:
In this step, the main gate plating region and the fine gate plating region may be determined at the light-facing surface and/or the backlight surface of the semiconductor substrate after the semiconductor substrate is obtained.
In addition, a passivation layer may be prepared on the light-facing surface and/or the backlight surface of the semiconductor substrate to improve the light absorption characteristics of the solar cell, and a main gate opening structure and a fine gate opening structure may be provided in the passivation layer.
The position of the main gate opening structure corresponds to a main gate electroplating area on the surface of the semiconductor substrate, the position of the fine gate opening structure corresponds to a fine gate electroplating area on the surface of the semiconductor substrate, the main gate opening structure and the fine gate opening structure can form an opening structure which penetrates or does not penetrate through the passivation layer in the passivation layer through wet etching or laser ablation and other technologies, so that a finally prepared main gate electrode is arranged in the main gate opening structure, and the fine gate electrode is arranged in the fine gate opening structure.
Specifically, the fine gate opening structure may expose a fine gate electroplating region on the semiconductor substrate, that is, the fine gate opening structure penetrates through the passivation layer, and the depth of the fine gate opening structure is equal to the thickness of the passivation layer. The depth of the main gate opening structure can be smaller than or equal to the thickness of the passivation layer, and the position of the main gate opening structure corresponds to the position of the main gate electroplating area, namely, the main gate opening structure can penetrate through the passivation layer or can not penetrate through the passivation layer.
Referring to fig. 2, the main gate electrode 20 may include a coated electrode subsection 24 and a plated electrode subsection 25.
Thus, in this step, a coated electrode subsection may first be prepared in the main grid plating area, at least part of which is used for electrical connection with the plating equipment at the time of plating.
Specifically, a metal electrode paste may be printed on the bottom of the main gate opening structure of the passivation layer to prepare a coated electrode subsection. For example, a silver paste may be printed on the bottom of the main gate opening structure and sintered at a temperature in the range of 750-850 degrees celsius for 2 minutes to prepare a coated electrode subsection.
In the embodiment of the invention, if the main gate opening structure penetrates through the passivation layer, the metal electrode paste is directly printed in the main gate opening structure to be in contact with the semiconductor substrate, namely the metal electrode paste is printed on the surface of the semiconductor substrate; if the main gate opening structure does not penetrate through the passivation layer, the main gate opening structure is arranged in the passivation layer at the position corresponding to the main gate electroplating area, and the bottom of the main gate opening structure is a part of the residual passivation layer, then the metal electrode slurry is printed in the main gate opening structure and is in contact with the part of the residual passivation layer, namely the metal electrode slurry is printed on the surface of the part of the residual passivation layer.
Further, the printed metal electrode paste in the main grid opening structure may be sintered to prepare a coated electrode subsection.
Alternatively, the metal electrode paste may be an electrode paste including metal particles, and the metal particles may include: silver particles or aluminum particles.
Specifically, if the main gate opening structure penetrates through the passivation layer, that is, the metal electrode paste is directly printed in the main gate opening structure and contacts with the semiconductor substrate, the metal electrode paste may be an electrode paste containing silver particles, so that the coated electrode obtained after sintering contacts with the semiconductor substrate in parts; if the main gate opening structure does not penetrate through the passivation layer, that is, the metal electrode paste is printed on the surface of part of the remaining passivation layer, the metal electrode paste may be an electrode paste containing aluminum particles, and since the electrode paste containing aluminum particles can burn through the passivation layer, the metal electrode paste can be sintered to obtain a coated electrode portion contacting with the semiconductor substrate.
And step 203, electroplating the semiconductor substrate with the coating electrode subsection formed thereon to form the fine gate electrode in the fine gate electroplating area, and forming the main gate electrode on the surface, away from the semiconductor substrate, of the coating electrode subsection in the main gate electroplating area.
In this step, after the coated electrode subsection is prepared in the main gate opening structure, the semiconductor substrate on which the coated electrode subsection is formed may be further electroplated, and at least a portion of the coated electrode subsection is electrically connected to an electroplating device, so that a thin gate electrode is obtained by electroplating and depositing a metal layer in the thin gate opening structure (i.e., a thin gate electroplating area on the surface of the semiconductor substrate) by using the electroplating device, and a main gate electrode is obtained by electroplating and depositing a metal layer in the main gate opening structure in the coated electrode subsection, and finally a solar cell is obtained.
Compared with the traditional technology of forming the electrode of the solar cell by sintering the silver paste through screen printing, the electrode of the solar cell can be formed by electroplating the low-cost metal layer, so that the use of precious metal silver materials is greatly reduced, and the manufacturing cost of the solar cell is remarkably reduced.
Alternatively, referring to fig. 6, the coated electrode subsection 24 may include a power connection point 241 and a coating metal layer 242, the power connection point 241 is located in a first partition of the main gate plating region 50, the coating metal layer 242 is located in a second partition of the main gate plating region 50, and the first partition and the second partition are connected with each other; the power connection point is used for being electrically connected with electroplating equipment during electroplating.
The main gate plating region 50 may include a plurality of first partitions and second partitions arranged at intervals, the first partitions and the second partitions together form the main gate plating region 50 having a strip structure, the first partitions are coated with electrode paste and sintered to obtain the contact points 241 for electrical connection with a plating device, and the second partitions are coated with electrode paste and sintered to obtain the metal layer 242.
Further, after the power connection point 241 and the coating metal layer 242 are prepared in the main gate opening structure, the semiconductor substrate on which the power connection point 241 and the coating metal layer 242 are formed may be further electroplated, and the power connection point 241 is electrically connected to an electroplating device, so that the electroplating device is used to electroplate and deposit the metal layer in the fine gate opening structure (i.e., the fine gate electroplating region on the surface of the semiconductor substrate) to obtain a fine gate electrode, and the power connection point 241 and the coating metal layer 242 in the main gate opening structure are electroplated and deposited with the metal layer to obtain the main gate electrode, or the coating metal layer 242 in the main gate opening structure is electroplated and deposited with the metal layer to obtain the main gate electrode, and finally the solar cell is obtained.
In the embodiment of the invention, in the electroplating process, the electroplating current of the main grid electroplating area can be controlled to be larger than that of the fine grid electroplating area, so that the electrodeposition rate of the main grid electroplating area is higher, therefore, the thickness of the electroplating deposition metal layer on the main grid electroplating area is slightly larger than that of the electroplating deposition metal layer on the fine grid electroplating area, namely, the thickness of the main grid electrode is larger than that of the fine grid electrode, and therefore, when the main grid electrode in the solar cell is welded with the connecting wire to complete interconnection between adjacent solar cells, the connecting wire can be effectively prevented from being contacted with the fine grid electrode, and the fine grid electrode is prevented from being welded and disconnected.
It should be noted that, the solar cell and the corresponding part of the manufacturing method of the solar cell can be referred to, and have the same or similar beneficial effects.
In addition, the embodiment of the invention also provides a photovoltaic module which comprises any one of the solar cells, wherein the two sides of each solar cell can be provided with a packaging adhesive film, a cover plate, a back plate and the like. Has the same or similar beneficial effects as the solar cell.
In a specific embodiment of the invention, a cell with a passivation layer is subjected to laser film opening to form a main grid opening and a fine grid opening; then printing silver paste on the opening area of the battery piece after the membrane is opened, and sintering for 2 minutes at 800 ℃; then placing the sintered cell into a nickel plating bath (the pH value of the plating solution is 5) at 50 ℃, wherein the plating area ratio of the anode to the cathode is 3, firstly carrying out pulse plating for 50s, the pulse frequency is 60hz, and the air ratio is 50%; direct current plating was then carried out for 10 minutes at a current density of 50 milliamps per square centimeter.
After nickel plating, cleaning the cell, then placing the cell into a 30 ℃ copper plating tank (the pH value of the plating solution is 3), wherein the plating area ratio of the anode to the cathode is 3, firstly performing pulse plating for 50s, the pulse frequency is 60hz, and the air ratio is 50%; direct current plating was then carried out for 20 minutes at a current density of 60 milliamps per square centimeter.
After copper plating, cleaning the cell, then placing the cell into a 30 ℃ tin plating tank (the pH value of the plating solution is 3), wherein the plating area ratio of an anode to a cathode is 3, firstly performing pulse plating for 50s, the pulse frequency is 60hz, and the air ratio is 50%; direct current plating was then carried out for 5 minutes at a current density of 30 milliamps per square centimeter.
After the plating was completed, annealing was performed at 300 ℃ for 5min.
And scanning the fine grids at different positions of the obtained battery piece by an electron microscope, and obtaining a result shown in figures 8-10. As can be seen from fig. 8, 9 and 10, the cross section of the fine gate electrode prepared by electroplating in the embodiment of the present invention has a mushroom-shaped structure, and the fine gate electrode forms a multilayer structure during electroplating.
While the present invention has been described with reference to the embodiments shown in the drawings, the present invention is not limited to the embodiments, which are illustrative and not restrictive, and it will be apparent to those skilled in the art that various changes and modifications can be made therein without departing from the spirit and scope of the invention as defined in the appended claims.
Claims (14)
1. A solar cell, comprising:
the device comprises a semiconductor substrate, and a main gate electrode and a fine gate electrode which are electroplated on a backlight surface and/or a light-facing surface of the semiconductor substrate;
the main grid electrode extends along a first direction of the surface of the semiconductor substrate, the fine grid electrode extends along a second direction of the surface of the semiconductor substrate, and the first direction is not parallel to the second direction;
the shape of the cross section of the main grid electrode and the shape of the cross section of the fine grid electrode are both mushroom-shaped structures.
2. The solar cell of claim 1, wherein the mushroom-like structure comprises a mushroom stem portion and a mushroom umbrella portion connected to each other;
the mushroom stem part is of a rectangular structure, the mushroom stem part is connected with the semiconductor substrate, the mushroom umbrella part is of an arc structure, and the mushroom umbrella part is arranged on one side, far away from the semiconductor substrate, of the mushroom stem part.
3. The solar cell of claim 2, wherein the curvature of the mushroom-shaped portion of the main grid electrode is greater than the curvature of the mushroom-shaped portion of the fine grid electrode.
4. The solar cell of claim 2, wherein the main gate electrode comprises a plurality of first main gate electrode subsections and a plurality of second main gate electrode subsections;
the first main gate electrode subsections are arranged in a point-shaped structure, and a plurality of first main gate electrode subsections are arranged at intervals along the first direction;
the second main gate electrode subsections are arranged into a strip-shaped structure, extend along the first direction, and are connected with two adjacent first main gate electrode subsections at two ends;
a dimension of the second main gate electrode subsection in a third direction perpendicular to the surface of the semiconductor substrate is equal to a dimension of the first main gate electrode subsection in the third direction, and a dimension of the second main gate electrode subsection in the second direction is smaller than a dimension of the first main gate electrode subsection in the second direction.
5. The solar cell of claim 4, wherein the main gate electrode further comprises a third main gate electrode subsection;
the third main gate electrode subsection is arranged in a strip-shaped structure and extends along the second direction;
one end of the third main gate electrode subsection is connected with the first main gate electrode subsection or the second main gate electrode subsection, and the other end of the third electrode subsection is connected with the fine gate electrode;
a dimension of the third main gate electrode subsection in the third direction is equal to a dimension of the first main gate electrode subsection in the third direction, and a dimension of the third main gate electrode subsection in the first direction is smaller than a dimension of the second main gate electrode subsection in the second direction and larger than a dimension of the fine gate electrode subsection in the first direction.
6. The solar cell as claimed in claim 5, wherein the third main gate electrode subsection has a dimension in the first direction that gradually decreases in a direction away from the first or second main gate electrode subsection.
7. The solar cell according to claim 4,
the curvature of the mushroom shaped portion of the second main grid electrode subsection is less than the curvature of the mushroom shaped portion of the first main grid electrode subsection.
8. The solar cell of claim 4, wherein the first main gate electrode subsection has any one of a circular, rectangular, oval, annular, and irregular shape, and has an area of 0.1-10 square millimeters.
9. The solar cell of claim 8, wherein the main gate electrode comprises a coated electrode subsection and a plated electrode subsection;
the coating electrode part is used as a mushroom stem part of the main grid electrode, and the electroplating electrode part is used as a mushroom umbrella part of the main grid electrode;
the coated electrode subsection is an electrode subsection prepared by a coating technique, the plated electrode subsection is an electrode subsection prepared by plating, wherein at least part of the coated electrode subsection is electrically connected to a plating apparatus when plating is performed.
10. The solar cell of claim 9, wherein the thickness of the coated electrode subsection is 5-30 microns and the thickness of the plated electrode subsection is 1-15 microns.
11. The solar cell of claim 9, wherein the plated electrode sections comprise a first main gate metal electrode layer, a second main gate metal electrode layer, and a third main gate metal electrode layer;
the first main gate metal electrode layer is arranged on one surface of the coating electrode subsection far away from the semiconductor substrate, the second main gate metal electrode layer is arranged on one surface of the first main gate metal electrode layer far away from the coating electrode subsection, and the third main gate metal electrode layer is arranged on one surface of the second main gate metal electrode layer far away from the first main gate metal electrode layer;
the first main gate metal electrode layer contains nickel, tungsten, titanium or cobalt, the second main gate metal electrode layer comprises an alloy component formed by aluminum, copper, silver and gold and/or an alloy component formed by nickel, tungsten, titanium and cobalt, and the third main gate metal electrode layer comprises tin or silver.
12. The solar cell of claim 11, wherein the thickness of the second main gate metal electrode layer is greater than the sum of the thicknesses of the first and third main gate metal electrode layers;
the thickness of the first main gate metal electrode layer is 1-3 microns, the thickness of the second main gate metal electrode layer is 5-10 microns, and the thickness of the third main gate metal electrode layer is 1-5 microns.
13. The solar cell of claim 2, further comprising: a passivation layer;
the passivation layer is arranged on a backlight surface and/or a light facing surface of the semiconductor substrate;
a main grid opening structure and a fine grid opening structure are arranged in the passivation layer, a mushroom stem part of the main grid electrode is arranged in the main grid opening structure and connected with the semiconductor substrate, a mushroom umbrella part of the main grid electrode is arranged on one side, away from the semiconductor substrate, of the mushroom stem part, extends out of the passivation layer and covers one side, away from the semiconductor substrate, of the passivation layer;
the mushroom stem part of the thin gate electrode is arranged in the thin gate opening structure and connected with the semiconductor substrate, and the mushroom umbrella part of the thin gate electrode is arranged on one side, away from the semiconductor substrate, of the mushroom stem part, extends out of the passivation layer and covers one surface, away from the semiconductor substrate, of the passivation layer.
14. A photovoltaic module comprising the solar cell of any one of claims 1-13.
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN103730520A (en) * | 2013-12-23 | 2014-04-16 | 友达光电股份有限公司 | Solar cell |
| US20170155007A1 (en) * | 2014-03-26 | 2017-06-01 | Kaneka Corporation | Solar cell module and method for manufacturing same |
| CN110957387A (en) * | 2019-12-24 | 2020-04-03 | 广东爱旭科技有限公司 | Electrode structure of high-efficiency solar cell suitable for step-by-step printing |
| CN210349848U (en) * | 2019-11-08 | 2020-04-17 | 浙江金诺新能源科技有限公司 | Grid-breaking-preventing photovoltaic cell |
| CN112133767A (en) * | 2019-06-24 | 2020-12-25 | 泰州隆基乐叶光伏科技有限公司 | Solar cell and manufacturing method thereof |
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Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103730520A (en) * | 2013-12-23 | 2014-04-16 | 友达光电股份有限公司 | Solar cell |
| US20170155007A1 (en) * | 2014-03-26 | 2017-06-01 | Kaneka Corporation | Solar cell module and method for manufacturing same |
| CN112133767A (en) * | 2019-06-24 | 2020-12-25 | 泰州隆基乐叶光伏科技有限公司 | Solar cell and manufacturing method thereof |
| CN210349848U (en) * | 2019-11-08 | 2020-04-17 | 浙江金诺新能源科技有限公司 | Grid-breaking-preventing photovoltaic cell |
| CN110957387A (en) * | 2019-12-24 | 2020-04-03 | 广东爱旭科技有限公司 | Electrode structure of high-efficiency solar cell suitable for step-by-step printing |
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