CN115145179A

CN115145179A - Processing controller and processing method for data receiving and transmitting shared buffer area

Info

Publication number: CN115145179A
Application number: CN202110348432.1A
Authority: CN
Inventors: 孙明; 周和文; 徐松舟; 黄惠保; 陈卓标
Original assignee: Zhuhai Amicro Semiconductor Co Ltd
Current assignee: Zhuhai Amicro Semiconductor Co Ltd
Priority date: 2021-03-31
Filing date: 2021-03-31
Publication date: 2022-10-04

Abstract

The invention discloses a processing controller and a processing method of a buffer shared by data transceiving, wherein the processing controller comprises a writing module, a communication module and an analysis module, the writing module is used for writing data to be transmitted into the buffer, the communication module is used for transmitting the data to be transmitted and receiving external data, the analysis module is used for analyzing the received external data, and the writing module, the communication module and the analysis module share one buffer for transceiving the data. The processing controller of the invention shares one buffer area for data receiving and sending, can improve the resource utilization rate of the buffer area and the instantaneous data throughput rate, and is beneficial to reducing the BOM cost of products and improving the MCU operation efficiency.

Description

Processing controller and processing method for data receiving and transmitting shared buffer area

Technical Field

The invention relates to the technical field of microelectronics, in particular to a processing controller and a processing method of a data receiving and transmitting shared buffer area.

Background

For synchronous full duplex communication interfaces such as SPI, the data can be synchronously received and sent. In practical use, a receiving data buffer and a sending data buffer are generally separately configured to achieve the purpose of receiving and sending data. Since the receive data buffer and the transmit data buffer are independent of each other, when a data amount of one of the buffers is large and a data amount of the other buffer is small, a buffer resource is wasted. For an MCU with limited RAM space, the RAM occupied by the buffer is usually not negligible, so buffer resource waste should be avoided as much as possible. Therefore, buffer resources should be efficiently utilized, which is beneficial for both reducing product BOM costs and increasing MCU operating efficiency.

Disclosure of Invention

In order to solve the above problems, the present invention provides a processing controller and a processing method for a data transceiving shared buffer, which greatly improve the utilization rate of the buffer resources. The specific technical scheme of the invention is as follows:

a processing controller of a buffer area shared by data transceiving comprises the buffer area, and the processing controller comprises a writing module, a communication module and an analysis module, wherein the writing module is used for writing data to be transmitted into the buffer area, the communication module is used for transmitting the data to be transmitted and receiving external data, the analysis module is used for analyzing the received external data, and the writing module, the communication module and the analysis module share the buffer area to transmit and receive the data. The processing controller of the invention shares one buffer area for data receiving and sending, can improve the resource utilization rate of the buffer area and the instantaneous data throughput rate, and is beneficial to reducing the BOM cost of products and improving the MCU operation efficiency.

Further, the buffer area comprises a plurality of buffer blocks with fixed sizes, and the buffer blocks are provided with indexes which are incremental arithmetic progression and are used for positioning the corresponding buffer blocks. The buffer blocks are allocated with indexes, and the related buffer blocks can be quickly positioned and the transceiving operation of the data can be performed.

Furthermore, the processing controller comprises an updating module, wherein the updating module is used for updating values of four parameters, namely a write buffer block index, a communication buffer block index, a buffer block index to be analyzed and a residual writable length, the write buffer block index, the communication buffer block index and the buffer block index to be analyzed are used for being matched with indexes on the buffer blocks to help locate the corresponding buffer blocks needing to be operated, and the residual writable length represents the size of residual storage space in the buffer blocks located by the write buffer block index. The updating module only needs to update the values of the four parameters, so that the parameters are few, and the maintenance is convenient.

Further, the process controller includes a protection module for preventing the update module from generating an assignment exception upon a parameter update. The protection module can prevent multiple modules from modifying the same parameter in a cross mode to cause assignment abnormity.

A processing method of a data transceiving shared buffer area comprises the following steps: s1, a host divides a buffer area into a plurality of buffer blocks, allocates corresponding indexes to each buffer block, and then reads and writes a buffer block index, a communication buffer block index and a buffer block index to be analyzed; s2, the host machine carries out communication, sends out data to be sent on a buffer block pointed by the communication buffer block index, simultaneously receives external data into the buffer block, and then updates the communication buffer block index, wherein when the host machine executes a command of sending data, the data to be sent finds the pointed buffer block according to the written buffer block index and writes the pointed buffer block; and S3, according to the index of the buffer block to be analyzed, the host analyzes the external data on the corresponding buffer block to eliminate the occupation of the buffer block, so that the buffer block can be used for writing the next data to be analyzed, and the index of the buffer block to be analyzed is updated after the analysis is finished. The processing method of the invention can make the data transmit and receive share one buffer area, improves the resource utilization rate of the buffer area and the instantaneous data throughput rate, and is beneficial to reducing the BOM cost of products and improving the MCU operation efficiency.

Further, in step S2, the data to be transmitted and the external data may be default data, where the default data is preset data without specific meaning.

Further, in step S2, the updating, by the host, the index of the communication buffer block includes the following steps: s11, the host judges whether the next buffer block of the buffer block pointed by the current communication buffer block index is the buffer block pointed by the current written buffer block index, if not, the communication buffer block index is directly updated, and if yes, the S12 is entered; and S12, the host judges whether the next buffer block of the buffer block pointed by the current written buffer block index is the buffer block pointed by the current buffer block index to be analyzed, if so, the data receiving and sending are suspended until the judgment result is negative, and if not, the communication buffer block index, the written buffer block index and the residual writable length are updated. And the data receiving and sending are suspended, so that the data loss caused by the coverage of the unresolved data can be prevented.

Further, in step S2, the writing, by the host, data to be sent into the corresponding buffer block includes the following steps: s21, judging whether the length of the data to be sent is larger than a preset length by the host, splitting the data into a plurality of data blocks smaller than or equal to the preset length if the length of the data to be sent is larger than the preset length, and then entering S22, otherwise, directly entering S22; s22, the host judges whether the length of the data to be written into the buffer block is larger than the residual writable length, if not, the data is written into the buffer block pointed by the current written buffer block index, then the residual writable length is updated, and a writing success mark is returned, if yes, the host continuously judges whether the next buffer block of the buffer block pointed by the current written buffer block index is the buffer block pointed by the current buffer block index to be analyzed, if yes, a writing failure mark is returned, if not, the written buffer block index and the residual writable length are updated, then the data is written into the updated buffer block pointed by the written buffer block index, and a writing success mark is returned; s23, the host repeatedly executes S22 until all data to be sent are written into the buffer block. When the next buffer block is the buffer block corresponding to the buffer block index to be analyzed, data is not written and a failure identifier is returned, so that the data which is not analyzed can be prevented from being covered and data loss is caused.

Furthermore, the updating method of writing the buffer block index, the communication buffer block index or the buffer block index to be analyzed is that a tolerance is added to the value of the index, the tolerance is the tolerance between the indexes, and then the remainder operation is carried out on the number value of the buffer block. The remainder operation may be implemented from the last buffer block back to the first buffer block, forming a loop.

Further, when the write buffer index or the remaining writable length is updated, the protection module performs write lock protection on the write buffer index or the remaining writable length. Write lock protection can prevent multiple modules from modifying the same parameter across to cause assignment exceptions.

Drawings

Fig. 1 is a schematic diagram of a processing controller of a data transceiving common buffer according to an embodiment of the present invention.

Fig. 2 is a flowchart illustrating a processing method of a data transceiving common buffer according to an embodiment of the present invention.

Detailed Description

The following describes the technical solutions in the embodiments of the present invention in detail with reference to the drawings in the embodiments of the present invention. It should be understood that the following specific examples are illustrative only and are not intended to limit the invention.

Referring to fig. 1, a process controller of a data transceiving common buffer includes a write module, a communication module, and an analysis module. The write-in module is used for writing data to be sent into a buffer area, the communication module is used for sending the data to be sent and receiving external data, the analysis module is used for analyzing the received external data, and the write-in module, the communication module and the analysis module share the buffer area to receive and send the data. The buffer area refers to data buffer space at synchronous full-duplex communication interfaces such as SPI. Generally, the data buffer space is provided with a receiving data buffer and a transmitting data buffer for receiving and transmitting data. In this case, if the data amount is large in one of the buffers and small in the other buffer, the data amount-large side may frequently enter a waiting state and the data amount-small side may be idle. This situation can result in wasted resources. Therefore, in the present invention, the processing controller allows data to be transmitted and received in the same buffer. As shown in FIG. 1, the buffer is divided into n buffer blocks and is assigned an index of [0, n-1 ]. The index is applied in a database, the database uses the index to find a specific value, then finds a row containing the value along a pointer, and quickly accesses specific information in a database table. The index is equivalent to the directory of the book, and the required content can be quickly found according to the page number in the directory. The index of the buffer block is fixed and unique, and in this embodiment, the index is an arithmetic series with an increasing tolerance of 1. Preferably, each buffer block can accommodate the same data length, set to M. In the write-in module, two parameters are stored, including a write-in buffer index W pointing to the buffer of the current write-in data and a remaining writable length F of the buffer. Similarly, the communication module stores a communication buffer block index T pointing to a buffer block currently used for communication, and the analysis module stores a buffer block index a to be analyzed pointing to a buffer block currently storing unanalyzed external data. The three modules can be positioned to the relevant buffer blocks through the corresponding indexes and carry out data transceiving.

The processing controller also comprises an updating module used for updating the values of the four parameters of the writing buffer block index W, the residual writable length F, the communication buffer block index T and the buffer block index A to be analyzed. The processing controller also comprises a protection module for preventing the update module from generating assignment exception when the parameter is updated. The protection module adds a mutual exclusion lock or disables interruption and other protection measures to the written buffer block index W and the residual writable length F, and assignment abnormity caused by the fact that multiple modules modify the same parameter in a crossed mode is prevented.

Referring to fig. 2, a method for processing a data transceiving common buffer includes:

step S1, the host divides the buffer area into a plurality of buffer blocks, allocates the buffer blocks to corresponding indexes of each buffer block, and then reads and writes the indexes of the buffer blocks, the indexes of the communication buffer blocks and the indexes of the buffer blocks to be analyzed.

In this embodiment, the initial value of the write buffer index W is 1, which represents that the second buffer currently used for writing the data to be sent is the second buffer. The initialization values of the communication buffer block index T and the buffer block index A to be analyzed are both 0, which represents that the first buffer block is currently used for receiving external data. It is easy to see that the value ranges of W, T and A are all [0, n-1], and the corresponding values are all one of the buffer blocks of the same buffer area. The initialization value of the remaining writable length F is M, i.e. the size of one buffer block.

And S2, the host carries out communication, sends out the data to be sent on the buffer block pointed by the index of the communication buffer block, simultaneously receives external data into the buffer block, and then updates the index of the communication buffer block, wherein when the host executes a command for sending data, the data to be sent finds the pointed buffer block according to the index written in the buffer block and is written in the pointed buffer block.

In this embodiment, the host performs data transmission and data reception once for each communication. The host machine carries out the first communication, the value of the current communication buffer block index T is 0, then the host machine sends out the data in the buffer block 0, and simultaneously receives the external data and enters the buffer block 0. The data in the buffer block may be externally requested data written by the host, or may be default data set in advance without any special meaning. Similarly, the external data received by the host may be data requested by the host, or may be default data. Then the host updates the index T of the communication buffer block, and the method comprises the following steps:

step S11, the host judges whether the next buffer block of the buffer block pointed by the current communication buffer block index is the buffer block pointed by the current write-in buffer block index, if not, the communication buffer block index is directly updated, and if yes, the S12 is entered. In this embodiment, the communication buffer block index T points to the buffer block 0, and the write buffer block index W points to the buffer block 1, so that the next determination is required when the determination condition is satisfied. If the index W points to the buffer block 2, the index T is updated with the formula T = (T + 1)% n, and the index W is not updated.

And S12, judging whether the next buffer block of the buffer block pointed by the current written buffer block index is the buffer block pointed by the current buffer block index to be analyzed by the host computer, if so, suspending data receiving and sending until the judgment result is negative, and if not, updating the communication buffer block index, the written buffer block index and the residual writable length. Since the updated index T points to the buffer block 1 of the index W, it is necessary to further determine whether the updated buffer block of the index W points to the buffer block of the index a. If not, the communication buffer block index T, the write buffer block index W, and the remaining writable length F are updated with the formulas T = (T + 1)% n, W = (W + 1)% n, and F = M. In this embodiment, the updated buffer block of index W is not the buffer block of index a. Therefore, the host update index T is 1, the index W is 2, and the remaining writable length is M. If yes, in order to prevent data loss, data transceiving is suspended, and after data analysis is completed, the index T and the index W are updated.

If the host receives an external data request command during the first communication, the host needs to write the data to be sent into the corresponding buffer block, and the method includes the following steps:

step S21, the host judges whether the length of the data to be sent is larger than a preset length M, if so, the data to be sent is split into a plurality of data blocks smaller than or equal to the preset length M, and then the step S22 is carried out, and if not, the step S22 is directly carried out. If the data volume to be sent is too large and exceeds the data length M which can be accommodated by one buffer block, the data needs to be split and then the next step is carried out. Preferably, a plurality of data blocks with the length of M are firstly split, and the rest data are independently used as one data block. And if the length of the data to be transmitted does not exceed the length M of the data which can be accommodated by one buffer block, directly entering the next step.

Step S22, the host machine judges whether the length of the data to be written into the buffer block is larger than the residual writable length, if not, the data is written into the buffer block pointed by the current written buffer block index, then the residual writable length is updated, and a writing success mark is returned, if yes, the host machine continuously judges whether the next buffer block of the buffer block pointed by the current written buffer block index is the buffer block pointed by the current buffer block index to be analyzed, if yes, a writing failure mark is returned, if not, the written buffer block index and the residual writable length are updated, and then the data is written into the updated buffer block pointed by the written buffer block index, and a writing success mark is returned. The remaining writable length F of buffer block 1 corresponding to the current index W needs to be considered before writing data (after splitting or not) into the buffer block. Assuming that the length of the data is x, if x is less than or equal to F, writing the data into x bytes from the M-F position in the buffer block 1, updating the remaining writable length by using the formula F = F-x, and finally returning a success flag. If x is greater than F, it indicates that buffer block 1 is out of space and data needs to be written into buffer block 2. If the buffer block 2 is just the buffer block corresponding to the buffer block index a to be resolved (this may happen because the buffer block forms a loop), the data cannot be written. Because the data in the buffer block corresponding to index a has not yet been parsed, data loss may result if data is written. At this time, a write failure flag is returned and processing is waited. If the buffer block 2 is not the buffer block corresponding to the index a, updating the write buffer block index W and the remaining writable length F by using the formulas W = (W + 1)% n and F = M-x, then writing the data into the buffer block corresponding to the updated index W, i.e., the buffer block 2, and finally returning a success identifier.

In step S23, the host repeatedly executes S22 until all the data to be sent are written into the buffer block. If there are multiple data blocks to be sent, the host repeats the above steps until all data to be sent are written into the buffer.

In the foregoing step, the host has written data to be sent to buffer block 1 (or more, assuming that only buffer block 1 was written here). At this moment, the data is only temporarily stored and not sent out, and the data in the buffer block 1 can be sent out as long as the host initiates the second communication and can also receive the incoming external data when the value of the communication buffer block index T is 1. Then, the index T is continuously updated, and the same operation can be performed on the subsequent buffer blocks. It should be noted that the host runs a timed communication task in the background, and the communication task can ensure that the host can still work normally when the host does not receive external data or needs no data to be sent for a long time.

During the process of writing the data to be sent into the buffer block and during the process of communication of the host, two parameters, namely the written buffer block index W and the remaining writable length F, may be updated. When the above processes occur simultaneously, in order to avoid assignment abnormality caused by cross modification of the same parameter, the host adds a mutual exclusion lock or disables interrupt and other protection measures to the write buffer block index W and the remaining writable length F to perform write lock protection.

And S3, according to the index of the buffer block to be analyzed, the host analyzes the external data on the corresponding buffer block to eliminate the occupation of the buffer block, so that the buffer block can be used for writing the next data to be analyzed, and the index of the buffer block to be analyzed is updated after the analysis is finished.

After the first communication, it is assumed that external data has been written in the buffer block 0. At this time, the index a of the buffer block to be parsed just points to the buffer block 0, and the host will parse the external data on the buffer block 0. After the parsing is completed, the buffer block index a to be parsed is updated by the formula a = (a + 1)% n. It should be noted that the host may execute the parsing task at regular time to ensure that the external data is transmitted from the buffer block in time, so as to avoid occupying for a long time and affecting efficiency. Before the second communication, it can be seen that if the resolution speed is fast, both index a and index T point to buffer block 1. At this time, the host suspends parsing because the buffer block 1 has not received the external data. That is, when index A and index T are equal, the host does not perform data parsing.

Those skilled in the art will appreciate that all or part of the steps in the method according to the above embodiments may be implemented by a program, which is stored in a storage medium and includes instructions for causing a single chip, a chip, or a processor (processor) to execute all or part of the steps in the method according to the embodiments of the present invention. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and other various media capable of storing program codes.

In the embodiments provided by the present invention, it should be understood that the disclosed system, apparatus and method may be implemented in other ways. For example, the above-described apparatus embodiments are merely illustrative, and for example, the division of the units is only one type of logical functional division, and other divisions may be realized in practice, for example, multiple units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may be in an electrical, mechanical or other form. The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.

Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that changes, modifications, substitutions and alterations can be made in these embodiments without departing from the principles and spirit of the invention, the scope of which is defined in the appended claims and their equivalents, which are to be considered as merely preferred embodiments of the invention, and not intended to be limiting of the invention, and that various changes and modifications may be effected therein by those skilled in the art. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. A processing controller of a data transceiving shared buffer area comprises a buffer area, and is characterized in that the processing controller comprises a writing module, a communication module and an analysis module, wherein,

the writing module is used for writing data to be sent into a buffer,

the communication module is used for sending data to be sent and receiving external data,

the parsing module is used for parsing the received external data,

the writing module, the communication module and the analysis module share the buffer area to receive and transmit data.

2. A process controller for a common buffer for data transmission and reception according to claim 1, wherein the buffer includes a plurality of fixed size buffer blocks, and wherein the buffer blocks have indexes that are incremental arithmetic series for locating corresponding buffer blocks.

3. The processing controller of a data transceiving shared buffer according to claim 1, wherein the processing controller comprises an updating module, the updating module is configured to update values of four parameters, namely a write buffer index, a communication buffer index, a buffer index to be parsed and a remaining writable length, the write buffer index, the communication buffer index and the buffer index to be parsed are used for matching with indexes on the buffer to help locate a corresponding buffer block needing to be operated, and the remaining writable length represents a size of a remaining storage space in the buffer block located by the write buffer index.

4. A process controller for data transceiving common buffer according to claim 1 or 3, wherein the process controller comprises a protection module, and the protection module is configured to prevent the update module from generating assignment exceptions when the parameters are updated.

5. A method for processing a data transceiving common buffer, wherein the method is implemented by using the processing controller of the data transceiving common buffer according to any one of claims 1 to 4, and the method comprises the following steps:

s1, a host divides a buffer area into a plurality of buffer blocks, allocates corresponding indexes to each buffer block, and then reads and writes a buffer block index, a communication buffer block index and a buffer block index to be analyzed;

s2, the host machine carries out communication, sends out data to be sent on a buffer block pointed by the communication buffer block index, simultaneously receives external data into the buffer block, and then updates the communication buffer block index, wherein when the host machine executes a command of sending data, the data to be sent finds the pointed buffer block according to the written buffer block index and writes the pointed buffer block;

6. The method for processing the buffer for data transceiving according to claim 5, wherein in step S2, the data to be transmitted and the external data can be default data, and the default data is data that is preset and has no specific meaning.

7. The method as claimed in claim 5, wherein the step S2 of updating the index of the communication buffer block by the host comprises the steps of:

s11, the host judges whether the next buffer block of the buffer block pointed by the current communication buffer block index is the buffer block pointed by the current write-in buffer block index, if not, the communication buffer block index is directly updated, and if yes, the S12 is carried out;

and S12, the host judges whether the next buffer block of the buffer block pointed by the current written buffer block index is the buffer block pointed by the current buffer block index to be analyzed, if so, the data receiving and sending are suspended until the judgment result is negative, and if not, the communication buffer block index, the written buffer block index and the residual writable length are updated.

8. The method as claimed in claim 5, wherein in step S2, the host writes data to be sent into a corresponding buffer block, and the method comprises the following steps:

s21, judging whether the length of the data to be sent is larger than a preset length by the host, splitting the data into a plurality of data blocks smaller than or equal to the preset length if the length of the data to be sent is larger than the preset length, and then entering S22, otherwise, directly entering S22;

s22, the host judges whether the length of the data to be written into the buffer block is larger than the residual writable length or not,

if not, writing the data into the buffer block pointed by the current writing buffer block index, then updating the residual writable length and returning a writing success identifier,

if so, continuously judging whether the next buffer block of the buffer block pointed by the current written buffer block index is the buffer block pointed by the current buffer block index to be analyzed, if so, returning a writing failure identifier, if not, updating the written buffer block index and the residual writable length, then writing the data into the buffer block pointed by the updated written buffer block index and returning a writing success identifier;

s23, the host repeatedly executes S22 until all the data to be sent are written into the buffer block.

9. The method as claimed in claim 5, 7 or 8, wherein the buffer index to be written, the communication buffer index or the buffer index to be analyzed is updated by adding a tolerance to the value of the index, wherein the tolerance is a tolerance between the indexes, and then performing a remainder operation on the value of the buffer.

10. The method as claimed in claim 7 or 8, wherein the protection module performs write lock protection on the write buffer index or the remaining writable length when updating.