CN115142125A - Thickness consistency adjusting method for single-chip CVD epitaxial process - Google Patents

Thickness consistency adjusting method for single-chip CVD epitaxial process Download PDF

Info

Publication number
CN115142125A
CN115142125A CN202210163715.3A CN202210163715A CN115142125A CN 115142125 A CN115142125 A CN 115142125A CN 202210163715 A CN202210163715 A CN 202210163715A CN 115142125 A CN115142125 A CN 115142125A
Authority
CN
China
Prior art keywords
air inlet
inlet pipe
thickness
flow
adjusting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202210163715.3A
Other languages
Chinese (zh)
Inventor
袁肇耿
吴晓琳
王刚
王凯达
张晓博
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
HEBEI POSHING ELECTRONICS TECHNOLOGY CO LTD
Original Assignee
HEBEI POSHING ELECTRONICS TECHNOLOGY CO LTD
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by HEBEI POSHING ELECTRONICS TECHNOLOGY CO LTD filed Critical HEBEI POSHING ELECTRONICS TECHNOLOGY CO LTD
Priority to CN202210163715.3A priority Critical patent/CN115142125A/en
Publication of CN115142125A publication Critical patent/CN115142125A/en
Pending legal-status Critical Current

Links

Images

Classifications

    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B25/00Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
    • C30B25/02Epitaxial-layer growth
    • C30B25/16Controlling or regulating
    • C30B25/165Controlling or regulating the flow of the reactive gases
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/455Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
    • C23C16/45563Gas nozzles
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B25/00Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
    • C30B25/02Epitaxial-layer growth
    • C30B25/14Feed and outlet means for the gases; Modifying the flow of the reactive gases
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B25/00Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
    • C30B25/02Epitaxial-layer growth
    • C30B25/18Epitaxial-layer growth characterised by the substrate
    • C30B25/186Epitaxial-layer growth characterised by the substrate being specially pre-treated by, e.g. chemical or physical means
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/02Elements
    • C30B29/06Silicon

Abstract

The invention provides a thickness consistency adjusting method of a single-chip CVD epitaxial process, belonging to the technical field of semiconductor manufacturing, and the adjusting method comprises the following steps: putting the substrate into a reaction chamber, and heating to perform H 2 Baking and HCl high-temperature corrosion polishing; then H is introduced again 2 Purging and cleaning the reaction cavity; and adjusting needle valves of the five air inlet pipes to enable the silicon source and the dopant with preset flow to be respectively introduced into different positions corresponding to the air inlets, and growing epitaxial monocrystalline silicon wafers with preset thickness and resistivity on the substrate. The thickness of the single-chip CVD epitaxial process provided by the invention is consistentAccording to the sex adjustment method, the plurality of air inlets are correspondingly arranged in the reaction cavity through the plurality of air inlet pipes, and due to the fact that the number of air inlet points is increased, the accuracy of air inlet flow is improved under the condition that the total air inlet amount is not changed, and therefore the uniformity of the thickness of the epitaxial wafer can be improved.

Description

Thickness consistency adjusting method for single-chip CVD epitaxial process
Technical Field
The invention belongs to the technical field of silicon wafer epitaxy, and particularly relates to a thickness consistency adjusting method for a single-wafer CVD (chemical vapor deposition) epitaxy process.
Background
The silicon epitaxial wafer is a semiconductor material widely applied to various semiconductor devices and circuits, is a bridge link of a basic material and the semiconductor devices, and the devices and circuits based on the silicon epitaxial wafer have the characteristics of high performance, diversity and low cost. The single-chip CVD epitaxial furnace is generally suitable for processing low-voltage thin-layer parameters such as Schottky, low-voltage MOS, CIS devices and the like, the uniformity of the inside and the outside of the chip is superior to that of a plurality of epitaxial furnaces, but with the development of large-diameter silicon epitaxial wafers, the requirements of the inside of the chip are stricter, and the process difficulty is gradually increased.
A conventional process adjustment is to adjust the internal and external airflow proportion to control the uniformity in the slice through an internal and external airflow needle valve, but the prior epitaxial furnace adopts two paths of air inlet, has a narrow adjustment range and has the position in the slice which cannot be adjusted by the needle valve; another conventional approach is to adjust the gas flow by primary hydrogen, but long term changes in primary hydrogen are detrimental to the stability of the transition zone and the repeatability of the process on-line monitoring. Therefore, the conventional process cannot obtain uniform epitaxial wafers, and the performance, diversity and production cost of the device are limited.
Disclosure of Invention
The embodiment of the invention provides a thickness consistency adjusting method for a single-chip CVD epitaxial process, aiming at solving the problem of poor in-chip consistency of the thickness of an epitaxial wafer prepared by a conventional process and improving the performance of an epitaxial wafer-based device.
In order to achieve the purpose, the invention adopts the technical scheme that: a thickness consistency adjusting method of a single-chip CVD epitaxial process is provided, and comprises the following steps:
putting the substrate into a reaction chamber, heating to carry out H 2 Baking and HCl high-temperature corrosion polishing;
then H is introduced again 2 Purging and cleaning the reaction cavity;
adjusting needle valves of the multiple air inlet pipes to enable the air inlet ports to be correspondingly and differently filled with a silicon source and a dopant with preset flow, and growing epitaxial monocrystalline silicon wafers with preset thickness on the substrate base plate; the multi-path air inlet pipe at least comprises three air inlet pipes.
In one possible implementation manner, the substrate base plate is doped with at least one of arsenic, phosphorus and boron, and the crystal orientation is <100> or <111>.
In one possible implementation, the temperature rise temperature is 1130-1190 ℃; h 2 The baking flow is 40-100L/min, and the baking time is 20-60s.
In one possible implementation, the HCl polishing rate is 0.03-0.1um/min.
In one possible implementation, the H 2 In the purge, H 2 The flow rate is 60-120L/min.
In one possible implementation, the silicon source is SiHCl 3 The dopant is borane or phosphine.
In a possible implementation manner, the multiple intake pipes include five intake pipes, and the method for adjusting the five intake pipes includes: the five air inlet pipes are named as a first air inlet pipe, a second air inlet pipe, a third air inlet pipe, a fourth air inlet pipe and a fifth air inlet pipe from left to right in sequence;
and adjusting a needle valve, reducing the flow of the first air inlet pipe and the flow of the fifth air inlet pipe, keeping the flow of the second air inlet pipe and the flow of the fourth air inlet pipe unchanged, increasing the flow of the third air inlet pipe, keeping the total air inlet amount unchanged, and obtaining the epitaxial monocrystalline silicon wafer, wherein the center thickness is thickened by 8.7%, the 1/2 radius position is thickened by 5.8%, the edge thickness is thickened by 1%, the thickness of the obtained epitaxial monocrystalline wafer is high in the center, the edge is low, and the 1/2 radius position is the lowest point.
In a possible implementation manner, the multiple intake pipes include five intake pipes, and the method for adjusting the five intake pipes includes: the five air inlet pipes are named as a first air inlet pipe, a second air inlet pipe, a third air inlet pipe, a fourth air inlet pipe and a fifth air inlet pipe from left to right in sequence;
and adjusting a needle valve, increasing the flow of the second air inlet pipe and the fourth air inlet pipe, reducing the flow of the first air inlet pipe, the third air inlet pipe and the fifth air inlet pipe, keeping the total air inlet amount unchanged, thinning the center thickness of the obtained epitaxial monocrystalline silicon wafer by 3.2%, thickening the 1/2 radius position by 0.37%, and keeping the edge thickness basically stable and unchanged.
In a possible implementation manner, the multiple intake pipes include five intake pipes, and the method for adjusting the five intake pipes includes: the five air inlet pipes are named as a first air inlet pipe, a second air inlet pipe, a third air inlet pipe, a fourth air inlet pipe and a fifth air inlet pipe from left to right in sequence;
the flow of the needle valve, the flow of the second air inlet pipe and the flow of the fourth air inlet pipe are increased by 1L, the flow of the third air inlet pipe is kept unchanged, the flow of the first air inlet pipe and the flow of the fifth air inlet pipe are respectively reduced by 0.5L, the total air inlet amount is unchanged, the center thickness and the edge thickness of the obtained epitaxial monocrystalline silicon wafer are basically stable and unchanged, and the 1/2 radius position is thickened by 1.68%.
Compared with the prior art, the thickness consistency adjusting method of the single-chip CVD epitaxial process provided by the embodiment of the invention has the advantages that the multiple air inlet pipes are correspondingly arranged in the reaction cavity, and the accuracy of air inlet flow is improved under the condition that the total air inlet amount is not changed due to the increase of the air inlet points, so that the on-chip consistency of the thickness of the epitaxial wafer can be improved, and the device performance based on the epitaxial wafer is improved.
Drawings
FIG. 1 is a 13-point thickness uniformity profile of a conventional epitaxial wafer;
fig. 2 is a 13-point thickness uniformity distribution diagram of an epitaxial wafer grown by the thickness uniformity adjustment method of the monolithic CVD epitaxial process according to the embodiment of the present invention;
FIG. 3 is a line drawing of a 13-point thickness profile of a conventional epitaxial wafer;
fig. 4 is a 13-point thickness uniformity line graph of an epitaxial wafer grown by the thickness uniformity adjustment method of the monolithic CVD epitaxial process according to the embodiment of the present invention;
FIG. 5 is a three-dimensional view of a conventional epitaxial wafer;
fig. 6 is a three-dimensional view of epitaxial wafer growth provided by an embodiment of the present invention;
FIG. 7 is a schematic structural diagram of epitaxial furnace pipeline distribution adopted in the embodiment of the present invention;
description of the reference numerals:
1. a first intake pipe; 2. a second intake pipe; 3. a third intake pipe; 4. a fourth intake pipe; 5. and a fifth intake pipe.
Detailed Description
In order to make the technical problems, technical solutions and advantageous effects to be solved by the present invention more clearly apparent, the present invention is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and do not limit the invention.
Referring to fig. 7, a method for adjusting the thickness uniformity of a single-wafer CVD epitaxial process according to the present invention will now be described. The equipment single-chip epitaxial furnace used by the invention can be a domestic E200 epitaxial furnace, adopts an infrared radiation mode for heating, and is changed from the existing two-way air inlet pipe into a five-way air inlet pipe.
The thickness consistency adjusting method for the single-chip CVD epitaxial process provided by the embodiment of the invention comprises the following steps:
step one, a monocrystalline silicon polished wafer is selected as a substrate, the substrate is suitable for 5-8 inches, the substrate is doped with at least one of arsenic, phosphorus and boron, and the crystal orientation of the substrate can be <100> <111 >;
secondly, the graphite base and the quartz reaction cavity are treated at high temperature by using HCl, and residual reactants are removed;
step three, loading the substrate base plate into a graphite base groove with a silicon carbide coating in the reaction cavity through an equipment manipulator;
step four, heating up, and carrying out H 2 Baking and corroding by HCl gas to polish the surface of the silicon wafer;
step five, introducing H again 2 Purging and cleaning the reaction cavity;
step six, adjusting needle valves of the multiple paths of air inlet pipes, leading silicon sources and dopants with preset flow rates into different positions corresponding to the air inlet ports, and growing epitaxial monocrystalline silicon wafers with preset thicknesses on the substrate base plate; wherein, the multichannel intake pipe includes three routes intake pipe at least.
Compared with the prior art, the thickness consistency adjusting method of the single-wafer CVD epitaxial process has the advantages that at least three air inlets are correspondingly arranged in the reaction cavity through the air inlet pipes with more than three paths, and due to the fact that air inlet point positions are increased, accuracy of air inlet flow is improved under the condition that total air inlet amount is not changed, and therefore uniformity of thickness of an epitaxial wafer can be improved.
The invention adopts needle valves to adjust the flow, and each air inlet pipe is provided with an adjusting needle valve and a display flowmeter. The needle valve is used for adjusting the opening degree of each path of airflow, and the flowmeter displays the actual flow under the current opening degree.
The following embodiments of the present invention are described by taking five intake pipes as an example, but the present invention is not limited to the five intake pipes, for example, three intake pipes are provided.
The five air inlet pipes and the corresponding five needle valves are respectively marked as a first air inlet pipe 1, a second air inlet pipe 2, a third air inlet pipe 3, a fourth air inlet pipe 4 and a fifth air inlet pipe 5 from left to right, the third air inlet pipe 3 is in the middle position, the first air inlet pipe 1 is symmetrical to the fifth air inlet pipe 5, the second air inlet pipe 2 is symmetrical to the fourth air inlet pipe 4, and specific flow data are displayed through equipment software.
In the fourth step, the temperature rise is 1130-1190 ℃; h 2 The baking flow is 40-100L/min, and the baking time is 20-60s; the HCl polishing rate is 0.03-0.1um/min. Preferably, the process temperature is 1120-1170 ℃, the speed is 2.0-6.0um/min, and the main hydrogen flow is 40-80L/min.
In the fifth step, H is carried out after polishing 2 Purging to reduce contamination of the chamber and the susceptor by volatiles; wherein H 2 The flow rate is 60-120L/min.
In the sixth step, the growth of the epitaxial layer adopts hydrogen to reduce trichlorosilane to generate monocrystalline silicon, and the reaction equation is SiHCl 3 +H 2 = Si +3HCl; tong (Chinese character of 'tong')Adding a silicon source and a doping agent, and carrying out chemical reaction according to a formula; the silicon source, doping, introduction amount and introduction time are set according to the required rate, thickness and resistivity of the product. Wherein the silicon source is SiHCl 3 The dopant is borane or phosphine. The sum of the five paths of airflow is the total gas inlet amount of equipment participating in the epitaxial reaction and is only influenced by the process formula.
The epitaxial wafer needs to be grown according to the design requirement, so that the process debugging is needed to achieve the epitaxial wafer with the consistent thickness required by the design, in the process debugging process, the 1 path of needle valve is adjusted, the size of the path of air flow changes along with the change of the opening degree, the change quantity is related to the proportion of the needle valve, and whether the required set value is achieved or not is judged by reading the flowmeter. In the debugging process, the rest four paths of airflow also change, and the sum of the five paths of airflow is unchanged.
The process debugging is divided into the following three conditions, the following conclusion is obtained according to data analysis, and then one of the conditions is selected according to the design requirement to grow and obtain the epitaxial wafer with uniform thickness.
The first embodiment is as follows: and adjusting a needle valve, reducing two paths of air flows of the first air inlet pipe 1 and the fifth air inlet pipe 5, keeping the flow of the second air inlet pipe 2 and the flow of the fourth air inlet pipe 4 unchanged, and only increasing the flow of the third air inlet pipe 3. The data results in table 1 show that the overall thickness of the epitaxial wafer is obviously improved and the speed is increased; the thickness of the center is thickened by 8.7%, the thickness of the 1/2 radius position is thickened by 5.8%, and the thickness of the edge is thickened by only 1%. The whole in-chip trend changes from high at the center low edge to low at the center high edge, and the radius position is always at the lowest point;
it can be concluded that: the flow of the two air inlet pipes at the outermost side is positively correlated with the edge thickness, the flow of the one air inlet pipe at the middle side is positively correlated with the center thickness, the thickness of the 1/2 radius position is positively correlated, and the change of the thickness of the one air inlet pipe is obviously less than that of the center thickness.
TABLE 1
Figure BDA0003515108020000061
Figure BDA0003515108020000062
Example two: adjusting a needle valve, increasing two paths of air flows of a second air inlet pipe 2 and a fourth air inlet pipe 4, and correspondingly reducing the flow rates of a first air inlet pipe 1, a third air inlet pipe 3 and a fifth air inlet pipe 5 because the total air inlet amount is unchanged, wherein the smaller proportion is positively correlated with the opening degree of the needle valve; the data result in table 2 shows that after the airflows of the second air inlet pipe and the fourth air inlet pipe are increased, the central thickness is reduced by 3.2% and the radius is increased by 0.37% along with the reduction of the flows of the two outermost pipes and the flow of the middle one, and the airflows of the first air inlet pipe and the fifth air inlet pipe are reduced, but the edges are 6mm and basically stable.
It can be concluded that: the increase of the airflow of the second air inlet pipe 2 and the fourth air inlet pipe 4 is positively correlated with the change of the radius thickness, and simultaneously, the thickness of the edge is also positively correlated.
TABLE 2
Figure BDA0003515108020000063
Figure BDA0003515108020000071
Figure BDA0003515108020000072
Example three: the needle valve is adjusted, the flow of the second air inlet pipe 2 and the flow of the fourth air inlet pipe 4 are increased by 1L, the flow of the middle path is kept unchanged, the flow of the first air inlet pipe 1 and the flow of the fifth air inlet pipe 5 are respectively reduced by 0.5 liter, and the data test of the table 3 shows that the radius thickness of 1/2 is increased by 1.68 percent, and the thickness of the center and the edge are basically unchanged.
It can be concluded that: the increment of the edge thickness by the two paths of the second air inlet pipe 2 and the fourth air inlet pipe 4 is basically equal to the decrement of the edge thickness by the two paths of the first air inlet pipe 1 and the fifth air inlet pipe 5.
TABLE 3
Figure BDA0003515108020000073
Figure BDA0003515108020000074
The main conclusions can be drawn from the data of the above three examples as follows: the thickness of the central area is mainly positively correlated with the third air inlet pipe 3, namely the flow of the air flow in the middle, the thickness of the radius area is positively correlated with the flow of the air flow in the second air inlet pipe 2 and the fourth air inlet pipe 4, and the thickness of the edge area is positively correlated with the flow of the air flow in the first air inlet pipe 1, the second air inlet pipe 2, the fourth air inlet pipe 4 and the fifth air inlet pipe 5.
TABLE 4
Figure BDA0003515108020000081
According to the optimal data obtained in each example and shown in table 4, by adjusting each needle valve, the thickness consistency of 8-inch products can be obtained, the optimal result of 13 points is 0.59%, and the situation of lower radius is obviously improved.
Referring to fig. 1 to 4, an infrared film thickness tester was used to test the center + radius 4 point +10mm 4 point +6mm 4 point of the epitaxial silicon wafer prepared by the present invention for 13 points in total, and the uniformity was calculated to improve by 30% or more.
Fig. 1 and 2 are distribution diagrams of 13 points of thickness uniformity before and after improvement, and it can be seen from the distribution diagrams that in order to improve the front thickness distribution, the uniformity of the thickness in the sheet is 1.96%, wherein the thickest point is in the central and edge regions, the thinnest point is in the radius region, and the radius position cannot be adjusted by the conventional two-way air inlet device, so that the uniformity of the thickness in the sheet cannot be improved; the improved thickness distribution has the consistency of the thickness in the sheet of 0.59 percent, the radius thickness is obviously improved through point position data, and the thickness at the radius position can be effectively adjusted, such as increased or reduced, through a new process five-way adjustment method.
Therefore, compared with the prior art, the two air inlet pipes in the prior art can not adjust the airflow at the radius position, so that the thickness of the epitaxial wafer at the radius position is lower, and the airflow at the radius position can be effectively adjusted, so that the consistency in the whole epitaxial wafer is improved by more than 30%.
Fig. 3 and 4 are line graphs of 13-point thickness distribution before and after improvement, which are linear thickness test data of the silicon epitaxial wafer, respectively tested from left to right, and it can be seen from comparison that after the five-way air inlet process is changed into debugging, the radius position can be obviously improved. The problem of previous non-adjustability is improved.
Fig. 5 and 6 are three-dimensional perspective views of silicon epitaxial growth before and after improvement, wherein the X axis and the Y axis represent horizontal and vertical coordinates of a test point position on a silicon epitaxial wafer, and the Z axis represents a thickness value. It can be seen that the trend of radius thickness depression is obviously improved after five-way process improvement.
In the above embodiments, the descriptions of the respective embodiments have respective emphasis, and reference may be made to the related descriptions of other embodiments for parts that are not described or illustrated in a certain embodiment.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents and improvements made within the spirit and principle of the present invention are intended to be included within the scope of the present invention.

Claims (9)

1. A thickness consistency adjusting method for a single-chip CVD epitaxial process is characterized by comprising the following steps:
putting the substrate into a reaction chamber, and heating to perform H 2 Baking and HCl high-temperature corrosion polishing;
then H is introduced again 2 Purging and cleaning the reaction cavity;
adjusting needle valves of the multiple air inlet pipes, leading silicon sources and dopants with preset flow rates to different positions corresponding to the air inlets respectively, and growing epitaxial monocrystalline silicon wafers with preset thickness and resistivity on the substrate base plate; wherein, the multichannel intake pipe includes three routes intake pipe at least.
2. The method of claim 1, wherein said substrate is doped with at least one of arsenic, phosphorus, and boron to a crystal orientation of <100> or <111>.
3. The method of claim 1, wherein the temperature rise is 1130 to 1190 ℃; h 2 The baking flow is 40-100L/min, and the baking time is 20-60s.
4. The method of claim 1, wherein the HCl polishing rate is 0.03-0.1um/min.
5. The method of claim 1, wherein H is selected from the group consisting of 2 In purging, H 2 The flow rate is 60-120L/min.
6. The method of claim 1, wherein the silicon source is SiHCl 3 The dopant is borane or phosphine.
7. The method for adjusting the thickness consistency of the single-chip CVD epitaxial process of any one of claims 1 to 6, wherein the multiple air inlet pipes comprise five air inlet pipes, and the adjusting method of the five air inlet pipes comprises the following steps: the five air inlet pipes are sequentially named as a first air inlet pipe (1), a second air inlet pipe (2), a third air inlet pipe (3), a fourth air inlet pipe (4) and a fifth air inlet pipe (5) from left to right;
and (3) adjusting a needle valve, reducing the flow of the first air inlet pipe (1) and the flow of the fifth air inlet pipe (5), keeping the flow of the second air inlet pipe (2) and the flow of the fourth air inlet pipe (4) unchanged, increasing the flow of the third air inlet pipe (3), keeping the total air inlet amount unchanged, thickening the center thickness of the obtained epitaxial monocrystalline silicon wafer by 8.7%, thickening the radius position of 1/2 by 5.8%, thickening the edge thickness by 1%, and taking the thickness of the obtained epitaxial monocrystalline silicon wafer as the center height, and the edge height, and taking the radius position of 1/2 as the lowest point.
8. The method for adjusting the thickness uniformity of a monolithic CVD epitaxial process according to any one of claims 1 to 6, wherein the multiple air inlet pipes comprise five air inlet pipes, and the adjusting method of the five air inlet pipes comprises the following steps: the five air inlet pipes are sequentially named as a first air inlet pipe (1), a second air inlet pipe (2), a third air inlet pipe (3), a fourth air inlet pipe (4) and a fifth air inlet pipe (5) from left to right;
and adjusting a needle valve, increasing the flow of the second air inlet pipe (2) and the fourth air inlet pipe (4), reducing the flow of the first air inlet pipe (1), the third air inlet pipe (3) and the fifth air inlet pipe (5), keeping the total air inlet amount unchanged, thinning the center thickness of the obtained epitaxial monocrystalline silicon wafer by 3.2%, thickening the radius position of 1/2 by 0.37%, and keeping the edge thickness basically stable and unchanged.
9. The method for adjusting the thickness uniformity of a monolithic CVD epitaxial process according to any one of claims 1 to 6, wherein the multiple air inlet pipes comprise five air inlet pipes, and the adjusting method of the five air inlet pipes comprises the following steps: the five air inlet pipes are sequentially named as a first air inlet pipe (1), a second air inlet pipe (2), a third air inlet pipe (3), a fourth air inlet pipe (4) and a fifth air inlet pipe (5) from left to right;
and adjusting a needle valve, increasing the flow of the second air inlet pipe (2) and the fourth air inlet pipe (4) by 1L, keeping the flow of the third air inlet pipe (3) unchanged, reducing the flow of the first air inlet pipe (1) and the flow of the fifth air inlet pipe (5) by 0.5L respectively, keeping the total air inlet amount unchanged, and basically stabilizing the center thickness and the edge thickness of the obtained epitaxial monocrystalline silicon wafer and thickening the 1/2 radius position by 1.68%.
CN202210163715.3A 2022-02-22 2022-02-22 Thickness consistency adjusting method for single-chip CVD epitaxial process Pending CN115142125A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202210163715.3A CN115142125A (en) 2022-02-22 2022-02-22 Thickness consistency adjusting method for single-chip CVD epitaxial process

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202210163715.3A CN115142125A (en) 2022-02-22 2022-02-22 Thickness consistency adjusting method for single-chip CVD epitaxial process

Publications (1)

Publication Number Publication Date
CN115142125A true CN115142125A (en) 2022-10-04

Family

ID=83405538

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202210163715.3A Pending CN115142125A (en) 2022-02-22 2022-02-22 Thickness consistency adjusting method for single-chip CVD epitaxial process

Country Status (1)

Country Link
CN (1) CN115142125A (en)

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20130145984A1 (en) * 2010-08-31 2013-06-13 Chao Zhang Method of epitaxial growth effectively preventing auto-doping effect
CN103337506A (en) * 2013-06-17 2013-10-02 中国电子科技集团公司第四十六研究所 Preparation technology of silicon epitaxial wafer for CCD device
CN104269354A (en) * 2014-10-23 2015-01-07 中国电子科技集团公司第四十六研究所 Method for improving thickness homogeneity of silicon extending slices for CCD device
CN106128938A (en) * 2016-08-01 2016-11-16 中国电子科技集团公司第四十六研究所 A kind of VDMOS device method preparing thick-layer extension on thin Sb substrate
CN110400768A (en) * 2019-08-01 2019-11-01 北京北方华创微电子装备有限公司 Reaction chamber
CN111463115A (en) * 2020-04-27 2020-07-28 中国电子科技集团公司第四十六研究所 Preparation method of silicon epitaxial wafer for Schottky device
CN211897166U (en) * 2019-11-28 2020-11-10 北京北方华创微电子装备有限公司 Air intake device and semiconductor device

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20130145984A1 (en) * 2010-08-31 2013-06-13 Chao Zhang Method of epitaxial growth effectively preventing auto-doping effect
CN103337506A (en) * 2013-06-17 2013-10-02 中国电子科技集团公司第四十六研究所 Preparation technology of silicon epitaxial wafer for CCD device
CN104269354A (en) * 2014-10-23 2015-01-07 中国电子科技集团公司第四十六研究所 Method for improving thickness homogeneity of silicon extending slices for CCD device
CN106128938A (en) * 2016-08-01 2016-11-16 中国电子科技集团公司第四十六研究所 A kind of VDMOS device method preparing thick-layer extension on thin Sb substrate
CN110400768A (en) * 2019-08-01 2019-11-01 北京北方华创微电子装备有限公司 Reaction chamber
CN211897166U (en) * 2019-11-28 2020-11-10 北京北方华创微电子装备有限公司 Air intake device and semiconductor device
CN111463115A (en) * 2020-04-27 2020-07-28 中国电子科技集团公司第四十六研究所 Preparation method of silicon epitaxial wafer for Schottky device

Similar Documents

Publication Publication Date Title
JP2790009B2 (en) Method and apparatus for growing silicon epitaxial layer
EP1043763B1 (en) Vapor growth apparatus for semiconductor wafers with dopant gas feed assembly
CN104718601B (en) Manufacturing method for 4H-SiC epitaxial wafer with SiC epitaxial film
US8709156B2 (en) Methods for producing epitaxially coated silicon wafers
CN111463115B (en) Preparation method of silicon epitaxial wafer for Schottky device
US20140187024A1 (en) Method of forming seed layer, method of forming silicon film, and film forming apparatus
KR100680122B1 (en) Semiconductor wafer and its manufacturing method
JP4588894B2 (en) Vapor phase growth apparatus and epitaxial wafer manufacturing method
CN109371471B (en) Growth method of double-layer epitaxial wafer and double-layer epitaxial wafer
KR100246119B1 (en) Forming method of doped thin film
CN115142125A (en) Thickness consistency adjusting method for single-chip CVD epitaxial process
CN111554565A (en) Preparation process of silicon 8-inch high-power component epitaxial wafer
CN107546101A (en) A kind of epitaxial growth method
TW202300696A (en) Control device and control method for single-wafer type epitaxial growth device, and epitaxial wafer manufacturing system
CN105489478B (en) The regulation and control method of heavily doped phosphorus Substrate lamina extension transition region
JP2005353665A (en) Epitaxial vapor phase growth system and gradient angle setting method for partition member of gas inlet for the vapor phase growth system
CN105671631B (en) Method for cleaning back surface of 200mm-300mm epitaxial equipment base in situ
CN110767531B (en) Preparation method of epitaxial wafer
TW202249070A (en) Epitaxial growth method and equipment
CN117587507B (en) Method and device for improving doping uniformity of silicon carbide epitaxial wafer
CN220079255U (en) Epitaxial growth system
CN112442677A (en) Furnace tube and method for introducing reaction gas into furnace tube
CN113249786B (en) Gas inlet structure and semiconductor process equipment
CN110852021B (en) Method for obtaining epitaxial flatness based on simulation mode
Suzuki et al. Si epitaxial growth of extremely uniform layers by a controlled supplemental gas adding system

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination