CN115132674A - Display panel and display device - Google Patents
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- CN115132674A CN115132674A CN202210756052.6A CN202210756052A CN115132674A CN 115132674 A CN115132674 A CN 115132674A CN 202210756052 A CN202210756052 A CN 202210756052A CN 115132674 A CN115132674 A CN 115132674A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1218—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or structure of the substrate
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
- G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
- G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
- G09F9/33—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements being semiconductor devices, e.g. diodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
- H01L27/153—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars
- H01L27/156—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars two-dimensional arrays
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Theoretical Computer Science (AREA)
- Electroluminescent Light Sources (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
The application provides a display panel and display device, display panel includes the display area, and the display area includes first region and second area, includes: the first region and the driving transistor are at least partially overlapped, the second region and the driving transistor are not overlapped, namely the driving transistor is not located in the second region at all, a first film layer group is arranged on one side, away from the substrate, of the grid electrode of the driving transistor, the thickness of the first film layer group is H1 in the first region, the thickness of the first film layer group is H2 in the second region, and H2 & gtH 1 & gt0. The thickness of the first film layer group above the grid of the driving transistor is smaller than that of the second region, so that the thickness of the film layer of the first region where the driving transistor is located is thinner, heat can be more easily dissipated through the thinner first film layer group when the driving transistor dissipates heat, the heat dissipation performance of the display panel is improved, and the damage probability of the display panel caused by the heat is reduced.
Description
Technical Field
The present invention relates to the field of display technologies, and in particular, to a display panel and a display device.
Background
With the rapid development of terminal devices, higher requirements are put on the display of the terminal devices. The current display technology field is mainly divided into Liquid Crystal Display (LCD), Organic Light Emitting Display (OLED) and Micro-light emitting diode (Micro-LED) display. The micro light emitting diode display is a new generation of display technology, and the micro light emitting diode display has the advantages of high brightness, high light emitting efficiency, low power consumption and the like, and can realize single-point drive light emission by carrying out micro, thin film and array on a diode structure.
Usually, the micro light emitting diode is fabricated above the driving circuit, so that the driving circuit provides a driving current for the micro light emitting diode, but the driving circuit has a larger load and generates more heat because the micro light emitting diode needs a larger current for driving, and thus there is a heat dissipation requirement for the display panel.
Disclosure of Invention
In view of the above, an object of the present invention is to provide a display panel and a display device, which can improve the heat dissipation performance of the display panel and reduce the probability of the display panel being damaged by heat.
The embodiment of the present application provides a display panel, display panel includes the display area, the display area includes first region and second region, includes:
the driving transistor is positioned on one side of the substrate, the first area and the driving transistor are at least partially overlapped in a direction perpendicular to the plane of the substrate, and the second area and the driving transistor are not overlapped;
one side of the grid electrode of the driving transistor, which is far away from the substrate, is provided with a first membrane layer group, the thickness of the first membrane layer group is H1 in the first area, and the thickness of the first membrane layer group is H2 in the second area, and H2 is larger than H1 and is larger than 0.
Optionally, a light emitting device is disposed on a side of the first film group facing away from the substrate, and the driving transistor and the light emitting device are not overlapped at least in a partial region.
Optionally, the gate of the driving transistor and the light emitting device do not overlap at all.
Optionally, in a direction perpendicular to the plane of the substrate, a projected area of the first region at least covers a projected area of the gate of the driving transistor.
Optionally, the first film layer group includes a first film layer having a first trench in the first region, and the first trench overlaps at least the gate of the driving transistor in a direction perpendicular to the plane of the substrate.
Optionally, the first film layer group comprises a second film layer located between the first film layer and the gate of the driving transistor;
the second film layer is provided with a second groove, a heat dissipation metal structure is arranged in the second groove, and the heat dissipation metal structure is connected with the grid electrode of the driving transistor.
Optionally, the first trench overlaps the second trench in a direction perpendicular to a plane of the substrate.
Optionally, in a direction parallel to the plane of the substrate, the first groove penetrates through the first film layer to form a heat dissipation channel.
Optionally, a fluid is introduced into the heat dissipation channel to dissipate heat of the driving transistor.
An embodiment of the present application further provides a display device including the display panel according to any one of the above embodiments.
The embodiment of the application provides a display panel and display device, and display panel includes the display area, and the display area includes first region and second area, and display panel includes: the first region and the driving transistor are at least partially overlapped in the direction perpendicular to the plane of the substrate, the second region and the driving transistor are not overlapped, namely the driving transistor is not located in the second region at all, a first film layer group is arranged on the side, away from the substrate, of the grid electrode of the driving transistor, the thickness of the first film layer group is H1 in the first region, the thickness of the first film layer group is H2 in the second region, and H2 & gtH 1 & gt0. That is to say, the thickness of the first film layer group above the gate of the driving transistor is smaller in the first region than in the second region, so that the film thickness of the first region where the driving transistor is located is thinner, and when the driving transistor dissipates heat, heat is more easily dissipated through the thinner first film layer group, thereby improving the heat dissipation performance of the display panel and reducing the damage probability of the display panel caused by heat.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings used in the embodiments or the prior art descriptions will be briefly described below, and it is obvious that the drawings in the following descriptions are some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative efforts.
FIG. 1 is a schematic cross-sectional view of a display panel;
fig. 2 is a schematic structural diagram of a display panel provided in an embodiment of the present application;
FIG. 3 is a schematic cross-sectional view of the display panel taken along the direction of BB' in FIG. 2;
fig. 4 is a schematic top view illustrating a heat dissipation channel according to an embodiment of the present disclosure;
fig. 5 is a schematic cross-sectional view illustrating another display panel provided in an embodiment of the present application;
fig. 6 shows a schematic structural diagram of a light emitting device provided in an embodiment of the present application;
fig. 7 is a schematic cross-sectional view illustrating a display panel according to an embodiment of the present disclosure;
fig. 8 is a schematic cross-sectional view illustrating a further display panel provided in an embodiment of the present application;
fig. 9 is a schematic plan view illustrating a display device according to an embodiment of the present disclosure.
Detailed Description
In order to make the aforementioned objects, features and advantages of the present application more comprehensible, embodiments accompanying the present application are described in detail below with reference to the accompanying drawings.
In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present application, but the present application may be practiced in other ways than those described herein, and it will be appreciated by those skilled in the art that the present application may be practiced without departing from the spirit and scope of the present application, and that the present application is not limited to the specific embodiments disclosed below.
The present application will be described in detail with reference to the drawings, wherein the cross-sectional views illustrating the structure of the device are not enlarged partially in general scale for convenience of illustration, and the drawings are only examples, which should not limit the scope of the present application. In addition, the three-dimensional dimensions of length, width and depth should be included in the actual fabrication.
With the rapid development of terminal devices, higher requirements are put on the display of the terminal devices. The current display technology field is mainly divided into Liquid Crystal Display (LCD), Organic Light Emitting Display (OLED) and Micro-light emitting diode (Micro-LED) display. The micro light emitting diode display is a new generation of display technology, and the micro light emitting diode display has the advantages of high brightness, high light emitting efficiency, low power consumption and the like, and can realize single-point drive light emission by carrying out micro, thin film and array on a diode structure.
Fig. 1 is a schematic structural diagram of a display panel. The display panel includes a substrate 10, a driving circuit layer 20, a planarization layer 30, and micro light emitting diodes 40. The driving circuit layer 20 includes a driving circuit, the driving circuit includes a plurality of driving transistors 21, and the micro light emitting diode 40 is usually fabricated above the driving transistor 21, so that the driving transistor 21 provides a driving current for the micro light emitting diode 40, but since the micro light emitting diode 40 needs a larger current to drive, the driving transistor 21 has a larger load, generates more heat, and dissipates slower heat, which causes the temperature of the micro light emitting diode 40 above the driving transistor 21 to correspondingly rise, which is not beneficial for the display panel to display, and therefore, there is a heat dissipation requirement for the display panel, so as to ensure the display performance of the display panel.
Based on this, the embodiment of the present application provides a display panel and a display device, the display panel includes a display area, the display area includes a first area and a second area, the display panel includes: the first region and the driving transistor are at least partially overlapped in the direction perpendicular to the plane of the substrate, the second region and the driving transistor are not overlapped, namely the driving transistor is not located in the second region at all, a first film layer group is arranged on the side, away from the substrate, of the grid electrode of the driving transistor, the thickness of the first film layer group is H1 in the first region, the thickness of the first film layer group is H2 in the second region, and H2 & gtH 1 & gt0. That is to say, the thickness of the first film layer group above the gate of the driving transistor is smaller in the first region than in the second region, so that the film thickness of the first region where the driving transistor is located is thinner, and when the driving transistor dissipates heat, heat is more easily dissipated through the thinner first film layer group, thereby improving the heat dissipation performance of the display panel and reducing the damage probability of the display panel caused by heat.
For a better understanding of the technical solutions and effects of the present application, specific embodiments will be described in detail below with reference to the accompanying drawings.
Referring to fig. 2, a schematic structural diagram of a display panel 100 according to an embodiment of the present disclosure is shown, and fig. 3 is a schematic cross-sectional structural diagram of the display panel taken along a direction of BB' in fig. 2.
The display panel 100 provided in the embodiment of the present application includes a display area AA and a non-display area NA. The display area AA is an area for performing display, and the non-display area NA is an area for setting a circuit configuration for partially driving the display panel for performing display.
In the embodiment of the present application, the display area AA may include a first area 101 and a second area 102, the first area 101 and the second area 102 may be adjacent or may not be adjacent, and the display panel structure shown in fig. 3 is exemplified by the first area 101 and the second area 102 being adjacent.
In an embodiment of the present application, the display panel 100 may include a substrate 110, and the substrate 110 may include an insulating material (e.g., may be made of an insulating material), which may be glass, quartz, or a polymer resin. The substrate 110 may be a flexible base that may be bent, folded, and/or rolled. As an example, the substrate 110 may include polyimide.
In the embodiment of the present application, the display panel 100 may include a driving transistor 120, and the driving transistor 120 is used for providing a driving current of the display panel so that the display panel performs display.
Specifically, the driving transistor 120 may be disposed in a driving circuit layer including a plurality of driving transistors 120, and each driving transistor 120 includes an active layer 121, a gate insulating layer 122, a gate electrode 123, an interlayer insulating layer 124, and a first metal layer 125.
The active layer 121 is positioned on the substrate 110, and the active layer 121 may include polycrystalline silicon, single crystalline silicon, low temperature polycrystalline silicon, amorphous silicon, or an oxide semiconductor. When the active layer 121 includes polysilicon (e.g., made of polysilicon), the ion-doped active layer 121 may have conductivity. A gate insulating layer 122 may be formed on the active layer 121. The gate insulating layer 122 may include an inorganic layer (e.g., may be made of an inorganic layer) such as, for example, a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer. The gate electrode 123 may be formed on the gate insulating layer 122. The gate electrode 123 may be a single layer or a multilayer including (e.g., made of) any one or more of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu), and an alloy thereof. An interlayer insulating layer 124 may be formed on the gate electrode 123. The interlayer insulating layer 124 may include an inorganic layer (e.g., may be made of an inorganic layer) such as, for example, a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer. The interlayer insulating layer 124 may include a plurality of inorganic layers. The first metal layer 125 may be formed on the interlayer insulating layer 124, and the first metal layer 125 may be a single layer or a multilayer including (e.g., made of) any one or more of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu), and an alloy thereof.
In a direction perpendicular to the plane of the substrate 110, the driving transistor 120 and the first region 101 at least partially overlap, and the driving transistor 120 and the second region 102 do not overlap at all, that is, the driving transistor 120 is at least partially located in the first region 101, and the driving transistor 120 is not located in the second region 102 at all. Referring to fig. 3, the driving transistor 120 is illustrated in fig. 3 in the first region 101 by taking as an example that the driving transistor 120 and the first region 101 completely overlap, that is, the driving transistor 120 is completely located in the first region 101.
In the embodiment of the present application, a first film layer group 130 is disposed on a side of the gate electrode 123 of the driving transistor 120 away from the substrate 110, and the driving transistor 120 dissipates heat by using the first film layer group 130. Referring to fig. 3, in the first region 101, the thickness of the first film layer group 130 is H1, and in the second region 102, the thickness of the first film layer group 130 is H2, where H2 > H1 > 0, that is, the thickness H1 of the first film layer group 130 in the first region 101 is greater than the thickness of the first film layer group 130 in the second region 102, that is, when the driving transistor 120 performs heat dissipation, the first film layer group 130 located above the gate electrode 123 is thinner in the first region 101 than in the second region 102, so that when the driving transistor 120 performs heat dissipation, heat is more easily dissipated through the thinner first film layer group 130, the heat dissipation effect of the driving transistor 120 can be improved, the heat dissipation performance of the display panel is correspondingly improved, and the probability of damage to the display panel due to heat is reduced.
Specifically, the first film layer group 130 may include at least a partial thickness of the interlayer insulating layer 124.
In the embodiment of the present application, in the direction perpendicular to the plane of the substrate 110, the projected area of the first region 101 at least covers the projected area of the gate electrode 123 of the driving transistor 120, that is, the projected area of the first region 101 is greater than or equal to the projected area of the gate electrode 123 of the driving transistor 120, so that the gate electrode 123 of the driving transistor 120 can be completely disposed in the first region 101, and the first film layer group 130 on the gate electrode 123 is thinner, so as to accelerate the heat dissipation of the gate electrode 123, and accordingly, accelerate the heat dissipation of the driving transistor 120.
In an embodiment of the present application, the first film layer group 130 may include the first film layer 131, the first film layer 131 has a first trench 1311 in the first region 101, and as shown in fig. 3, in a direction perpendicular to a plane of the substrate 110, the first trench 1311 overlaps at least the gate electrode 123 of the driving transistor 120, that is, a projected area of the first trench 1311 is greater than or equal to the gate electrode 123 of the driving transistor 120, so that the first trench 1311 is used to realize that a thickness H1 of the first film layer group 130 of the first region 101 is smaller than a thickness H2 of the first film layer group 130 of the second region 102. With the first trench 1311 in the first region 101, the thickness of the first film layer group 130 in the region above the gate electrode 123 is small, which is beneficial to heat dissipation of the driving transistor 120.
Specifically, in a direction perpendicular to the plane of the substrate 110, the depth of the first trench 1311 may be smaller than the thickness of the first film layer 131, and the first trench 1311 may also penetrate through the first film layer 131, that is, the depth of the first trench 1311 is also equal to the thickness of the first film layer 131, as shown in fig. 3, so that the thickness of the first film layer group 130 above the gate 123 of the first region 101 can be reduced, and the thickness of the film layer through which the heat dissipation of the gate 123 passes can be maximally reduced.
In the embodiment of the present application, in the direction parallel to the plane of the substrate 110, the first trench 1311 may penetrate through the first film 131 to form the heat dissipation channel 103, as shown in fig. 4, that is, the plurality of first trenches 1311 located above the gates 123 of the plurality of driving transistors 120 may penetrate through the first film 131 to form the heat dissipation channel 103 where the plurality of first trenches 1311 are connected to each other, so that heat of the driving transistors 120 can be transferred more easily through the heat dissipation channel, heat dissipation of the driving transistors 120 is accelerated, and the heat dissipation effect of the driving transistors 120 is further improved.
In the embodiment of the present application, a fluid may be introduced into the heat dissipation channel 103 to dissipate heat of the driving transistor 120, and the fluid may be, for example, cold air or the like.
In practical applications, the first film layer 131 may be a flat layer, the first film layer 131 may be formed on the first metal layer 125 to flatten a step due to the first metal layer 125, and the first film layer 131 may be made of an organic material, such as, for example, acrylic resin, epoxy resin, phenolic resin, polyamide resin, or polyimide resin.
That is, the first film layer group 130 may include the interlayer insulating layer 124 and the first film layer 131 of a partial thickness at the first region 101, and the first film layer 131 has the first trench 1311 such that the thickness H1 of the first film layer group 130 at the first region 101 is less than the thickness H2 of the first film layer group 130 at the second region 102.
In the embodiment of the present application, the first film layer group 130 includes the second film layer 132, and the second film layer 132 is located between the first film layer 131 and the gate 123 of the driving transistor 120, as shown in fig. 5, which is a schematic cross-sectional structure diagram of another display panel provided in the embodiment of the present application. The second film 132 has a second trench 1321, a heat dissipation metal structure 140 is disposed in the second trench 1321, and the heat dissipation metal structure 140 is connected to the gate 123 of the driving transistor 120. That is to say, the heat dissipation metal structure 140 is used as the heat conduction film layer of the gate 123 of the driving transistor 120, and since the heat dissipation metal structure 140 is made of a metal material, the heat conductivity is high, and the heat dissipation metal structure 140 is directly exposed in the air, the heat dissipation efficiency of the gate 123 of the driving transistor 120 can be further increased, and the heat dissipation effect of the driving transistor 120 is improved.
In practical applications, the second film layer 132 may include an interlayer insulating layer 124 and a partial thickness of an intermetallic insulating layer 150, wherein the intermetallic insulating layer 150 is located between the interlayer insulating layer 124 and the gate electrode 123 of the driving transistor 120, and the intermetallic insulating layer 150 may include an inorganic layer (e.g., may be made of an inorganic layer), such as a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer, for example. The second film layer 132 may include a plurality of inorganic layers. The heat sink metal structure 140 may include a single layer or a plurality of layers of any one or more of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu), and an alloy thereof (e.g., made of any one or more thereof).
In practical applications, in a direction perpendicular to the plane of the substrate 110, the depth of the second trench 1321 may be smaller than the thickness of the interlayer insulating layer 124, and the second trench 1321 may also penetrate through the interlayer insulating layer 124, that is, the depth of the second trench 1321 is also equal to the thickness of the interlayer insulating layer 124, as shown in fig. 5, so that the thickness of the first film layer group 130 above the gate electrode 123 of the first region 101 can be reduced, and the film thickness through which the heat of the gate electrode 123 is dissipated can be maximally reduced.
Specifically, the heat sink metal structure 140 includes a first portion and a second portion, wherein the first portion is located on a side surface of the intermetallic insulating layer 150 away from the substrate 110, and the first portion is exposed to air to conduct heat to the air. The second portion penetrates through the inter-metal insulation layer 150 to the gate electrode 123 of the driving transistor 120, so that the heat dissipation metal structure 140 is connected to the gate electrode 123 of the driving transistor 120, and the second portion conducts heat of the gate electrode 123 of the driving transistor 120 to the first portion.
In the embodiment of the present application, in the direction perpendicular to the plane of the substrate 110, the first trench 1311 and the second trench 1321 may overlap, i.e., projections of the first trench 1311 and the second trench 1321 on the substrate 110 coincide.
In the embodiment of the present application, in the direction parallel to the plane of the substrate 110, the first trench 1311 may penetrate through the first film 131, and the second trench 1321 may also penetrate through a part of the thickness of the second film 132, so as to form a heat dissipation channel together, that is, the first trenches 1311 and the second trenches 1321 located above the gates 123 of the driving transistors 120 may form heat dissipation channels connected to each other, so that heat of the driving transistors 120 can be transferred more easily through the heat dissipation metal structures 140 and the heat dissipation channels, thereby accelerating heat dissipation of the driving transistors 120, and further improving the heat dissipation effect of the driving transistors 120.
Specifically, the first film layer group 130 may include a first film layer 131 and a second film layer 132, and the second film layer 132 may include an interlayer insulating layer 124 and a partial thickness of the intermetallic insulating layer 150. At the first region 101, the first film layer 131 has first trenches 1311 and the second film layer 132 has second trenches 1321, so that the thickness H1 of the first film layer group 130 at the first region 101 is smaller than the thickness H2 of the first film layer group 130 at the second region 102.
In the embodiment of the present application, a surface of the first film layer group 130 on a side facing away from the substrate 110 is provided with the light emitting device 160. The light emitting device 120 is disposed in the display area AA. The light emitting device 160 may include a Micro light emitting diode (Micro-LED), such as an inorganic Micro light emitting diode. The light emitting devices 160 may be distributed in an array in the substrate 110.
Fig. 6 is a schematic structural diagram of a light emitting device according to an embodiment of the present disclosure. The light emitting device 160 shown in fig. 6 may be a micro light emitting diode including a light emitting body and a contact electrode, wherein the contact electrode includes a first electrode 161 and a second electrode 162, and the first electrode 161 and the second electrode 162 are used for electrical extraction of the micro light emitting diode.
Specifically, one of the first electrode 161 and the second electrode 162 is a cathode, and the other is an anode, for example, the first electrode 161 is a cathode, the second electrode 162 is an anode, and for example, the first electrode 161 is an anode and the second electrode 162 is a cathode.
The light emitting body includes an N-type semiconductor layer 163, an active layer 164, and a P-type semiconductor layer 165 sequentially stacked, the active layer 164 may be a quantum well layer, the first electrode 161 is electrically connected to the N-type semiconductor layer 163, and the second electrode 162 is electrically connected to the P-type semiconductor layer 165.
The micro light emitting diode may further include an insulating layer 166, the insulating layer 166 including a portion surrounding the sidewall of the light emitting body and a portion located at a side of the light emitting body connected to the contact electrode, the insulating layer 166 exposing the portion of the light emitting body for connection to the contact electrode.
Specifically, the material of the N-type semiconductor layer 163 may be N-type doped gallium nitride, the material of the P-type semiconductor layer 165 may be P-type doped gallium nitride, the material of the active layer 163 may be indium gallium nitride, and the materials of the first electrode 161 and the second electrode 162 may be materials with good conductivity, such as metal materials.
The size of the micro light emitting diode can be smaller than 200 micrometers, further, can be smaller than 100 micrometers, also can be smaller than 50 micrometers, and further, the size range of the micro light emitting diode can be 1-10 micrometers.
As a possible implementation, the light emitting device 160 may be disposed on the first region 101, that is, the light emitting device 160 may be disposed above the first trench 1311, as shown with reference to fig. 3 or fig. 5. Since the first trench 1311 is formed between the light emitting device 160 and the gate 123 of the driving transistor 120, that is, the light emitting device 160 and the gate 123 of the driving transistor 120 are isolated from each other by air, which is a good heat insulating material, heat of the gate 123 of the driving transistor 120 can be prevented from being conducted to the light emitting device 160, and deterioration of a display effect due to temperature rise of the light emitting device 160 can be prevented.
In addition, when the heat dissipation channel is used for dissipating heat, the heat of the light emitting device 160 can be conducted out through the heat dissipation channel, so that the heat dissipation effect of the display panel is further improved.
As another possible implementation, the driving transistor 120 does not overlap at least a partial region of the light emitting device 160. That is, the light emitting device 160 is not at least partially located in the first region 101, or the light emitting device 160 is not at least partially disposed over the driving transistor 120.
Specifically, at least part of the light emitting device 160 is not disposed above the driving transistor 120, so that the light emitting device 160 and the driving transistor 120 are disposed in a staggered manner, heat emitted by the driving transistor 120 cannot be directly conducted to the light emitting device 160, the light emitting device 160 is prevented from being heated, and the display panel is prevented from being deteriorated due to poor heat dissipation effect.
In the embodiment of the present application, the gate electrode 123 of the driving transistor 120 may not overlap the light emitting device 120 at all, that is, the light emitting device 120 is not located at the first region 101 at all, and the light emitting device 120 is not disposed above the gate electrode 123 of the driving transistor 120 at all, as shown with reference to fig. 7 or 8. By completely not disposing the light emitting device 160 above the gate 123 of the driving transistor 120, the heat dissipated by the gate 123 of the driving transistor 120 is not directly conducted to the light emitting device 160, thereby further avoiding the temperature rise of the light emitting device 160 due to heating, and avoiding the situation that the display effect of the display panel is deteriorated due to poor heat dissipation effect.
In the embodiment of the present application, the display panel 100 may further include a receiving electrode 170, the receiving electrode 170 is located between the light emitting device 160 and the first film layer group 103, specifically, the receiving electrode 170 is located between the light emitting device 160 and the first film layer 131, and the receiving electrode 170 includes a first receiving electrode 171 and a second receiving electrode 172.
Specifically, the first receiving electrode 171 may be connected to the first electrode 161, and the second receiving electrode 172 may be connected to the second electrode 162, so as to electrically connect the light emitting device 160 and the driving transistor 120. The first receiving electrode 171 may overlap the first electrode 121, and the second receiving electrode 172 may overlap the second electrode 122 in a direction perpendicular to the plane of the substrate 110. The light emitting device 160 may be electrically connected with the receiving electrode 170 using a bonding process.
In practical applications, a buffer layer 180 may be further included between the driving transistor 120 and the substrate 110, and the buffer layer 180 is disposed on the substrate 110 for protecting the driving transistor 120 and the light emitting device 160 from moisture entering through the substrate 110. The buffer layer 180 may be formed of an inorganic material, and particularly, may be composed of a plurality of inorganic layers alternately stacked one on another. For example, the buffer layer 180 may be a multilayer in which one or more inorganic layers selected from a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, and an aluminum oxide layer are alternately stacked.
The embodiment of the application provides a display panel, display panel includes the display area, and the display area includes first region and second area, and display panel includes: the first region and the driving transistor are at least partially overlapped in the direction perpendicular to the plane of the substrate, the second region and the driving transistor are not overlapped, namely the driving transistor is not located in the second region at all, a first film layer group is arranged on one side, away from the substrate, of the grid electrode of the driving transistor, the thickness of the first film layer group is H1 in the first region, the thickness of the first film layer group is H2 in the second region, and H2 is larger than H1 and larger than 0. That is to say, the thickness of the first film layer group above the gate of the driving transistor is smaller in the first region than in the second region, so that the film thickness of the first region where the driving transistor is located is thinner, and when the driving transistor dissipates heat, heat is more easily dissipated through the thinner first film layer group, thereby improving the heat dissipation performance of the display panel and reducing the damage probability of the display panel caused by heat.
The embodiment of the present application further provides a display device, which includes the display panel described in the above embodiment.
Fig. 9 is a schematic plan view of a display device according to an embodiment of the present disclosure. As can be seen from the figure, the display device 1000 includes the display panel 100, and the display panel 100 is the display panel 100 described in any of the embodiments. The display device 1000 provided in the embodiment of the present application may be other display devices with a display function, such as a mobile phone, a computer, a television, and a vehicle-mounted display device, and the embodiment of the present application is not particularly limited. The display device 1000 provided in the embodiment of the present application has the beneficial effects of the display panel 100 provided in the embodiment of the present application, and specific reference may be specifically made to the specific description of the display panel in the above embodiment, which is not repeated herein.
The foregoing is merely a preferred embodiment of the present application and, although the present application discloses the foregoing preferred embodiments, the present application is not limited thereto. Those skilled in the art can make numerous possible variations and modifications to the disclosed solution, or modify it to equivalent embodiments, using the methods and techniques disclosed above, without departing from the scope of the claimed solution. Therefore, any simple modification, equivalent change and modification made to the above embodiments according to the technical essence of the present application still fall within the protection scope of the technical solution of the present application without departing from the content of the technical solution of the present application.
Claims (10)
1. A display panel, comprising a display area including a first area and a second area, comprising:
the driving transistor is positioned on one side of the substrate, the first area and the driving transistor are at least partially overlapped in a direction perpendicular to the plane of the substrate, and the second area and the driving transistor are not overlapped;
one side of the grid electrode of the driving transistor, which is far away from the substrate, is provided with a first membrane layer group, the thickness of the first membrane layer group is H1 in the first area, and the thickness of the first membrane layer group is H2 in the second area, and H2 is larger than H1 and is larger than 0.
2. The display panel according to claim 1, wherein a side of the first film layer group facing away from the substrate is provided with a light emitting device, and the driving transistor does not overlap with at least a partial region of the light emitting device.
3. The display panel according to claim 2, wherein the gate of the driving transistor does not overlap the light emitting device at all.
4. The display panel according to claim 1, wherein a projected area of the first region at least covers a projected area of the gate electrode of the driving transistor in a direction perpendicular to a plane of the substrate.
5. The display panel according to claim 1, wherein the first film layer group comprises a first film layer having a first trench in the first region, and wherein the first trench overlaps at least a gate electrode of the driving transistor in a direction perpendicular to a plane of the substrate.
6. The display panel according to claim 5, wherein the first film layer group comprises a second film layer between the first film layer and the gate electrode of the driving transistor;
the second film layer is provided with a second groove, a heat dissipation metal structure is arranged in the second groove, and the heat dissipation metal structure is connected with the grid electrode of the driving transistor.
7. The display panel according to claim 6, wherein the first trench overlaps with the second trench in a direction perpendicular to a plane of the substrate.
8. The display panel according to claim 5, wherein the first trench penetrates the first film layer in a direction parallel to a plane of the substrate to form a heat dissipation channel.
9. The display panel according to claim 8, wherein a fluid is introduced into the heat dissipation channel to dissipate heat of the driving transistor.
10. A display device characterized by comprising the display panel according to any one of claims 1 to 9.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210756052.6A CN115132674A (en) | 2022-06-30 | 2022-06-30 | Display panel and display device |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202210756052.6A CN115132674A (en) | 2022-06-30 | 2022-06-30 | Display panel and display device |
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003229574A (en) * | 2002-02-01 | 2003-08-15 | Matsushita Electric Ind Co Ltd | Thin film transistor array substrate and liquid crystal image display device |
| KR20150075184A (en) * | 2013-12-24 | 2015-07-03 | 엘지디스플레이 주식회사 | Display Device and Method for Manufacturing The Same |
| CN113097374A (en) * | 2021-04-01 | 2021-07-09 | 厦门天马微电子有限公司 | Display panel and display device |
-
2022
- 2022-06-30 CN CN202210756052.6A patent/CN115132674A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003229574A (en) * | 2002-02-01 | 2003-08-15 | Matsushita Electric Ind Co Ltd | Thin film transistor array substrate and liquid crystal image display device |
| KR20150075184A (en) * | 2013-12-24 | 2015-07-03 | 엘지디스플레이 주식회사 | Display Device and Method for Manufacturing The Same |
| CN113097374A (en) * | 2021-04-01 | 2021-07-09 | 厦门天马微电子有限公司 | Display panel and display device |
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