CN115101101A

CN115101101A - Sense amplifier and semiconductor memory

Info

Publication number: CN115101101A
Application number: CN202210780805.7A
Authority: CN
Inventors: 苏信政
Original assignee: Changxin Memory Technologies Inc
Current assignee: Changxin Memory Technologies Inc
Priority date: 2022-06-30
Filing date: 2022-06-30
Publication date: 2022-09-23
Also published as: WO2024000630A1

Abstract

The power module is provided with an output end and is used for acquiring temperature data of the power module, adjusting the voltage driving capability of the power module in a sensing amplification stage according to the temperature data, enabling the voltage driving capability of the power module in the sensing amplification stage to be within a preset range, and enabling a first power end to drive a first end of the amplification module through the power module in the sensing amplification stage; and the first end of the amplifying module is connected with the output end of the power supply module and used for amplifying the voltage difference between the bit line and the complementary bit line under the drive of the first power supply end, so that the sensing accuracy of the sensitive amplifier is improved, and the power loss is reduced.

Description

Sense amplifier and semiconductor memory

Technical Field

The present disclosure relates to semiconductor memories, and more particularly, to a sense amplifier and a semiconductor memory.

Background

With the popularization of electronic devices such as mobile phones, tablet computers, and personal computers, semiconductor memory technology has also been rapidly developed.

The sense amplifier is an important component of a semiconductor memory and mainly used for amplifying small signals on a bit line so as to perform data read-write operation. However, when the sense amplifier performs an amplifying operation, an abnormality may occur due to a difference in operating conditions of the device, resulting in an error in the result of the amplified output, which seriously affects the performance of the semiconductor memory.

Disclosure of Invention

An embodiment of the present disclosure provides a sense amplifier, including:

the first end of the amplifying module is connected with the output end of the power supply module and used for amplifying the voltage difference between the bit line and the complementary bit line under the drive of the first power supply end;

and a first input end of the power supply module is connected with the first power supply end and used for acquiring the temperature data of the power supply module and adjusting the voltage driving capability of the power supply module in the sensing amplification stage according to the temperature data, so that the voltage driving capability of the power supply module in the sensing amplification stage is in a preset range, and the first power supply end drives the first end of the amplification module through the power supply module in the sensing amplification stage.

In some embodiments, the second input terminal of the power supply module is connected to the second power supply terminal, and the power supply module is further configured to turn on the first terminal of the amplifying module to the second power supply terminal; wherein the voltage of the second power supply terminal is less than the voltage of the first power supply terminal.

In some embodiments, the power supply module comprises a first power supply unit having an input terminal connected to a first power supply terminal and an output terminal connected to a first terminal of the amplification module; the first power supply unit includes:

the output end of the first power supply subunit is connected with the first end of the amplifying module, and when the temperature data is in a first temperature range, the first power supply end drives the first end of the amplifying module in a sensing amplifying stage;

the output end of the second power supply subunit is connected with the first end of the amplifying module, and when the temperature data is in a second temperature range, the first power supply end drives the first end of the amplifying module in a sensing amplifying stage;

the output end of the third power supply subunit is connected with the first end of the amplifying module, and when the temperature data is in a third temperature range, the first power supply end drives the first end of the amplifying module in a sensing amplifying stage;

the upper limit value of the first temperature range is less than or equal to the lower limit value of the second temperature range, and the upper limit value of the second temperature range is less than or equal to the lower limit value of the third temperature range; the voltage driving capability of the first power supply subunit is less than the voltage driving capability of the second power supply subunit at the same temperature, and the voltage driving capability of the second power supply subunit is less than the voltage driving capability of the third power supply subunit at the same temperature.

In some embodiments, the power module further comprises:

the control unit is provided with an output end and is used for acquiring the temperature data of the amplification module and generating a rate control signal according to the temperature data and the over-drive power supply enabling signal of the amplification module;

the rate control signal is for causing the first power supply terminal to drive the first terminal of the amplification module through the first power supply unit.

In some embodiments, the control unit comprises:

the temperature sensor is used for detecting the temperature data of the amplifying module and generating temperature coding data according to the temperature data;

the input end of the temperature decoder is connected with the output end of the temperature sensor and used for obtaining a temperature gear signal according to the temperature coding data;

and the first input end of the driving controller is used for receiving the over-driving power supply enabling signal, the second input end of the driving controller is connected with the output end of the temperature decoder, and the driving controller is used for generating a speed control signal according to the temperature gear signal and the over-driving power supply enabling signal.

In some embodiments, the temperature range signal comprises three temperature range sub-signals, the drive controller comprises three drive sub-controllers, and the rate control signal comprises three control sub-signals;

the first input end of each drive sub-controller receives the over-drive power supply enabling signal, the second input end of each drive sub-controller is connected with the corresponding output end of the temperature decoder, receives the corresponding temperature gear sub-signal, and generates a control sub-signal according to the over-drive power supply enabling signal and the corresponding temperature gear sub-signal.

In some embodiments, the drive controller further comprises a first not gate;

the input end of the first NOT gate receives an over-driving power supply enabling signal, and the output end of the first NOT gate is connected with the first input end of each driving sub-controller.

In some embodiments, the drive sub-controller comprises:

the input end of the second NOT gate is connected with the corresponding output end of the temperature decoder and receives the corresponding temperature gear sub-signal;

and the first input end of the OR gate is connected with the output end of the first NOT gate, and the second input end of the OR gate is connected with the output end of the second NOT gate, and is used for outputting a control sub-signal.

In some embodiments, the first power supply subunit comprises: a first P-type transistor, wherein the source electrode of the first P-type transistor is connected with a first power supply end, the drain electrode of the first P-type transistor is connected with the first end of the amplification module, and the grid electrode of the first P-type transistor receives a first control sub-signal;

the second power supply subunit includes: a second P-type transistor, wherein the source electrode of the second P-type transistor is connected with the first power supply end, the drain electrode of the second P-type transistor is connected with the first end of the amplification module, and the grid electrode of the second P-type transistor receives a second control sub-signal;

the third power supply subunit includes: a third P-type transistor, the source of which is connected to the first power terminal, the drain of which is connected to the first terminal of the amplification module, and the gate of which receives the third control sub-signal;

the width-to-length ratio of the first P-type transistor is smaller than that of the second P-type transistor, and the width-to-length ratio of the second P-type transistor is smaller than that of the third P-type transistor.

In some embodiments, when the temperature data is in the first temperature range, the first P-type transistor drives the first terminal of the amplifying module under the control of the first control sub-signal; the second P-type transistor and the third P-type transistor stop driving the first end of the amplifying module;

when the temperature data is in a second temperature range, the second P-type transistor drives the first end of the amplifying module under the control of the second control sub-signal; the first P-type transistor and the third P-type transistor stop driving the first end of the amplifying module;

when the temperature data is in a third temperature range, the third P-type transistor drives the first end of the amplifying module under the control of a third control sub-signal; the first P-type transistor and the second P-type transistor stop driving the first end of the amplifying module;

the upper limit value of the first temperature range is less than or equal to the lower limit value of the second temperature range, and the upper limit value of the second temperature range is less than or equal to the lower limit value of the third temperature range.

In some embodiments, the power module further comprises:

and the control end of the second power supply unit receives the power supply enabling signal, the input end of the second power supply unit is connected with the second power supply end, and the output end of the second power supply unit is connected with the first end of the amplifying module and is used for enabling the first end of the amplifying module to be connected with the second power supply end under the control of the power supply enabling signal.

In some embodiments, the second power supply unit includes:

and the source electrode of the fourth P-type transistor is connected with the second power supply end, the grid electrode of the fourth P-type transistor receives a power supply enabling signal, and the drain electrode of the fourth P-type transistor is connected with the first end of the amplifying module.

In some embodiments, the amplification module comprises:

a fifth P-type transistor, wherein the grid electrode of the fifth P-type transistor is connected with the drain electrode of the sixth P-type transistor, and the source electrode of the fifth P-type transistor is used as the first end of the amplifying module;

a sixth P-type transistor, the gate of which is connected to the drain of the fifth P-type transistor and the source of which is connected to the source of the fifth P-type transistor;

the grid electrode of the first N-type transistor is connected with the drain electrode of the second N-type transistor, the source electrode of the first N-type transistor is used as the second end of the amplifying module, and the drain electrode of the first N-type transistor is connected with the drain electrode of the fifth P-type transistor;

and the grid electrode of the second N-type transistor is connected with the drain electrode of the first N-type transistor, the source electrode of the second N-type transistor is connected with the source electrode of the first N-type transistor, and the drain electrode of the second N-type transistor is connected with the drain electrode of the sixth P-type transistor.

In some embodiments, the sense amplifier further comprises:

and the drain electrode of the third N-type transistor is connected with the second end of the amplifying module, the source electrode of the third N-type transistor is connected with a third power supply end, and the grid electrode of the third N-type transistor receives an auxiliary power supply enabling signal and is used for conducting in the sensing amplifying stage.

An embodiment of the present disclosure provides a semiconductor memory including the sense amplifier according to the above embodiment.

The utility model provides a sense amplifier and semiconductor memory, including amplification module and power module, according to the temperature data regulation power module's at the voltage driving ability of sensing amplification stage to the condition that the voltage driving ability of compensation power module changes along with the temperature variation, make the voltage driving ability of power module at the sensing amplification stage be located and predetermine the scope, the voltage change slope of the first end of control amplification module is located and predetermine the slope scope, make bit line and complementary bit line reach the target voltage difference at the expectation time, improve sense accuracy of sense amplifier, and reduce power loss.

Drawings

The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present disclosure and, together with the description, serve to explain the principles of the disclosure.

FIG. 1 is a circuit configuration diagram of a sense amplifier;

FIG. 2A is a schematic diagram of the operation of a sense amplifier provided by the present disclosure;

FIG. 2B is another operational schematic diagram of a sense amplifier provided by the present disclosure;

FIG. 2C is a schematic diagram of yet another operation of a sense amplifier provided by the present disclosure;

fig. 3 is a circuit diagram of a sense amplifier according to an embodiment of the disclosure;

fig. 4 is a circuit configuration diagram of a control unit according to another embodiment of the present disclosure;

FIG. 5A is a schematic diagram of a drive sub-controller according to yet another embodiment of the present disclosure;

FIG. 5B is another schematic diagram of a drive sub-controller according to another embodiment of the present disclosure;

FIG. 6A is a timing diagram illustrating operation of a sense amplifier according to still another embodiment of the present disclosure;

FIG. 6B is a timing diagram illustrating another operation of a sense amplifier according to still another embodiment of the present disclosure;

FIG. 6C is a timing diagram illustrating another operation of a sense amplifier according to still another embodiment of the present disclosure;

FIG. 7A is a schematic diagram of an operation of a sense amplifier according to yet another embodiment of the present disclosure;

fig. 7B is another schematic diagram of an operation of a sense amplifier according to still another embodiment of the disclosure.

Reference numerals are as follows:

100. an amplifying module; 200. a power supply module; 210. a first power supply unit; 211. a first power supply subunit; 212. a second power supply subunit; 213. a third power supply subunit; 220. a second power supply unit; 230. a control unit; 310. a temperature sensor; 320. a temperature decoder; 330. a drive controller; 430. a first drive sub-controller; 440. a second drive sub-controller; 450. a third drive sub-controller; 420. a first not gate; 411. a second not gate; 412. or a door.

With the foregoing drawings in mind, certain embodiments of the disclosure have been shown and described in more detail below. These drawings and written description are not intended to limit the scope of the disclosed concepts in any way, but rather to illustrate the concepts of the disclosure to those skilled in the art by reference to specific embodiments.

Detailed Description

Reference will now be made in detail to the exemplary embodiments, examples of which are illustrated in the accompanying drawings. The following description refers to the accompanying drawings in which the same numbers in different drawings represent the same or similar elements unless otherwise indicated. The implementations described in the exemplary embodiments below are not intended to represent all implementations consistent with the present disclosure. Rather, they are merely examples of apparatus and methods consistent with certain aspects of the present disclosure, as detailed in the appended claims.

With the shrinking line width of the semiconductor memory, the capacitance of the memory cell is reduced, the sensing resolution of the sense amplifier is seriously affected by the noise of the circuit, the sensing resolution of the sense amplifier can be improved by using the over-drive sensing technology, the voltage difference speed of the bit line and the complementary bit line is accelerated, and the product yield is increased.

As shown in fig. 1, a sense amplifier includes an amplifying block 100, and the amplifying block 100 includes a fifth P-type transistor P5, a sixth P-type transistor P6, a first N-type transistor N1, and a second N-type transistor N2.

A source of the fifth P-type transistor P5 is connected as the first terminal PCS of the amplifying block 100, and a source of the fifth P-type transistor P5 is connected to a source of the sixth P-type transistor P6. The source of the first N-type transistor N1 is used as the second terminal NCS of the amplification block 100, and the source of the first N-type transistor N1 is connected to the source of the second N-type transistor N2.

The gate of the fifth P-type transistor P5 is connected to the drain of the sixth P-type transistor P6, the gate of the sixth P-type transistor P6 is connected to the drain of the fifth P-type transistor P5, the gate of the first N-type transistor N1 is connected to the drain of the second N-type transistor N2, and the gate of the second N-type transistor N2 is connected to the drain of the first N-type transistor N1. The drain of the fifth P-type transistor P5 and the drain of the first N-type transistor N1 are connected to the bit line BL, and the drain of the sixth P-type transistor P6 and the drain of the second N-type transistor N2 are connected to the complementary bit line BLB.

The amplifying module 100 further includes a first P-type transistor P1, a fourth P-type transistor P4, and a third N-type transistor N3. The first P-type transistor P1 is an over-driving power switch, the source of the first P-type transistor P1 is connected to the first power terminal VH, and the drain of the first P-type transistor P1 is connected to the first terminal PCS of the amplifying module 100. The fourth P-type transistor P4 is a normal power switch, the source of the fourth P-type transistor P4 is connected to the second power source terminal VL, and the drain of the fourth P-type transistor P4 is connected to the first terminal PCS of the amplifying module 100. The source of the third N-type transistor N3 is connected to the third power source terminal, and the drain of the third N-type transistor N3 is connected to the second terminal NCS of the amplifying block 100. The voltage supplied by the first power supply terminal VH is higher than the voltage supplied by the second power supply terminal VL, which is higher than the voltage supplied by the third power supply terminal VL. The third power supply terminal is typically ground.

As shown in fig. 2A, in the sense amplifying period T2, the third N-type transistor N3 and the first P-type transistor P1 are turned on, and the voltage of the bit line BL or the complementary bit line BLB is driven by the first power terminal VH through the amplifying module 100, and in the non-sense amplifying period, for example: the recovery period T3 controls the fourth P-type transistor P4 to be turned on, and the first terminal PCS of the amplifying block 100 is driven by the second power terminal VL. The first end PCS of the amplifying module 100 is driven by the first power supply end VH in the sensing amplifying stage T2, and the first end PCS of the amplifying module 100 is driven by the second power supply end VL in the non-sensing stage, so that the over-driving sensing of the sense amplifier is realized, the sensing resolution of the sense amplifier can be improved, the voltage difference speed of the bit line BL and the complementary bit line BLB is accelerated, the time length of the sensing amplifying stage T2 can be shortened, the response speed of the sense amplifier is improved, and the product yield is increased.

During the sense amplifying stage T2, the voltage driving capability of the first P-type transistor P1 to the first terminal PCS of the amplifying block 100 affects the sensing accuracy and power consumption of the sense amplifier. If the voltage driving capability of the first P-type transistor P1 to the first end PCS of the amplifying module 100 is relatively large, the voltage variation rate of the first end PCS of the amplifying module 100 is relatively fast, the voltage difference between the bit line BL and the complementary bit line BLB is greater than the target voltage difference during the sense amplifying stage T2, and the voltage difference between the bit line BL and the complementary bit line BLB needs to be pulled back to the target voltage difference during the non-sense amplifying stage by the amplifying module 100, so that the power loss is increased. If the voltage driving capability of the first P-type transistor P1 to the first end PCS of the amplifier module 100 is relatively small, the voltage variation rate of the first end PCS of the amplifier module 100 is relatively slow, and the voltage difference between the bit line BL and the complementary bit line BLB cannot reach the target voltage difference in the sense amplifying stage T2, which may affect the sensing accuracy of the sense amplifier. Therefore, it is necessary to design the voltage driving capability of the first P-type transistor P1 at the beginning of the sense amplifier design.

However, when the temperature data of the sense amplifier varies, the voltage driving capability of the first P-type transistor P1 also varies. As shown in fig. 2B, when the temperature of the sense amplifier decreases, the voltage driving capability of the first P-type transistor P1 becomes stronger, and the slope of the voltage change at the first end PCS of the amplifying module 100 becomes steeper, so that the voltage difference on the bit line BL and the complementary bit line BLB exceeds the target voltage difference in advance in the overdrive sense amplifying period T2, and the voltage difference on the bit line BL and the complementary bit line BLB needs to be pulled back to the target voltage difference by the second power supply terminal VL in the non-sense amplifying period, which causes the power loss to become larger. As shown in fig. 2C, when the temperature of the sense amplifier increases, the voltage driving capability of the first P-type transistor P1 becomes weak, and the voltage variation slope of the first end PCS of the amplifying module 100 becomes gentle, so that the voltage difference between the bit line BL and the complementary bit line BLB cannot reach the target voltage difference during the sense amplifying period T2, which affects the sensing accuracy of the sense amplifier.

In order to solve the above problem, an embodiment of the present disclosure provides a sense amplifier and a semiconductor memory, where the sense amplifier includes a power module 200 and an amplifying module 100, and the voltage driving capability of the power module 200 in a sense amplifying stage T2 is adjusted according to temperature data of the power module 200 to compensate for a change of the voltage driving capability of the power module 200 with a temperature change, so that the voltage driving capability of the power module 200 in the sense amplifying stage T2 is within a preset range, and a voltage change slope of a first end PCS of the amplifying module 100 is controlled to be within a preset slope range, so that a bit line BL and a complementary bit line BLB reach a target voltage difference at a desired time, thereby improving sensing accuracy of the sense amplifier and reducing power consumption.

As shown in fig. 3, an embodiment of the present disclosure provides a sense amplifier, which includes a power module 200 and an amplifying module 100. The power module 200 is provided with an output terminal and a first input terminal, the amplification module 100 is provided with a first terminal PCS, the first input terminal of the power module 200 is connected with the first power terminal VH, and the output terminal of the power module 200 is connected with the first terminal PCS of the amplification module 100.

The power module 200 is configured to obtain its own temperature data, and adjust its voltage driving capability in the sense amplifying stage T2 according to the temperature data, so that the voltage driving capability of the power module 200 in the sense amplifying stage T2 is within a preset range. The power module 200 drives the first terminal PCS of the amplifier module 100 with the regulated voltage driving capability during the sense amplifying stage T2, so that the voltage variation rate of the first terminal PCS of the amplifier module 100 is within the predetermined slope range. The amplifying module 100 is used for amplifying the voltage difference between the bit line BL and the complementary bit line BLB under the driving of the first power terminal VH, so that the voltage difference between the bit line BL and the complementary bit line BLB reaches the target voltage difference at a desired time.

The voltage driving capability refers to the voltage control capability for the same node. For example: the ability to drive down the voltage of a node when the voltage of the same node is reduced. The ability to drive the voltage of a node upward when the voltage of the same node is raised.

In some embodiments, the power module 200 directly detects its own temperature data, or the power module 200 detects the temperature data of the amplification module 100 and uses the temperature of the amplification module 100 as the temperature data of the power module 200.

In some embodiments, when the power module 200 operates under a high temperature condition, that is, the temperature data of the power module 200 is larger, the voltage driving capability of the power module 200 before adjustment becomes smaller as the temperature data becomes larger, so that the voltage driving capability of the power module 200 after adjustment is within the predetermined range by enhancing the voltage driving capability of the power module 200. When the power module 200 operates under a low temperature condition, that is, the temperature data of the power module 200 is small, the voltage driving capability of the power module 200 before adjustment becomes large as the temperature data becomes small, and the voltage driving capability of the power module 200 after adjustment is within the preset range by weakening the voltage driving capability of the power module 200.

In the above solution, the sense amplifier includes an amplifying block 100 and a power block 200, the power block 200 adjusts its voltage driving capability during a sensing amplifying period T2 according to its temperature data, compensates for the variation of the voltage driving capability of the power block 200 with the temperature variation, the voltage driving capability of the power module 200 during the sense amplifying stage T2 is within a predetermined range, the voltage variation rate of the first end PCS of the amplifying module 100 is within a predetermined slope range, the bit line BL and the complementary bit line BLB are allowed to reach the target voltage difference at the expected time, so that a problem of an increase in power consumption due to a voltage difference between the bit line BL and the complementary bit line BLB reaching the target voltage difference too early is avoided, and a problem of a decrease in sensing accuracy due to a failure to reach the target voltage difference at the expected time due to an excessively small voltage change rate of the first end PCS of the amplifying module 100 is also avoided.

In some embodiments, the power module 200 further has a second input terminal, the second input terminal of the power module 200 is connected to the second power terminal VL, and the power module 200 is further configured to enable the first terminal PCS of the amplifying module 100 to switch on the second power terminal VL during the non-sensing amplifying period. Wherein the voltage of the second power source terminal VL is less than the voltage of the first power source terminal VH. The non-sense amplification phase includes a recovery phase T3. That is, the driving voltages at the first end PCS of the amplifying module 100 during the sensing amplifying stage T2 and the non-sensing amplifying stage are different, and the power module 200 adjusts the voltage driving capability thereof to ensure that the voltage driving capability during the sensing amplifying stage T2 is still within the predetermined range during the temperature data variation. By such arrangement, the overdriving sensing of the sense amplifier is realized, the sensing resolution of the sense amplifier can be improved, the voltage differential speed of the bit line BL and the complementary bit line BLB is accelerated, the product yield is improved, and the voltage driving capability of the power module 200 at the sensing amplification stage T2 is still within the preset range when the temperature data changes, so that the bit line BL and the complementary bit line BLB reach the target voltage difference value at the expected time, the sensing accuracy of the sense amplifier is improved, and the power loss is reduced.

In some embodiments, with continued reference to fig. 3, the power module 200 includes a first power unit 210, a second power unit 220, and a control unit 230, wherein each of the first power unit 210 and the second power unit 220 has a control terminal, the control unit 230 has an output terminal, and the output terminal of the control unit 230 is connected to the control terminal of the first power unit 210.

The control unit 230 is configured to obtain temperature data of the power module 200 and generate a rate control signal according to the temperature data and an overdrive power enable signal EN of the amplification module 100, the first power unit 210 is configured to enable the first power terminal VH to be connected to the first terminal PCS of the amplification module 100 during the sense amplification stage T2 under the control of the rate control signal, and the first power unit 210 is further configured to adjust a voltage driving capability of the first power unit during the sense amplification stage T2 according to the temperature data, so that the voltage driving capability of the first power unit during the sense amplification stage T2 is within a preset range.

The control terminal of the second power unit 220 is configured to receive a power enable signal, and under the control of the power enable signal, the second power terminal VL is connected to the first terminal PCS of the amplification module 100 during the non-sensing amplification stage, so that the second power terminal VL drives the first terminal PCS of the amplification module 100 during the non-sensing amplification stage.

In the above technical solution, the power module 200 includes a first power unit 210, a second power unit 220 and a control unit 230, an output end of the control unit 230 is connected to a control end of the first power unit 210, so as to control the first power unit 210 to adjust a voltage driving capability along with temperature data of the power module 200, so that the adjusted voltage driving capability is within a preset range, the first power unit 210 drives the first end PCS of the amplification module 100 with the adjusted voltage driving capability in a sensing amplification stage T2, the second power unit 220 receives an external power enable signal, and drives the first end PCS of the amplification module 100 in a non-sensing amplification stage under the control of the power enable signal.

In some embodiments, the first power supply unit 210 includes a first power supply subunit 211, a second power supply subunit 212, and a third power supply subunit 213. The output terminal of the first power supply subunit 211 is connected to the first PCS of the amplification module 100, the output terminal of the second power supply subunit 212 is connected to the first PCS of the amplification module 100, and the output terminal of the third power supply subunit 213 is connected to the first PCS of the amplification module 100.

In some embodiments, three temperature range ranges are provided, labeled as a first temperature range, a second temperature range, and a third temperature range. The upper limit value of the first temperature range is less than or equal to the lower limit value of the second temperature range, and the upper limit value of the second temperature range is less than or equal to the lower limit value of the third temperature range. For example: the first temperature range is that T is less than or equal to 20 ℃, the second temperature range is that T is more than 20 ℃ and less than or equal to 60 ℃, and the third temperature range is that T is more than 60 ℃.

In some embodiments, the voltage driving capability of the first power supply sub-unit 211 is smaller than that of the second power supply sub-unit 212 at the same temperature, and the voltage driving capability of the second power supply sub-unit 212 is smaller than that of the third power supply sub-unit 213 at the same temperature. And when the temperature data of the power module 200 is within a second range, the voltage driving capability of the second power supply sub-unit 212 is within a predetermined range.

When the temperature data is within the first temperature range, the first power supply subunit 211 causes the first power supply terminal VH to drive the first terminal PCS of the amplification module 100 during the sense amplification stage T2. When the temperature data is within the second temperature range, the second power supply subunit 212 causes the first power supply terminal VH to drive the first terminal PCS of the amplification module 100 during the sense amplification stage T2. When the temperature data is within the third temperature range, the third power supply subunit 213 causes the first power supply terminal VH to drive the first terminal PCS of the amplification module 100 during the sense amplification period T2.

When the temperature data of the power module 200 is in the first temperature range, that is, when the power module 200 operates in the low temperature condition, the voltage driving capability of all the three power supply sub-units increases with the decrease of the temperature, and the first power supply sub-unit 211 with the weakest voltage driving capability is selected to drive the first end PCS of the amplification module 100, so that the voltage driving capability of the power module 200 to the first end PCS of the amplification module 100 is in the preset range.

When the temperature data of the power module 200 is in the third temperature range, that is, when the power module 200 operates at a high temperature, the voltage driving capability of all the three power sub-units decreases with the increase of temperature, and the third power sub-unit 213 with the strongest voltage driving capability is selected to drive the first end PCS of the amplification module 100, so that the voltage driving capability of the power module 200 to the first end PCS of the amplification module 100 is in the preset range.

In the above technical solution, the first power supply unit 210 includes three power supply sub-units with different voltage driving capabilities, and selects a corresponding power supply sub-unit to drive the first end PCS of the amplification module 100 according to the temperature data of the power supply module 200, so as to adjust the voltage driving capability of the power supply module 200 based on the temperature data, so that the adjusted voltage driving capability is within a preset range, and the first end PCS of the amplification module 100 is driven by the adjusted voltage driving capability, so that the voltage variation rate of the first end PCS of the amplification module 100 is within a preset rate range.

In some embodiments, referring to fig. 4, the control unit 230 includes a temperature sensor 310, a temperature decoder 320, and a driving controller 330, an output terminal of the temperature sensor 310 is connected to an input terminal of the temperature decoder 320, an output terminal of the temperature decoder 320 is connected to a first input terminal of the driving controller 330, and a second input terminal of the driving controller 330 receives the overdrive power enable signal EN.

The temperature sensor 310 is configured to detect temperature data of the power module 200 and generate temperature encoded data according to the temperature data, and the temperature decoder 320 is configured to decode the temperature encoded data to obtain a temperature step signal. In some embodiments, the temperature decoder 320 decodes the temperature encoded data and compares the decoded data with each temperature step range to determine a step corresponding to the temperature data, and then generates a temperature step signal according to the step corresponding to the temperature data.

In some embodiments, the temperature step signal includes three temperature step sub-signals, and when the temperature data of the power module 200 is within the first temperature range, the first step sub-signal output by the temperature decoder 320 is valid, and neither the second step sub-signal nor the third step sub-signal is valid. When the temperature data of the power module 200 is within the second temperature range, the second gear sub-signal output by the temperature decoder 320 is valid, and both the first gear sub-signal and the third gear sub-signal are invalid. When the temperature data of the power module 200 is within the third temperature range, the third gear sub-signal output by the temperature decoder 320 is valid, and both the first gear sub-signal and the second gear sub-signal are invalid.

A first input terminal of the driving controller 330 receives the overdrive power enable signal EN, and a second input terminal of the driving controller 330 receives the temperature step signal and generates a rate control signal according to the temperature step signal and the overdrive power enable signal EN.

In some embodiments, the temperature range signal includes three temperature range sub-signals, the rate control signal output by the drive controller 330 includes three control sub-signals, and the drive controller 330 includes three drive sub-controllers. The first input end of each driving sub-controller receives the over-driving power enable signal EN, the second input end of each driving sub-controller is connected with the output end of the corresponding temperature decoder 320, receives the corresponding temperature gear sub-signal, and generates a control sub-signal according to the over-driving power enable signal EN and the corresponding temperature gear sub-signal.

In some embodiments, the output of the first drive sub-controller 430 is connected to the control terminal of the first power supply sub-unit 211, the output of the second drive sub-controller 440 is connected to the control terminal of the second power supply sub-unit 212, and the output of the third drive sub-controller 450 is connected to the control terminal of the third power supply sub-unit 213.

When the temperature data of the power module 200 is within the first temperature range, the first gear sub-signal output by the temperature decoder 320 is valid, and the second gear sub-signal and the third gear sub-signal are both invalid, so that the control sub-signal output by the first drive sub-controller 430 is valid, and the control sub-signals output by the second drive sub-controller 440 and the third drive sub-controller 450 are invalid. The first power supply subunit 211 is operated, the second power supply subunit 212 and the third power supply subunit 213 are stopped, and the first power supply terminal VH is driven by the first power supply subunit 211 to drive the first terminal PCS of the amplification module 100 during the sense amplification stage T2.

When the temperature data of the power module 200 is in the second temperature range, the second gear sub-signal output by the temperature decoder 320 is valid, and both the first gear sub-signal and the third gear sub-signal are invalid, then the control sub-signal output by the second drive sub-controller 440 is valid, and the control sub-signals output by the first drive sub-controller 430 and the third drive sub-controller 450 are invalid. The second power supply subunit 212 operates, the first power supply subunit 211 and the third power supply subunit 213 stop operating, and the first power supply terminal VH is caused by the second power supply subunit 212 to drive the first terminal PCS of the amplification module 100 during the sense amplification period T2.

When the temperature data of the power module 200 is in the third temperature range, the third gear sub-signal output by the temperature decoder 320 is valid, and both the first gear sub-signal and the second gear sub-signal are invalid, then the control sub-signal output by the third drive sub-controller 450 is valid, and the control sub-signals output by the first drive sub-controller 430 and the second drive sub-controller 440 are invalid. The third power supply subunit 213 operates, the first power supply subunit 211 and the second power supply subunit 212 stop operating, and the first power supply terminal VH is caused by the third power supply subunit 213 to drive the first terminal PCS of the amplification module 100 during the sense amplification stage T2.

In the above technical solution, the temperature range signal includes three temperature range sub-signals, the rate control signal includes three control sub-signals, the temperature sensor 310 detects temperature data of the power module 200, and the temperature decoder 320 determines an effective temperature range sub-signal of the three temperature range sub-signals according to the temperature data, because the control sub-signal is determined according to a corresponding temperature range sub-signal and the overdrive power enable signal EN, that is, the temperature range sub-signal determines whether the control sub-signal is effective, by such setting, it is possible to adjust the voltage driving capability of the power module 200 based on the temperature data, and drive the first end PCS of the amplification module 100 at the adjusted voltage driving rate, so that the voltage change rate of the first end PCS of the amplification module 100 is within a preset range.

In some embodiments, the driving controller 330 further includes a first not gate 420, an input terminal of the first not gate 420 receiving the overdrive power enable signal EN, and an output terminal of the first not gate 420 connected to the first input terminal of each driving sub-controller for negating the overdrive power enable signal EN.

In some embodiments, the driving sub-controller comprises a second not gate 411 and an or gate 412, an input of the second not gate 411 is connected to an output of the corresponding temperature decoder 320 and receives the corresponding temperature gear sub-signal, a first input of the or gate 412 is connected to an output of the first not gate 420, a second input of the or gate 412 is connected to an output of the second not gate 411, and an output of the or gate 412 is used for outputting a control sub-signal.

The temperature shift sub-signal is active high, the control sub-signal is active low during the sense amplifying period T2, and active high during the charge sharing period T1 and the recovery period T3. As shown In fig. 5A, the input terminal In1 of the first not gate 420 receives the overdrive power enable signal EN, the overdrive power enable signal EN is at a high level In the sense amplifying stage T2, and at a low level In the charge sharing stage T1 and the recovery stage T3, the signal output from the output terminal Out1 of the first not gate 420 is at a low level In the sense amplifying stage T2, and at a high level In the charge sharing stage T1 and the recovery stage T3, the input terminal In2 of the second not gate 411 receives the temperature shift sub-signal, the temperature shift sub-signal is at a high level, the output terminal Out2 of the second not gate 411 outputs a low level, or the signal output from the output terminal Out3 of the gate 412 is at a low level In the sense amplifying stage T2, and at a high level In the charge sharing stage T1 and the recovery stage T3, or the control sub-signal output by the gate 412 is valid.

As shown In fig. 5B, the input terminal In1 of the first not gate 420 receives the overdrive power enable signal EN, the signal output by the output terminal Out1 of the first not gate 420 is at a low level during the sensing amplification stage T2 and at a high level during the non-sensing amplification stage, the input terminal In2 of the second not gate 411 receives the temperature shift sub-signal, the temperature shift sub-signal is at a low level, the signal output by the output terminal Out2 of the second not gate 411 is at a high level, the signal output by the output terminal Out3 of the or gate 412 is at a high level during the sensing amplification stage T2, the charge sharing stage T1 and the recovery stage T3, and the control sub-signal output by the or gate 412 is inactive.

In the above technical solution, the driving controller 330 includes a first not gate 420 and a plurality of driving sub-controllers, each driving sub-controller includes a second not gate 411 and an or gate 412, the first not gate 420 does not operate on the overdrive power enable signal EN, the second not gate 411 does not operate on the temperature gear sub-signal, the or gate 412 does or on the overdrive power enable signal EN and the temperature gear sub-signal after the non-operation, and the temperature gear sub-signal determines whether the output control sub-signal of the or gate 412 is valid.

In some embodiments, with continued reference to fig. 3, the amplification module 100 includes a fifth P-type transistor P5, a sixth P-type transistor P6, a first N-type transistor N1, and a second N-type transistor N2. A source of the fifth P-type transistor P5 is connected to the first terminal PCS of the amplifying block 100, and a source of the sixth P-type transistor P6 is connected to the source of the fifth P-type transistor P5. The source of the first N-type transistor N1 is used as the second terminal NCS of the amplification block 100, and the source of the second N-type transistor N2 is connected to the source of the first N-type transistor N1.

The gate of the fifth P-type transistor P5 is connected to the drain of the sixth P-type transistor P6, the gate of the sixth P-type transistor P6 is connected to the drain of the fifth P-type transistor P5, the gate of the first N-type transistor N1 is connected to the drain of the second N-type transistor N2, the gate of the second N-type transistor N2 is connected to the drain of the first N-type transistor N1, and the drain of the first N-type transistor N1 is connected to the drain of the fifth P-type transistor P5. The drain of the second N-type transistor N2 is connected to the drain of the sixth P-type transistor P6.

In some embodiments, the first power supply subunit 211 includes a first P-type transistor P1, a source of the first P-type transistor P1 is connected to the first power terminal VH, a drain of the first P-type transistor P1 is connected to the first terminal PCS of the amplifying module 100, and a gate of the first P-type transistor P1 receives the control sub-signal output by the first driving sub-controller 430;

the second power supply subunit 212 includes a second P-type transistor P2, a source of the second P-type transistor P2 is connected to the first power terminal VH, a drain of the second P-type transistor P2 is connected to the first terminal PCS of the amplifying module 100, and a gate of the second P-type transistor P2 receives the control sub-signal output by the second driving sub-controller 440.

The third power supply sub-unit 213 includes a third P-type transistor P3, a source of the third P-type transistor P3 is connected to the first power terminal VH, a drain of the third P-type transistor P3 is connected to the first terminal PCS of the amplification module 100, and a gate of the third P-type transistor P3 receives the control sub-signal output by the third driving sub-controller 450.

The width-to-length ratio of the first P-type transistor P1 is smaller than that of the second P-type transistor P2, and the width-to-length ratio of the second P-type transistor P2 is smaller than that of the third P-type transistor P3. That is, the voltage driving capability of the first P-type transistor P1 is smaller than that of the second P-type transistor P2, the voltage driving capability of the second P-type transistor P2 is smaller than that of the third P-type transistor P3, and the voltage driving capability of the second P-type transistor P2 is within the predetermined range when the temperature data of the power module 200 is within the second range.

In some embodiments, the second power unit 220 includes a fourth P-type transistor P4, a source of the fourth P-type transistor P4 is connected to the second power terminal VL, a gate of the fourth P-type transistor P4 receives the power enable signal, and a drain of the fourth P-type transistor P4 is connected to the first terminal PCS of the amplifying block 100.

In some embodiments, the sense amplifier further includes a third N-type transistor N3, a drain of the third N-type transistor N3 is connected to the second end NCS of the amplifying block 100, a source of the third N-type transistor N3 is connected to a third power source terminal, a gate of the third N-type transistor N3 receives the auxiliary power enable signal, and the third N-type transistor N3 is configured to be turned on during the sense amplifying phase T2 and the recovery phase T3.

As shown in fig. 6A, in the charge sharing phase T1, the control sub-signals received by the first P-type transistor P1, the second P-type transistor P2 and the third P-type transistor P3 are at a high level, the power enable signal received by the fourth P-type transistor P4 is at a high level, the auxiliary power enable signal received by the third N-type transistor N3 is at a low level, the first P-type transistor P1 to the fourth P-type transistor P4 are all turned off, the third N-type transistor N3 is also turned off, and the memory cell shares charges with the bit line BL or the complementary bit line BLB. For example: the memory cell shares charge with the bit line BL, raising the bit line BL voltage.

When the temperature data of the power module 200 is in the first temperature range, during the sense amplifying stage T2, the control sub-signal of the first P-type transistor P1 is at a low level, the control sub-signals received by the second P-type transistor P2 and the third P-type transistor P3 are at a high level, the power enable signal is at a high level, the auxiliary power enable signal is at a high level, the first P-type transistor P1 and the third N-type transistor N3 are turned on, the second P-type transistor P2 to the fourth P-type transistor P4 are all turned off, and the first power terminal VH drives the first terminal PCS of the amplifying module 100 through the first P-type transistor P1.

As shown in fig. 7A, when the temperature data of the power module 200 is in the first temperature range, that is, the temperature data of the power module 200 is relatively low, before the voltage driving capability of the power module 200 is adjusted, the voltage variation slope of the first end of the amplification module 100 is relatively steep, as shown by a straight line C1, the first P-type transistor P1 with relatively weak voltage driving capability is selected, so that the voltage driving capability of the power module 200 is in the preset range, the voltage variation slope of the first end of the amplification module 100 is gentle, as shown by a straight line C2, the voltage difference between the bit line BL and the complementary bit line BLB reaches the target voltage difference at the expected time, the sensing accuracy is improved, and the power consumption of the sensing amplification stage T2 is reduced.

In the recovery stage T3, the control sub-signal received by the first P-type transistor P1, the second P-type transistor P2 and the third P-type transistor P3 is at a high level, the power enable signal is at a low level, the auxiliary power enable signal is at a high level, the fourth P-type transistor P4 and the third N-type transistor N3 are turned on, the first P-type transistor P1 to the third P-type transistor P3 are all turned off, and the second power source terminal VL drives the first terminal PCS of the amplifier module 100 through the fourth P-type transistor P4.

As shown in fig. 6B, when the temperature data of the power module 200 is in the second temperature range, unlike the timing diagram shown in fig. 6A, in the sense amplifying stage T2, the control sub-signal of the second P-type transistor P2 is at a low level, the control sub-signals received by the first P-type transistor P1 and the third P-type transistor P3 are at a high level, the power enable signal is at a high level, the auxiliary power enable signal is at a high level, the second P-type transistor P2 and the third N-type transistor N3 are turned on, the first P-type transistor P1, the third P-type transistor P3 and the fourth P-type transistor P4 are all turned off, the first power terminal VH drives the first terminal PCS of the amplifying module 100 through the second P-type transistor P2, and the voltage driving capability of the second P-type transistor P2 is in the preset rate range.

As shown in fig. 6C, when the temperature data of the power module 200 is in the third temperature range, unlike the timing diagram shown in fig. 6A, in the sense amplifying stage T2, the control sub-signal of the third P-type transistor P3 is at a low level, the control sub-signals received by the first P-type transistor P1 and the second P-type transistor P2 are at a high level, the power enable signal is at a high level, the auxiliary power enable signal is at a high level, the third P-type transistor P3 and the third N-type transistor N3 are turned on, the first P-type transistor P1, the second P-type transistor P2 and the fourth P-type transistor P4 are all turned off, and the first power terminal VH drives the first terminal of the amplifying module 100 through the third P-type transistor P3.

As shown in fig. 7B, when the temperature data of the power module 200 is in the third temperature range, that is, the temperature data of the power module 200 is higher, before the voltage driving capability of the power module 200 is adjusted, the slope of the voltage variation at the first end of the amplifying module 100 is relatively gentle, as shown by a straight line C3, the third P-type transistor P3 with relatively strong voltage driving capability is selected, so that the voltage driving capability of the power module 200 is in the preset range, and the slope of the voltage variation at the first end of the amplifying module 100 is relatively steep, as shown by a straight line C4.

In the above technical solution, one of the first P-type transistor P1, the second P-type transistor P2 and the third P-type transistor P3 is selected according to the temperature data of the power module 200, the first power terminal VH is controlled to drive the amplification module 100, so that the voltage driving capability of the power module 200 to the first terminal PCS of the amplification module 100 is ensured to be within a preset range, and the voltage change slope of the first terminal PCS of the amplification module 100 is within a preset slope range, so that the bit line BL and the complementary bit line BLB reach the target voltage difference at the expected time, the sensing accuracy of the sense amplifier is improved, and the power loss is reduced.

Other embodiments of the disclosure will be apparent to those skilled in the art from consideration of the specification and practice of the disclosure disclosed herein. This disclosure is intended to cover any variations, uses, or adaptations of the disclosure following, in general, the principles of the disclosure and including such departures from the present disclosure as come within known or customary practice within the art to which the disclosure pertains. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the disclosure being indicated by the following claims.

It will be understood that the present disclosure is not limited to the precise arrangements described above and shown in the drawings and that various modifications and changes may be made without departing from the scope thereof. The scope of the present disclosure is limited only by the appended claims.

Claims

1. A sense amplifier, comprising:

the first input end of the power module is connected with the first power end and used for acquiring temperature data of the power module, and adjusting the voltage driving capability of the power module in a sensing amplification stage according to the temperature data, so that the voltage driving capability of the power module in the sensing amplification stage is in a preset range, and the first power end drives the first end of the amplification module through the power module in the sensing amplification stage.

2. The sense amplifier of claim 1, wherein the second input terminal of the power module is connected to a second power terminal, and the power module is further configured to enable the first terminal of the amplifying module to be connected to the second power terminal; wherein the voltage of the second power supply terminal is less than the voltage of the first power supply terminal.

3. The sense amplifier of claim 1, wherein the power supply module comprises a first power supply unit having an input terminal connected to the first power supply terminal and an output terminal connected to the first terminal of the amplification module; the first power supply unit includes:

the output end of the first power supply subunit is connected with the first end of the amplifying module, and when the temperature data is in a first temperature range, the first power supply end drives the first end of the amplifying module in the sensing amplifying stage;

the output end of the second power supply subunit is connected with the first end of the amplifying module, and when the temperature data is in a second temperature range, the first power supply end drives the first end of the amplifying module in the sensing amplifying stage;

the output end of the third power supply subunit is connected with the first end of the amplifying module, and when the temperature data is in a third temperature range, the first power supply end drives the first end of the amplifying module in the sensing amplifying stage;

4. The sense amplifier of claim 3, wherein the power supply module further comprises:

the control unit is provided with an output end and is used for acquiring the temperature data of the amplification module and generating a rate control signal according to the temperature data and an overdrive power supply enabling signal of the amplification module;

the rate control signal is used to enable the first power supply terminal to drive the first terminal of the amplification module through the first power supply unit.

5. The sense amplifier according to claim 4, wherein the control unit comprises:

and the first input end of the driving controller is used for receiving the over-driving power supply enabling signal, the second input end of the driving controller is connected with the output end of the temperature decoder, and the driving controller is used for generating the speed control signal according to the temperature gear signal and the over-driving power supply enabling signal.

6. The sense amplifier of claim 5 wherein the temperature step signal comprises three temperature step sub-signals, the drive controller comprises three drive sub-controllers, and the rate control signal comprises three control sub-signals;

and a first input end of each driving sub-controller receives the over-driving power supply enabling signal, a second input end of each driving sub-controller is connected with the corresponding output end of the temperature decoder, receives the corresponding temperature gear sub-signal, and generates one control sub-signal according to the over-driving power supply enabling signal and the corresponding temperature gear sub-signal.

7. The sense amplifier of claim 6, wherein the drive controller further comprises a first not gate;

the input end of the first NOT gate receives the over-driving power supply enabling signal, and the output end of the first NOT gate is connected with the first input end of each driving sub-controller.

8. The sense amplifier of claim 7, wherein the drive sub-controller comprises:

and the first input end of the OR gate is connected with the output end of the first NOT gate, and the second input end of the OR gate is connected with the output end of the second NOT gate, and is used for outputting one control sub-signal.

9. The sense amplifier of claim 3,

the first power supply subunit includes: a first P-type transistor, wherein the source electrode of the first P-type transistor is connected with the first power supply end, the drain electrode of the first P-type transistor is connected with the first end of the amplification module, and the grid electrode of the first P-type transistor receives a first control sub-signal;

the third power supply subunit includes: a third P-type transistor, wherein the source electrode of the third P-type transistor is connected with the first power supply end, the drain electrode of the third P-type transistor is connected with the first end of the amplifying module, and the grid electrode of the third P-type transistor receives a third control sub-signal;

the width-to-length ratio of the first P type transistor is smaller than that of the second P type transistor, and the width-to-length ratio of the second P type transistor is smaller than that of the third P type transistor.

10. The sense amplifier of claim 9,

when the temperature data is in a first temperature range, the first P-type transistor drives the first end of the amplifying module under the control of the first control sub-signal; the second P-type transistor and the third P-type transistor stop driving the first end of the amplifying module;

when the temperature data is in a third temperature range, the third P-type transistor drives the first end of the amplifying module under the control of the third control sub-signal; the first P-type transistor and the second P-type transistor stop driving the first end of the amplifying module;

the upper limit value of the first temperature range is less than or equal to the lower limit value of a second temperature range, and the upper limit value of the second temperature range is less than or equal to the lower limit value of a third temperature range.

11. The sense amplifier of claim 2, wherein the power module further comprises:

and the control end of the second power supply unit receives a power supply enabling signal, the input end of the second power supply unit is connected with the second power supply end, the output end of the second power supply unit is connected with the first end of the amplification module, and the second power supply unit is used for enabling the first end of the amplification module to be connected with the second power supply end under the control of the power supply enabling signal.

12. The sense amplifier of claim 11, wherein the second power supply unit comprises:

and the source electrode of the fourth P-type transistor is connected with the second power supply end, the grid electrode of the fourth P-type transistor receives the power supply enabling signal, and the drain electrode of the fourth P-type transistor is connected with the first end of the amplifying module.

13. The sense amplifier of claim 1, wherein the amplification module comprises:

the grid electrode of the sixth P-type transistor is connected with the drain electrode of the fifth P-type transistor, and the source electrode of the sixth P-type transistor is connected with the source electrode of the fifth P-type transistor;

a first N-type transistor, wherein the grid electrode of the first N-type transistor is connected with the drain electrode of the second N-type transistor, the source electrode of the first N-type transistor is used as the second end of the amplifying module, and the drain electrode of the first N-type transistor is connected with the drain electrode of the fifth P-type transistor;

14. The sense amplifier of claim 13, further comprising:

15. A semiconductor memory comprising the sense amplifier of any one of claims 1 to 14.