CN115078953A - Electrical property measuring method of semiconductor device and electronic equipment - Google Patents
Electrical property measuring method of semiconductor device and electronic equipment Download PDFInfo
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Abstract
The invention provides an electrical property measuring method of a semiconductor device, and relates to the technical field of semiconductors. And the electrical property measuring method at least comprises the following steps: applying a drain voltage to a drain of the semiconductor device, applying a gate voltage to a gate of the semiconductor device, and measuring a source voltage of the semiconductor device; judging whether the amplitude of the source voltage is larger than the target source voltage or not; when the amplitude of the source voltage is smaller than or equal to the target source voltage, taking the measured gate voltage as a critical starting voltage; and when the amplitude of the source voltage is larger than the target source voltage, taking the difference value of the grid voltage and the source voltage measured this time as the grid voltage measured next time, keeping the drain voltage unchanged, and measuring the source voltage again until the source voltage is smaller than or equal to the target source voltage. The electrical property measuring method of the semiconductor device can improve the testing efficiency.
Description
Technical Field
The present invention relates to the field of semiconductor technologies, and in particular, to an electrical measurement method for a semiconductor device and an electronic apparatus.
Background
After the semiconductor silicon wafer finishes all the manufacturing process technologies, various electrical tests are carried out on various semiconductor devices formed on the silicon wafer so as to ensure that the formed semiconductor devices have good performance. The Wafer Acceptance Test (WAT) is an electrical Test performed by using a Test structure disposed on a Wafer scribe line. Through the combination of the test structures and the analysis of the test results, each process of the wafer manufacturing process can be monitored.
During the wafer test, the threshold voltage and the sub-threshold slope are required to be tested. The gradually increased voltage can be applied to the gate of the semiconductor device to obtain the relationship between a large amount of gate voltage and conduction current, obtain the relationship diagram between the gate voltage and the conduction current of the semiconductor device, and obtain the critical initial voltage and the critical slope according to the relationship diagram. This method is inefficient in testing and affects production throughput.
Disclosure of Invention
In view of the above drawbacks of the prior art, an object of the present invention is to provide an electrical measurement method for a semiconductor device and an electronic device, which solve the problem of inefficient test efficiency.
In order to achieve the above and other related objects, the present invention provides a method for measuring electrical properties of a semiconductor device, comprising:
presetting drain voltage, grid voltage and target source voltage;
applying the drain voltage to the drain of the semiconductor device, applying the gate voltage to the gate of the semiconductor device, and measuring the source voltage of the semiconductor device; and
judging whether the amplitude of the source voltage is larger than the target source voltage or not;
when the amplitude of the source voltage is smaller than or equal to the target source voltage, taking the measured gate voltage as a critical starting voltage;
and when the amplitude of the source voltage is larger than the target source voltage, taking the difference value of the grid voltage and the source voltage measured this time as the grid voltage measured next time, keeping the drain voltage unchanged, and measuring the source voltage again until the source voltage is smaller than or equal to the target source voltage.
In an embodiment of the present invention, the method for measuring electrical properties of a semiconductor device further includes: acquiring the input current of a source electrode of the semiconductor device, wherein the input current of the source electrode is acquired through the following formula:
I S =I C *W/L；
wherein, I C W is the constant current of the semiconductor device, W is the gate width of the semiconductor device, and L is the gate length of the semiconductor device.
In an embodiment of the present invention, the method for measuring electrical properties of a semiconductor device further includes selecting a test mode of a tester, and the selecting the test mode of the tester includes the following steps:
acquiring the input current of the source electrode; and
judging whether the amplitude of the input current of the source electrode is smaller than a threshold current or not, and adjusting the test machine to be in a medium integration mode when the input current of the source electrode is smaller than the threshold current; and when the input current of the source electrode is greater than or equal to the threshold current, adjusting the test machine table to be in a short integration mode.
In an embodiment of the present invention, the gate voltage of the semiconductor device is 0V at the time of the first measurement.
In an embodiment of the present invention, the method for measuring electrical properties of a semiconductor device further includes the following steps:
and recording the measurement times, and acquiring the grid voltage of the semiconductor device at the next measurement according to the measurement times, the grid voltage measured each time and the acquired source voltage.
In an embodiment of the invention, when the magnitude of the source voltage is greater than the target source voltage, the method for measuring electrical properties of a semiconductor device further includes the following steps:
recording the measurement times, and judging whether the current measurement times are smaller than a first preset value or not;
if the current measurement times are smaller than the first preset value, judging whether the source electrode voltage acquired at this time is larger than a preset voltage value;
and if the current measurement times are greater than or equal to the first preset value, outputting invalidity and ending the measurement process.
In an embodiment of the invention, if the source voltage obtained this time is greater than the preset voltage value, the gate voltage at the next measurement is obtained according to the following formula:
V Gn+1 =V Gn -A*V Sn ；
wherein, V Gn+1 Is the gate voltage at the next measurement, V Gn Is the gate voltage at this measurement, V Sn A is a predetermined coefficient of the source voltage at the time of the measurement.
In an embodiment of the present invention, after obtaining the gate voltage for the next measurement, the method for measuring the electrical property of the semiconductor device further includes the following steps:
judging whether the measurement times are greater than a second preset value or not;
and if the measuring times are larger than the second preset value, adjusting the detection mode of the test machine.
In an embodiment of the present invention, the method for measuring electrical properties of a semiconductor device further includes obtaining a sub-threshold slope of the semiconductor device according to the threshold starting voltage, and obtaining the sub-threshold slope includes the following steps:
applying the drain voltage to the drain of the semiconductor device, applying a first voltage to the gate of the semiconductor device, and measuring the source current at the moment as a first current;
applying the drain voltage to the drain of the semiconductor device, applying a second voltage to the gate of the semiconductor device, and measuring the source current as a second current; and
and acquiring the sub-critical slope according to the first current and the second current.
In an embodiment of the present invention, the first voltage and the second voltage are obtained by the following formula:
V 1 =V T +D vt -V int /2；
V 2 =V T +D vt +V int /2；
wherein, V 1 Is a first voltage, V 2 Is a second voltage, V T Is a critical threshold voltage, D vt Is a set value, V int To measure the gap voltage.
In an embodiment of the present invention, the sub-critical slope is obtained by the following formula:
wherein S is the sub-critical slope, I 1 Is the first current, I 2 Is the second current, V int To measure the gap voltage.
The invention also provides electronic equipment which comprises a processor and a memory, wherein the memory stores program instructions, and the processor runs the program instructions to realize the electrical property measurement method of the semiconductor device.
In summary, the present invention provides an electrical measurement method for a semiconductor device and an electronic apparatus, wherein a difference between a gate voltage and a source voltage during a previous measurement is used as an input value of a gate voltage during a next measurement, so that a situation that the gate voltage is applied to a gate irregularly for a plurality of times and a test time is too long can be avoided. The method for measuring the electrical property of the semiconductor device can improve the efficiency and save the test time, and at least saves one third of the test time compared with the method for gradually increasing the grid voltage and obtaining the relation graph of the conduction current and the grid voltage. The electrical property measuring method of the semiconductor device can obtain the sub-critical slope according to the result of the critical initial voltage, does not need to measure the sub-critical slope, further reduces the time of electrical property measurement and improves the efficiency of electrical property measurement of the semiconductor device.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
FIG. 1 is a flow chart of a method for measuring electrical properties of a semiconductor device according to the present invention.
FIG. 2 is a flowchart illustrating a method for adjusting a mode of a test apparatus according to the present invention.
FIG. 3 is a flow chart of another method for measuring electrical properties of a semiconductor device according to the present invention.
FIG. 4 is a flowchart of a method for obtaining a sub-threshold slope according to the present invention.
Fig. 5 is a block diagram of a computer-readable storage medium in accordance with the present invention.
Fig. 6 is a schematic block diagram of an electronic device according to the present invention.
Description of reference numerals:
10 a computer-readable storage medium; 100 computer instructions; 20 a processor; 30 memory.
Detailed Description
The embodiments of the present invention are described below with reference to specific embodiments, and other advantages and effects of the present invention will be easily understood by those skilled in the art from the disclosure of the present specification. The invention is capable of other and different embodiments and of being practiced or of being carried out in various ways, and its several details are capable of modification in various respects, all without departing from the spirit and scope of the present invention. It is to be noted that the features in the following embodiments and examples may be combined with each other without conflict. It is also to be understood that the terminology used in the examples is for the purpose of describing particular embodiments only, and is not intended to limit the scope of the present invention. Test methods in which specific conditions are not specified in the following examples are generally carried out under conventional conditions or under conditions recommended by the respective manufacturers.
It should be understood that the structures, ratios, sizes, and the like shown in the drawings are only used for matching the disclosure of the present disclosure, and are not used for limiting the conditions of the present disclosure, so that the present disclosure is not limited to the technical essence, and any modifications of the structures, changes of the ratios, or adjustments of the sizes, can still fall within the scope of the present disclosure without affecting the function and the achievable purpose of the present disclosure. In addition, the terms "upper", "lower", "left", "right", "middle" and "one" used in the present specification are for clarity of description, and are not intended to limit the scope of the present invention, and the relative relationship between the terms and the terms is not to be construed as a scope of the present invention.
In the process of testing semiconductor devices, other process-related characteristics can be tested according to N-type metal-oxide semiconductor field effect transistors, P-type metal-oxide semiconductor field effect transistors, resistors and capacitors with different sizes, wherein capacitance-voltage (C-V) tests have long been used for judging various semiconductor parameters of various devices and structures, and the application range comprises metal-oxide semiconductor field effect transistors, bipolar junction transistors, III-V compound devices, photovoltaic (solar) batteries, micro electro mechanical system devices, organic thin film transistor displays, photodiodes, carbon nanotubes and the like. The present invention is mainly directed to a lot of tests of wafer threshold voltages in the testing process of advanced processes, and the testing of the threshold voltages on wafer devices requires a lot of testing time, for example, more time is wasted in testing resistors or leakage currents, which affects the yield.
In order to improve the testing efficiency, the present invention provides an electrical property measuring method of a semiconductor device, which specifically includes steps S101 to S105.
S101, presetting a drain voltage, a grid voltage and a target source voltage.
S102, a drain voltage is applied to the drain of the semiconductor device, a gate voltage is applied to the gate of the semiconductor device, and a source voltage of the semiconductor device is measured.
S103, judging whether the amplitude of the source voltage is larger than the target source voltage, executing a step S104 when the amplitude of the source voltage is larger than the target source voltage, and executing a step S105 when the amplitude of the source voltage is smaller than or equal to the target source voltage.
S104, taking the difference value between the grid voltage and the source voltage measured this time as the grid voltage measured next time, keeping the drain voltage unchanged, and executing the step S102.
And S105, taking the grid voltage measured this time as a critical starting voltage.
Referring to fig. 1, in an embodiment of the invention, in step S101, a drain voltage, a gate voltage, a target source voltage, and a source input current of the semiconductor device are required to be preset. In the present invention, since the critical threshold voltage and the sub-critical slope of the semiconductor device are required to be measured, the drain voltage, the gate voltage at the beginning of the test, and the target source voltage of the semiconductor device can be preset according to the performance of the semiconductor device. The drain voltage is determined by the rated voltage of the drain when the semiconductor device is designed. While at the first measurement the gate voltage is set to e.g. 0V. The target source voltage is the voltage of the source when the gate applies a minimum gate voltage that turns the semiconductor device on, depending on the semiconductor device being fabricated. In the present embodiment, the target source voltage is, for example, 1mV to 3mV, and specifically, for example, 1 mV.
Referring to fig. 1, in an embodiment of the invention, the input current of the source can be obtained by the following formula:
I S =I C *W/L。
wherein, I C Is the constant current of the semiconductor device, W is the gate width of the semiconductor device, and L is the gate length of the semiconductor device.
Referring to fig. 1, in an embodiment of the invention, in step S102, after the drain voltage and the gate voltage of the semiconductor device are obtained, the semiconductor device is disposed in a testing machine and connected to the gate, the source and the drain of the semiconductor device to be tested, the drain voltage is applied to the drain of the semiconductor device, the gate voltage is applied to the gate, and the source voltage of the semiconductor device at that time is measured. In this embodiment, the testing machine selects, for example, a Keysight 4082 testing system, and has a plurality of detection modes, including, for example, a short integration mode, a medium integration mode, and a long integration mode, when measuring the source voltage. When the testing machine is in the short integration mode, the time end of the voltage is tested, but the accuracy of the obtained voltage is low. When the testing machine is in the middle integration mode, the testing time is moderate, and the accuracy of the obtained voltage is moderate. When the testing machine is in the long integration mode, the testing time is long, but the accuracy of the obtained voltage is high. In the invention, the electrical property measuring method of the semiconductor device further comprises the step of determining a test mode when the source voltage of the semiconductor device is tested according to the source input current. In this embodiment, to ensure the efficiency of the test, the short integration mode and the middle integration mode are selected, and the short integration mode and the middle integration mode are enough to detect the magnitude of the source voltage. During detection, the detection mode of the test machine is selected according to the source input current.
Specifically, referring to fig. 2, in an embodiment of the invention, the detection mode of the selected test equipment includes the following steps S1011 to S1012.
S1011, acquiring the input current of the source.
S1012, judging whether the amplitude of the input current of the source electrode is smaller than a threshold current, and executing the step S1013 to adjust the test mode of the test machine to be a middle integration mode when the input current of the source electrode is smaller than the threshold current; when the input current of the source is greater than or equal to the threshold current, step S1014 is executed to adjust the test mode of the tester to the short integration mode.
Referring to FIG. 2, in one embodiment of the present invention, the threshold current can be set according to specific situations. The specific expression is, for example, 10nA to 15nA, and specifically, for example, 10 nA. In other embodiments, when the source voltage needs to be measured with high precision and the test efficiency is not required, the stage can be set to the long integration mode.
Referring to fig. 1, in an embodiment of the invention, after completing the mode adjustment of the tester, the tester may start the test function of the tester, apply a drain voltage to the drain of the semiconductor device, apply a gate voltage to the gate, and measure the source voltage of the semiconductor device at that time. The test time may be set in the test procedure to measure the source voltage. In this embodiment, the start test machine is set to the short integration mode, and the test time in the test program is set to 0.05 seconds, for example. After 0.05 seconds, the source voltage is read.
Referring to fig. 1, in an embodiment of the invention, after the source voltage of the semiconductor device is obtained, step S103 is executed to determine whether the magnitude of the measured source voltage is greater than a target source voltage, when the magnitude of the source voltage obtained by the current measurement is greater than the target voltage, the measured source voltage is greater, and the gate voltage applied to the gate of the semiconductor device is not sufficient as the threshold starting voltage. And when the amplitude of the source voltage obtained by the current measurement is smaller than or equal to the target voltage, taking the gate voltage obtained by the current measurement as the critical starting voltage, namely completing the measurement of the critical starting voltage.
Referring to fig. 1, in an embodiment of the invention, when it is determined whether the amplitude of the source voltage is greater than the target source voltage and the amplitude of the source voltage is greater than the target source voltage, step S104 is executed to use the difference between the gate voltage and the source voltage measured this time as the next gate voltage measured, keep the drain voltage unchanged, and measure the source voltage again. In the cyclic measurement of the source voltage, the first gate voltage is, for example, V G1 The source voltage obtained by the first measurement being, for example, V S1 Then the source voltage V obtained in the first measurement S1 When the amplitude of the voltage is larger than the target source voltage, the gate voltage is updated, and the updated gate voltage is, for example, V G2 And V is G2 =V G1 -V S1 . During the second measurement, the first drain voltage is kept unchanged, and the updated gate voltage V is applied to the source G2 The source voltage is measured again, the second measurement taking the source voltage as V for example S2 . If the second measurement obtains the source voltage V S2 If the amplitude is still larger than the target source voltage, the third measurement is performed, and the updated gate voltage is obtainedFor example as V G3 And V is G3 =V G2 -V S2 . And repeating the steps until the amplitude of the source voltage obtained by measurement is smaller than the target source voltage, and taking the gate voltage when the source voltage is smaller than the target source voltage as the critical starting voltage.
In the invention, in the process of measuring the critical initial voltage, the difference between the grid voltage and the source voltage in the current measurement is used as the grid voltage in the next measurement process, so that the critical initial voltage can be quickly obtained. In some embodiments, the number of measurements can be controlled within 3 by the electrical property measurement method of the semiconductor device, but in other embodiments, the number of measurements is larger. Therefore, the adjustment range of the gate voltage updated each time can be adjusted to accelerate the speed of obtaining the threshold starting voltage.
Referring to fig. 3, in another embodiment of the present invention, during the measurement, the number of measurement cycles during the measurement is recorded, and the gate voltage of the semiconductor device during the next measurement is obtained according to the number of measurement cycles, the gate voltage measured each time, and the source voltage obtained each time. When the measurement times exceed the preset value, the detection mode of the test machine can be adjusted to more accurately measure the magnitude of the source voltage.
Specifically, referring to fig. 3, in another embodiment of the present invention, the method for measuring electrical properties of a semiconductor device includes steps S201 to S214.
S201, presetting drain voltage, grid voltage and target source voltage, and recording the measurement times. In the present embodiment, the number of measurements is recorded as n, for example.
S202, a drain voltage is applied to the drain of the semiconductor device, a gate voltage is applied to the gate of the semiconductor device, and a source voltage of the semiconductor device is measured.
S203, judging whether the amplitude of the source voltage is larger than the target source voltage, executing a step S204 when the amplitude of the source voltage is larger than the target source voltage, and executing a step S205 when the amplitude of the source voltage is smaller than or equal to the target source voltage.
And S204, judging whether the current measurement frequency is 1 or 2, if so, executing a step S206, otherwise, executing a step S207.
And S205, taking the grid voltage measured this time as a critical starting voltage.
S206, taking the difference value between the grid voltage and the source voltage measured this time as the grid voltage measured next time, keeping the drain voltage unchanged, and executing the step S202.
Referring to fig. 3, in another embodiment of the present invention, after the first test and the second test are completed, when the magnitude of the measured source voltage is greater than the target source voltage, the difference between the gate voltage and the source voltage at the time of the measurement is used as the next gate voltage, i.e. V, measured at this time Gn+1 =V Gn -V Sn . Keeping the drain voltage constant, i.e. V Dn+1 =V Dn . And the number of measurements is increased, i.e. n = n + 1. The next measurement is performed.
And S207, judging whether the current measuring times are smaller than a first preset value, if so, executing a step S209, and otherwise, executing a step S208.
And S208, outputting invalid.
Referring to fig. 3, in another embodiment of the present invention, the first preset value is a maximum value of the set measurement times, and when the measurement times are smaller than the first preset value, the gate voltage needs to be updated, and the gate voltage is measured again according to the updated gate voltage. When the number of measurements is greater than or equal to the first predetermined value, it indicates that the number of measurements in the cycle is too large and the threshold voltage cannot be measured, and at this time, there is a possibility of damage to the semiconductor device or an error in the measurement process, and the output is invalid. After the display is invalid, the quality of the semiconductor device can be checked, or the measurement procedure can be verified. In the embodiment, the number of times of the first preset value is, for example, 20 to 25 times, and specifically, for example, 20 times.
S209, judging whether the amplitude of the source voltage is larger than a preset voltage value or not, executing a step S210 when the amplitude of the source voltage is larger than the preset voltage value, and executing a step S211 when the amplitude of the source voltage is smaller than or equal to the preset voltage value.
S210, acquiring a gate voltage and a drain voltage in the next measurement, wherein the gate voltage and the drain voltage in the next measurement are acquired through the following formulas:
V Gn+1 =V Gn -A*V Sn 。
V Dn+1 =V Dn 。
wherein, V Gn+1 Is the gate voltage at the next measurement, V Gn Is the gate voltage at this measurement, V Sn For the source voltage at this time of measurement, a is a predetermined coefficient, and the value of the predetermined coefficient a is, for example, 1.5 to 3, in this embodiment, the value of the predetermined coefficient a is, for example, 2. V Dn+1 Is the drain voltage at the next measurement, V Dn Is the drain voltage at this time of measurement.
S211, acquiring a grid voltage and a drain voltage in the next measurement, wherein the grid voltage and the drain voltage in the next measurement are acquired through the following formulas:
V Gn+1 =V Gn -V Sn 。
V Dn+1 =V Dn 。
wherein, V Gn+1 Is the gate voltage at the next measurement, V Gn Is the gate voltage at this measurement, V Sn Is the source voltage at this measurement. V Dn+1 Is the drain voltage at the next measurement, V Dn Is the drain voltage at this time of measurement.
Referring to fig. 3, in another embodiment of the present invention, in the measurement process, the number of times of measurement and the secondary determination of the source voltage are added, so that when the amplitude of the source voltage obtained by measurement is larger, that is, whether the amplitude of the source voltage is larger than the preset voltage value or not, a preset coefficient larger than 1 is added before the decrement (the source voltage in the current measurement), so that the obtained next gate voltage more quickly approaches to the threshold starting voltage. Thereby accelerating the overall speed of obtaining the critical threshold voltage. When the amplitude of the source voltage obtained by measurement is small, that is, when the amplitude of the source voltage is smaller than or equal to the preset voltage value, at this time, the gate voltage approaches the critical starting voltage, the coefficient before the decrement (the source voltage at the current measurement) is any 1, no other preset coefficient is set, and the gate voltage at the next measurement is obtained according to the first measurement and the second measurement.
In some embodiments, step S204 and its related step S206 may be omitted, and the first cycle test is performed to determine whether the number of cycles is less than the first preset value and whether the magnitude of the source voltage is greater than the preset voltage value. And in the second cycle test, the difference value of the grid voltage and the source voltage multiplied by the preset coefficient is used as the grid voltage in the next measurement. The threshold voltage acquisition rate can be further increased during the second cycle.
Referring to fig. 3, in another embodiment of the present invention, after the steps S210 and S211 are performed, step S212 is performed.
S212, determining whether the current measurement times is greater than a second preset value, if so, performing step S213, otherwise, performing step S214.
S213, adjusting the detection mode of the machine, and executing step S214.
S214, the number of measurements is increased, i.e., n = n +1, and the process returns to step S202.
Referring to fig. 3, in another embodiment of the present invention, if the current measurement times is greater than the second predetermined value, and the amplitude of the source voltage is still greater than the target source voltage, the detection mode of the testing machine is adjusted. In this embodiment, if the testing machine is in the short integration mode, the testing machine is adjusted to the medium integration mode, so as to increase the accuracy of the testing machine in measuring the source voltage. If the testing machine is in the middle integration mode, the detection mode of the current testing machine is kept. In other embodiments, the testing machine can be adjusted to the long integration mode.
Referring to fig. 3, in another embodiment of the present invention, after the detection mode of the testing apparatus is adjusted, or the current measurement frequency is less than or equal to the second preset value, the test frequency is increased, that is, n = n +1, and the step S202 is returned to perform the next detection.
Referring to fig. 3, in another embodiment of the present invention, during the process of measuring the threshold starting voltage, when the magnitude of the obtained source voltage is different according to the number of measurements, the gate voltage in the next test is obtained according to different rules, so as to increase the rate of obtaining the gate voltage. Meanwhile, after the measuring times reach the second preset value, the detection mode of the testing machine is adjusted, and inaccurate measurement caused by the detection mode is avoided. And after the measurement times reach the first preset value, directly outputting the invalid signals to avoid infinite circulation of the process caused by invalid semiconductor devices or program errors.
Referring to fig. 4, in an embodiment of the invention, the method for measuring the electrical property of the semiconductor device further includes obtaining a sub-threshold slope of the semiconductor device according to the threshold starting voltage. The method for obtaining the sub-critical slope includes steps S301 to S303.
S301, applying a preset drain voltage to the drain of the semiconductor device, applying a first voltage to the gate of the semiconductor device, and measuring the source current at the moment to be a first current.
S302, a preset drain voltage is applied to the drain of the semiconductor device, a second voltage is applied to the gate of the semiconductor device, and the source current at the moment is measured to be a second current.
S303, obtaining a subcritical slope according to the first current and the second current.
Referring to fig. 4, in an embodiment of the invention, the first voltage is obtained by the following formula:
V 1 =V T +D vt -V int /2。
the second voltage is obtained by the following formula:
V 2 =V T +D vt +V int /2。
wherein, V 1 Is a first voltage, V 2 Is a second voltage, V T Is a critical threshold voltage, D vt Is a set value, in this embodiment, D vt Is 0. V int To measure the gap voltage, V in this embodiment int Is 50 mV.
When the first voltage and the second voltage are obtained, after the first current and the second current of the source are obtained, the subcritical slope is obtained according to the following formula:
wherein S is a sub-critical slope, I 1 Is a first current, I 2 Is the second current.
Referring to fig. 5, the present embodiment further provides a computer-readable storage medium 10, wherein the computer-readable storage medium 10 stores computer instructions 100, and the computer instructions 100 are used for a method for measuring electrical properties of a semiconductor device. The computer readable storage medium 10 may be an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system or propagation medium. The computer-readable storage medium 10 may also include a semiconductor or solid state memory, magnetic tape, a removable computer diskette, a Random Access Memory (RAM), a read-only memory (ROM), a rigid magnetic disk and an optical disk. Optical disks may include compact disk-read only memory (CD-ROM), compact disk-read/write (CD-RW), and DVD. In the embodiment, the test apparatus is, for example, a Random Access Memory (RAM) disposed in the test machine.
Referring to fig. 6, the present invention further provides an electronic device, for example, a testing machine provided in the present invention, including a processor 20 and a memory 30, where the memory 30 stores program instructions, and the processor 20 runs the program instructions to implement the electrical property measurement method of the semiconductor device. The Processor 20 may be a general-purpose Processor including a Central Processing Unit (CPU), a Network Processor (NP), and the like. The processor 20 may also be a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field Programmable Gate Array (FPGA) or other Programmable logic device, discrete Gate or transistor logic device, or discrete hardware components. The Memory 30 may include a Random Access Memory (RAM) and may also include a Non-Volatile Memory (Non-Volatile Memory), such as at least one disk Memory. The Memory 30 may also be a Random Access Memory (RAM) type internal Memory, and the processor 20 and the Memory 30 may be integrated into one or more independent circuits or hardware, such as an Application Specific Integrated Circuit (ASIC). Note that the computer program in the memory 30 may be implemented in the form of software functional units and may be stored in a computer-readable storage medium when sold or used as a stand-alone product. Based on such understanding, the technical solution of the present invention may be embodied in the form of a software product, which is stored in a storage medium and includes instructions for causing a computer device (which may be a personal computer, an electronic device, or a network device) to perform all or part of the steps of the method according to the embodiments of the present invention.
In summary, by measuring the threshold voltage twice, taking the difference between the gate voltage and the source voltage obtained by the first measurement as the gate voltage of the second measurement, and so on, the test time for improving and reducing the threshold voltage is obtained. Therefore, the invention effectively overcomes some practical problems in the prior art, thereby having high utilization value and use significance.
The foregoing embodiments are merely illustrative of the principles and utilities of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or change the above-mentioned embodiments without departing from the spirit and scope of the present invention. Accordingly, it is intended that all equivalent modifications or changes which can be made by those skilled in the art without departing from the spirit and technical spirit of the present invention be covered by the claims of the present invention.
Claims (12)
1. A method for measuring electrical properties of a semiconductor device, comprising:
presetting drain voltage, grid voltage and target source voltage;
applying the drain voltage to the drain of the semiconductor device, applying the gate voltage to the gate of the semiconductor device, and measuring the source voltage of the semiconductor device; and
judging whether the amplitude of the source voltage is larger than the target source voltage or not;
when the amplitude of the source voltage is smaller than or equal to the target source voltage, taking the measured gate voltage as a critical starting voltage;
and when the amplitude of the source voltage is larger than the target source voltage, taking the difference value of the grid voltage and the source voltage measured this time as the grid voltage measured next time, keeping the drain voltage unchanged, and measuring the source voltage again until the source voltage is smaller than or equal to the target source voltage.
2. The electrical property measurement method of a semiconductor device according to claim 1, further comprising: acquiring the input current of a source electrode of the semiconductor device, wherein the input current of the source electrode is acquired through the following formula:
I S =I C *W/L；
wherein, I C W is the constant current of the semiconductor device, W is the gate width of the semiconductor device, and L is the gate length of the semiconductor device.
3. The electrical measurement method of claim 2, further comprising selecting a testing mode of the testing machine, wherein the selecting the testing mode of the testing machine comprises:
acquiring the input current of the source electrode; and
judging whether the amplitude of the input current of the source electrode is smaller than a threshold current or not, and adjusting the test machine to be in a medium integration mode when the input current of the source electrode is smaller than the threshold current; and when the input current of the source is greater than or equal to the threshold current, adjusting the test machine to be in a short integration mode.
4. The electrical property measurement method of a semiconductor device as claimed in claim 1, wherein the gate voltage of the semiconductor device is 0V at the first measurement.
5. The electrical measurement method of a semiconductor device as claimed in claim 1, further comprising the steps of:
and recording the measuring times, and acquiring the grid voltage of the semiconductor device at the next measuring time according to the measuring times, the grid voltage measured each time and the acquired source voltage.
6. The electrical measurement method of a semiconductor device as claimed in claim 1, wherein when the magnitude of the source voltage is greater than the target source voltage, the electrical measurement method further comprises:
recording the measurement times, and judging whether the current measurement times are smaller than a first preset value or not;
if the current measurement times are smaller than the first preset value, judging whether the source electrode voltage acquired at this time is larger than a preset voltage value;
and if the current measurement times are greater than or equal to the first preset value, outputting invalidity and ending the measurement process.
7. The electrical measurement method of a semiconductor device as claimed in claim 6, wherein if the source voltage obtained this time is greater than the predetermined voltage value, the gate voltage at the next measurement is obtained according to the following formula:
V Gn+1 =V Gn -A*V Sn ；
wherein, V Gn+1 Is the gate voltage at the next measurement, V Gn Is the gate voltage at this measurement, V Sn A is a preset coefficient of the source voltage at the time of the measurement.
8. An electrical property measuring method of a semiconductor device according to claim 7, wherein after obtaining the gate voltage at the next measurement, the electrical property measuring method of the semiconductor device further comprises the steps of:
judging whether the measurement times are greater than a second preset value or not;
and if the measuring times are larger than the second preset value, adjusting the detection mode of the test machine.
9. The method of claim 1, further comprising obtaining a sub-threshold slope of the semiconductor device according to the threshold initiation voltage, wherein obtaining the sub-threshold slope comprises:
applying the drain voltage to the drain of the semiconductor device, applying a first voltage to the gate of the semiconductor device, and measuring the source current at the moment as a first current;
applying the drain voltage to the drain of the semiconductor device, applying a second voltage to the gate of the semiconductor device, and measuring the source current at the moment as a second current; and
and acquiring the sub-critical slope according to the first current and the second current.
10. A method as claimed in claim 9, wherein the first voltage and the second voltage are obtained by the following formula:
V 1 =V T +D vt -V int /2；
V 2 =V T +D vt +V int /2；
wherein, V 1 Is a first voltage, V 2 Is a second voltage, V T Is a critical threshold voltage, D vt Is a set value, V int To measure the gap voltage.
11. The electrical measurement method of a semiconductor device as claimed in claim 9, wherein the sub-critical slope is obtained by the following formula:
wherein S is the sub-critical slope, I 1 Is the first current, I 2 Is the second current, V int To measure the gap voltage.
12. An electronic device, comprising a processor and a memory, wherein the memory stores program instructions, and the processor executes the program instructions to implement the electrical property measurement method of the semiconductor device according to any one of claims 1 to 11.
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Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS57194543A (en) * | 1981-05-27 | 1982-11-30 | Hitachi Ltd | Device for measuring characteristics of semiconductor device |
| JPS62135779A (en) * | 1985-12-09 | 1987-06-18 | Nec Corp | Measuring circuit for threshold voltage of fet |
| CN101029910A (en) * | 2007-03-22 | 2007-09-05 | 华为技术有限公司 | Current inspecting circuit and device |
| CN106960802A (en) * | 2016-01-11 | 2017-07-18 | 北大方正集团有限公司 | The test device and method of testing of a kind of semiconductor static electric current |
| DE102020204771A1 (en) * | 2020-04-15 | 2021-10-21 | Airbus S.A.S. | System and method for estimating junction temperatures of a power semiconductor module |
| CN114690015A (en) * | 2022-05-31 | 2022-07-01 | 江苏东海半导体股份有限公司 | Method, device, system, equipment and storage medium for testing MOS (Metal oxide semiconductor) device |
-
2022
- 2022-08-23 CN CN202211009276.7A patent/CN115078953A/en active Pending
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS57194543A (en) * | 1981-05-27 | 1982-11-30 | Hitachi Ltd | Device for measuring characteristics of semiconductor device |
| JPS62135779A (en) * | 1985-12-09 | 1987-06-18 | Nec Corp | Measuring circuit for threshold voltage of fet |
| CN101029910A (en) * | 2007-03-22 | 2007-09-05 | 华为技术有限公司 | Current inspecting circuit and device |
| CN106960802A (en) * | 2016-01-11 | 2017-07-18 | 北大方正集团有限公司 | The test device and method of testing of a kind of semiconductor static electric current |
| DE102020204771A1 (en) * | 2020-04-15 | 2021-10-21 | Airbus S.A.S. | System and method for estimating junction temperatures of a power semiconductor module |
| CN114690015A (en) * | 2022-05-31 | 2022-07-01 | 江苏东海半导体股份有限公司 | Method, device, system, equipment and storage medium for testing MOS (Metal oxide semiconductor) device |
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