CN115037157A - ISOS system output voltage balance control method based on model prediction - Google Patents

ISOS system output voltage balance control method based on model prediction Download PDF

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CN115037157A
CN115037157A CN202210576173.2A CN202210576173A CN115037157A CN 115037157 A CN115037157 A CN 115037157A CN 202210576173 A CN202210576173 A CN 202210576173A CN 115037157 A CN115037157 A CN 115037157A
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樊启高
徐程
毕恺韬
艾建
朱一昕
谢林柏
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Jiangnan University
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
    • H02M3/325—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/3353—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having at least two simultaneously operating switches on the input side, e.g. "double forward" or "double (switched) flyback" converter
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • H02M1/088—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters for the simultaneous control of series or parallel connected semiconductor devices
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/32—Means for protecting converters other than automatic disconnection
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E60/00—Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
    • Y02E60/60—Arrangements for transfer of electric power between AC networks or generators via a high voltage DC link [HVCD]

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Dc-Dc Converters (AREA)

Abstract

The invention discloses an ISOS system output voltage balance control method based on model prediction, which relates to the field of power electronics, and comprises the following steps: regulating the total output voltage of the system through PI; establishing an input and output mathematical model of the submodule, and discretizing by a forward Euler formula; establishing a system cost function, and selecting an optimal state; establishing a discrete prediction model of each sub-module; sampling the output capacitor voltage of each sub-module, adjusting the inter-bridge shift ratio of each sub-module through a discrete prediction model, and performing prediction control on the output capacitor voltage of the sub-module at each sampling moment to realize output voltage balance control of the ISOS system. The control strategy has the advantages of high reliability, suitability for a multi-module ISOS system, simple constructed mathematical model, good dynamic response and the like.

Description

ISOS system output voltage balance control method based on model prediction
Technical Field
The invention relates to the field of power electronics, in particular to an ISOS system output voltage balance control method based on model prediction.
Background
In recent years, with the rapid development of power electronics technology, modular dc converters have been widely researched and applied. The standardized module combination modes comprise a series connection mode, a parallel connection mode, a cascade connection mode and the like, according to different input and output modes and the like, the series-parallel direct current converter can be divided into an input-parallel output parallel connection (IPOP) system, an input-parallel output series connection (IPOS) system, an input-series output parallel connection (ISOP) system and an input-series output series connection (ISOS) system, wherein the direct current converter of the ISOS system is suitable for occasions of inputting low-voltage output middle-high voltage due to the characteristics of low production cost and equal sub-module total power division, such as a high-voltage direct current power supply, a high-speed electric railway, a ship and the like. In order to ensure the stable operation of the system, the most key problem is to solve the problem of voltage sharing of input and output of the system.
The existing schemes are all realized based on a PI controller, and comprise a three-loop control strategy: the output voltage ring ensures the output voltage of the system to be stable, the input voltage equalizing ring ensures the input voltage equalizing through the current inner ring, and the output voltage equalizing is realized at the same time; exchange duty cycle strategy: the output voltages of the two sub-modules are respectively used as feedback of input of the other sub-module to track the same given signal, so that the output voltages are ensured to be equal. These voltage-sharing control strategies are only suitable for two sub-modules, and the independence between the sub-modules is lacked, so that the modularization degree of the ISOS system is not high, and the expansibility and the reliability of the system are influenced.
Disclosure of Invention
Aiming at the problems and the technical requirements, the invention provides an ISOS system output voltage balance control method based on model prediction, and the voltage balance of output capacitors of sub-modules is realized by independently adjusting the bridge-to-bridge shift ratio of each sub-module, so that the complexity of the system is reduced, and the reliability and the overall dynamic performance of the system are improved.
The technical scheme of the invention is as follows:
an ISOS system output voltage balance control method based on model prediction comprises the following steps: firstly, regulating the total output voltage of a system through a PI regulator; secondly, establishing a discrete time model based on the input-output relation of the sub-modules; when the cost function is zero, selecting the optimal output capacitance voltage of the sub-module according to the total output voltage, and establishing a discrete prediction model of the sub-module; and finally, calculating the difference value of the output balance voltage and the output capacitance voltage of each sub-module at the current sampling moment, substituting the difference value into a discrete prediction model, and realizing sub-module capacitance voltage balance by adopting a strategy of optimizing the inter-bridge shift ratio of each sub-module.
The further technical scheme is that the control method specifically comprises the following steps:
the first step is as follows: and constructing a system output voltage closed loop. The system output voltage closed loop comprises an output voltage reference of the system, a total output voltage feedback value of the system and a PI regulator, wherein the output of the PI regulator is compared with the common bridge interval of the system.
The second step is that: and establishing a mathematical model of the input-output relation of the single sub-module, and establishing a discrete time model of the single sub-module by a forward Euler formula.
The third step: and establishing a cost function of the system, and selecting the optimal output capacitance voltage of each submodule when the value is zero.
The fourth step: and deducing a discrete prediction model of each sub-module according to the discrete time model and the optimal output capacitor voltage of each sub-module.
The fifth step: and at the current sampling moment, calculating the difference value of the output balance voltage and the output instantaneous voltage of each submodule, predicting the current gain of each submodule relative to the inter-bridge shift ratio at the next sampling moment according to a discrete prediction model, and enabling the output capacitance voltage of each submodule at the next sampling moment to tend to be balanced by independently adjusting the inter-bridge shift ratio of each submodule.
The beneficial technical effects of the invention are as follows:
1. and designing without weighting factors. The invention mainly researches the output voltage balance of the ISOS system, the total output voltage is regulated by the traditional PI regulator, and the output voltage balance of each sub-module is realized by a model prediction control strategy based on the bridge-to-bridge shift ratio, so that a weighting factor is not needed;
2. the proposed control method optimizes inter-bridge phase shift ratio under constant switching frequency, only involves phase shift between two full bridges, has no intra-bridge phase shift, and effectively avoids the problems of DC bias and power distribution unevenness of the traditional MPC switch tube;
3. the model is simple to construct, and only an output capacitor is involved;
4. the system has high expandability, and each submodule has higher independence;
5. the system has better dynamic response. The conventional MPC selects the switch state that minimizes the cost function, and the method calculates the optimal inter-bridge shift ratio with a zero cost function.
Drawings
Fig. 1 is a block diagram of an ISOS system provided in the present application.
Fig. 2 is a block diagram of a dc converter of a sub-module of the system provided in the present application.
Fig. 3 is a flowchart of an ISOS system output voltage balance control method provided in the present application.
FIG. 4 is a block diagram of the overall control based on model prediction as provided herein.
Detailed Description
The following further describes the embodiments of the present invention with reference to the drawings.
As shown in FIG. 1, the ISOS system includes N sub-modules, a DC voltage source V in The input ends of the N sub-modules are connected in series, and the output ends of the N sub-modules are respectively connected with an output capacitor C in parallel oN Output capacitance C oN Connected in series at an output load R L At two ends, the submodules are direct-current converters. Optionally, the sub-module dc converter adopted in this embodiment is a CLLLC (resonant) dc converter, and its structure is shown in fig. 2, and since the structure is not the key point of the present invention, the specific connection relationship thereof will not be described in detail here.
Based on the above structure, the present application provides a control method for output voltage equalization of an ISOS system based on model prediction, which is shown in fig. 3 and 4, and specifically includes the following steps:
the first step is as follows: and constructing an output voltage closed loop of the ISOS system, and acquiring a public bridge phase-shifting ratio of the ISOS system.
Output voltage closed loop comprises output voltage reference value V of system o_ref Total output voltage feedback value V of system o And a PI regulator. Wherein a voltage reference value V is output o_ref And the total output voltage feedback value V o And as the input of the PI regulator, the output of the PI regulator is the common bridge interval shift ratio d of the system and is input into the discrete prediction model of each submodule.
The second step: and establishing a discrete time model of each sub-module based on the input-output relation of the single sub-module.
1) Establishing a mathematical model of the input-output relation of a single submodule, wherein the expression is as follows:
C oN dv oN /dt＝f(d N )i in -i o (1)
wherein, C oN Is the output capacitance of the Nth sub-module, v oN The output capacitor voltage of the Nth sub-module; f (d) N ) The current gain of the Nth sub-module is positive correlation with the inter-bridge shift of the sub-module; i.e. i in For the system input current, i o And outputting current for the system.
2) Adopting a forward Euler formula discretization mathematical model (1) to obtain a discrete time model of a single sub-module, wherein the expression is as follows:
v oN (k+1)-v oN (k)＝T s {f(d N (k+1))i in (k)-i o (k)}/C oN (2)
where k is the current sampling time, k +1 the next sampling time, T s Is the sampling period.
The expression of establishing the input and output currents of the ISOS system based on the common inter-bridge shift ratio d is as follows:
Figure BDA0003662234500000041
wherein d is(k) The public bridge interval shift comparison of the system at the sampling moment k is obtained by a PI regulator; v o (k) For the total output voltage of the system at the moment of sampling k, R L Is the output load.
The third step: and establishing a cost function of the ISOS system, and selecting the optimal output capacitance voltage of each sub-module when the cost function is zero.
1) Establishing a cost function by using the sum of the absolute value of the voltage difference of the output capacitors between the adjacent sub-modules and the absolute value of the voltage difference of the output capacitors between the head sub-module and the tail sub-module, wherein the expression is as follows:
g＝|v o1 (k+1)-v o2 (k+1)|+…+|v oN (k+1)-v o1 (k+1)| (3)
wherein v is oN And (k +1) is the output capacitor voltage of the Nth sub-module at the sampling moment of k + 1.
2) When the output voltage of the ISOS system is balanced, g is equal to 0, and the optimal output capacitor voltage of a single sub-module is obtained as the total output voltage of the equal division system, the cost function of equation (3) is further expressed as:
Figure BDA0003662234500000042
wherein, V o And (k +1) is the total output voltage of the system at the sampling moment of k + 1.
3) Ignoring the deviation of adjacent sampling instants (i.e., k and k +1), i.e., the system output does not change significantly within one sampling interval, we derive:
Figure BDA0003662234500000043
the fourth step: and establishing a discrete prediction model of each sub-module by combining the discrete time model and the optimal output capacitance voltage.
Will equation (5), the input and output current relationship i of the system in (k) And i o (k) In the formula (2), the expression of the discrete prediction model of each sub-module is obtained as follows:
Figure BDA0003662234500000044
wherein,
Figure BDA0003662234500000045
for balancing the voltage output of each submodule, i.e. the optimum output capacitance voltage, v, of a single submodule oN (k) The output capacitor voltage (i.e. instantaneous voltage) of the nth submodule at the time of k sampling; f (d (k)) is the current gain of the system at the sampling moment k; f (d) N (k +1)) is the predicted current gain of the nth sub-module at the sampling moment of k +1, so as to obtain a predicted value of the bridge-to-bridge shift ratio of each sub-module at the next sampling moment.
The fifth step: at the current sampling moment k, acquiring the total output voltage V of the system o (k) Output capacitor voltage v of each submodule oN (k) And the inter-bridge shift ratio d (k) of the system is substituted into a corresponding discrete prediction model (6) to predict the inter-bridge shift ratio d (k) of each sub-module at the next sampling time N (k + 1). Under the condition of constant switching frequency, the controller is utilized to respectively regulate the inter-bridge phase shift ratio of each submodule to a predicted value, and therefore output voltage balance regulation of the submodules is achieved.
The specific implementation mode of the method is as follows: at the sampling moment of k-1, the output voltage of the ISOS system is balanced and is in a stable state, and v is at the moment o1 (k-1)＝…＝v oN (k-1) when the output capacitor is disturbed at the time of k samples, the output capacitance voltage of one or more sub-modules in the system changes. If N is not 2, the output capacitor voltage relationship of the two sub-modules is v o1 (k)<(v o1 (k)+v o2 (k))/2<v o2 (k) .1. the The set control strategy is adjusted from the sampling moment k, the total output voltage of the system is adjusted to be a preset value through a PI (proportional integral) adjuster, the difference between the output balance voltage and the output capacitor voltage of each sub-module is calculated, and the difference is substituted into a corresponding discrete prediction model (6). Since the difference calculated by the sub-module 1 is greater than zero, the predicted inter-bridge shift ratio d is compared 1 (k +1) relative to d on the basis of formula (6) 1 (k) Increase theIf the voltage is large, the controller sets the inter-bridge shift ratio of the sub-module 1 to reach the predicted value, so that the output capacitance voltage of the sub-module 1 is increased. Similarly, if the difference calculated by the sub-module 2 is smaller than zero, the predicted inter-bridge shift ratio d is larger than the predicted inter-bridge shift ratio d 2 (k +1) relative to d on the basis of formula (6) 2 (k) And the controller sets the inter-bridge shift ratio of the sub-module 2 to reach the predicted value, so that the output capacitance voltage of the sub-module 2 is reduced, and the system can enable the output voltage of each sub-module to track the voltage of a balance point when the output is disturbed, thereby realizing the balance control of the output voltages of the two modules. Optionally, if the difference between the output balance voltage of the sub-module and the output capacitor voltage is equal to zero, the predicted inter-bridge shift ratio d is calculated N (k +1) and d N (k) And are equal.
What has been described above is only a preferred embodiment of the present application, and the present invention is not limited to the above embodiment. It is to be understood that other modifications and variations directly derivable or suggested by those skilled in the art without departing from the spirit and concept of the present invention are to be considered as included within the scope of the present invention.

Claims (8)

1. The ISOS system output voltage balance control method based on model prediction is characterized in that the ISOS system comprises N sub-modules, output ends of the N sub-modules are respectively connected with output capacitors in parallel, the output capacitors are connected to two ends of an output load in series, and the sub-modules are direct current converters;
the control method comprises the following steps:
establishing a discrete time model of each sub-module based on the input-output relation of the single sub-module;
establishing a cost function of the ISOS system, and selecting the optimal output capacitance voltage of each sub-module when the cost function is zero;
establishing a discrete prediction model of each sub-module by combining the discrete time model and the optimal output capacitance voltage;
at the current sampling moment, acquiring the total output voltage of the system and the output capacitance voltage of each sub-module, substituting the total output voltage and the output capacitance voltage into a corresponding discrete prediction model, and predicting the inter-bridge shift ratio of each sub-module at the next sampling moment;
and respectively adjusting the inter-bridge phase shift ratio of each submodule to a predicted value to realize the output voltage balance adjustment of the submodules.
2. The ISOS system output voltage equalization control method based on model prediction according to claim 1, wherein the establishing of the discrete-time model of each sub-module based on the input-output relationship of the single sub-module comprises:
establishing a mathematical model of the input-output relation of a single submodule, wherein the expression is as follows:
C oN dv oN /dt＝f(d N )i in -i o (1)
wherein, C oN Is the output capacitance of the Nth sub-module, v oN The output capacitor voltage of the Nth sub-module; f (d) N ) For the current gain of the Nth sub-module, the current gain is in positive correlation with the inter-bridge shift of the sub-module; i.e. i in For the system input current, i o Outputting current for the system;
discretizing the mathematical model by adopting a forward Euler formula to obtain a discrete time model of a single sub-module, wherein the expression is as follows:
v oN (k+1)-v oN (k)＝T s {f(d N (k+1))i in (k)-i o (k)}/C oN (2)
wherein k is the current sampling time, T s Is the sampling period.
3. The ISOS system output voltage equalization control method based on model prediction according to claim 2, wherein the establishing the cost function of the ISOS system comprises:
establishing a cost function by using the absolute value of the voltage difference of the output capacitors between the adjacent sub-modules and the absolute value of the voltage difference of the output capacitors between the head sub-module and the tail sub-module, wherein the expression is as follows:
g＝|v o1 (k+1)-v o2 (k+1)|+…+|v oN (k+1)-v o1 (k+1)| (3)
wherein v is oN And (k +1) is the output capacitor voltage of the Nth sub-module at the sampling moment of k + 1.
4. The ISOS system output voltage balance control method based on model prediction according to claim 3, wherein the selecting the optimal output capacitance voltage of each sub-module when the cost function is zero comprises:
when the output voltage of the ISOS system is balanced, g is 0, and the optimal output capacitor voltage of a single sub-module is obtained as the total output voltage of the averaging system, the cost function of equation (3) is further expressed as:
Figure FDA0003662234490000021
wherein, V o (k +1) is the total output voltage of the system at the sampling moment of k + 1;
ignoring the deviation of adjacent sampling instants, we derive:
Figure FDA0003662234490000022
wherein, V o (k) The total output voltage of the system at time k is sampled.
5. The ISOS system output voltage equalization control method based on model prediction according to claim 4, wherein the building of the discrete prediction model for each sub-module by combining the discrete time model and the optimal output capacitor voltage includes:
substituting the equation (5) and the relation between the input current and the output current of the system into equation (2), and obtaining the expression of the discrete prediction model of each sub-module as follows:
Figure FDA0003662234490000023
wherein,
Figure FDA0003662234490000024
for balancing the voltage, v, output of each submodule oN (k) The output capacitor voltage of the Nth sub-module at the k sampling moment is obtained; f (d (k)) is the current gain of the system at the sampling moment k; f (d) N (k +1)) is the predicted current gain of the nth sub-module at the sampling moment of k +1, so as to obtain a predicted value of the bridge-to-bridge shift ratio of each sub-module at the next sampling moment.
6. The ISOS system output voltage equalization control method based on model prediction according to claim 2 or 5, further comprising:
obtaining a public bridge migration phase comparison of the ISOS system;
establishing an expression of input and output currents of the ISOS system based on the common bridge phase shift ratio as follows:
Figure FDA0003662234490000031
wherein d (k) is the common inter-bridge shift ratio of the system at k sampling instants, V o (k) For the total output voltage of the system at the moment of sampling k, R L Is the output load.
7. The ISOS system output voltage equalization control method based on model prediction according to claim 6, wherein obtaining a common bridge phase shift ratio of the ISOS system comprises:
and constructing an output voltage closed loop of the ISOS system, wherein the output voltage closed loop comprises an output voltage reference value of the system, a total output voltage feedback value of the system and a PI (proportional integral) regulator, the output voltage reference value and the total output voltage feedback value are used as the input of the PI regulator, and the output of the PI regulator is the common bridge interval comparison of the system and is input into the discrete prediction model of each sub-module.
8. The ISOS system output voltage equalization control method based on model prediction according to claim 1, wherein the adjusting the inter-bridge phase shift ratio of each sub-module to a predicted value respectively comprises:
and under the constant switching frequency, respectively adjusting the inter-bridge shift phase ratio of each sub-module to a predicted value.
CN202210576173.2A 2022-05-25 2022-05-25 ISOS system output voltage balance control method based on model prediction Pending CN115037157A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115864854A (en) * 2023-02-02 2023-03-28 山东大学 Model prediction control method and system for input-series output-series DAB converter

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115864854A (en) * 2023-02-02 2023-03-28 山东大学 Model prediction control method and system for input-series output-series DAB converter

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