CN115033840A - Modulation signal processing device and electronic equipment - Google Patents

Modulation signal processing device and electronic equipment Download PDF

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CN115033840A
CN115033840A CN202210589968.7A CN202210589968A CN115033840A CN 115033840 A CN115033840 A CN 115033840A CN 202210589968 A CN202210589968 A CN 202210589968A CN 115033840 A CN115033840 A CN 115033840A
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modulation signal
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侯延昭
罗金宝
李占彤
张宁
吕昕晨
陶小峰
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Beijing University of Posts and Telecommunications
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    • H04L27/00—Modulated-carrier systems
    • H04L27/26—Systems using multi-frequency codes
    • H04L27/2601—Multicarrier modulation systems
    • H04L27/2626—Arrangements specific to the transmitter only
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    • H04L27/2639—Modulators using other transforms, e.g. discrete cosine transforms, Orthogonal Time Frequency and Space [OTFS] or hermetic transforms
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    • H04—ELECTRIC COMMUNICATION TECHNIQUE
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    • H04L27/00—Modulated-carrier systems
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    • H04L27/2601—Multicarrier modulation systems
    • H04L27/2647—Arrangements specific to the receiver only
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Abstract

The invention provides a modulation signal processing device, a modulation signal processing apparatus and an electronic device. A modulated signal processing method, comprising: acquiring a modulation signal; splitting discrete Fourier transform points of the modulation signal according to a preset Fourier point rule; the preset Fourier point rule is that the integral power of 2 is multiplied by the odd number which is more than 2; performing fast Fourier transform on the integer power of 2 in the Fourier points of the modulation signal; performing discrete Fourier transform on odd numbers which are greater than 2 in Fourier points of the modulation signal; converting the calculation results after the fast Fourier transform and the discrete Fourier transform into a basis transform operation form; and carrying out parallel computation on the basis of the NEON instruction. The embodiment of the invention is used for solving the defect that the existing DFT and mixed base algorithms can not reduce the complexity of the algorithm and improve the operation speed when the modulated signal is processed.

Description

Modulation signal processing device and electronic equipment
Technical Field
The present invention relates to the field of communications technologies, and in particular, to a modulation signal processing apparatus, and an electronic device.
Background
The core techniques of OFDM (orthogonal Frequency Division multiplexing) in 4G and 5G, for example, are Discrete Fourier Transform (DFT) and Inverse Discrete Fourier Transform (IDFT) for modulated signals, and the algorithm complexity is o (n) for signal processing. As the number of transform points increases, the algorithm complexity increases in the square order, which may make hardware resources very challenging when processing signals, resulting in poor efficiency of signal processing.
For the existing fourier transform:
1) the operation formula of DFT is as follows:
Figure BDA0003664722090000011
in the formula, x (k) represents the frequency domain portion after FFT transformation, and x (n) represents the time domain portion before transformation.
Figure BDA0003664722090000012
Representing the twiddle factor. The multiplication complexity and the addition complexity are both o (n x n)
2) Mixed-base algorithms. All points are satisfied as with DFT, and the algorithm divides the points into irreducible prime numbers step by step; then, converting by utilizing a Kury-graph-based mixed base algorithm; for N ═ N 1 N 2 The point mixed base algorithm is implemented by rearranging the original signals and then calculating. The method comprises the following steps:
a. storing signals in columns as a matrix
b. Calculate N for each row 2 Point DFT
c. Multiplying each entry of the matrix by a twiddle factor
Figure BDA0003664722090000021
d. Calculate N for each column 1 Point DFT
e. Reading out the result array by row
Arranging the original data into N by columns 1 Line N 2 Array of columns, denoted x [ n ] 1 ][n 2 ]＝x[N 1 *n 1 +n 2 ]DFT transform is performed for each row, and the result is denoted as X 1 [n 1 ][n 2 ](ii) a Then to X 1 Multiplication by
Figure BDA0003664722090000022
Namely, it is
Figure BDA0003664722090000023
Finally to X 2 Each column of (A) is subjected to DFT conversion to obtain X 3 Then the final result is X [ N ] 1 *k 1 +k 2 ]＝X 3 [k 1 ][k 2 ]。
Points for multi-prime combinations can be computed with a step-by-step split. For N ═ N 1 N 2 …N n The multiplication complexity of (A) is o (N) 1 +N 2 +…+N n -n))。
The existing DFT and mixed base algorithms can not reduce the complexity of the algorithm and improve the operation speed when processing the modulation signals.
Disclosure of Invention
The invention provides a modulation signal processing device, a modulation signal processing device and electronic equipment, which are used for solving the defect that the existing DFT and mixed base algorithm can not reduce the complexity of the algorithm and improve the operation speed when the modulation signal is processed.
The invention provides a modulation signal processing method, which comprises the following steps:
acquiring a modulation signal;
splitting discrete Fourier transform points of the modulation signal according to a preset Fourier point rule; the preset Fourier point rule is that the integral power of 2 is multiplied by the odd number which is more than 2;
performing fast Fourier transform on the integer power of 2 in the Fourier points of the modulation signal; carrying out discrete Fourier transform on odd numbers which are more than 2 in the Fourier points of the modulation signal;
converting the calculation results after the fast Fourier transform and the discrete Fourier transform into a basis transform operation form;
and carrying out parallel computation on the basis of the NEON instruction.
According to the modulation signal processing method provided by the invention, the discrete Fourier transform point number is split for the modulation signal according to the preset Fourier point number rule, and the method is realized by the following formula:
Figure BDA0003664722090000031
wherein N represents the number of Fourier points of the modulation signal; n is a radical of hydrogen 1 ……N n Represents a prime number greater than 2; r is a radical of hydrogen 0 、r 1 ……r n Represents 2, N 1 ……N n The corresponding power.
According to a modulation signal processing method provided by the present invention, the discrete fourier transform of an odd number greater than 2 of fourier points of the modulation signal includes:
and splitting odd numbers larger than 2 in the Fourier point numbers of the modulation signals into prime number multiplication forms larger than 2 to perform mixed-basis discrete Fourier transform.
According to the modulation signal processing method provided by the invention, the method for converting the calculation result after the fast fourier transform and the discrete fourier transform into the basis transform operation form comprises the following steps:
and converting the calculation results after the fast Fourier transform and the discrete Fourier transform into a basis transform operation form of matrix multiplication of a transform matrix and input data.
According to a modulation signal processing method provided by the present invention, the parallel computation of the basis transform operation form based on the NEON instruction includes:
performing parallel calculation on the transformation matrix with the number of basis transformation points being 2 in the form of integral power based on a NEON instruction;
and performing 0 complementing operation on the transformation matrix which does not meet the NEON instruction condition, and performing parallel calculation on the basis of the NEON instruction on the basis of the transformation matrix subjected to the 0 complementing operation.
According to a modulation signal processing method provided by the present invention, the performing a 0-complementing operation on the transformation matrix that does not satisfy a nen instruction condition, and performing parallel computation based on the nen instruction based on the transformation matrix subjected to the 0-complementing operation, includes:
for a transformation matrix corresponding to a prime number with the number of basis transformation points being more than 2, supplementing 0 to the transformation matrix corresponding to the prime number with the number being more than 2 and the input data until a multiple form of 4 is met;
and performing parallel calculation on the transformation matrix corresponding to the prime number which is greater than 2 and subjected to the 0 complementing operation and the input data based on the NEON instruction.
The present invention also provides a modulation signal processing apparatus, comprising:
the acquisition module is used for acquiring a modulation signal;
the Fourier point splitting module is used for splitting discrete Fourier transform points for the modulation signal according to a preset Fourier point rule; the preset Fourier point rule is that the integer power of 2 is multiplied by the odd number larger than 2;
the mixed base transformation module is used for carrying out fast Fourier transformation on the integer power of 2 in the Fourier points of the modulation signal; carrying out discrete Fourier transform on odd numbers which are more than 2 in the Fourier points of the modulation signal;
the base transform operation module is used for converting the calculation results after the fast Fourier transform and the discrete Fourier transform into a base transform operation form;
and the NEON instruction parallel computing module is used for carrying out parallel computing on the basis of the NEON instruction on the basis of the base transformation operation form.
The present invention also provides an electronic device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, wherein the processor implements the modulation signal processing method according to any one of the above methods when executing the program.
The present invention also provides a non-transitory computer-readable storage medium having stored thereon a computer program which, when executed by a processor, implements a modulation signal processing method as described in any one of the above.
The invention also provides a computer program product comprising a computer program which, when executed by a processor, implements a method of processing a modulated signal as described in any one of the above.
According to the modulation signal processing device and the electronic equipment, the Fourier point number of the modulation signal is split according to a preset Fourier point number rule; the preset Fourier point number rule is that the integer power of 2 is multiplied by the odd number larger than 2. In the embodiment of the invention, the integer power of 2 in the Fourier points of the modulation signal is subjected to fast Fourier transform; carrying out discrete Fourier transform on odd numbers which are more than 2 in the Fourier points of the modulation signal; the mixed-base discrete Fourier transform and the fast Fourier transform are carried out on the modulation signal combination, and the operation speed of carrying out the Fourier transform on the modulation signal is improved; the embodiment of the invention converts the calculation results after fast Fourier transform and discrete Fourier transform into a basis transform operation form; and carrying out parallel computation on the basis of the NEON instruction. Because the 16 128-bit NEON registers corresponding to the NEON instruction can realize parallel processing of the basis transformation operation form, and the algorithm complexity is reduced when the modulation signal is processed, the embodiment of the invention can reduce the algorithm complexity and improve the operation speed when the modulation signal is processed.
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In order to more clearly illustrate the technical solutions of the present invention or the prior art, the drawings needed for the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and those skilled in the art can also obtain other drawings according to the drawings without creative efforts.
FIG. 1 is a schematic flow chart of a modulated signal processing method according to the present invention;
FIG. 2 is a second schematic flow chart of a modulation signal processing method according to the present invention;
FIG. 3 is a schematic diagram of the present invention storing 2x2 values of the transformation matrix in the array M and storing the input values in the array N;
FIG. 4 is a schematic structural diagram of a modulated signal processing method apparatus provided by the present invention;
fig. 5 is a schematic structural diagram of an electronic device provided in the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention clearer, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings, and it is obvious that the described embodiments are some, but not all embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Referring to fig. 1, a modulated signal processing method according to an embodiment of the present invention is described below with reference to fig. 1 to fig. 2, where the modulated signal processing method includes:
step 100, acquiring a modulation signal;
the electronic device acquires the modulated signal. The modulation signal according to the embodiment of the present invention may be a modulation signal applied to OFDM (orthogonal Frequency Division multiplexing) in 4G and 5G. The modulated signal includes a plurality of subcarriers. In the present embodiment, the modulated signal is a series of data in the form of a complex number.
Step 200, splitting discrete Fourier transform points of the modulation signal according to a preset Fourier point rule; the preset Fourier point rule is that the integer power of 2 is multiplied by the odd number larger than 2;
and the electronic equipment splits discrete Fourier transform points of the modulation signal according to a preset Fourier point rule. Wherein the preset Fourier point rule is the multiplication of an integer power of 2 and an odd number larger than 2. I.e. the process is repeated. The electronic device performs a mixed-basis operation by multiplying the difference in the Fourier transform point numbers of the modulated signal by an integer power of 2 and an odd number.
For example, the modulation signal includes 1200 subcarriers, i.e., the number of points of the modulation signal is 1200. After the discrete Fourier transform points of the modulation signal are split according to a preset Fourier point rule, 1200 is equal to 2 4 *75. The electronic device splits the number of points of the modulated signal into an integer power of 2, 2 4 And an odd number 75 greater than 2.
Further, odd numbers greater than 2 may be further split into prime multiplication greater than 2.
In one embodiment, the splitting of the discrete fourier transform point number for the modulation signal according to the preset fourier point number rule is implemented by the following formula:
Figure BDA0003664722090000071
wherein N represents the number of Fourier points of the modulation signal; n is a radical of 1 ……N n Represents a prime number greater than 2; r is a radical of hydrogen 0 、r 1 ……r n Represents 2, N 1 ……N n The corresponding power.
For example, 1200 ═ 2 4 *75＝2 4 *3*25. The discrete Fourier transform of 1200 points is converted into the mixed operation of 16-point discrete Fourier transform and 3-point discrete Fourier transform and 25-point discrete Fourier transform.
Step 300, performing fast Fourier transform on the integer power of 2 in the Fourier points of the modulation signal; carrying out discrete Fourier transform on odd numbers which are more than 2 in the Fourier points of the modulation signal;
the electronic device performs mixed-basis discrete fourier transform based on the split modulation signal. Specifically, the electronic device performs fast fourier transform on an integer power of 2 of the fourier points of the modulation signal; and performing discrete Fourier transform on odd numbers which are more than 2 in the Fourier points of the modulation signal.
The integer power of 2 in the Fourier points of the modulation signal meets the point condition of fast Fourier transform, the fast Fourier transform has the characteristic of high operation speed, and the integer power of 2 in the Fourier points of the modulation signal is subjected to fast Fourier transform; and performing discrete Fourier transform on odd numbers which are more than 2 in the Fourier points of the modulation signals, so that mixed-basis discrete Fourier transform and fast Fourier transform are performed on the modulation signals in combination, and the operation speed of performing Fourier transform on the modulation signals is increased.
In one embodiment, discrete fourier transforming odd numbers greater than 2 of the number of fourier points of the modulated signal comprises:
and splitting odd numbers which are more than 2 in the Fourier point number of the modulation signal into a prime number multiplication form which is more than 2 to perform mixed-base discrete Fourier transform.
For example, take the example that the modulated signal includes 1200 fourier points.
Step 31, storing the modulation signal in a matrix, wherein the matrix size is 75X16 and is marked as X [ n ] 1 ][n 2 ]＝x[16*n 1 +n 2 ]。
Step 32, performing 16-point DFT on each row of the matrix to obtain X 1 [n 1 ][n 2 ]. For a 16-point DFT transform, a radix-2 fast fourier transform may be used.
Step 33, for X 1 [n 1 ][n 2 ]Each term and twiddle factor
Figure BDA0003664722090000081
Multiplication to obtain X 2 [n 1 ][n 2 ]I.e. by
Figure BDA0003664722090000082
Step 34, for X 2 [n 1 ][n 2 ]Is performed with a DFT count of 75 points. Finally, a 1200-point DFT output result is obtained.
For a 75-point discrete fourier transform, further splitting into 3x25 is performed. The operations of step 31 to step 34 are performed again.
Step 400, converting the calculation results after the fast Fourier transform and the discrete Fourier transform into a basis transform operation form;
and the electronic equipment converts the calculation results after the fast Fourier transform and the discrete Fourier transform into a basis transform operation form.
Specifically, the converting the calculation results after the fast fourier transform and the discrete fourier transform into the form of a basis transform operation includes:
and converting the calculation results after the fast Fourier transform and the discrete Fourier transform into a basis transform operation form of matrix multiplication of a transform matrix and input data.
For discrete fourier transforms of power points, the resulting transformation is the basis transform, i.e., the basis transforms of base 2, base 3, and base 5. By the nature of discrete fourier transform, please refer to equation (1), the calculation results after fast fourier transform and discrete fourier transform can be calculated by the basis transform operation form of matrix multiplication of the transform matrix and the input data. The right side of equation (1) is the result of the computation of the mixed-basis fourier transform of the fast fourier transform and the discrete fourier transform of the modulated signal. The left side of equation (1) is the matrix multiplication of the transformation matrix with the input data. The transformation matrix is determinable for each stage of the iterative operation.
Figure BDA0003664722090000083
Figure BDA0003664722090000091
In an embodiment of the invention, the 1200-point discrete fourier transform of the modulated signal is decomposed into 75 16-point discrete fourier transforms, 48 25-point discrete fourier transforms and 400 3-point discrete fourier transforms. For the power point DFT transform, it eventually transforms into radix transforms, i.e., radix 2, radix 3, and radix 5. For example, for a radix-2 transformation, the result of its computation is the multiplication of the 2x2 transformation matrix with the 2x1 input data to yield a 2x1 transformation result.
And 500, performing parallel computation on the basis of the NEON instruction on the basis of the basis transformation operation form.
And the electronic equipment performs parallel computation on the basis of the NEON instruction on the basis of the base transformation operation form. Because the traditional algorithm mainly utilizes a CPU general register for serial calculation, the invention utilizes 16 128-bit NEON registers provided by an ARM architecture to realize parallel processing of a basis transformation operation form. The NEON instruction also reduces the multiplication complexity of the algorithm.
Splitting Fourier points of the modulation signal according to a preset Fourier point rule; the preset Fourier point number rule is that the integer power of 2 is multiplied by the odd number larger than 2. In the embodiment of the invention, the integer power of 2 in the Fourier points of the modulation signal is subjected to fast Fourier transform; performing discrete Fourier transform on odd numbers which are greater than 2 in Fourier points of the modulation signal; the mixed-base discrete Fourier transform and the fast Fourier transform are carried out on the modulation signal combination, and the operation speed of carrying out the Fourier transform on the modulation signal is improved; the embodiment of the invention converts the calculation results after fast Fourier transform and discrete Fourier transform into a basis transform operation form; and carrying out parallel computation on the basis of the NEON instruction. Because the 16 128-bit NEON registers corresponding to the NEON instruction can realize parallel processing of the basis transformation operation form, and the algorithm complexity is reduced when the modulation signal is processed, the embodiment of the invention can reduce the algorithm complexity and improve the operation speed when the modulation signal is processed.
In other aspects of the embodiments of the present invention, referring to fig. 2, step 500, performing parallel computation on the basis of the NEON instruction on the basis of the radix transform operation form includes:
step 510, performing parallel calculation on the transformation matrix with the number of basis transformation points being 2 in the form of integral power based on an NEON instruction;
and 520, performing 0 complementing operation on the transformation matrix which does not meet the NEON instruction condition, and performing parallel calculation on the basis of the NEON instruction on the basis of the transformation matrix subjected to the 0 complementing operation.
In most cases, the number of fourier points of the modulated signal does not satisfy an integer power. That is, the fast fourier transform cannot satisfy all the point conditions, but the fast fourier transform operation can be performed by a method of complementing the point to a power of an integer, thereby increasing the calculation speed. The disadvantages with this approach are: when the number of fourier points of the modulation signal is a non-integral multiple of the period, spectrum leakage occurs due to non-integer period truncation.
The electronic equipment of the embodiment of the invention carries out parallel calculation on the transformation matrix with the number of basis transformation points being 2 in the form of integral power based on the NEON instruction; and performing 0 complementing operation on the transformation matrix which does not meet the NEON instruction condition, and performing parallel calculation on the basis of the NEON instruction on the basis of the transformation matrix subjected to the 0 complementing operation.
In one embodiment, the step 520 of performing a 0-complementing operation on the transformation matrix that does not satisfy the condition of the nen instruction, and performing parallel computation based on the nen instruction based on the transformation matrix subjected to the 0-complementing operation includes:
for a transformation matrix corresponding to a prime number with the number of the prime number larger than 2, complementing 0 for the transformation matrix corresponding to the prime number larger than 2 and the input data until a multiple form of 4 is met; and performing parallel calculation on the transformation matrix corresponding to the prime number which is greater than 2 and subjected to the 0 complementing operation and the input data based on the NEON instruction.
It should be noted that, for the fft to complement 0, the transform result is different from the result of directly performing the discrete fourier transform because the number of transform points changes; for the transform matrix complement 0, the number of transform points is essentially unchanged, just to satisfy the conditions of the NEON instruction for matrix multiplication.
The following is illustrated by way of an example:
step 501, when the basis is transformed into 2-point discrete Fourier transform: the values of the 2x2 transform matrix are stored in an array M, the even part stores the real part of the transform matrix values, and the odd part stores the imaginary part of the transform matrix values. The input values are stored in array N. As shown in fig. 3, fig. 3 is a schematic diagram illustrating that the values of the 2 × 2 transformation matrix are stored in the array M and the values of the input data are stored in the array N according to the embodiment of the present invention.
Step 502, the arrays M, N are loaded into registers A and B respectively according to every 8 bits. This operation is accomplished by the NEON instruction vst1q _ f 16. And performing complex multiplication operation on the registers A and B, and returning the result to the register C. This operation is completed by the NEON instruction vcmlaq _ f 16.
And step 503, adding the even parts and the odd parts of the first half part and the second half part in the register C respectively to obtain a result of the basis transformation. This operation is done by the NEON instruction vgetq _ lane _ f 16.
In step 504, when the number of radix transform points is a prime number n greater than 2, since the NEON instruction can simultaneously satisfy multiplication of 4 complex numbers, the transform matrix and the input array are complemented by a multiple form of 0 to 4. For example, in the case of the basis transform to 5, the transform matrix size is changed to 8 × 8. For example, when the base transform is 7, the original concept transform matrix and input data are 7x7 and 7x1, but in order to realize the NEON instruction operation, the transform matrix and input data are complemented by 0 to 8x8 and 8x 1. Then the NEON instruction parallel computation is performed.
Step 505, store the first row of the n x n transformation matrix into the register according to 8 bits
Figure BDA0003664722090000111
The even part stores the real part of the value and the odd part stores the imaginary part of the value. Storing values of input data in registers
Figure BDA0003664722090000112
In (1). This operation is accomplished via the NEON instruction vst1q _ f 16. And performing complex multiplication operation on the registers A and B, and returning the result to the register C. This operation is completed by the NEON instruction vcmlaq _ f 16. And adding all the odd parts and the even parts in the register C to obtain a transformation result.
Step 506, the operation of step 505 is performed for each row of the n x n transformation matrix. And finally, obtaining an output result of the basis transformation.
For the transformation matrix which does not meet the NEON instruction condition, the embodiment of the invention supplements 0 to the transformation matrix corresponding to the prime number with the base transformation point number being more than 2 and the input data until the transformation matrix corresponding to the prime number with the base transformation point number being more than 2 meets the multiple form of 4; and performing parallel calculation on the transformation matrix corresponding to the prime number which is greater than 2 and subjected to the 0 complementing operation and the input data based on the NEON instruction. Compared with the traditional 0-complementing fast Fourier algorithm, the method avoids the frequency spectrum leakage possibly caused by long-complementing 0.
According to the embodiment of the invention, the hybrid base discrete Fourier transform and the fast Fourier transform are combined, and the base transform is realized in parallel at a high speed by utilizing 16 128-bit NEON registers provided by ARM corresponding to the NEON instruction, so that the algorithm complexity is reduced. For the condition that the NEON instruction is not met, a transformation matrix 0 complementing method is provided, the register efficiency is fully improved, hardware resources are saved, and the operation speed of modulation signal processing is improved. Compared with the traditional 0-complementing fast Fourier transform, the frequency spectrum leakage possibly caused by long-complementing 0 is avoided.
The following describes the modulation signal processing apparatus provided by the present invention, and the modulation signal processing apparatus described below and the modulation signal processing method described above may be referred to in correspondence with each other.
Referring to fig. 4, the present invention further provides a modulation signal processing apparatus, including:
an obtaining module 201, configured to obtain a modulation signal;
a fourier point splitting module 202, configured to split discrete fourier transform points of the modulation signal according to a preset fourier point rule; the preset Fourier point rule is that the integral power of 2 is multiplied by the odd number which is more than 2;
a mixed-radix transform module 203, configured to perform fast fourier transform on an integer power of 2 in the fourier points of the modulation signal; performing discrete Fourier transform on odd numbers which are greater than 2 in Fourier points of the modulation signal;
a basis transform operation module 204, configured to convert the calculation results after the fast fourier transform and the discrete fourier transform into a basis transform operation form;
the NEON instruction parallel computing module 205 is used for performing parallel computing on the basis of the NEON instruction.
According to the modulation signal processing device provided by the embodiment of the invention, the Fourier point number of the modulation signal is split according to a preset Fourier point number rule; the preset Fourier point number rule is that the integer power of 2 is multiplied by the odd number larger than 2. In the embodiment of the invention, the integral power of 2 in the Fourier points of the modulation signal is subjected to fast Fourier transform; carrying out discrete Fourier transform on odd numbers which are more than 2 in the Fourier points of the modulation signal; the mixed-base discrete Fourier transform and the fast Fourier transform are carried out on the modulation signal combination, and the operation speed of carrying out the Fourier transform on the modulation signal is improved; the embodiment of the invention converts the calculation results after fast Fourier transform and discrete Fourier transform into a basis transform operation form; and performing parallel computation on the basis of the NEON instruction. Because the 16 128-bit NEON registers corresponding to the NEON instruction can realize parallel processing of the basis transformation operation form, and the algorithm complexity is reduced when the modulation signal is processed, the embodiment of the invention can reduce the algorithm complexity and improve the operation speed when the modulation signal is processed.
According to the modulation signal processing method provided by the invention, the Fourier point splitting module is realized by the following formula:
Figure BDA0003664722090000131
wherein N represents the number of Fourier points of the modulation signal; n is a radical of 1 ……N n Represents a prime number greater than 2; r is 0 、r 1 ……r n Represents 2, N 1 ……N n The corresponding power.
According to the modulation signal processing method provided by the invention, the mixed-base transform module is further used for splitting odd numbers larger than 2 in the Fourier points of the modulation signal into prime number multiplication forms larger than 2 to perform mixed-base discrete Fourier transform.
According to the modulation signal processing method provided by the invention, the basis transform operation module is specifically used for converting the calculation results after the fast fourier transform and the discrete fourier transform into a basis transform operation form in which a transform matrix and input data are subjected to matrix multiplication.
According to a modulation signal processing method provided by the invention, the NEON instruction parallel computing module comprises:
the first calculation module is used for performing parallel calculation on the transformation matrix with the number of basis transformation points being 2 in the form of integral power based on an NEON instruction;
and the second calculation module is used for performing 0 complementing operation on the transformation matrix which does not meet the NEON instruction condition and performing parallel calculation based on the NEON instruction on the basis of the transformation matrix subjected to the 0 complementing operation.
According to a modulation signal processing method provided by the invention, the second calculation module comprises:
the zero padding module is used for padding 0 in the transformation matrix corresponding to the prime number with the prime number larger than 2 and the input data until the multiple form of 4 is met;
and the actual calculation module is used for performing parallel calculation on the transformation matrix corresponding to the prime number which is greater than 2 and subjected to the 0 complementing operation and the input data based on the NEON instruction.
Fig. 5 illustrates a physical structure diagram of an electronic device, which may include, as shown in fig. 5: a processor (processor)510, a communication Interface (Communications Interface)520, a memory (memory)530 and a communication bus 540, wherein the processor 510, the communication Interface 520 and the memory 530 communicate with each other via the communication bus 540. Processor 510 may invoke logic instructions in memory 530 to perform a modulated signal processing method comprising: acquiring a modulation signal; splitting discrete Fourier transform points of the modulation signal according to a preset Fourier point rule; the preset Fourier point rule is that the integral power of 2 is multiplied by the odd number which is more than 2; performing fast Fourier transform on the integer power of 2 in the Fourier points of the modulation signal; carrying out discrete Fourier transform on odd numbers which are more than 2 in the Fourier points of the modulation signal; converting the calculation results after the fast Fourier transform and the discrete Fourier transform into a basis transform operation form; and performing parallel computation on the basis of the NEON instruction.
Further, processor 510 is a processor capable of executing a NEON instruction. The logic instructions in the memory 530 may be implemented in the form of software functional units and stored in a computer readable storage medium when the logic instructions are sold or used as independent products. Based on such understanding, the technical solution of the present invention may be embodied in the form of a software product, which is stored in a storage medium and includes instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method according to the embodiments of the present invention. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and other various media capable of storing program codes.
In another aspect, the present invention also provides a computer program product, the computer program product comprising a computer program, the computer program being storable on a non-transitory computer-readable storage medium, the computer program, when executed by a processor, being capable of executing the modulated signal processing method provided by the above methods, the method comprising: acquiring a modulation signal; splitting discrete Fourier transform points of the modulation signal according to a preset Fourier point rule; the preset Fourier point rule is that the integral power of 2 is multiplied by the odd number which is more than 2; performing fast Fourier transform on the integer power of 2 in the Fourier points of the modulation signal; carrying out discrete Fourier transform on odd numbers which are more than 2 in the Fourier points of the modulation signal; converting the calculation results after the fast Fourier transform and the discrete Fourier transform into a basis transform operation form; and carrying out parallel computation on the basis of the NEON instruction.
In yet another aspect, the present invention also provides a non-transitory computer-readable storage medium having stored thereon a computer program, which when executed by a processor, implements a modulated signal processing method provided by performing the above methods, the method including: acquiring a modulation signal; splitting discrete Fourier transform points of the modulation signal according to a preset Fourier point rule; the preset Fourier point rule is that the integral power of 2 is multiplied by the odd number which is more than 2; performing fast Fourier transform on the integer power of 2 in the Fourier points of the modulation signal; carrying out discrete Fourier transform on odd numbers which are more than 2 in the Fourier points of the modulation signal; converting the calculation results after the fast Fourier transform and the discrete Fourier transform into a basis transform operation form; and carrying out parallel computation on the basis of the NEON instruction.
The above-described embodiments of the apparatus are merely illustrative, and the units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of this embodiment. One of ordinary skill in the art can understand and implement it without inventive effort.
Through the above description of the embodiments, those skilled in the art will clearly understand that each embodiment may be implemented by software plus a necessary general hardware platform, and may also be implemented by hardware. With this understanding in mind, the above-described technical solutions may be embodied in the form of a software product, which can be stored in a computer-readable storage medium such as ROM/RAM, magnetic disk, optical disk, etc., and includes instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute the methods described in the embodiments or some parts of the embodiments.
Finally, it should be noted that: the above examples are only intended to illustrate the technical solution of the present invention, but not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.

Claims (10)

1. A method for processing a modulated signal, comprising:
acquiring a modulation signal;
splitting discrete Fourier transform points of the modulation signal according to a preset Fourier point rule; the preset Fourier point rule is that the integral power of 2 is multiplied by the odd number which is more than 2;
performing fast Fourier transform on the integer power of 2 in the Fourier points of the modulation signal; performing discrete Fourier transform on odd numbers which are greater than 2 in Fourier points of the modulation signal;
converting the calculation results after the fast Fourier transform and the discrete Fourier transform into a basis transform operation form;
and carrying out parallel computation on the basis of the NEON instruction.
2. The modulated signal processing method of claim 1,
the discrete Fourier transform point number is split on the modulation signal according to a preset Fourier point number rule, and the method is realized by the following formula:
Figure FDA0003664722080000011
wherein N represents the number of Fourier points of the modulation signal; n is a radical of 1 ……N n Represents a prime number greater than 2; r is 0 、r 1 ……r n Represents 2, N 1 ……N n The corresponding power.
3. The method according to claim 1, wherein the discrete fourier transform of an odd number greater than 2 among the fourier points of the modulation signal comprises:
and splitting odd numbers which are more than 2 in the Fourier point number of the modulation signal into a prime number multiplication form which is more than 2 to perform mixed-base discrete Fourier transform.
4. The method according to claim 1, wherein the converting the calculation results after the fast fourier transform and the discrete fourier transform into a basis transform operation form includes:
and converting the calculation results after the fast Fourier transform and the discrete Fourier transform into a basis transform operation form of matrix multiplication of a transform matrix and input data.
5. The method according to claim 4, wherein said parallel computation of said form of basis transform operations based on a NEON instruction comprises:
performing parallel calculation on the transformation matrix with the number of basis transformation points being 2 in the form of integral power based on a NEON instruction;
and performing 0 complementing operation on the transformation matrix which does not meet the NEON instruction condition, and performing parallel calculation on the basis of the NEON instruction on the basis of the transformation matrix subjected to the 0 complementing operation.
6. The method according to claim 5, wherein the performing a 0-complement operation on the transformation matrix that does not satisfy the NEON command condition, and performing parallel computation based on the NEON command based on the transformation matrix subjected to the 0-complement operation, includes:
for a transformation matrix corresponding to a prime number with the number of basis transformation points being more than 2, supplementing 0 to the transformation matrix corresponding to the prime number with the number being more than 2 and the input data until a multiple form of 4 is met;
and performing parallel calculation on the transformation matrix corresponding to the prime number which is greater than 2 and subjected to the 0 complementing operation and the input data based on the NEON instruction.
7. A modulation signal processing apparatus, comprising:
the acquisition module is used for acquiring a modulation signal;
the Fourier point splitting module is used for splitting discrete Fourier transform points for the modulation signal according to a preset Fourier point rule; the preset Fourier point rule is that the integral power of 2 is multiplied by the odd number which is more than 2;
the mixed base transformation module is used for carrying out fast Fourier transformation on the integer power of 2 in the Fourier points of the modulation signal; performing discrete Fourier transform on odd numbers which are greater than 2 in Fourier points of the modulation signal;
the base transform operation module is used for converting the calculation results after the fast Fourier transform and the discrete Fourier transform into a base transform operation form;
and the NEON instruction parallel computing module is used for carrying out parallel computing on the basis of the NEON instruction on the basis of the base transformation operation form.
8. An electronic device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, characterized in that the processor implements the modulated signal processing method according to any one of claims 1 to 6 when executing the program.
9. A non-transitory computer-readable storage medium on which a computer program is stored, the computer program, when being executed by a processor, implementing the modulation signal processing method according to any one of claims 1 to 6.
10. A computer program product comprising a computer program, characterized in that the computer program, when being executed by a processor, implements the modulation signal processing method according to any one of claims 1 to 6.
CN202210589968.7A 2022-05-26 2022-05-26 Modulation signal processing device and electronic equipment Pending CN115033840A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115982527A (en) * 2023-03-21 2023-04-18 西安电子科技大学 FPGA-based time-frequency domain transformation algorithm implementation method

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115982527A (en) * 2023-03-21 2023-04-18 西安电子科技大学 FPGA-based time-frequency domain transformation algorithm implementation method
CN115982527B (en) * 2023-03-21 2023-07-07 西安电子科技大学 FPGA-based time-frequency domain transformation algorithm implementation method

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