CN115033175A - Data reading method and device, storage medium and processor - Google Patents
Data reading method and device, storage medium and processor Download PDFInfo
- Publication number
- CN115033175A CN115033175A CN202210590815.4A CN202210590815A CN115033175A CN 115033175 A CN115033175 A CN 115033175A CN 202210590815 A CN202210590815 A CN 202210590815A CN 115033175 A CN115033175 A CN 115033175A
- Authority
- CN
- China
- Prior art keywords
- target
- block address
- physical block
- data
- target data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title claims abstract description 77
- 230000015654 memory Effects 0.000 claims abstract description 192
- 238000013507 mapping Methods 0.000 claims abstract description 60
- 239000007787 solid Substances 0.000 claims abstract description 30
- 230000001960 triggered effect Effects 0.000 claims abstract description 14
- 238000012545 processing Methods 0.000 claims description 25
- 238000005516 engineering process Methods 0.000 abstract description 8
- 238000012005 ligant binding assay Methods 0.000 description 24
- 229920001485 poly(butyl acrylate) polymer Polymers 0.000 description 21
- 238000010586 diagram Methods 0.000 description 10
- 230000005540 biological transmission Effects 0.000 description 5
- 239000000872 buffer Substances 0.000 description 4
- 238000004891 communication Methods 0.000 description 4
- 230000000694 effects Effects 0.000 description 4
- 230000006870 function Effects 0.000 description 4
- 230000008878 coupling Effects 0.000 description 3
- 238000010168 coupling process Methods 0.000 description 3
- 238000005859 coupling reaction Methods 0.000 description 3
- 230000003287 optical effect Effects 0.000 description 3
- 238000005034 decoration Methods 0.000 description 2
- 238000010295 mobile communication Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000013459 approach Methods 0.000 description 1
- 238000013500 data storage Methods 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/0604—Improving or facilitating administration, e.g. storage management
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/0614—Improving the reliability of storage systems
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/062—Securing storage systems
- G06F3/0622—Securing storage systems in relation to access
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
- G06F3/0673—Single storage device
- G06F3/0679—Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Human Computer Interaction (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Memory System Of A Hierarchy Structure (AREA)
Abstract
The invention discloses a data reading method and device, a storage medium and a processor. Wherein, the method comprises the following steps: receiving a request for reading target data triggered by a target object, wherein the request carries a target logical block address of the target data; obtaining a target physical block address corresponding to the target data according to the target logical block address; determining whether target data are stored in a cache memory according to the target physical block address and the effective physical block address range of the cache memory in the solid state disk; and if the target data are stored in the cache memory, reading the target data from the cache memory and returning the target data to the target object. The invention solves the technical problem that the time delay of reading data is increased because Hash collision cannot be avoided by designing the L2C mapping table as the mapping table of the Hash-list data structure suitable for searching when reading data in the related technology.
Description
Technical Field
The present invention relates to the field of data processing technologies, and in particular, to a data reading method and apparatus, a storage medium, and a processor.
Background
In an SSD (Solid State Drives, Solid State disk), due to the existence of a Cache memory (Cache), the latest data is stored in the Cache. So in the read command execution path, an additional check is needed to see if the cache is hit. The general approach is to look up the L2C (LBA to Cache) table first, and then look up the L2P (LBA to PBA) table, as shown in FIG. 1. The latency (latency) of the SSD read command depends mainly on the overhead (overhead) at the Firmware (Firmware) side, in addition to the read data time of the flash memory (nand flash) itself. In the overhead of the Firmware end, the time overhead of checking the Cache by the read command is an important factor influencing the reading latency.
In the prior art, a method for reducing SSD read command latency (latency) generally optimizes time overhead of a read command lookup Cache, and a common method is to reorganize a relationship between an LBA and a Cache buffer (Cache data) in L2C (LBA to Cache) and construct a data structure suitable for fast lookup, for example, when data is written into the Cache, corresponding data information is inserted into a single-chain table corresponding to a Hash value according to a Hash value of the LBA, as shown in fig. 2, an L2P table in a Hash-list form is constructed by using a Hash function (Hash (LBA) (% LBA). Valid LBAs exist in 5 buffers in the Cache, wherein the LBAs corresponding to the buf _ id _0, buf _ id _3, and buf _ id _4 are LBA3, LBA19, and LBA35, respectively. The Hash values corresponding to the LBA3, LBA19, and LBA35 are all 3, and a Hash collision occurs, so that buffers of the same Hash values of all collisions are combined into a linked list. When a read command searches for the valid LBA in the cache, the Hash value is calculated according to the Hash function, then the L2P table in the Hash-list form is removed according to the linked list corresponding to the Hash value, and when the valid LBA in the cache is all in Hash collision, the read command searches for the linked list with the cache size in a traversal mode. Therefore, the inevitable Hash collision in the prior art may result in an increased time for looking up the L2C table when reading data, thereby increasing the latency of the read command.
In view of the above problems, no effective solution has been proposed.
Disclosure of Invention
The embodiment of the invention provides a data reading method and device, a storage medium and a processor, which at least solve the technical problem that when data is read in the related technology, an L2C mapping table is designed into a mapping table of a Hash-list data structure suitable for lookup, and the time delay of reading the data becomes longer due to unavoidable Hash collision.
According to an aspect of an embodiment of the present invention, there is provided a data reading method including: receiving a request for reading target data triggered by a target object, wherein the request carries a target logical block address of the target data; obtaining a target physical block address corresponding to the target data according to the target logical block address; determining whether the target data is stored in a cache memory according to the target physical block address and an effective physical block address range of the cache memory in the solid state disk; and if the target data is stored in the cache memory, reading the target data from the cache memory and returning the target data to the target object.
Further, before obtaining a target physical block address corresponding to the target data according to the target logical block address, the method further includes: acquiring a physical block address corresponding to each flash memory in the solid state disk to obtain a plurality of physical block addresses; determining the target physical block address pre-allocated for the target data from the plurality of physical block addresses; and updating a target mapping table according to the target physical block address, wherein the target mapping table is used for storing a logical block address and a physical block address corresponding to the logical block address, and the logical block address and the target data are in one-to-one correspondence.
Further, after determining the target physical block address pre-allocated for the target data from the plurality of physical block addresses, the method further comprises: and determining the effective physical block address range of the cache memory according to the target physical block address.
Further, after determining the valid physical block address range of the cache memory according to the target physical block address, the method further includes: and if the signal for updating the effective physical block address range is detected, updating the effective physical block address range.
Further, obtaining a target physical block address corresponding to the target data according to the target logical block address includes: acquiring the target mapping table; and obtaining a target physical block address corresponding to the target data according to the target mapping table.
Further, determining whether to store the target data in the cache memory according to the target physical block address and an effective physical block address range of the cache memory comprises: obtaining the effective physical block address range of the cache memory; judging whether the target physical block address belongs to the effective physical block address range or not; and if the target physical block address belongs to the effective physical block address range, indicating that the target data is stored in the cache memory.
Further, the method further comprises: and if the target physical block address does not belong to the effective physical block address range, indicating that the target data is not stored in the cache memory.
Further, in a case that the target data is not stored in the cache memory, the method further includes: determining a target flash memory corresponding to a target physical block address according to the target physical block address corresponding to the target data; and reading the target data from the target flash memory and returning the target data to the target object.
According to another aspect of the embodiments of the present invention, there is also provided a data reading apparatus, including: the device comprises a receiving unit, a processing unit and a processing unit, wherein the receiving unit is used for receiving a request for reading target data triggered by a target object, and the request carries a target logical block address of the target data; the processing unit is used for obtaining a target physical block address corresponding to the target data according to the target logical block address; the first determining unit is used for determining whether the target data is stored in the cache memory according to the target physical block address and the effective physical block address range of the cache memory in the solid state disk; a first reading unit, configured to read the target data from the cache memory if the target data is stored in the cache memory, and return the target data to the target object.
Further, the apparatus further comprises: the acquisition unit is used for acquiring a physical block address corresponding to each flash memory in the solid state disk before acquiring a target physical block address corresponding to the target data according to the target logical block address to obtain a plurality of physical block addresses; a second determination unit configured to determine the target physical block address pre-allocated for the target data from the plurality of physical block addresses; the first updating unit is used for updating a target mapping table according to the target physical block address, wherein the target mapping table is used for storing a logical block address and a physical block address corresponding to the logical block address, and the logical block address and the target data are in one-to-one correspondence.
Further, the apparatus further comprises: a third determining unit, configured to determine, after determining the target physical block address pre-allocated for the target data from the plurality of physical block addresses, a valid physical block address range of the cache memory according to the target physical block address.
Further, after determining the valid physical block address range of the cache memory according to the target physical block address, the apparatus further includes: and the second updating unit is used for updating the effective physical block address range if a signal for updating the effective physical block address range is detected.
Further, the processing unit includes: the first acquisition module is used for acquiring the target mapping table; and the processing module is used for obtaining a target physical block address corresponding to the target data according to the target mapping table.
Further, the first determination unit includes: the second acquisition module is used for acquiring the effective physical block address range of the cache memory; the judging module is used for judging whether the target physical block address belongs to the effective physical block address range or not; and the determining module is used for indicating that the target data is stored in the cache memory if the target physical block address belongs to the effective physical block address range.
Further, the apparatus further comprises: a fourth determining unit, configured to indicate that the target data is not stored in the cache memory if the target physical block address does not belong to the valid physical block address range.
Further, the apparatus further comprises: a fifth determining unit, configured to determine, when the target data is not stored in the cache memory, a target flash memory corresponding to a target physical block address according to the target physical block address corresponding to the target data; and the second reading unit is used for reading the target data from the target flash memory and returning the target data to the target object.
According to another aspect of the embodiments of the present invention, there is also provided a computer-readable storage medium storing a program, wherein when the program runs, the apparatus on which the storage medium is located is controlled to execute any one of the above data reading methods.
According to another aspect of the embodiments of the present invention, there is also provided a processor, configured to execute a program, where the program executes to perform the data reading method described in any one of the above.
In the embodiment of the invention, a request for reading target data triggered by a receiving target object is adopted, wherein the request carries a target logical block address of the target data; obtaining a target physical block address corresponding to the target data according to the target logical block address; determining whether target data are stored in a cache memory according to the target physical block address and the effective physical block address range of the cache memory in the solid state disk; if the target data is stored in the cache memory, the target data is read from the cache memory and returned to the target object, so that the technical problem that the time delay of reading the data is increased due to unavoidable Hash collision because an L2C mapping table is designed into a mapping table suitable for a searched Hash-list data structure when the data is read in the related technology is solved, whether the target data is stored in the cache memory can be accurately judged through the target physical block address of the target data and the effective physical block address range of the cache memory in the solid state disk, namely whether the cache memory is hit or not can be judged, and compared with the prior art that whether the cache memory is hit or not is determined through searching an L2C mapping table, the time overhead of determining whether the cache memory is hit or not is greatly reduced, and the effect of improving the efficiency of reading the data is achieved.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the invention and together with the description serve to explain the invention without limiting the invention. In the drawings:
FIG. 1 is a schematic diagram of a data reading method according to the prior art;
FIG. 2 is a schematic diagram of an L2C mapping table according to the prior art;
FIG. 3 is a diagram illustrating a computer terminal according to an embodiment of the present invention;
FIG. 4 is a flowchart of a data reading method according to an embodiment of the present invention;
FIG. 5 is a flow chart of an alternative data reading method according to an embodiment of the present invention;
FIG. 6 is a schematic diagram of valid physical block address ranges provided according to an embodiment of the present invention;
FIG. 7 is a diagram of a data reading apparatus according to a second embodiment of the present invention;
fig. 8 is a schematic diagram of a computer terminal according to a third aspect of the present invention.
Detailed Description
In order to make the technical solutions of the present invention better understood, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
It should be noted that the terms "first," "second," and the like in the description and claims of the present invention and in the drawings described above are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used is interchangeable under appropriate circumstances such that the embodiments of the invention described herein are capable of operation in sequences other than those illustrated or described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
First, some terms or terms appearing in the description of the embodiments of the present application are applicable to the following explanations:
LBA: logical Block Address;
PBA: physical Block Address;
L2P table: the LBA to PBA, a table used for maintaining the mapping relation between the LBA and the PBA in the SSD;
and (4) Cache: the data of the Host write command in the SSD is stored in the Cache in the SSD, and the data of the Cache is stored in the Nand flash at a proper time;
L2C: LBA to Cache, a data structure maintains the mapping relationship between each Buffer and LBA in Cache.
Example 1
There is also provided, in accordance with an embodiment of the present invention, an embodiment of a data reading method, it should be noted that the steps illustrated in the flowchart of the accompanying drawings may be carried out in a computer system such as a set of computer-executable instructions, and that, although a logical order is illustrated in the flowchart, in some cases, the steps illustrated or described may be carried out in an order different than here.
The method provided by the first embodiment of the present application may be executed in a mobile terminal, a computer terminal, or a similar computing device. Fig. 3 shows a hardware configuration block diagram of a computer terminal (or mobile device) for implementing the data reading method. As shown in fig. 1, the computer terminal 10 (or mobile device 10) may include one or more (shown as 102a, 102b, … …, 102 n) processors 102 (the processors 102 may include, but are not limited to, a processing device such as a microprocessor MCU or a programmable logic device FPGA, etc.), a memory 104 for storing data, and a transmission module for communication functions. Besides, the method can also comprise the following steps: a display, an input/output interface (I/O interface), a Universal Serial BUS (USB) port (which may be included as one of the ports of the BUS), a network interface, a power source, and/or a camera. It will be understood by those skilled in the art that the structure shown in fig. 3 is only an illustration and is not intended to limit the structure of the electronic device. For example, the computer terminal 10 may also include more or fewer components than shown in FIG. 3, or have a different configuration than shown in FIG. 3.
It should be noted that the one or more processors 102 and/or other data processing circuitry described above may be referred to generally herein as "data processing circuitry". The data processing circuitry may be embodied in whole or in part in software, hardware, firmware, or any combination thereof. Further, the data processing circuit may be a single stand-alone processing module or incorporated, in whole or in part, into any of the other elements in the computer terminal 10 (or mobile device). As referred to in the embodiments of the application, the data processing circuit acts as a processor control (e.g. selection of a variable resistance termination path connected to the interface).
The memory 104 may be used to store software programs and modules of application software, such as program instructions/data storage devices corresponding to the data reading method in the embodiment of the present invention, and the processor 102 executes various functional applications and data processing by running the software programs and modules stored in the memory 104, that is, implementing the data reading method. The memory 104 may include high-speed random access memory, and may also include non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some examples, the memory 104 may further include memory located remotely from the processor 102, which may be connected to the computer terminal 10 over a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.
The transmission device is used for receiving or transmitting data via a network. Specific examples of the network described above may include a wireless network provided by a communication provider of the computer terminal 10. In one example, the transmission device 106 includes a Network adapter (NIC) that can be connected to other Network devices through a base station to communicate with the internet. In one example, the transmission device 106 can be a Radio Frequency (RF) module, which is used to communicate with the internet in a wireless manner.
The display may be, for example, a touch screen type Liquid Crystal Display (LCD) that may enable a user to interact with a user interface of the computer terminal 10 (or mobile device).
Under the operating environment, the application provides a data reading method as shown in fig. 4. Fig. 4 is a flowchart of a data reading method according to a first embodiment of the present invention.
Step S401, receiving a request for reading target data triggered by a target object, where the request carries a target logical block address of the target data.
Specifically, a read request for target data is obtained, where the request needs to include a target logical block address (target LBA) corresponding to the target data.
Step S402, obtaining a target physical block address corresponding to the target data according to the target logical block address.
Specifically, according to the target LBA corresponding to the target data, a corresponding target physical block address (target PBA) is obtained.
Step S403, determining whether to store the target data in the cache memory according to the target physical block address and the effective physical block address range of the cache memory in the solid state disk.
Specifically, whether the target data is stored in the Cache is judged according to the target LBA of the target data and an effective physical block address range (Cache PBA range) of a Cache memory (Cache) in the Solid State Disk (SSD). Because the data stored in the Cache is limited, when the data in the Cache is full and new data is written, the data written at the beginning is deleted, so that the data stored in the Cache is not always unchanged, that is, the physical block address range corresponding to the data in the Cache is always changed. The valid physical block address range is used to determine which data is stored in the Cache.
Step S404, if the target data is stored in the cache memory, the target data is read from the cache memory, and the target data is returned to the target object.
Specifically, when it is determined that target data is stored in the Cache, the target data is directly read from the Cache and fed back to the target object.
In summary, a corresponding target physical block address is obtained by using a target logical block address of target data, and then, by using the target physical block address and an effective physical block address range of a cache memory in a solid state disk, it can be accurately determined whether the target data is stored in the cache memory, i.e. whether the target data hits the cache memory, compared with the prior art in which whether the target data hits the cache memory is determined by looking up an L2C mapping table, time overhead for determining whether the target data hits the cache memory is greatly reduced, and data reading efficiency is improved.
In order to quickly determine a corresponding PBA through the LBA, in the data reading method provided in the first embodiment of the present invention, before obtaining a target physical block address corresponding to target data according to a target logical block address, the following technical means need to be executed: acquiring a physical block address corresponding to each flash memory in the solid state disk to obtain a plurality of physical block addresses; determining a target physical block address pre-allocated for target data from a plurality of physical block addresses; and updating the target mapping table according to the target physical block address, wherein the target mapping table is used for storing the logical block address and the physical block address corresponding to the logical block address, and the logical block address and the target data are in one-to-one correspondence.
Specifically, before reading data and writing data, a plurality of PBAs corresponding to all Flash memories (Nand Flash) in the SSD are determined, PBAs are pre-allocated to each data (i.e., the target data) in the Cache from the plurality of PBAs, and then the L2P mapping table (i.e., the target mapping table) is updated according to the allocated PBAs. The LBA corresponds to data, and the PBA corresponds to data. The above process is to quickly determine the corresponding PBA through the LBA when reading data, thereby improving the data reading efficiency.
In order to accurately determine whether the target data is stored in the Cache, in the data reading method provided in the first embodiment of the present invention, after determining the target physical block address pre-allocated to the target data from the plurality of physical block addresses, an effective physical block address range of the Cache memory needs to be determined according to the target physical block address.
Specifically, since the data stored in the Cache is limited, when the data in the Cache is full and new data is written, the data written at the beginning is deleted, so that the data stored in the Cache is not always unchanged, that is, the physical block address range corresponding to the existing data in the Cache is also always changed. Therefore, the effective physical block address range of the Cache can be determined according to the PBA corresponding to the newly written data. In order to accurately determine whether target data is stored in the Cache, the effective physical block address range of the Cache needs to be determined.
In order to ensure that the latest valid physical block address range of the Cache is obtained when data is read, in the data reading method provided in the first embodiment of the present invention, after the valid physical block address range of the Cache memory is determined according to the target physical block address, the following technical means need to be executed: and if the signal for updating the effective physical block address range is detected, updating the effective physical block address range.
Specifically, since data is continuously written in the SSD, data stored in the Cache is also continuously changed, when a signal for updating the valid physical block address range is detected, the valid physical block address range is updated, so as to ensure that the latest valid physical block address range of the Cache is obtained when data is read, thereby ensuring the accuracy of the determination.
Optionally, in the data reading method provided in the first embodiment of the present invention, obtaining the target physical block address corresponding to the target data according to the target logical block address includes: acquiring a target mapping table; and obtaining a target physical block address corresponding to the target data according to the target mapping table.
Specifically, the target PBA corresponding to the target LBA can be accurately obtained through the L2P mapping table (i.e., the target mapping table).
In order to improve the efficiency of determining whether to store the target data in the Cache, in the data reading method provided in the first embodiment of the present invention, whether to store the target data in the Cache memory is further defined according to the target physical block address and the effective physical block address range of the Cache memory: the following technical features can be adopted to determine whether the target data is stored in the cache memory according to the target physical block address and the effective physical block address range of the cache memory: acquiring an effective physical block address range of a cache memory; judging whether the target physical block address belongs to the range of the effective physical block address; and if the target physical block address belongs to the effective physical block address range, indicating that the target data is stored in the cache memory.
Specifically, determining whether to store the target data in the cache memory according to the target PBA and the valid physical block address range includes: and comparing the target PBA with an effective physical block address range (Cache PBA range) of the Cache, and if the target PBA is in the Cache PBA range, indicating that target data is stored in the Cache. Through the steps, whether the Cache is hit or not can be judged only by performing comparison operation, and the efficiency of detecting whether the Cache is hit or not is improved. It should be noted that the judgment is to judge whether the Cache is hit, that is, to judge whether the target data is stored in the Cache.
Optionally, in the data reading method provided in the first embodiment of the present invention, the method further includes: and if the target physical block address does not belong to the effective physical block address range, indicating that the target data is not stored in the cache memory.
Optionally, in the data reading method provided in the first embodiment of the present invention, in a case that the target data is not stored in the cache memory, the method further includes: determining a target flash memory corresponding to the target physical block address according to the target physical block address corresponding to the target data; and reading the target data from the target flash memory and returning the target data to the target object.
Specifically, under the condition that the target data is not stored in the Cache, the corresponding target Nand Flash (namely the target Flash memory) is found through the target PBA of the target data, the target data is obtained from the target Nand Flash, and the target data is fed back to the target object.
In the embodiment of the invention, a request for reading target data triggered by a target object is received, wherein the request carries a target logical block address of the target data; obtaining a target physical block address corresponding to the target data according to the target logical block address; determining whether target data is stored in a cache memory according to the target physical block address and the effective physical block address range of the cache memory in the solid state disk; if the target data is stored in the cache memory, the target data is read from the cache memory and returned to the target object, so that the technical problem that the time delay of reading the data is increased due to unavoidable Hash collision because an L2C mapping table is designed into a mapping table suitable for a searched Hash-list data structure when the data is read in the related technology is solved, whether the target data is stored in the cache memory can be accurately judged through the target physical block address of the target data and the effective physical block address range of the cache memory in the solid state disk, namely whether the cache memory is hit or not can be judged, and compared with the prior art that whether the cache memory is hit or not is determined through searching an L2C mapping table, the time overhead of determining whether the cache memory is hit or not is greatly reduced, and the effect of improving the efficiency of reading the data is achieved.
Fig. 5 is a flowchart of an alternative data reading method according to an embodiment of the present invention. Step 1: obtaining a corresponding target PBA from the L2P mapping table according to the target LBA of the target data; step 2: the effective physical block address range (Cache PBA range) of the Cache is obtained as shown in fig. 6, which is a schematic diagram of the effective physical block address range of the Cache. And comparing the target PBA with the Cache PBA range to determine whether the target PBA is hit in the Cache. And if the target data is hit in the Cache, reading the target data from the Cache. And if the target data does not hit the Cache, reading the target data from the Nand Flash.
In the data reading method provided in the first embodiment of the present invention, the L2P mapping table is updated in advance on the path of writing data, and information of an effective physical block address range (Cache PBA range) of the Cache is maintained, and then the L2P mapping table is searched first when reading data, and then the Cache PBA range is determined, so that the Cache search efficiency is greatly improved, and compared with a conventional scheme for searching the L2C mapping table, the complexity of search time is reduced, and the data reading efficiency is improved.
It should be noted that, for simplicity of description, the above-mentioned method embodiments are described as a series of acts or combination of acts, but those skilled in the art will recognize that the present invention is not limited by the order of acts, as some steps may occur in other orders or concurrently in accordance with the invention. Further, those skilled in the art should also appreciate that the embodiments described in the specification are preferred embodiments and that the acts and modules referred to are not necessarily required by the invention.
Through the above description of the embodiments, those skilled in the art can clearly understand that the data reading method according to the above embodiments can be implemented by software plus a necessary general hardware platform, and certainly can also be implemented by hardware, but the former is a better implementation mode in many cases. Based on such understanding, the technical solutions of the present invention or portions thereof contributing to the prior art may be embodied in the form of a software product, which is stored in a storage medium (such as ROM/RAM, magnetic disk, optical disk) and includes several instructions for enabling a terminal device (which may be a mobile phone, a computer, a server, or a network device, etc.) to execute the method of the embodiments of the present invention.
Example 2
According to an embodiment of the present invention, there is also provided a data reading apparatus for implementing the data reading method, as shown in fig. 7, the apparatus including: a receiving unit 701, a processing unit 702, a first determining unit 703 and a first reading unit 704.
A receiving unit 701, configured to receive a request for reading target data triggered by a target object, where the request carries a target logical block address of the target data.
A processing unit 702, configured to obtain a target physical block address corresponding to the target data according to the target logical block address;
the first determining unit 703 is configured to determine whether the target data is stored in the cache memory according to the target physical block address and the valid physical block address range of the cache memory in the solid state disk.
The first reading unit 704 is configured to, if the target data is stored in the cache memory, read the target data from the cache memory, and return the target data to the target object.
In the data reading apparatus provided in the second embodiment of the present invention, a request for reading target data triggered by a target object is received by a receiving unit 701, where the request carries a target logical block address of the target data; the processing unit 702 obtains a target physical block address corresponding to the target data according to the target logical block address; the first determining unit 703 determines whether target data is stored in the cache memory according to the target physical block address and the effective physical block address range of the cache memory in the solid state disk; if the target data is stored in the cache memory, the first reading unit 704 reads the target data from the cache memory, and the target data is returned to the target object, so that the problem that when the data is read in the related technology, the L2C mapping table is designed into the mapping table of the Hash-list data structure suitable for being searched is solved, because Hash collision can not be avoided, the time delay of reading data is increased, whether the target data is stored in the cache memory can be accurately judged through the target physical block address of the target data and the effective physical block address range of the cache memory in the solid state disk, namely, whether the cache memory is hit or not is determined, compared with the prior art that whether the cache memory is hit or not is determined by searching the L2C mapping table, the time overhead of determining whether the cache memory is hit or not is greatly reduced, and the effect of improving the data reading efficiency is achieved.
Optionally, in the data reading apparatus provided in the second embodiment of the present invention, the apparatus further includes: the acquisition unit is used for acquiring a physical block address corresponding to each flash memory in the solid state disk before acquiring a target physical block address corresponding to target data according to the target logical block address to obtain a plurality of physical block addresses; a second determination unit configured to determine a target physical block address pre-allocated for the target data from among the plurality of physical block addresses; the first updating unit is used for updating a target mapping table according to a target physical block address, wherein the target mapping table is used for storing a logical block address and a physical block address corresponding to the logical block address, and the logical block address and target data are in one-to-one correspondence.
Optionally, in the data reading apparatus provided in the second embodiment of the present invention, the apparatus further includes: and a third determining unit, configured to determine, after determining a target physical block address pre-allocated for the target data from the plurality of physical block addresses, a valid physical block address range of the cache memory according to the target physical block address.
Optionally, in the data reading apparatus according to the second embodiment of the present invention, after determining the valid physical block address range of the cache memory according to the target physical block address, the apparatus further includes: and the second updating unit is used for updating the effective physical block address range if a signal for updating the effective physical block address range is detected.
Optionally, in the data reading apparatus provided in the second embodiment of the present invention, the processing unit 702 includes: the first acquisition module is used for acquiring a target mapping table; and the processing module is used for obtaining a target physical block address corresponding to the target data according to the target mapping table.
Optionally, in the data reading apparatus provided in the second embodiment of the present invention, the first determining unit 703 includes: the second acquisition module is used for acquiring the effective physical block address range of the cache memory; the judging module is used for judging whether the target physical block address belongs to the range of the effective physical block address; and the determining module is used for indicating that the target data is stored in the cache memory if the target physical block address belongs to the effective physical block address range.
Optionally, in the data reading apparatus provided in the second embodiment of the present invention, the apparatus further includes: and the fourth determination unit is used for indicating that the target data is not stored in the cache memory if the target physical block address does not belong to the effective physical block address range.
Optionally, in the data reading apparatus provided in the second embodiment of the present invention, the apparatus further includes: the fifth determining unit is used for determining a target flash memory corresponding to a target physical block address according to the target physical block address corresponding to the target data under the condition that the target data is not stored in the cache memory; and the second reading unit is used for reading the target data from the target flash memory and returning the target data to the target object.
It should be noted here that the receiving unit 701, the processing unit 702, the first determining unit 703 and the first reading unit 704 correspond to steps S401 to S404 in embodiment 1, and the four units are the same as the corresponding steps in the implementation example and application scenario, but are not limited to the disclosure in the first embodiment. It should be noted that the modules described above as part of the apparatus may be run in the computer terminal 10 provided in the first embodiment.
Example 3
The embodiment of the invention can provide a computer terminal which can be any computer terminal device in a computer terminal group. Optionally, in this embodiment, the computer terminal may also be replaced with a terminal device such as a mobile terminal.
Optionally, in this embodiment, the computer terminal may be located in at least one network device of a plurality of network devices of a computer network.
In this embodiment, the computer terminal may execute a program code of the following steps in the data reading method: receiving a request for reading target data triggered by a target object, wherein the request carries a target logical block address of the target data; obtaining a target physical block address corresponding to the target data according to the target logical block address; determining whether target data are stored in a cache memory according to the target physical block address and the effective physical block address range of the cache memory in the solid state disk; and if the target data are stored in the cache memory, reading the target data from the cache memory and returning the target data to the target object.
The computer terminal described above may further execute a program code of the following steps in the data reading method: before a target physical block address corresponding to target data is obtained according to a target logical block address, a physical block address corresponding to each flash memory in the solid state disk is obtained, and a plurality of physical block addresses are obtained; determining a target physical block address pre-allocated for target data from a plurality of physical block addresses; and updating the target mapping table according to the target physical block address, wherein the target mapping table is used for storing the logical block address and the physical block address corresponding to the logical block address, and the logical block address and the target data are in one-to-one correspondence.
The computer terminal described above may further execute a program code of the following steps in the data reading method: after determining a target physical block address pre-allocated for the target data from the plurality of physical block addresses, the method further comprises: and determining the effective physical block address range of the cache memory according to the target physical block address.
The computer terminal described above may further execute a program code of the following steps in the data reading method: after determining the valid physical block address range of the cache memory according to the target physical block address, the method further comprises: and if the signal for updating the effective physical block address range is detected, updating the effective physical block address range.
The computer terminal described above may further execute a program code of the following steps in the data reading method: obtaining a target physical block address corresponding to the target data according to the target logical block address comprises: acquiring a target mapping table; and obtaining a target physical block address corresponding to the target data according to the target mapping table.
The computer terminal described above may further execute a program code of the following steps in the data reading method: determining whether to store the target data in the cache memory according to the target physical block address and the valid physical block address range of the cache memory comprises: acquiring an effective physical block address range of a cache memory; judging whether the target physical block address belongs to the range of the effective physical block address; and if the target physical block address belongs to the effective physical block address range, indicating that the target data is stored in the cache memory.
The computer terminal described above may further execute a program code of the following steps in the data reading method: the method further comprises the following steps: and if the target physical block address does not belong to the effective physical block address range, indicating that the target data is not stored in the cache memory.
The computer terminal described above may further execute a program code of the following steps in the data reading method: in the case that the target data is not stored in the cache memory, the method further comprises: determining a target flash memory corresponding to the target physical block address according to the target physical block address corresponding to the target data; the target data is read from the target flash memory and returned to the target object.
Optionally, fig. 8 is a block diagram of a computer terminal according to a third embodiment of the present invention. As shown in fig. 8, the computer terminal 10 may include: one or more processors (only one shown), memory.
The memory may be used to store software programs and modules, such as program instructions/modules corresponding to the security vulnerability detection method and apparatus in the embodiments of the present invention, and the processor executes various functional applications and data processing by operating the software programs and modules stored in the memory, that is, the above-mentioned method for detecting a system vulnerability attack is implemented. The memory may include high-speed random access memory, and may also include non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some instances, the memories may further include a memory located remotely from the processor, which may be connected to the terminal 10 via a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.
The processor can call the information and application program stored in the memory through the transmission device to execute the following steps: receiving a request for reading target data triggered by a target object, wherein the request carries a target logical block address of the target data; obtaining a target physical block address corresponding to the target data according to the target logical block address; determining whether target data is stored in a cache memory according to the target physical block address and the effective physical block address range of the cache memory in the solid state disk; and if the target data are stored in the cache memory, reading the target data from the cache memory and returning the target data to the target object.
Optionally, the processor may further execute the program code of the following steps: before a target physical block address corresponding to target data is obtained according to a target logical block address, a physical block address corresponding to each flash memory in the solid state disk is obtained, and a plurality of physical block addresses are obtained; determining a target physical block address pre-allocated for target data from a plurality of physical block addresses; and updating the target mapping table according to the target physical block address, wherein the target mapping table is used for storing the logical block address and the physical block address corresponding to the logical block address, and the logical block address and the target data are in one-to-one correspondence.
Optionally, the processor may further execute the program code of the following steps: after a target physical block address pre-allocated for target data is determined from a plurality of physical block addresses, an effective physical block address range of the cache memory is determined according to the target physical block address.
Optionally, the processor may further execute the program code of the following steps: after determining the effective physical block address range of the cache memory according to the target physical block address, if a signal for updating the effective physical block address range is detected, updating the effective physical block address range.
Optionally, the processor may further execute the program code of the following steps: obtaining a target physical block address corresponding to the target data according to the target logical block address comprises: acquiring a target mapping table; and obtaining a target physical block address corresponding to the target data according to the target mapping table.
Optionally, the processor may further execute the program code of the following steps: determining whether to store the target data in the cache memory according to the target physical block address and the valid physical block address range of the cache memory comprises: acquiring an effective physical block address range of a cache memory; judging whether the target physical block address belongs to the range of the effective physical block address; and if the target physical block address belongs to the effective physical block address range, indicating that the target data is stored in the cache memory.
Optionally, the processor may further execute the program code of the following steps: if the target physical block address does not belong to the valid physical block address range, it indicates that the target data is not stored in the cache memory.
Optionally, the processor may further execute the program code of the following steps: under the condition that the target data is not stored in the cache memory, determining a target flash memory corresponding to a target physical block address according to the target physical block address corresponding to the target data; the target data is read from the target flash memory and returned to the target object.
The embodiment of the invention provides a data reading scheme. Receiving a request for reading target data triggered by a target object, wherein the request carries a target logical block address of the target data; obtaining a target physical block address corresponding to the target data according to the target logical block address; determining whether target data is stored in a cache memory according to the target physical block address and the effective physical block address range of the cache memory in the solid state disk; if the target data is stored in the cache memory, the target data is read from the cache memory and returned to the target object, so that the technical problem that the time delay of reading the data is increased due to unavoidable Hash collision because an L2C mapping table is designed into a mapping table of a Hash-list data structure suitable for searching when reading the data in the related technology is solved, whether the target data is stored in the cache memory or not can be accurately judged through the target physical block address of the target data and the effective physical block address range of the cache memory in the solid state disk, namely whether the target data is hit or not can be judged, and compared with the prior art that whether the target data is hit or not is determined by searching an L2C mapping table, the time overhead of determining whether the target data is hit or not is greatly reduced, and the effect of improving the efficiency of reading the data is achieved.
It can be understood by those skilled in the art that the structure shown in fig. 8 is only an illustration, and the computer terminal may also be a terminal device such as a smart phone (e.g., an Android phone, an iOS phone, etc.), a tablet computer, a palmtop computer, a Mobile Internet Device (MID), a PAD, and the like. Fig. 8 is a diagram illustrating the structure of the electronic device. For example, the computer terminal 10 may also include more or fewer components (e.g., network interfaces, display devices, etc.) than shown in FIG. 8, or have a different configuration than shown in FIG. 8.
Those skilled in the art will appreciate that all or part of the steps in the methods of the above embodiments may be implemented by a program instructing hardware associated with the terminal device, where the program may be stored in a computer-readable storage medium, and the storage medium may include: flash disks, Read-Only memories (ROMs), Random Access Memories (RAMs), magnetic or optical disks, and the like.
Example 4
Embodiments of the present invention also provide a computer-readable storage medium. Optionally, in this embodiment, the storage medium may be configured to store a program code executed by the data reading method provided in the first embodiment.
Optionally, in this embodiment, the storage medium may be located in any one of computer terminals in a computer terminal group in a computer network, or in any one of mobile terminals in a mobile terminal group.
Optionally, in this embodiment, the storage medium is configured to store program code for performing the following steps: receiving a request for reading target data triggered by a target object, wherein the request carries a target logical block address of the target data; obtaining a target physical block address corresponding to the target data according to the target logical block address; determining whether target data are stored in a cache memory according to the target physical block address and the effective physical block address range of the cache memory in the solid state disk; and if the target data are stored in the cache memory, reading the target data from the cache memory and returning the target data to the target object.
The storage medium described above is further configured to store program code for performing the steps of: before a target physical block address corresponding to target data is obtained according to a target logical block address, obtaining a physical block address corresponding to each flash memory in the solid state disk to obtain a plurality of physical block addresses; determining a target physical block address pre-allocated for target data from a plurality of physical block addresses; and updating the target mapping table according to the target physical block address, wherein the target mapping table is used for storing the logical block address and the physical block address corresponding to the logical block address, and the logical block address and the target data are in one-to-one correspondence.
The storage medium described above is further configured to store program code for performing the steps of: after a target physical block address pre-allocated for target data is determined from a plurality of physical block addresses, an effective physical block address range of the cache memory is determined according to the target physical block address.
The storage medium described above is further configured to store program code for performing the steps of: after determining the effective physical block address range of the cache memory according to the target physical block address, if a signal for updating the effective physical block address range is detected, the effective physical block address range is updated.
The storage medium described above is further configured to store program code for performing the steps of: obtaining a target physical block address corresponding to the target data according to the target logical block address comprises: acquiring a target mapping table; and obtaining a target physical block address corresponding to the target data according to the target mapping table.
The storage medium described above is further configured to store program code for performing the steps of: determining whether the target data is stored in the cache memory according to the target physical block address and the effective physical block address range of the cache memory comprises: acquiring an effective physical block address range of a cache memory; judging whether the target physical block address belongs to the range of the effective physical block address; and if the target physical block address belongs to the effective physical block address range, indicating that the target data is stored in the cache memory.
The storage medium described above is further configured to store program code for performing the steps of: and if the target physical block address does not belong to the effective physical block address range, indicating that the target data is not stored in the cache memory.
The storage medium described above is further configured to store program code for performing the steps of: under the condition that the target data is not stored in the cache memory, determining a target flash memory corresponding to a target physical block address according to the target physical block address corresponding to the target data; the target data is read from the target flash memory and returned to the target object.
The above-mentioned serial numbers of the embodiments of the present invention are merely for description and do not represent the merits of the embodiments.
In the above embodiments of the present invention, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to related descriptions of other embodiments.
In the embodiments provided in the present application, it should be understood that the disclosed technology can be implemented in other ways. The above-described embodiments of the apparatus are merely illustrative, and for example, the division of the units is only one type of division of logical functions, and there may be other divisions when actually implemented, for example, a plurality of units or components may be combined or may be integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, units or modules, and may be in an electrical or other form.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, functional units in the embodiments of the present invention may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware, and can also be realized in a form of a software functional unit.
The integrated unit, if implemented in the form of a software functional unit and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present invention may be embodied in the form of a software product, which is stored in a storage medium and includes instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method according to the embodiments of the present invention. And the aforementioned storage medium includes: a U-disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a removable hard disk, a magnetic or optical disk, and other various media capable of storing program codes.
The foregoing is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, various modifications and decorations can be made without departing from the principle of the present invention, and these modifications and decorations should also be regarded as the protection scope of the present invention.
Claims (11)
1. A data reading method, comprising:
receiving a request for reading target data triggered by a target object, wherein the request carries a target logical block address of the target data;
obtaining a target physical block address corresponding to the target data according to the target logical block address;
determining whether the target data is stored in a cache memory according to the target physical block address and an effective physical block address range of the cache memory in the solid state disk;
and if the target data is stored in the cache memory, reading the target data from the cache memory and returning the target data to the target object.
2. The method of claim 1, wherein before obtaining the target physical block address corresponding to the target data according to the target logical block address, the method further comprises:
acquiring a physical block address corresponding to each flash memory in the solid state disk to obtain a plurality of physical block addresses;
determining the target physical block address pre-allocated for the target data from the plurality of physical block addresses;
and updating a target mapping table according to the target physical block address, wherein the target mapping table is used for storing a logical block address and a physical block address corresponding to the logical block address, and the logical block address and the target data are in one-to-one correspondence.
3. The method of claim 2, wherein after determining the target physical block address pre-allocated for the target data from the plurality of physical block addresses, the method further comprises:
and determining the effective physical block address range of the cache memory according to the target physical block address.
4. The method of claim 3, wherein after determining the valid physical block address range of the cache memory according to the target physical block address, the method further comprises:
and if the signal for updating the effective physical block address range is detected, updating the effective physical block address range.
5. The method of claim 2, wherein obtaining the target physical block address corresponding to the target data according to the target logical block address comprises:
acquiring the target mapping table;
and obtaining a target physical block address corresponding to the target data according to the target mapping table.
6. The method of claim 1, wherein determining whether to store the target data in the cache memory according to the target physical block address and an effective physical block address range of the cache memory comprises:
obtaining the effective physical block address range of the cache memory;
judging whether the target physical block address belongs to the effective physical block address range or not;
and if the target physical block address belongs to the effective physical block address range, indicating that the target data is stored in the cache memory.
7. The method of claim 6, further comprising:
and if the target physical block address does not belong to the effective physical block address range, indicating that the target data is not stored in the cache memory.
8. The method of claim 7, wherein in the event that the target data is not stored in the cache memory, the method further comprises:
determining a target flash memory corresponding to a target physical block address according to the target physical block address corresponding to the target data;
and reading the target data from the target flash memory and returning the target data to the target object.
9. A data reading apparatus, comprising:
the device comprises a receiving unit, a processing unit and a processing unit, wherein the receiving unit is used for receiving a request for reading target data triggered by a target object, and the request carries a target logical block address of the target data;
the processing unit is used for obtaining a target physical block address corresponding to the target data according to the target logical block address;
the first determining unit is used for determining whether the target data is stored in the cache memory according to the target physical block address and the effective physical block address range of the cache memory in the solid state disk;
the first reading unit is configured to, if the target data is stored in the cache memory, read the target data from the cache memory, and return the target data to the target object.
10. A storage medium, characterized in that the storage medium includes a stored program, wherein, when the program runs, a device in which the storage medium is located is controlled to execute the data reading method according to any one of claims 1 to 8.
11. A processor, characterized in that the processor is configured to run a program, wherein the program is configured to perform the data reading method according to any one of claims 1 to 8 when running.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210590815.4A CN115033175A (en) | 2022-05-27 | 2022-05-27 | Data reading method and device, storage medium and processor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210590815.4A CN115033175A (en) | 2022-05-27 | 2022-05-27 | Data reading method and device, storage medium and processor |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN115033175A true CN115033175A (en) | 2022-09-09 |
Family
ID=83121098
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202210590815.4A Pending CN115033175A (en) | 2022-05-27 | 2022-05-27 | Data reading method and device, storage medium and processor |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN115033175A (en) |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109522242A (en) * | 2018-10-22 | 2019-03-26 | 郑州云海信息技术有限公司 | A kind of method and apparatus for searching for Cache data |
| WO2019124320A1 (en) * | 2017-12-20 | 2019-06-27 | Ｎｅｃプラットフォームズ株式会社 | Storage controller, storage array device, data depositing method, and recording medium |
| US20190235762A1 (en) * | 2018-01-29 | 2019-08-01 | Toshiba Memory Corporation | Memory system controlling nonvolatile memory |
| CN111026678A (en) * | 2019-12-23 | 2020-04-17 | 深圳忆联信息***有限公司 | Cache design method and device based on solid state disk and computer equipment |
| CN112486852A (en) * | 2020-12-01 | 2021-03-12 | 合肥大唐存储科技有限公司 | Solid state disk and address mapping method thereof |
-
2022
- 2022-05-27 CN CN202210590815.4A patent/CN115033175A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2019124320A1 (en) * | 2017-12-20 | 2019-06-27 | Ｎｅｃプラットフォームズ株式会社 | Storage controller, storage array device, data depositing method, and recording medium |
| US20190235762A1 (en) * | 2018-01-29 | 2019-08-01 | Toshiba Memory Corporation | Memory system controlling nonvolatile memory |
| CN109522242A (en) * | 2018-10-22 | 2019-03-26 | 郑州云海信息技术有限公司 | A kind of method and apparatus for searching for Cache data |
| CN111026678A (en) * | 2019-12-23 | 2020-04-17 | 深圳忆联信息***有限公司 | Cache design method and device based on solid state disk and computer equipment |
| CN112486852A (en) * | 2020-12-01 | 2021-03-12 | 合肥大唐存储科技有限公司 | Solid state disk and address mapping method thereof |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US20220129189A1 (en) | Data Storage Method in Flash Device and Flash Device | |
| CN105677580A (en) | Method and device for accessing cache | |
| CN109445902B (en) | Data operation method and system | |
| CN106851758B (en) | Communication network switching method and terminal equipment | |
| CN111984557A (en) | Data processing method, device and system | |
| CN112764925A (en) | Data storage method, device, equipment and storage medium based on virtual memory | |
| CN111694703A (en) | Cache region management method and device and computer equipment | |
| CN109783321B (en) | Monitoring data management method and device and terminal equipment | |
| CN110888965A (en) | Document data extraction method and device | |
| CN112783971B (en) | Transaction recording method, transaction query method, electronic device and storage medium | |
| CN112463055B (en) | Method, system, equipment and medium for optimizing and using L2P table of solid state disk | |
| US11256630B2 (en) | Cache address mapping method and related device | |
| CN115033175A (en) | Data reading method and device, storage medium and processor | |
| CN111143092A (en) | Fault recording data processing method and system and terminal equipment | |
| CN112015672A (en) | Data processing method, device, equipment and storage medium in storage system | |
| CN107977282B (en) | Method and device for reading data page by SPI-Nand | |
| CN111708715A (en) | Memory allocation method, memory allocation device and terminal equipment | |
| CN111897744A (en) | Data writing method and device, electronic equipment and storage medium | |
| CN115687173B (en) | Data address query method and device, electronic equipment and readable storage medium | |
| CN111694504B (en) | Method and device for processing read request | |
| CN112463052B (en) | Method, system, device and medium for reducing DDR capacity requirement in solid state disk | |
| CN117472806B (en) | Address translation method and device and computer storage medium | |
| CN109885509B (en) | Nonvolatile memory access method and device | |
| CN109165172B (en) | Cache data processing method and related equipment | |
| CN113312385A (en) | Cache operation method, device and system, storage medium and operation equipment |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination |