CN115021717A - Radio frequency direct-sampling ADC anti-aliasing tunable filter - Google Patents
Radio frequency direct-sampling ADC anti-aliasing tunable filter Download PDFInfo
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- CN115021717A CN115021717A CN202210579584.7A CN202210579584A CN115021717A CN 115021717 A CN115021717 A CN 115021717A CN 202210579584 A CN202210579584 A CN 202210579584A CN 115021717 A CN115021717 A CN 115021717A
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- 239000000872 buffer Substances 0.000 claims abstract description 26
- 230000008859 change Effects 0.000 claims abstract description 5
- 239000003990 capacitor Substances 0.000 claims description 36
- 230000002708 enhancing effect Effects 0.000 claims description 19
- 230000003139 buffering effect Effects 0.000 claims 1
- 238000005457 optimization Methods 0.000 abstract description 5
- 238000010586 diagram Methods 0.000 description 7
- 238000004088 simulation Methods 0.000 description 3
- 230000001629 suppression Effects 0.000 description 3
- 230000009977 dual effect Effects 0.000 description 2
- 238000001914 filtration Methods 0.000 description 2
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H11/00—Networks using active elements
- H03H11/02—Multiple-port networks
- H03H11/04—Frequency selective two-port networks
- H03H11/12—Frequency selective two-port networks using amplifiers with feedback
- H03H11/1217—Frequency selective two-port networks using amplifiers with feedback using a plurality of operational amplifiers
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/06—Continuously compensating for, or preventing, undesired influence of physical parameters
- H03M1/0617—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence
- H03M1/0626—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence by filtering
- H03M1/0629—Anti-aliasing
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H2210/00—Indexing scheme relating to details of tunable filters
- H03H2210/02—Variable filter component
- H03H2210/025—Capacitor
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Abstract
The invention discloses a radio frequency direct sampling ADC anti-aliasing tunable filter, which comprises a tunable filter, a radio frequency variable gain amplifier and an ADC input buffer, wherein the tunable filter comprises a first filter, a second filter and a third filter; the output end of the tunable filter is connected with the input end of the radio frequency variable gain amplifier, the output end of the radio frequency variable gain amplifier is connected with the input end of the ADC input buffer, the tunable filter adopts a six-stage Chebyshev II structure filter, each stage in the Chebyshev II structure filter adopts an active LC filter framework, and each stage changes the value of LC to change the zero point and the pole of the corresponding filter. The invention can meet the anti-aliasing application requirement of a 2GHz sampling high-speed ADC, can flexibly adapt to various sampling frequencies and sampling bandwidths, and achieves flexibility, universality and power consumption optimization.
Description
Technical Field
The invention relates to the technical field of filters, in particular to a radio frequency direct sampling ADC anti-aliasing tunable filter.
Background
With the development of high-speed ADC (analog-to-digital converter) technology, the traditional down-conversion receiver architecture is gradually replaced by an ADC radio frequency direct sampling scheme, and especially, the ADC collects signals in a higher nyquist zone, so that the working carrier frequency range of the high-speed ADC radio frequency direct sampling can be effectively increased.
However, in the radio frequency direct sampling scheme, an anti-aliasing filter needs to be added in front of the ADC, so that the SFDR and the noise floor of the ADC are prevented from being affected by an aliasing signal entering a sampling bandwidth. At present, a special filter needs to be customized aiming at an ADC radio frequency direct sampling design, the customization cost is high, the flexibility is poor, and the universality and the elasticity of an ADC radio frequency direct sampling scheme are limited. It is therefore desirable to develop a tunable bandwidth anti-aliasing filter.
The patent of invention 'anti-aliasing filter and signal receiving circuit' with patent number 202010459996.8 discloses a bandwidth adjustable anti-aliasing filter, which comprises a low-pass filtering module, a control module and a notch module. The control module controls the center frequency of the notch module, so that the passband bandwidth of the anti-aliasing filter is changed, the frequency of input aliasing and adjacent channel interference signals falls into the stopband frequency range of the anti-aliasing filter, and the anti-aliasing filter can adjust the passband bandwidth through one notch module to adapt and filter the interference signals of various different frequency signals. However, the filter can not be used for eliminating a specific frequency point, the bandwidth cannot be tuned in a large range, and the universality and the suppression requirements of the high-speed radio frequency direct-sampling ADC anti-aliasing filter cannot be met.
Disclosure of Invention
The invention mainly aims to provide an anti-aliasing tunable filter for an analog-to-digital converter (ADC) for direct radio frequency acquisition, and aims to solve the technical problems that a special filter needs to be customized for one ADC radio frequency direct radio frequency acquisition design at present, the customization cost is high, the flexibility is poor, and the universality and the elasticity of an ADC radio frequency direct acquisition scheme are limited.
In order to achieve the above object, the present invention provides a radio frequency direct sampling ADC anti-aliasing tunable filter, which comprises a tunable filter, a radio frequency variable gain amplifier and an ADC input buffer; wherein:
the output end of the tunable filter is connected with the input end of the radio frequency variable gain amplifier, and the output end of the radio frequency variable gain amplifier is connected with the input end of the ADC input buffer;
the tunable filter adopts a six-stage Chebyshev II structure, each stage of the Chebyshev II structure filter adopts an active LC filter framework, and each stage changes the value of LC to change the zero point and the pole of the corresponding filter.
Optionally, the active LC filter architecture includes an LC Tank formed by an inductance Q value enhancement circuit and a variable capacitor.
Optionally, an LC Tank formed by an inductor Q-value enhancing circuit and two variable capacitors is disposed between the IP end and the ON end of the front operational amplifier in each stage, wherein the inductor Q-value enhancing circuit is connected in parallel with the LC Tank formed by one of the variable capacitors, and the inductor Q-value enhancing circuit and the LC Tank formed by one of the variable capacitors are connected in series after the inductor Q-value enhancing circuit and the LC Tank are connected in parallel.
Optionally, an inductor Q-value enhancing circuit and an LC Tank formed by two variable capacitors are disposed between the IN end and the OP end of the front operational amplifier IN each stage, wherein the inductor Q-value enhancing circuit is connected IN parallel with the LC Tank formed by one of the variable capacitors, and the inductor Q-value enhancing circuit and the LC Tank formed by one of the variable capacitors are connected IN series after the inductor Q-value enhancing circuit and the LC Tank are connected IN parallel.
Optionally, an inductance Q value enhancing circuit, an LC Tank formed by a variable capacitor, and a capacitor with a fixed capacitance value are disposed between the IP end and the ON end of the post operational amplifier in each stage, wherein the inductance Q value enhancing circuit is connected in parallel with the capacitor with a fixed capacitance value, and the inductance Q value enhancing circuit and the capacitor with a fixed capacitance value are connected in parallel and then connected in series with the LC Tank formed by a variable capacitor.
Optionally, an LC Tank formed by an inductor and two variable capacitors is disposed between the IN end and the OP end of the post operational amplifier IN each stage, wherein the inductor is connected IN parallel with the LC Tank formed by one of the variable capacitors, and the inductor and the LC Tank formed by one of the variable capacitors are connected IN series after the inductor and the LC Tank are connected IN parallel.
Optionally, the ADC input buffer takes the form of an N-transistor MN1 and a P-transistor MP1 dual SF, and buffers the input signal in the form of class-AB.
The embodiment of the invention provides a radio frequency direct sampling ADC anti-aliasing tunable filter, which comprises a tunable filter, a radio frequency variable gain amplifier and an ADC input buffer; the output end of the tunable filter is connected with the input end of the radio frequency variable gain amplifier, the output end of the radio frequency variable gain amplifier is connected with the input end of the ADC input buffer, the tunable filter adopts a six-stage Chebyshev II structure filter, each stage in the Chebyshev II structure filter adopts an active LC filter framework, and each stage changes the value of LC to change the zero point and the pole of the corresponding filter. The invention can meet the anti-aliasing application requirement of a 2GHz sampling high-speed ADC, can flexibly adapt to various sampling frequencies and sampling bandwidths, and achieves flexibility, universality and power consumption optimization.
Drawings
Fig. 1 is a schematic structural diagram of an anti-aliasing tunable filter of a radio frequency direct sampling ADC according to the present invention;
FIG. 2 is a circuit diagram of a single stage active filter of the present invention;
FIG. 3 is an active Q enhancement circuit of the present invention;
FIG. 4 is a diagram of a variable capacitance inductor (LC) array circuit of the present invention;
FIG. 5 illustrates a high speed ADC input buffer circuit according to the present invention;
FIG. 6 is a simulation diagram of the suppression degree of the 270M band-pass filter with 1.5GHz bandwidth in the invention;
FIG. 7 is a simulation diagram of the suppression degree of the 900M band-pass filter with 1.5GHz bandwidth in the invention;
FIG. 8 is a simulation diagram of the linearity of a 270M band-pass filter with a bandwidth of 1.5 GHz.
The implementation, functional features and advantages of the objects of the present invention will be further explained with reference to the accompanying drawings.
Detailed Description
It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
At present, in the related technical field, a special filter needs to be customized for one ADC radio frequency direct sampling design, the customization cost is high, the flexibility is poor, and the universality and the elasticity of an ADC radio frequency direct sampling scheme are limited.
To address this issue, various embodiments of the rf direct sampling ADC anti-aliasing tunable filter of the present invention are presented. The radio frequency direct sampling ADC anti-aliasing tunable filter provided by the invention is provided with the tunable filter, the radio frequency variable gain amplifier and the ADC input buffer, each stage in the filter with the Chebyshev II structure adopts an active LC filter architecture, each stage changes the zero point and the pole of the corresponding filter by changing the value of LC, the requirement of 2GHz sampling high-speed ADC anti-aliasing application is met, meanwhile, the filter can be flexibly adapted to various sampling frequencies and sampling bandwidths, and the purposes of flexibility, universality and power consumption optimization are achieved.
An embodiment of the present invention provides a radio frequency direct-sampling ADC anti-aliasing tunable filter, and referring to fig. 1, fig. 1 is a schematic structural diagram of an embodiment of the radio frequency direct-sampling ADC anti-aliasing tunable filter according to the present invention.
In this embodiment, the rf direct sampling ADC anti-aliasing tunable filter includes a tunable filter, a radio frequency Variable Gain Amplifier (VGA), and an ADC INPUT BUFFER (INPUT BUFFER). The output of the tunable filter is connected with the input of the radio frequency variable gain amplifier, and the output of the radio frequency variable gain amplifier is connected with the ADC input buffer. In the embodiment, the ADC input buffer is directly connected with the sample-and-hold circuit of the high-speed ADC, so that an input buffer stage in the ADC can be omitted.
In this embodiment, in order to satisfy the requirement of direct sampling of the second nyquist zone signal by the 2Gsps sampling frequency ADC, the bandwidth tunable filter adopts a filter of a six-stage chebyshev II structure. Different filter structures may be used for different design requirements.
An important improvement point of the present embodiment is an input front-end structure of an ADC with anti-aliasing, high linearity and wide bandwidth, and in the present embodiment, specifically, the input signal bandwidth is tunable.
In order to realize tunable bandwidth, the present embodiment uses an active LC filter architecture for each stage of chebyshev filter, as shown in fig. 2, each stage of the six-stage chebyshev ii tunable filter uses the same architecture as in fig. 2, each stage changes the zero and the pole of the corresponding filter by changing the value of LC, and the six stages together form a band pass filter.
The principle of realizing the tunable mode is to pass signals through a tunable active filter (see fig. 4) consisting of an LC Tank formed by an inductance Q value enhancing circuit (see fig. 3) and a variable capacitor.
The capacitor in the LC Tank adopts an MOS active capacitor, the equivalent capacitance value is changed by changing the grid voltage of an MOS tube, and the selection of multiple groups of capacitance values is realized by matching with a passive MOM or MIM capacitor structure.
The anti-aliasing filter outputs a large signal close to-1 dBFS to the ADC, which generally requires OIP3 > 30dBm and OP-1dB > 15dBm, which puts high demands on filter linearity. In order to reduce the nonlinearity of the link, the tunable filter is arranged at the forefront so as to reduce the linearity requirement of the active filter and process small signals as much as possible. Because a large number of LC structures are arranged in the tunable filter structure in the embodiment, the small signal can avoid nonlinear distortion and large signal self-excitation risks. The latter stage is followed by a variable gain amplifier to adjust the link gain. The variable gain amplifier is a general circuit, and the present invention is not described in detail.
The last stage is the input buffer of the high-speed ADC. The input buffer bandwidth directly affects the performance and working sampling bandwidth of the overall ADC. A conventional input buffer generally uses a single NMOS to buffer an input signal in the form of a Source Follower (SF), and a level-shifter (level-shifter) is generally used at an input end to change the drain-Source voltage of the SF with the input signal in order to reduce the variation of the drain-Source voltage difference (Vds) of the SF with the input signal, so that the Vds of the SF is kept as constant as possible. However, the structure can limit the sampling working bandwidth and driving capability of the ADC, limit the full-scale quantization capability of the ADC and influence the radio frequency direct sampling performance.
In order to increase the operating bandwidth, the present embodiment adopts N-transistor MN1 and P-transistor MP1 dual SF, and buffers the input signal in the form of class-AB, which has the advantages of low static power consumption and stronger driving capability. See figure 5. The input buffer is divided into two parts, and a post-stage push Core1 amplifying circuit is driven by a first-stage Core 0 pre-amplifying circuit, so that the only difference between Core 0 and Core1 is that the size of Core1 is K times of Core 0, and the Core 0 part only simulates the static working state of the Core1 part and does not need large driving capability. The four capacitors in the figure are identical in size and mainly function to provide an alternating current path for coupling an input alternating current signal to the grid end of the Core1 part MOS tube, and simultaneously, the other function of the capacitors is to form RC filtering with the four resistors in the figure respectively so that the grid end of the Core 0 part MOS tube is not influenced by the input alternating current signal as much as possible. The input buffer bandwidth and dynamic range are optimized by adjusting the current of core 1.
As shown in FIG. 6, FIG. 7 and FIG. 8, the anti-aliasing filter of the invention can realize the medium frequency of 1.5GHz, the adjustable bandwidth of 500MHz to 1GHz, the rejection degree of the filter is more than 40dB, the link gain is more than 15dB, the gain adjusting range is more than 10dB, the output signal P-1dB is more than 15dBm, the anti-aliasing application requirement of the 2GHz sampling high-speed ADC is met, meanwhile, the anti-aliasing filter can flexibly adapt to various sampling frequencies and sampling bandwidths, and the flexible universality and the power consumption optimization are realized.
The embodiment provides a radio frequency direct sampling ADC anti-aliasing tunable filter, which adopts an active LC filter architecture by setting a tunable filter, a radio frequency variable gain amplifier and an ADC input buffer and changes the zero point and the pole of a corresponding filter by changing the value of LC, thereby meeting the anti-aliasing application requirement of a 2GHz sampling high-speed ADC, flexibly adapting to various sampling frequencies and sampling bandwidths and realizing flexibility, universality and power consumption optimization.
The above are only preferred embodiments of the invention, and are not intended to limit the scope of the invention, and all equivalent structures or equivalent processes performed by the present specification and drawings, or directly or indirectly applied to other related technical fields, are also included in the scope of the invention.
Claims (7)
1. A radio frequency direct sampling ADC anti-aliasing tunable filter is characterized by comprising a tunable filter, a radio frequency variable gain amplifier and an ADC input buffer; wherein:
the output end of the tunable filter is connected with the input end of the radio frequency variable gain amplifier, and the output end of the radio frequency variable gain amplifier is connected with the input end of the ADC input buffer;
the tunable filter adopts a six-stage Chebyshev II structure, each stage of the Chebyshev II structure filter adopts an active LC filter framework, and each stage changes the value of LC to change the zero point and the pole of the corresponding filter.
2. The radio frequency direct sampling ADC anti-aliasing tunable filter according to claim 1, wherein the active LC filter architecture comprises an LC Tank consisting of an inductance Q value enhancement circuit and a variable capacitor.
3. The radio frequency direct sampling ADC anti-aliasing tunable filter according to claim 1, wherein an inductance Q value enhancing circuit and an LC Tank formed by two variable capacitors are arranged between an IP end and an ON end of a front operational amplifier in each stage, wherein the inductance Q value enhancing circuit is connected in parallel with the LC Tank formed by one of the variable capacitors, and the LC Tank formed by the two variable capacitors is connected in series after the two LC Tank are connected in parallel.
4. The radio frequency direct sampling ADC anti-aliasing tunable filter according to claim 1, wherein an inductance Q value enhancing circuit and an LC Tank formed by two variable capacitors are arranged between an IN end and an OP end of a front operational amplifier IN each stage, wherein the inductance Q value enhancing circuit is connected IN parallel with the LC Tank formed by one of the variable capacitors, and the LC Tank formed by the two variable capacitors is connected IN series after the two LC Tank are connected IN parallel.
5. The radio frequency direct sampling ADC anti-aliasing tunable filter according to claim 1, wherein an inductance Q value enhancing circuit, an LC Tank formed by a variable capacitor and a capacitor with a fixed capacitance value are arranged between the IP end and the ON end of the post operational amplifier in each stage, wherein the inductance Q value enhancing circuit is connected in parallel with the capacitor with the fixed capacitance value, and the inductance Q value enhancing circuit and the capacitor with the fixed capacitance value are connected in parallel and then connected in series with the LC Tank formed by the variable capacitor.
6. The radio frequency direct sampling ADC anti-aliasing tunable filter according to claim 1, wherein an LC Tank formed by an inductor and two variable capacitors is arranged between an IN end and an OP end of a post operational amplifier IN each stage, wherein the inductor is connected IN parallel with the LC Tank formed by one of the variable capacitors, and the LC Tank formed by one of the variable capacitors is connected IN series after the inductor and the LC Tank are connected IN parallel.
7. The radio frequency direct sampling ADC anti-aliasing tunable filter of claim 1, wherein the ADC input buffer takes N-pipe MN1 and P-pipe MP1 double SF, buffering input signals in the form of class-AB.
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20070140391A1 (en) * | 2005-12-20 | 2007-06-21 | Jianping Pan | Rf complex bandpass-notch filter for rf receiver and tv tuner |
| CN103956989A (en) * | 2014-05-23 | 2014-07-30 | 武汉大学 | Multimode multiband reconfigurable Gm-C complex filter |
| US20140369452A1 (en) * | 2013-06-13 | 2014-12-18 | Cambridge Silicon Radio Limited | Method and apparatus for on-demand interference rejection in multi-band gnss receivers |
| CN110365308A (en) * | 2019-07-05 | 2019-10-22 | 浙江大学 | A kind of tunable Active RC bandpass filter based on II type of Chebyshev |
| CN111371423A (en) * | 2020-05-27 | 2020-07-03 | 深圳市南方硅谷半导体有限公司 | Anti-aliasing filter and signal receiving circuit |
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- 2022-05-24 CN CN202210579584.7A patent/CN115021717A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20070140391A1 (en) * | 2005-12-20 | 2007-06-21 | Jianping Pan | Rf complex bandpass-notch filter for rf receiver and tv tuner |
| US20140369452A1 (en) * | 2013-06-13 | 2014-12-18 | Cambridge Silicon Radio Limited | Method and apparatus for on-demand interference rejection in multi-band gnss receivers |
| CN103956989A (en) * | 2014-05-23 | 2014-07-30 | 武汉大学 | Multimode multiband reconfigurable Gm-C complex filter |
| CN110365308A (en) * | 2019-07-05 | 2019-10-22 | 浙江大学 | A kind of tunable Active RC bandpass filter based on II type of Chebyshev |
| CN111371423A (en) * | 2020-05-27 | 2020-07-03 | 深圳市南方硅谷半导体有限公司 | Anti-aliasing filter and signal receiving circuit |
Non-Patent Citations (1)
| Title |
|---|
| 陈春良等: "信号数字处理中抗混滤波器的技术指标分析及其设计", 装甲兵工程学院学报, vol. 8, no. 1, 31 December 1994 (1994-12-31), pages 108 - 115 * |
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