CN115017062A - Method, system, device and medium for optimizing terminal memory - Google Patents
Method, system, device and medium for optimizing terminal memory Download PDFInfo
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- CN115017062A CN115017062A CN202210867503.3A CN202210867503A CN115017062A CN 115017062 A CN115017062 A CN 115017062A CN 202210867503 A CN202210867503 A CN 202210867503A CN 115017062 A CN115017062 A CN 115017062A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
- G06F12/023—Free address space management
- G06F12/0253—Garbage collection, i.e. reclamation of unreferenced memory
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F8/00—Arrangements for software engineering
- G06F8/60—Software deployment
- G06F8/65—Updates
- G06F8/658—Incremental updates; Differential updates
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D30/00—Reducing energy consumption in communication networks
- Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks
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Abstract
The invention provides a method, a system, equipment and a medium for optimizing a terminal memory, wherein a linked list is established as a mapping table of a sector, a timer task is started, and the use condition of an initial memory space is calculated; analyzing the received differential packet to obtain upgrade patch information; recording the patch information into a mapping table, reading the upgrade patch information through a U8 type array, integrating the upgrade patch information with corresponding firmware information, verifying the integration information with the mapping table, writing the upgrade patch if the patch information in the mapping table is consistent with the integration information, otherwise, not writing the upgrade patch; updating and writing the upgrade patch information in the mapping table, releasing the upgrade patch information recorded in the mapping table, and completing terminal memory optimization; according to the method and the device, only the difference information is transmitted by comparing the difference information of the upgrading package and integrated with the meta-firmware information, so that the package size of the OTA can be obviously reduced, the upgrading speed is accelerated, the energy consumption is reduced, the communication resources are saved, and the requirement of using under an embedded platform is met.
Description
Technical Field
The invention belongs to the technical field of intelligent warehousing, and particularly relates to a method, a system, equipment and a medium for optimizing a terminal memory.
Background
With the progress of communication technology in recent years, the internet of things has become a trend, and of the demands of numerous networking applications, more than 95% of the internet of things are narrow-band internet of things, such as the traditional GPRS mode and the currently popular NBIOT technology,
most of narrow-band application equipment resources are limited, the computing power is weak, the program operation and storage space is small, but with the change of application end services, the corresponding software programs of these devices, known as OTA, need to be updated, which is contradictory to the narrow band of the network transmission, the need for a differential packet OTA is therefore evident in this type of application, which can significantly reduce the OTA packet size, speed up upgrades, reduce power consumption, save communication resources, and in addition, because there is no operating system schedule in the firmware storage, therefore, the traditional memory optimization method cannot be used in an embedded platform with limited resources, cannot realize dynamic optimization of the ROM when the firmware is updated differentially, can only store the firmware in a fixed address, cannot automatically adjust according to the size of a program, and can cause resource waste in the limited ROM.
Disclosure of Invention
Aiming at the problems in the prior art, the invention provides a method, a system, equipment and a medium for optimizing a terminal memory, wherein the size of an updated firmware packet is obtained by analyzing firmware information carried by a differential upgrade packet, and then the storage position of the firmware packet is adjusted according to the size of the firmware packet and ROM space information, so that fragment space is released, and dynamic optimization of the memory is realized.
The invention is realized by the following technical scheme:
a method for optimizing a terminal memory comprises the following steps:
s1: creating a linked list as a mapping table of a sector, starting a timer task, and calculating the use condition of an initial memory space;
s2: analyzing the received differential packet to obtain upgrade patch information;
s3: recording the patch information into a mapping table, reading the upgrade patch information through a U8 type array, integrating the upgrade patch information with corresponding firmware information, verifying the integration information with the mapping table, writing the upgrade patch if the patch information in the mapping table is consistent with the integration information, otherwise, not writing the upgrade patch;
s4: and updating and writing the upgrade patch information in the mapping table, releasing the upgrade patch information recorded in the mapping table, and completing terminal memory optimization.
Further, the mapping table in step S1 reads the information of the storage device by starting the system, and then obtains the capacity of the device through the information, encapsulates the capacity, the device number, the used space, the base address of each sector, and the offset address into a bidirectional linked list for summarizing, and obtains the mapping table of the stored physical space and the stored program space through the management of the linked list nodes and the offset addresses.
Further, the mapping table in step S1 is used to store the initial partition information and file storage information inside the system.
Further, the initial memory space usage in step S1 includes a total size of the initial memory space, a size of the used space, and a size of the remaining space.
Further, the upgrade patch information in step S2 includes an upgrade patch, a size of the upgrade firmware, and a version of the firmware package.
Further, the upgrade patch information read from the U8 type array in step S3 is upgrade firmware information, and the upgrade firmware information read from the U8 type array is added to the data of the upgrade patch and then compared with the patch information in the mapping table.
Further, the upgrade patch is written into the storage address of the firmware in step S3.
A system for optimizing terminal memory comprises
The mapping table acquisition module is used for creating a linked list as a mapping table of a sector, starting a timer task and calculating the use condition of an initial memory space;
the upgrade patch information acquisition module is used for analyzing the received differential packet to acquire upgrade patch information;
the firmware upgrading module is used for recording the patch information into the mapping table, reading the upgrading patch information through the U8 type array, verifying the upgrading patch information with the mapping table, and writing the upgrading patch if the patch information in the mapping table is consistent with the upgrading patch information read by the U8 type array;
and the mapping table updating module is used for updating and writing the upgrade patch information in the mapping table, releasing the upgrade patch information recorded in the mapping table and finishing the terminal memory optimization.
A computer device comprising a memory, a processor and a computer program stored in said memory and executable on said processor, said processor implementing the steps of the method as a terminal memory optimization when executing said computer program.
A computer-readable storage medium, in which a computer program is stored which, when being executed by a processor, carries out the steps of the method as a terminal memory optimization.
Compared with the prior art, the invention has the following beneficial technical effects:
the invention provides a method, a system, equipment and a medium for optimizing a terminal memory, wherein a linked list is established as a mapping table of a sector, a timer task is started, and the use condition of an initial memory space is calculated; analyzing the received differential packet to obtain upgrade patch information; recording the patch information into a mapping table, reading the upgrade patch information through a U8 type array, integrating the upgrade patch information with corresponding firmware information, verifying the integration information with the mapping table, writing the upgrade patch if the patch information in the mapping table is consistent with the integration information, otherwise, not writing the upgrade patch; updating and writing the upgrade patch information in the mapping table, releasing the upgrade patch information recorded in the mapping table, and completing terminal memory optimization; according to the method and the device, only the difference information is transmitted by comparing the difference information of the upgrading package and integrated with the meta-firmware information, so that the package size of the OTA can be obviously reduced, the upgrading speed is accelerated, the energy consumption is reduced, the communication resources are saved, and the requirement of using under an embedded platform is met.
Drawings
Fig. 1 is a flowchart of a method for optimizing a terminal memory according to the present invention.
Detailed Description
The present invention will now be described in further detail with reference to specific examples, which are intended to be illustrative, but not limiting, of the invention.
In order to make the technical solutions of the present invention better understood, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
It should be noted that the terms "first," "second," and the like in the description and claims of the present invention and in the drawings described above are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used is interchangeable under appropriate circumstances such that the embodiments of the invention described herein are capable of operation in sequences other than those illustrated or described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
The present invention provides
A method for optimizing a terminal memory is characterized by comprising the following steps:
s1: creating a linked list as a mapping table of a sector, starting a timer task, and calculating the use condition of an initial memory space;
s2: analyzing the received differential packet to obtain upgrade patch information;
s3: recording the patch information into a mapping table, reading the upgrade patch information through a U8 type array, integrating the upgrade patch information with corresponding firmware information, verifying the integration information with the mapping table, writing the upgrade patch if the patch information in the mapping table is consistent with the integration information, otherwise, not writing the upgrade patch;
s4: updating and writing the upgrade patch information in the mapping table, releasing the upgrade patch information recorded in the mapping table, and completing the terminal memory optimization.
Preferably, in the mapping table in step S1, the system is started to read information of the storage device, and then the capacity of the device is obtained through the information, the capacity, the device number, the used space, and the base address and offset address of each sector are encapsulated in a doubly linked list to be summarized, and the mapping table of the stored physical space and the stored program space is obtained through management of the linked list nodes and the offset addresses. Further, the mapping table in step S1 is used to store the initial partition information and file storage information inside the system. Further, the initial memory space usage in step S1 includes a total size of the initial memory space, a size of the used space, and a size of the remaining space.
Preferably, the upgrade patch information in step S2 includes an upgrade patch, a size of the upgrade firmware, and a version of the firmware package. Further, the upgrade patch information read from the U8 type array in step S3 is upgrade firmware information, and the upgrade firmware information read from the U8 type array is added to the data of the upgrade patch and then compared with the patch information in the mapping table.
Preferably, the upgrade patch in step S3 is written into a specific firmware storage address based on the mapping table information.
The invention provides a preferred embodiment, after the system is started, a linked list is created as a mapping table of sectors for storing partition information and file storage information in the current system, a timer task is started firstly for obtaining and calculating the total size Rom _ Len of the current memory space, the size Used _ Len of the Used space, the size Remaining _ Len of the Remaining space, a message receiving task is started for applying for heap memory Bin _ Buff for storing received data, after receiving an upgraded difference packet, the difference packet is analyzed to obtain an upgraded Patch Updata _ Patch, the size New _ Bin _ Len of the upgraded firmware and the Version Bin _ Version of the firmware packet, then the address stored in the current firmware and the size Bin _ Len thereof are obtained from the mapping table, the firmware data are read out by using a U8 type array, the firmware data and Patch data are added to obtain a New firmware size Call _ Bin _ Len, if the size of the call _ Bin _ Len is equal to the size of the upgraded firmware New _ Bin _ Len, the upgrade check is passed, then a New firmware packet is written into a storage address New _ Bin _ Adder of the firmware, after the storage is finished, the address and the size of the updated firmware are stored in a mapping table, meanwhile, the cache space is emptied, occupied nodes in the mapping table are released, and the dynamic optimization of the upgrading process is finished.
The invention provides another preferred embodiment as follows:
a1: reading the storage information, creating a mapping table and entering an upgrading state;
a2: starting a timer task, and acquiring memory information at regular time;
a3: the equipment to be upgraded receives the command and enters an upgrading state;
a4: acquiring the total space size ROM _ Len of the ROM, the Used space size Used _ Len and the size Bin _ Len of the firmware to be upgraded from a mapping table;
a5: calculating the Remaining ROM space size Remaining _ Len;
a6: applying for a new heap memory Rev _ Buff, and storing the received differential upgrade packet;
a7: analyzing the differential upgrade package, and acquiring an upgrade Patch UpData _ Patch, the size New _ Bin _ Len of the upgrade firmware and the Version Bin _ Version of the firmware package;
a8: applying for a new heap space Bin _ Buff, and copying the firmware to be upgraded into the Bin _ Buff;
a9: printing an upgrade Patch UpData _ Patch on the firmware to be upgraded in the Bin _ Buff to generate new firmware, and calculating the length of the new firmware, namely, the Call _ Bin _ Len;
a10: calculating a storage address New _ Bin _ Adder of the New firmware by comparing the size New _ Bin _ Len of the New firmware, the size Bin _ Len of the firmware to be upgraded and the Used _ Len;
a11: comparing the newly generated firmware length called _ Bin _ Len with the upgraded firmware size New _ Bin _ Len, and verifying the New firmware;
a12: copying the New firmware in the Bin _ Buff after passing the verification to a New firmware storage address New _ Bin _ Adder, wherein the copying length is New _ Bin _ Len;
a13: releasing the applied stack space Bin _ Buff and Rev _ Buff;
a14: calculating a New ROM use space New _ Used _ Len and a New residual ROM space size New _ Remaining _ Len;
a15: the New ROM usage space New _ Used _ Len and the New Remaining ROM space size New _ Remaining _ Len are updated into the mapping table.
The invention provides a system for optimizing terminal memory, which comprises
The mapping table acquisition module is used for creating a linked list as a mapping table of a sector, starting a timer task and calculating the use condition of an initial memory space;
the upgrade patch information acquisition module is used for analyzing the received differential packet to acquire upgrade patch information;
the firmware upgrading module is used for recording the patch information into the mapping table, reading the upgrading patch information through the U8 type array, verifying the upgrading patch information with the mapping table, and writing the upgrading patch if the patch information in the mapping table is consistent with the upgrading patch information read by the U8 type array;
and the mapping table updating module is used for updating and writing the upgrade patch information in the mapping table, releasing the upgrade patch information recorded in the mapping table and finishing the terminal memory optimization.
In yet another embodiment of the present invention, a computer device is provided that includes a processor and a memory for storing a computer program comprising program instructions, the processor for executing the program instructions stored by the computer storage medium. The Processor may be a Central Processing Unit (CPU), or may be other general-purpose Processor, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), an off-the-shelf Programmable gate array (FPGA) or other Programmable logic device, a discrete gate or transistor logic device, a discrete hardware component, etc., which is a computing core and a control core of the terminal, and is specifically adapted to load and execute one or more instructions in a computer storage medium to implement a corresponding method flow or a corresponding function; the processor of the embodiment of the invention can be used for the operation of the method for optimizing the terminal memory.
In yet another embodiment of the present invention, the present invention further provides a storage medium, specifically a computer-readable storage medium (Memory), which is a Memory device in a computer device and is used for storing programs and data. It is understood that the computer readable storage medium herein can include both built-in storage media in the computer device and, of course, extended storage media supported by the computer device. The computer-readable storage medium provides a storage space storing an operating system of the terminal. Also, one or more instructions, which may be one or more computer programs (including program code), are stored in the memory space and are adapted to be loaded and executed by the processor. It should be noted that the computer-readable storage medium may be a high-speed RAM memory, or may be a non-volatile memory (non-volatile memory), such as at least one disk memory. One or more instructions stored in the computer-readable storage medium may be loaded and executed by a processor to implement the corresponding steps of the method for optimizing the terminal memory in the foregoing embodiments.
As will be appreciated by one skilled in the art, embodiments of the present invention may be provided as a method, system, or computer program product. Accordingly, the present invention may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present invention may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.
The present invention is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present invention.
Claims (10)
1. A method for optimizing a terminal memory is characterized by comprising the following steps:
s1: creating a linked list as a mapping table of a sector, starting a timer task, and calculating the use condition of an initial memory space;
s2: analyzing the received differential packet to obtain upgrade patch information;
s3: recording the patch information into a mapping table, reading the upgrade patch information through a U8 type array, integrating the upgrade patch information with corresponding firmware information, verifying the integration information with the mapping table, writing the upgrade patch if the patch information in the mapping table is consistent with the integration information, otherwise, not writing the upgrade patch;
s4: updating and writing the upgrade patch information in the mapping table, releasing the upgrade patch information recorded in the mapping table, and completing the terminal memory optimization.
2. The method for optimizing the memory of the terminal according to claim 1, wherein the mapping table in step S1 is obtained by starting a system to read information of a storage device, obtaining the capacity of the device through the information, encapsulating the capacity, the device number, the used space, and the base address and the offset address of each sector into a doubly linked list, and managing the nodes and the offset addresses of the linked list to obtain the mapping table of the stored physical space and the stored program space.
3. The method according to claim 1, wherein the mapping table in step S1 is used to store initial partition information and file storage information inside the system.
4. The method according to claim 1, wherein the initial memory space usage in step S1 includes a total size of the initial memory space, a size of the used space, and a size of the remaining space.
5. The method for optimizing terminal memory according to claim 1, wherein the upgrade patch information in step S2 includes an upgrade patch, a size of the upgrade firmware, and a version of the firmware package.
6. The method of claim 5, wherein the upgrade patch information read from the U8 type array in step S3 is upgrade firmware information, and the upgrade firmware information read from the U8 type array is added to the data of the upgrade patch and then compared with the patch information in the mapping table.
7. The method for optimizing terminal memory according to claim 1, wherein the upgrade patch is written into a storage address of the firmware in step S3.
8. A system for optimizing terminal memory, based on any one of claims 1-7, comprising
The mapping table acquisition module is used for creating a linked list as a mapping table of a sector, starting a timer task and calculating the use condition of an initial memory space;
the upgrade patch information acquisition module is used for analyzing the received differential packet to acquire upgrade patch information;
the firmware upgrading module is used for recording the patch information into the mapping table, reading the upgrading patch information through the U8 type array, verifying the upgrading patch information with the mapping table, and writing the upgrading patch if the patch information in the mapping table is consistent with the upgrading patch information read by the U8 type array;
and the mapping table updating module is used for updating and writing the upgrade patch information in the mapping table, releasing the upgrade patch information recorded in the mapping table and finishing the terminal memory optimization.
9. A computer device comprising a memory, a processor and a computer program stored in the memory and executable on the processor, wherein the processor implements the steps of a method for memory optimization of a terminal as claimed in any one of claims 1 to 7 when executing the computer program.
10. A computer-readable storage medium, in which a computer program is stored, which, when being executed by a processor, carries out the steps of a method for terminal memory optimization according to any one of claims 1 to 7.
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
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CN116909937A (en) * | 2023-05-11 | 2023-10-20 | 深圳三地一芯电子股份有限公司 | Flash memory capacity optimization method, device, equipment and storage medium |
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
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CN116909937A (en) * | 2023-05-11 | 2023-10-20 | 深圳三地一芯电子股份有限公司 | Flash memory capacity optimization method, device, equipment and storage medium |
CN116909937B (en) * | 2023-05-11 | 2024-02-23 | 深圳三地一芯电子股份有限公司 | Flash memory capacity optimization method, device, equipment and storage medium |
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