Detailed Description
In order to make the technical solutions of the present application better understood by those skilled in the art, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
The terms "first," "second," and the like in the description and claims of the present application and in the above-described drawings are used for distinguishing between different objects and not for describing a particular order. Furthermore, the terms "include" and "have," as well as any variations thereof, are intended to cover non-exclusive inclusions. For example, a process, method, system, article, or apparatus that comprises a list of steps or elements is not limited to only those steps or elements listed, but may alternatively include other steps or elements not listed, or inherent to such process, method, article, or apparatus.
Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of the application. The appearances of the phrase in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. It is explicitly and implicitly understood by one skilled in the art that the embodiments described herein may be combined with other embodiments.
For better understanding of the purpose, structure and function of the present application, prior to explaining the control circuit for ripple current of the common dc bus capacitor provided in the present application, the related art will be explained first.
In fields such as UPS and converter, all there is a common DC bus among the circuit topological structure of three-phase common DC bus converter, and this common DC bus will bear great high frequency ripple current, and under normal conditions, this high frequency ripple current can be absorbed by common DC bus electric capacity, nevertheless because common DC bus electric capacity bears great high frequency ripple current for a long time, lead to the electric capacity loss big, and the temperature is high, influences the electric capacity life-span, consequently, the high frequency ripple current of control common DC bus electric capacity is crucial to the converter.
In order to control the high-frequency ripple current on the common dc bus capacitor in the related art, the first method is implemented by referring to fig. 1, where fig. 1 is a schematic diagram of a circuit structure in which a plurality of inductors are connected in series in the related art, and the high-frequency ripple current on the common dc bus is suppressed by connecting the inductors in series in the common dc bus. And in the second mode, two inverters exist in the converter, and the two bus currents respectively show the sequence of low, medium and high, medium and low by changing the switching sequence of the two inverters, so that the total ripple current after the two direct current bus currents are superposed is reduced. And setting a fixed phase shift angle such as 90 degrees or 0 degrees for the carrier waves of the modulated waves of the two inverters to suppress ripple current on the common direct current bus. However, the introduction of the inductor in the first mode at least has a problem of increasing the cost, and the second and third modes may have a problem of increasing the ripple current and increasing the power consumption due to the influence of the power factor by changing the switching sequence of the inverter or taking a fixed phase shift angle. .
Fig. 2 to 5 are schematic diagrams of circuit topologies of four different common dc bus converters provided in an embodiment of the present application, and the embodiment of the present application provides a control circuit for bus capacitor ripple current in a common dc bus converter, which is used to control a circuit topology of a three-phase common dc bus converter.
Referring to fig. 6, fig. 6 is a schematic structural diagram illustrating a control circuit for a bus capacitor ripple current in a common dc bus converter according to an embodiment of the present application, where the control circuit 100 for the bus capacitor ripple current in the common dc bus converter includes:
carrier signal generating unit 10, first converter control unit 20, second converter control unit 30, first converter 40 and second converter 50 being connected to the same dc bus (not shown in the figure), wherein,
the output end of the carrier signal generating unit 10 is connected to the input end of the first converter control unit 20 and the input end of the second converter control unit 30, respectively, the output end of the first converter control unit 20 is connected to the first converter 40, and the output end of the second converter control unit 30 is connected to the second converter 50;
the carrier signal generating unit 10 generates a target carrier signal according to a dc bus voltage signal or a dc bus capacitance current signal of a dc bus and a reference carrier signal;
the first inverter control unit 20 generates a first control signal for controlling the switching of the switching tube in the first inverter 40 according to a first carrier signal among a first voltage signal of the three-phase alternating voltage, a first current signal of the three-phase current, a direct-current bus voltage signal, and a target carrier signal of the first inverter 40;
the second inverter control unit 30 generates a second control signal for controlling the switching of the switching tube in the second inverter 50, based on the second voltage signal of the three-phase ac voltage, the second current signal of the three-phase current, and the second carrier signal of the target carrier signal in the second inverter 50.
In the embodiment of the application, the DC bus voltage signal V in the control circuit dc DC bus capacitance current signal i dc A first voltage signal V of the three-phase AC voltage of the first inverter 40 1ABC And a first current signal V of three-phase current 1ABC And a second voltage signal V of the three-phase AC voltage of the second converter 50 2ABC Second current signal i of three-phase current 2ABC The acquisition can be directly carried out through an acquisition unit or can be obtained through calculation. Here, the collecting unit includes, but is not limited to, various devices capable of collecting signals, such as a voltmeter and an ammeter, of a voltage collecting unit and/or a current collecting unit.
In this embodiment of the application, the target carrier signal includes at least two carrier signals, and the two carrier signals may be the same or different, and it should be noted that the target carrier signal includes a reference carrier signal, and certainly, the target carrier signal may not include the reference carrier signal. Here, reference carrier signal C o May be a triangular wave, reference carrier signal C o Or may be a sawtooth wave.
According to the method, on the basis of no need of adding hardware, a plurality of control signals are generated based on a target carrier signal obtained by a carrier signal generation unit according to a direct current bus voltage signal or a direct current bus capacitance current signal obtained at the current moment and a reference carrier signal, so that at least two converters work cooperatively, the common direct current bus capacitance ripple current of the at least two converters is reduced, the self-loss of a direct current bus capacitance is reduced, the service life of the capacitance is prolonged, the reliability of a system is ensured, and the efficiency of the converters is improved; meanwhile, due to the reduction of the current ripple of the direct current bus capacitor, the normal and reliable operation of the converter can be met without connecting more capacitors in parallel, the cost of the capacitors is reduced, and further, less capacitors are connected in parallel to ensure the current tolerance capability, so that the capacitance volume of the bus is effectively reduced.
In some embodiments, referring to fig. 7, fig. 7 is a schematic structural diagram illustrating a control circuit of a bus capacitor ripple current in another common-direct-current bus converter provided in an embodiment of the present application, where the first converter control unit 20 includes: a first modulation signal generation unit 201 and a first modulation unit 202, wherein,
the output end of the first modulation signal generation unit 201 is connected with the input end of the first modulation unit 202, and the output end of the first modulation unit 202 is connected with the first converter 40;
the first modulation signal generation unit 201 generates a first modulation signal according to a first voltage signal, a first current signal and a direct current bus voltage signal, and the first modulation unit 202 generates a first control signal according to the first modulation signal and a first carrier signal;
the second inverter control unit 30 includes: a second modulation signal generation unit 301 and a second modulation unit 302, wherein an output end of the second modulation signal generation unit 301 is connected with an input end of the second modulation unit 302, and an output end of the second modulation unit 302 is connected with the second converter 50;
the second modulation signal generation unit 301 generates a second modulation signal according to the second voltage signal and the second current signal, and one of the dc bus voltage signal or the rotational speed or the position of the motor rotor, and the second modulation unit 302 generates a second control signal according to the second modulation signal and the second carrier signal;
the carrier signal generation unit 10 includes: a phase shift angle processing unit 101 and a carrier wave processing unit 102, wherein,
the output end of the phase shift angle processing unit 101 is connected with the input end of the carrier processing unit 102, the first output end of the carrier processing unit 102 is connected with the input end of the first modulation unit 202, and the second output end of the carrier processing unit 102 is connected with the input end of the second modulation unit 302;
the phase shift angle processing unit 101 generates a phase shift angle according to a dc bus voltage signal or a dc bus capacitance current signal, and the carrier processing unit 102 generates a target carrier signal according to the phase shift angle and a reference carrier signal.
In this embodiment, a first output terminal of the carrier processing unit 102 is configured to output a first carrier signal in the target carrier signal, and a second output terminal of the carrier processing unit 102 is configured to output a second carrier signal in the target carrier signal.
In this embodiment, the phase shift angle processing unit 101 may be a proportional controller, the phase shift angle processing unit 101 may also be a proportional-integral controller, and the phase shift angle processing unit 101 may also be a proportional-quasi-integral controller. Of course, the phase shift angle processing unit 101 can be used to convert the DC bus voltage signal V by, for example, disturbance observation or conductance increment dc Or DC bus capacitance current signal i dc Processing is performed to generate an optimal phase shift angle.
In the embodiment of the present application, the phase shift angle is dynamically obtained based on a dc bus voltage signal or a dc bus capacitance current signal, and a value range of the dynamic phase shift angle is [ -pi, pi ], that is, the phase shift angle may be 0, the phase shift angle may also be-pi, the phase shift angle may also be pi, and of course, the phase shift angle may also be any value of [ -pi, pi ], which is not particularly limited in this application. It should be noted that, when the phase shift angle is 0, the target carrier signal is the reference carrier signal, that is, any two carrier signals in the target carrier signal are the same. When the phase shift angle is not 0, if the target carrier signal includes two carrier signals, namely a first carrier signal and a second carrier signal, and the first carrier signal is different from the second carrier signal, it should be noted that one of the first carrier signal and the second carrier signal may be a reference carrier signal, and both the first carrier signal and the second carrier signal may not be reference carrier signals, as long as the phase difference between the first carrier signal and the second carrier signal is the phase shift angle. Therefore, the loss of the direct current bus capacitor is reduced, the service life of the capacitor is prolonged, the reliability of the system is guaranteed, and meanwhile the efficiency of the converter is improved.
In one implementation scenario, the control circuit passes the DC bus voltage signal V input to the phase shift
angle processing unit 101
dc Or DC bus capacitance current signal i
dc Generating a phase shift angle
And further based on the phase shift angle by the
carrier processing unit 102
For reference carrier signal C
o And performing phase shift processing to generate a target carrier signal. Further, the control circuit combines the target carrier signal with the generated modulation signal m
ABC Are compared to generate a control signal S
ABC To drive the switching tubes in the respective inverter. Wherein the modulation signal m
ABC Comprising a first modulated signal m
1ABC And a second modulation signal m
2ABC Control signal S
ABC Comprising a first control signal S
1ABC And a second control signal S
2ABC (ii) a A first control signal S
1ABC Including a signal for controlling each switching transistor in the
first converter 40, e.g. the signal S when the first converter and the second converter have a three-phase H-bridge circuit topology
1A1 Signal S
1B1 Signal S
1C1 Signal S
1A2 Signal S
1B2 And a signal S
1C2 . Second control signal S
2ABC Including the signal controlling each switching transistor in the
second converter 50, i.e. including the signal S
2A1 Signal S
2B1 Signal S
2C1 Signal S
2A2 Signal S
2B2 And a signal S
2C2 . When the topology is different types such as DNPC and ANPC, the corresponding control signal can also be generated.
It should be noted that the phase shift angle is based on the DC bus voltage signal V dc Or DC bus capacitance current signal i dc And a DC bus voltage signal V dc Or DC bus capacitance current signal i dc Is affected by the Power Factor (PF) and the modulation factor. Referring to fig. 8, a in fig. 8 is a schematic diagram illustrating the result of the dc bus capacitance current signal and the phase shift angle when the power factor PF is 1 in the embodiment of the present application;
b in FIG. 8 is a schematic diagram showing the result of the DC bus capacitance current signal and the phase shift angle when the power factor PF is 0 in the embodiment of the present application; therefore, a dynamic phase shift angle is determined through a direct current bus voltage signal or a direct current bus capacitor current signal, a plurality of control signals are generated according to the dynamic phase shift angle and a reference carrier signal, so that at least two converters work cooperatively according to respective control signals, the direct current bus capacitor ripple current of the at least two converters is reduced, the self loss of a direct current bus capacitor is reduced, the service life of the capacitor is prolonged, the reliability of a system is ensured, and the efficiency of the converter is improved; meanwhile, due to the reduction of the current ripple of the direct current bus capacitor, the normal and reliable operation of the converter can be met without connecting more capacitors in parallel, the cost of the capacitors is reduced, and further, the current tolerance capacity is ensured by connecting less capacitors in parallel, and the capacitance volume of the bus is effectively reduced.
In other embodiments of the present application, the phase shift angle is based on the DC bus voltage signal V dc Or DC bus capacitance current signal i dc Obtained, and DC bus voltage signal V dc Or DC bus capacitance current signal i dc Influenced by the power factor and the modulation coefficient, the phase shift angle determined under different values of the apparent power, the power factor and the modulation coefficient can be obtained through off-line calculation, and a relational mapping table is established; furthermore, according to the current actual operation condition parameters, namely apparent power, power factor and modulation coefficient, the relational mapping table is searched to obtain the optimal phase shift angle, thereby achieving the purpose of obtaining the optimal phase shift angleThe purpose of suppressing the current ripple of the direct current bus capacitor is achieved.
In other embodiments of the present application, in a case where the first converter is a grid-side rectifier and the second converter is a motor-side inverter, the second modulation signal generation unit generates the second modulation signal according to the second voltage signal, the second current signal, and a rotation speed or a position of a rotor of the motor. In one implementation scenario, referring to fig. 3, for the schematic circuit topology of the three-phase common-direct-current bus converter shown in fig. 3, the second modulation signal m is determined 2ABC The control circuit generates a second voltage signal V by inputting the second voltage signal V to the modulation signal generating unit 2ABC A second current signal i 2ABC And the speed n or position theta of the motor rotor.
In another embodiment of the present application, in a case where the first converter is a grid-side rectifier and the second converter is a load-side inverter, the second modulation signal generating unit generates the second modulation signal according to the second voltage signal, the second current signal, and the dc bus voltage signal. In an implementation scenario, referring to fig. 2, for the schematic circuit topology of the three-phase common-direct-current bus converter shown in fig. 2, in the case that the first converter is determined to be the grid-side rectifier and the second converter is determined to be the load-side inverter, the second modulation signal m is 2ABC Is generated by a second voltage signal V input to the modulation signal generating unit 2ABC A second current signal i 2ABC And DC bus voltage signal V dc And (4) obtaining the product.
In other embodiments of the present application, in a case where the first converter is a grid-side rectifier and the second converter is a motor-side inverter, the second modulation signal generation unit generates the second modulation signal according to the second voltage signal, the second current signal, and a rotation speed or a position of a rotor of the motor. In one implementation scenario, for the circuit topology diagram of the three-phase common-direct-current bus converter shown in fig. 3, in the case that the first converter is determined to be the grid-side rectifier and the second converter is determined to be the motor-side inverter, the second modulation signal m 2ABC Is generated by a second voltage signal V input to the modulation signal generating unit 2ABC The first stepTwo current signals i 2ABC And the speed n or position theta of the motor rotor.
In other embodiments of the present application, for the schematic circuit topologies of the three-phase common-direct-current bus converter shown in fig. 4 and 5, the first voltage signal may be the voltage signal V of the three-phase alternating-current voltage of the first converter 40 1ABC The first voltage signal may also be an alternating voltage signal V provided by a power supply gABC The second voltage signal may be a voltage signal V of a three-phase ac voltage of the second converter 50 2ABC The second voltage signal may also be an alternating voltage signal V provided by a power supply gABC 。
As can be seen from the above, the control circuit determines a dynamic phase shift angle based on the dc bus voltage signal or the dc bus capacitance current signal at the present time, and further obtains a plurality of target carrier signals generated based on the dynamic phase shift angle and the reference carrier signal, where any two carrier signals in the plurality of target carrier signals are different; finally, based on the target carrier signals, generating a plurality of control signals to enable the at least two converters to work cooperatively according to respective control signals, so that ripple current of a common direct current bus capacitor of the at least two converters is reduced, self loss of the direct current bus capacitor is reduced, the service life of the capacitor is prolonged, the reliability of a system is guaranteed, and meanwhile, the efficiency of the converter is improved; meanwhile, due to the reduction of the current ripple of the direct current bus capacitor, the normal and reliable operation of the converter can be met without connecting more capacitors in parallel, the cost of the capacitors is reduced, and further, less capacitors are connected in parallel to ensure the current tolerance capability, so that the capacitance volume of the bus is effectively reduced.
In some embodiments, one of the first converter and the second converter in the control circuit of the bus capacitor ripple current in the common dc bus converter is a grid-side rectifier, and the other is a load-side inverter, where the first converter is a grid-side rectifier and the second converter is a load-side inverter, as shown in fig. 9, fig. 9 is a schematic structural diagram of a control circuit of the bus capacitor ripple current in a common dc bus converter provided in an embodiment of the present application, where the first converter 40 in the control circuit 100 of the bus capacitor ripple current in the common dc bus converter is a grid-side rectifier, the second converter 50 is a load-side inverter, and the control circuit 100 further includes: the reactive injection unit 60 is provided, among others,
the output end of the reactive injection unit 60 is connected with the input end of the first modulation signal generation unit 201;
the reactive power injection unit 60 determines the reactive power of the load-side inverter 50 according to the second voltage signal and the second current signal, and adjusts the amplitude of the first voltage signal and/or the amplitude of the first current signal based on the reactive power, so that the first converter control unit 20 controls the grid-side rectifier based on the adjusted first voltage signal and/or the adjusted first current signal.
In the embodiment of the present application, the reactive injection unit 60 utilizes the second voltage signal V in the second converter 50 2ABC And a second current signal i 2ABC Determining whether or not reactive power Q is injected into second converter 50, and adjusting first voltage signal V in first converter 40 if it is determined that reactive power Q is injected into second converter 50 1ABC And/or the first current signal i 1ABC The same reactive power Q is injected into the first converter 40, so that the reactive power Q is injected into the grid-side rectifier on the basis of no need of adding hardware, thereby effectively inhibiting the high-frequency ripple current of the direct-current bus capacitor, reducing the self-loss of the direct-current bus capacitor, prolonging the service life of the capacitor, ensuring the reliability of the system, and simultaneously improving the efficiency of the converter; meanwhile, due to the reduction of the current ripple of the direct current bus capacitor, the normal and reliable operation of the converter can be met without connecting more capacitors in parallel, the cost of the capacitors is reduced, and further, less capacitors are connected in parallel to ensure the current tolerance capability, so that the capacitance volume of the bus is effectively reduced.
In some embodiments, the first converter 40 of the control circuit 100 for the ripple current of the bus capacitor in the common dc bus converter is an M-grid-side rectifier, and the second converter 50 is a load-side inverter, wherein,
the reactive injection unit 60 averages the reactive power according to the number of the network-side rectifiers to obtain an averaged reactive power, and adjusts the amplitude of the first voltage signal and/or the amplitude of the first current signal input to the mth first converter control unit based on the averaged reactive power, so that the mth first converter control unit controls the network-side rectifiers based on the adjusted first voltage signal and/or the adjusted first current signal, M is an integer greater than or equal to 1, and M is an integer greater than or equal to 1 and less than or equal to M.
In an embodiment of the present application, if the number of the load-side inverters is 1, after determining that the load-side inverters inject the reactive power, the reactive power injection unit 60 equally divides the reactive power injected in the load-side inverters according to the number of the grid-side rectifiers to obtain the equally divided reactive power, and adjusts the amplitude of the first voltage signal and/or the amplitude of the first current signal input to the first converter control unit 20 based on the equally divided reactive power; next, the first converter control unit 20 generates a new first modulation signal based on the adjusted first voltage signal and/or the adjusted first current signal, and generates a new first control signal based on the new first modulation signal and the target carrier signal to control the switching tube of the grid-side rectifier.
In another embodiment of the present application, if the number of the load-side inverters is N, the reactive power injection unit 60 determines that at least some of the N load-side inverters inject reactive power; acquiring a sum of reactive power injected by at least part of load inverters, dividing the sum of reactive power equally according to the number of the network side rectifiers to obtain the divided reactive power, and adjusting the amplitude of a first voltage signal and/or the amplitude of a first current signal input to an mth first converter control unit based on the divided reactive power; and then, the mth first converter control unit generates a new first modulation signal based on the adjusted first voltage signal and/or the adjusted first current signal, and generates a new first control signal based on the new first modulation signal and the target carrier signal to control the switching tube of the network-side rectifier.
It should be noted that, since extra loss is caused by injecting reactive power into the grid-side rectifier, after carrier phase shift control is adopted, if the suppression effect of the high-frequency ripple current satisfies the tolerance of the capacitor itself, extra reactive power is not injected.
In some embodiments, referring to fig. 10, fig. 10 is a schematic structural diagram illustrating a control circuit for a bus capacitor ripple current in a common-direct-current bus converter according to another embodiment of the present application, it should be noted that in this embodiment of the present application, the control circuit 100 may include the reactive injection unit 60, or may not include the reactive injection unit 60, and the control circuit 100 shown in fig. 10 is described as including the reactive injection unit 60. The first converter 40 of the control circuit 100 for the ripple current of the bus capacitor in the common dc bus converter is M grid-side rectifiers, and the second converter 50 is N load-side inverters, wherein,
the control circuit comprises M first converter control units and N second converter control units, wherein the M first converter control units comprise M first modulation signal generation units and M first modulation units, the N second converter control units comprise N second modulation signal generation units and N second modulation units, and M, N are integers which are more than or equal to 1,
the carrier processing unit 102 generates M + N first sub-phase shifting angles according to the phase shifting angles and the number M + N of the converters, and generates M + N target carrier signals based on each first sub-phase shifting angle and a reference carrier signal, wherein the phase difference of every two adjacent phase shifting angles in the first sub-phase shifting angles is equal;
the ith converter control unit in the M + N converters adopts the jth target carrier signal for modulation, i is an integer which is larger than or equal to 1 and smaller than or equal to M + N, j is an integer which is larger than or equal to 1 and smaller than or equal to M + N, and the M grid-side rectifiers and the N load-side inverters form the M + N converters.
In the embodiment of the application, the control circuit can be applied to a common direct current bus converter system consisting of 1 grid-side rectifier and 1 load-side inverter; the control circuit can be applied to a common direct current bus converter system consisting of at least two grid-side rectifiers and 1 load-side inverter; the control circuit can be applied to a common direct current bus converter system consisting of 1 grid-side rectifier and at least two load-side inverters; the control circuit can be applied to a common direct current bus converter system consisting of at least two grid-side rectifiers and at least two load-side inverters.
In the embodiment of the application, for a common dc bus converter system composed of N load-side inverters and M grid-side rectifiers, according to the number of converters, the phase shift angles obtained through dc bus capacitor current signals are equally divided to obtain M + N first sub-phase shift angles, and the carrier signals after phase shift in sequence and the modulation signals generated by each modulation signal generation unit are pulse-modulated one by one to obtain corresponding control signals, and the corresponding converters are respectively controlled by the control signals. It should be noted that the target carrier signal includes a plurality of carrier signals, and the same carrier signal may modulate different modulation signals, and of course, the same carrier signal may also modulate only one modulation signal, which is not limited in this application. Here, in the embodiment of the present application, only one modulation signal can be modulated by the same carrier signal. It should also be noted that each first inverter control unit in the control circuit is configured to control a corresponding first inverter, and each second inverter control unit is configured to control a corresponding second inverter.
In some embodiments, referring to fig. 11, fig. 11 is a schematic structural diagram of a control circuit for a bus capacitor ripple current in another common-direct-current bus converter provided in another embodiment of the present application, it should be noted that in this embodiment of the present application, the control circuit 100 may include the reactive injection unit 60, or may not include the reactive injection unit 60, and the control circuit 100 shown in fig. 11 is described as including the reactive injection unit 60. The first converter 40 of the control circuit 100 for the ripple current of the bus capacitor in the common dc bus converter is M grid-side rectifiers, and the second converter 50 is N load-side inverters, wherein,
the control circuit includes M first inverter control units including M first modulation signal generation units and M first modulation units, and N second inverter control units including N second modulation signal generation units and N second modulation units, and M, N are integers greater than or equal to 1, wherein,
under the condition that the target carrier signal comprises 1 first carrier signal and 1 second carrier signal, the M first converter control units are modulated by the first carrier signal, and the N second converter units are modulated by the second carrier signal.
In this embodiment, the phase shift angle processing unit 101 generates a phase shift angle based on a dc bus voltage signal or a dc bus capacitance current signal, and generates two target carrier signals, i.e., a first carrier signal and a second carrier signal, based on the phase shift angle and a reference carrier signal, and a phase difference between the first carrier signal and the second carrier signal is the phase shift angle. Furthermore, the M first converter control units are modulated by using the first carrier signal, and the N second converter units are modulated by using the second carrier signal. Therefore, the embodiment of the application modulates different modulation signals through the same carrier signal, reduces the number of generated carrier signals, and saves system computing resources.
In some embodiments, the first converter and the second converter in the control circuit of the bus capacitor ripple current in the common dc bus converter are each one of a grid-side rectifier, a grid-side inverter and a load-side inverter, and the total number of the first converter and the second converter is P, the control circuit includes P converter control units, the P converter control units include P modulation signal generation units and P modulation units, P is an integer greater than or equal to 2, wherein,
the carrier processing unit generates P second sub phase shifting angles according to the phase shifting angles and the total number P, and generates P target carrier signals based on each second sub phase shifting angle and the reference carrier signal, wherein the phase difference of every two adjacent phase shifting angles in the second sub phase shifting angles is equal.
In the embodiment of the application, for a common dc bus converter system composed of P network-side rectifiers, network-side inverters or load-side inverters, according to the total number P, the phase shift angles obtained through the dc bus capacitor current signals are equally divided to obtain P second sub-phase shift angles, and the carrier signals after phase shift in sequence and the modulation signals generated by each modulation signal generation unit are pulse-modulated one by one to obtain corresponding control signals, and the corresponding converters are respectively controlled by the control signals. It should be noted that the target carrier signal includes multiple carrier signals, and the same carrier signal may modulate different modulation signals, and certainly, the same carrier signal may also modulate only one modulation signal, which is not limited in this application. Here, in the embodiment of the present application, only one modulation signal can be modulated by the same carrier signal.
It should be noted that, because the load inverters in the converter system are parallel converters and the converter system performs power sharing among the plurality of load inverters, it is not necessary to perform reactive power injection, and only the carrier phase shift control is performed according to the high-frequency ripple current.
In some embodiments, referring to fig. 12, fig. 12 is a schematic structural diagram of another carrier signal generation unit provided in the embodiments of the present application, and the carrier signal generation unit 10 further includes: a root-mean-square processing unit 103, wherein,
the output end of the root mean square processing unit 103 is connected with the input end of the phase shifting angle processing unit 101;
the root-mean-square processing unit 103 obtains an effective value of the dc bus voltage signal or an effective value of the dc bus capacitance current signal according to the dc bus voltage signal or the dc bus capacitance current signal, so that the phase shift angle processing unit generates a phase shift angle according to the effective values.
In the embodiment of the present application, the rms processing unit 103 is configured to direct current bus voltage signal V dc Or a DC bus capacitance current signal i dc And performing root mean square calculation to obtain an effective value of the voltage signal of the direct current bus or an effective value of the capacitance current signal of the direct current bus, and further generating a phase shifting angle by the phase shifting angle processing unit 101 according to the input effective value. Thus, the obtained DC bus voltage signal or DC bus current signal is used to determineAnd fixing the dynamic phase shifting angle to generate a plurality of control signals according to the dynamic phase shifting angle and the reference carrier signal, so that the at least two converters work cooperatively according to respective control signals, and the direct current bus ripple capacitance current of the at least two converters is reduced.
In some embodiments, referring to fig. 13, fig. 13 is a schematic structural diagram of another carrier signal generation unit provided in the embodiments of the present application, and if a signal input to the root-mean-square processing unit 103 is a dc bus voltage signal, the carrier signal generation unit 10 further includes: the filter 104 may be implemented, among other things,
the output end of the filter 104 is connected with the input end of the root mean square processing unit 103;
the filter 104 is configured to obtain a high-frequency component of the dc bus voltage signal, so that the root-mean-square processing unit calculates an effective value of the dc bus voltage signal according to the high-frequency component of the dc bus voltage signal.
In the embodiment of the present application, the rms processing unit 103 is configured to direct current bus voltage signal V dc And performing Fourier decomposition to obtain effective values of each component of the high frequency, and adding the square of the effective values of different frequencies with the root to obtain the effective values of all the high frequency components.
In this application embodiment, because direct current busbar voltage signal is that direct current voltage component and high frequency alternating voltage component constitute, direct current busbar voltage signal's high frequency voltage component just corresponds with high frequency ripple current, consequently, need obtain the high frequency component of direct current busbar voltage signal through the wave filter in order to be used for the size of characterization ripple current. Thus, a dynamic phase shift angle is determined through the acquired high-frequency component of the direct current bus voltage signal; and then according to the dynamic phase shift angle and the reference carrier signal, generating a plurality of control signals so that the at least two converters work cooperatively according to respective control signals, thereby reducing the ripple current of the direct current bus capacitor of the at least two converters.
An apparatus is provided in the embodiment of the present application, referring to fig. 14, fig. 14 is a schematic structural diagram of the apparatus in the embodiment of the present application, and an apparatus 200 shown in fig. 14 includes a control circuit 100 for bus capacitor ripple current in any one of the common dc bus converters provided in fig. 6 to 7 and 9 to 13 shown in the above embodiments.
The device 200 in the present application is a device having a power conversion function, and the device may be a frequency converter or a UPS device, the frequency converter controls a power control device of an ac motor by changing a working power frequency of a motor, and the UPS device is a device of a constant voltage and constant frequency UPS having an inverter as a main component and having an energy storage function; the frequency converter includes but is not limited to air conditioning equipment and refrigerator equipment.
As will be appreciated by one skilled in the art, embodiments of the present application may be provided as a method, system, or computer program product. Accordingly, the present application may take the form of a hardware embodiment, a software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, optical storage, and the like) having computer-usable program code embodied therein.
The present application is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the application. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
The above description is only for the preferred embodiment of the present application, and is not intended to limit the scope of the present application.