CN1149941A - Multiple access up converter/modulator and method - Google Patents
Multiple access up converter/modulator and method Download PDFInfo
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- CN1149941A CN1149941A CN96190283A CN96190283A CN1149941A CN 1149941 A CN1149941 A CN 1149941A CN 96190283 A CN96190283 A CN 96190283A CN 96190283 A CN96190283 A CN 96190283A CN 1149941 A CN1149941 A CN 1149941A
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- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/0003—Software-defined radio [SDR] systems, i.e. systems wherein components typically implemented in hardware, e.g. filters or modulators/demodulators, are implented using software, e.g. by involving an AD or DA conversion stage such that at least part of the signal processing is performed in the digital domain
- H04B1/0007—Software-defined radio [SDR] systems, i.e. systems wherein components typically implemented in hardware, e.g. filters or modulators/demodulators, are implented using software, e.g. by involving an AD or DA conversion stage such that at least part of the signal processing is performed in the digital domain wherein the AD/DA conversion occurs at radiofrequency or intermediate frequency stage
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03C—MODULATION
- H03C3/00—Angle modulation
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/06—Receivers
- H04B1/16—Circuits
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- H04B—TRANSMISSION
- H04B7/00—Radio transmission systems, i.e. using radiation field
- H04B7/02—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas
- H04B7/04—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas
- H04B7/08—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas at the receiving station
- H04B7/0802—Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas at the receiving station using antenna selection
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/02—Arrangements for detecting or preventing errors in the information received by diversity reception
- H04L1/06—Arrangements for detecting or preventing errors in the information received by diversity reception using space diversity
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/22—Arrangements for detecting or preventing errors in the information received using redundant apparatus to increase reliability
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Abstract
A multiple access digital up converter/modulator includes selectors (1606, 1608) having inputs (1602, 1604) and outputs coupled to first and second interpolating filters (1610, 1626). The output of the first interpolating filter is selectively coupled to a first mixer (1612) and a first adder (1622), the first adder also receiving a first phase value and the output is coupled to a first phase accumulator (1616) the output of which is coupled to a first sinusoid generator (1614) and selectively coupled to a second sinusoid generator (1630). The output of each of the first and second mixers are selectively coupled to an output adder (1634) and to inputs of the first and second mixers. The output of the second interpolating filter (1626) is selectively coupled to a second mixer (1628) and a second adder (1638), which also receives a second phase value and the output of which is coupled to a second phase accumulator (1640) the output of which is selectively coupled to the second sinusoid generator.
Description
The present invention relates to communication system transmit-receive letter machine, relate in particular to a kind of multichannel that is used for communication system transmit-receive letter machine and insert Digital Up Convert/modulator.
The transmitter and receiver that is used for communication system is designed to transmit and receive in one group of signal with different bandwidth usually, and this signal drops in certain specific scope.It will be appreciated by those skilled in the art that these transmitter and receivers, emission or intercepting and capturing electromagnetic radiation in corresponding design bandwidth.Electromagnetic radiation can comprise antenna by multiple device, waveguide, coaxial cable and optical fiber, input receiver or exported by transmitter.
The transmitter and receiver of these communication systems, though have the function that transmits and receives a plurality of signals, the concrete signal of corresponding each different frequency or bandwidth all will repeat identical circuit.It not is the ideal structure of multichannel communication device that sort circuit duplicates, because build independently transmitter and/or receiver for each communication channel, will increase the expense and the complexity of device.
Another optional transmitter and receiver structure can be arranged, and it has the function that transmits and receives the multi-channel broadband signal.This optional transmitter and receiver is at first to the signal in the design bandwidth, carry out digitlization according to Nyquist criterion (being the twice that digitized sampling speed equals signal bandwidth at least), employed digitalizer (being analog-digital converter) must work in sufficiently high sampling rate.Adopt Digital Signal Processing to carry out preliminary treatment or reprocessing to digitized signal then, a plurality of channels in the digitized bandwidth are made a distinction.
With reference to a kind of existing broadband transceiver 100 illustrated in fig. 1.Radio frequency (RF) signal is received by antenna 102, is handled and digitlization by RF transducer 104 and analog-digital converter 106.Digitized signal is passed through discrete Fourier transform (DFT) 108 again, and the processing of channel processor 110 enters cellular network and public switch telephone network (PSTN) from channel processor 110.Under the emission mode, from the signal process channel processor 110 that cellular network receives, inverse fourier transform (IDFT) 114, digital to analog converter 116 is handled.The analog signal of digital to analog converter 116 outputs is carried out up-conversion in RF upconverter 118, by antenna 120 emissions.
The defective of this optional communicator is, its digital processing part must have sufficiently high sampling rate, guarantee Nyquist criterion and enough satisfy the maximum frequency range that receives, this maximum frequency range is a summation of forming each independent communication channel of composite received electromagnetic radiation bandwidth.If the non-constant width of composite band bandwidth signals, the Digital Signal Processing of communicator will be very expensive partly, and expend considerable energy.In addition, in general the channel that is generated by DFT or IDFT filtering technique all must adjoin each other.
Need a kind of such transmitter and receiver, mention, use same emission or receiving circuit, realize being present in transmitting and receiving of a plurality of signals in the respective channel just as preamble.However, this transmitter-receiver circuit preferably can reduce the communicator design constraint that above-mentioned transceiver architecture is brought.If the structure of this transreceiver improves, will be highly suitable for cellular radiotelephone communication systems.Cellular basestation usually need be in a wide frequency band range (such as: 824MHz is to 894MHz) transmits and receives multiple signals.In addition, market also impels manufacturer to seek the approach that reduces the communicator cost to the pressure of cellular phone infrastructure and subscriber device manufacturer.Equally, this multi-channel transmitter receiver structure, to well be applicable to the PCS Personal Communications System of base station services scope less (comparing) with other cellular systems, this is because PCS Personal Communications System needs a large amount of base stations and covers certain zone, and the operating personnel that buy base station apparatus can wish the fairly simple and low price of communicator that the registration permission service range is interior certainly.
The honeycomb and the PCS manufacturer of sharing analogy signal processing unit multichannel communication device used in design, may also can obtain another advantage.Traditional communicator is configured to and can only works under the pattern of a kind of information signal coding and channelizing standard.And the multichannel communication device comprises a digital signal processing, can be in manufacture process, scene after perhaps installing is by the random reprogramming of software, these multichannel communication devices thereby can move according to any information signal coding and standard channel.
Another defective of legacy communications system design is, the hardware that is associated with communication system only provides single access way (that is: enhancement mode mobile phone service system (AMPS) usually, arrowband enhancement mode mobile phone service system (NAMPS), U.S.'s Digital Cellular System (USDC), personal digital cellular system (PDC) and other similar access waies of communicating by letter).If plurality of access modes is provided, promptly enter communication system by any way, just have the suitable hardware repetition and the requirement of cost.Provide plurality of access modes so need, significantly do not increase the communicator of hardware and corresponding cost simultaneously.
Many advantages of the present invention and characteristic will be described in detail and be further understood the some preferred embodiments of the present invention by hereinafter with reference to accompanying drawing.
Fig. 1 is a prior art multiple channel transceiver block diagram;
Fig. 2 is the block diagram of multichannel receiver in accordance with a preferred embodiment of the present invention;
Fig. 3 is the block diagram of multi-channel transmitter in accordance with a preferred embodiment of the present invention;
Fig. 4 is the block diagram of multiple channel transceiver in accordance with a preferred embodiment of the present invention;
Fig. 5 is according to another preferred embodiment of the present invention, and multichannel receiver is modified the block diagram that the channel function of searching is provided as shown in Figure 2;
Fig. 6 is the block diagram according to the another preferred embodiment of the present invention multiple channel transceiver;
Fig. 7 is the block diagram according to the another preferred embodiment of the present invention multiple channel transceiver;
Fig. 8 is in accordance with a preferred embodiment of the present invention, the block diagram of a multiple channel transceiver data flow;
Fig. 9 is according to another preferred embodiment of the present invention, the block diagram of a multiple channel transceiver data flow;
Figure 10 is according to another preferred embodiment of the present invention, the block diagram of a multiple channel transceiver data flow;
Figure 11 is used for the block diagram of Fig. 5 multi-channel transmitter digital translation model in accordance with a preferred embodiment of the present invention;
Figure 12 is the block diagram of the preferred embodiment of a digital down converter according to the present invention;
Figure 13 is the block diagram of the preferred embodiment of a digital up converter according to the present invention;
Figure 14 is the block diagram that is applicable to the upconverter of digital up converter of the present invention;
Figure 15 is the block diagram that is applicable to the modulator of digital up converter of the present invention;
Figure 16 is the block diagram of digital up converter of the present invention/modulator preferred embodiment;
Figure 17 is the block diagram according to a Channel Processing card preferred embodiment of the present invention;
Figure 18 is the block diagram according to one other channel transaction card preferred embodiment of the present invention;
Figure 19 is the flow chart according to preferred embodiment of the present invention search process.
The broadband multichannel transreceiver (transceiver) of indication of the present invention possesses flexibility and redundancy highly simultaneously, is specially adapted to honeycomb or PCS communication system.Transceiver provides the support to multiple antenna, realizes fan-shaped honeycomb operation, diversity reception, and redundant the processing perhaps realized the combination of above performance as required, user's capacity has increased, and cost is lowered.Transceiver of the present invention adopts a kind of practical structures, shares (DES) with dynamic apparatus by follow-up digital processing and strengthens the property, thereby realize above-mentioned and other function.
The present invention further provides plurality of access modes, and do not need significant hardware to duplicate.Transceiver according to the present invention is equipped with programmable digital down converter (DDC) and programmable digital up converter (DUC).In other words, each DUC can be programmed the intercepting/interpolation coefficient that provides different with DDC, satisfies the requirement of different-format and bandwidth signal access way.But the programmability of DUC also not exclusively supports that multichannel inserts, so DUC of the present invention also comprises a unique hardware configuration, has both supported frequency modulation(FM), supports quadrature (I and Q) up-conversion again, does not but have significant hardware to repeat and the increase of corresponding cost.
With reference to Fig. 4, a kind of transceiver according to the preferred embodiment of the invention 400 is shown.For the purpose of discussing conveniently, the broadband multi-channel digital receiver of transceiver 400 and the preferred embodiment 200 and 300 of transmitter section also are discussed.Further, for describing the preferred embodiments of the present invention, also will be described a kind of transceiver that works in the cellular radio band.In a word, the present invention can be understood that to be applicable to any RF communication band trafficwise, for example: comprise PCS frequency band and similar frequency band.
With reference to Fig. 2, a kind of part of wideband digital receiver according to the preferred embodiment of the invention (receiver) 200 is shown.Receiver 200 comprise a plurality of antennas 202 that are connected with respective mixers 204 respectively (by antenna 1,3 independently ..., n-1 forms), the RF conversion of signals that receives from antenna 202 is become intermediate frequency (IF) signal.Should understand, the Signal Processing Element of frequency mixer 204 comprises filter at least, and amplifier, and crystal oscillator are used for the RF signal that preliminary treatment receives, and isolate needed RF frequency band, and the RF signal mixing is become needed IF signal.
Next the IF signal is sent to a plurality of analog-digital converters (ADC) 210, and the whole signal bandwidth of hope is digitized.The defective in existing broadband receiver past is: complete accurately digitlization whole frequency band, the sample frequency of ADC may be very high.For example, honeycomb A and B wave band take RF frequency band 25 megahertz bandwidth.According to famous Nyquist criterion, to the whole frequency band precise figuresization, require device can be operated in 50MHz above (or 50,000,000 samplings of per second) at least with an ADC.It is more general that this device is becoming, and the present invention also turns on the problem of the technology of using up-to-date ADC.But meanwhile, people such as the U.S. Patent application Smith of common transfer show " Split Frequency band Signal Digitizer andMethod ", Elder shows " Wideband Frequency Signal Digitizer andMethod ", these open source literatures of being mentioned especially with the form of reference have all been mentioned and have been used single ADC, with the Apparatus and method for than the complete precise figures wideband frequency of low rate signal.ADC210 digitlization IF signal produces digital signal, and next digital signal is sent to digital down converter (DDC) 214.
The DDC214 of preferred embodiment, more clear among Figure 12, comprise a switch 1216 that makes DDC214 can select an IF signal from multiple antenna 202, state according to 1216, DDC214 connects 1108 by the base plate among Figure 11, receive the high-speed figure stream (60MHz nearly) that arrives the ADC210 that is connected with selected antenna, DDC214 can select characteristic frequency (at numeric field) intercepting (changing down) and the filtration signal consistent with communication system channel.With further reference to Figure 12, each DDC214 contains 1218 and complex multiplication devices 1220 of a digital control oscillator (NCO), and numeric word stream is carried out down-conversion.It should be noted that this is the 204 pairs of analog signals that receive of frequency mixer that continue, carry out the down-frequency conversion again after the down-conversion for the first time.The result of down-conversion and complex multiplication is through the frequency domain conversion, centre frequency zero hertz (base band or zero intermediate frequency), the orthogonal digital that promptly comprises in-phase component I and quadrature component Q flows.The I of data flow, Q component is sent to a pair of intercepting filter 1222 respectively, reduces the processing of bandwidth and data speed, with the air interface of particular communications system adapt (Common Air Interface CAI or CAI).In the preferred embodiment, the data rate of intercepting filter output approximately is 2.5 times of the required bandwidth of CAI.Should be understood to the output speed that required bandwidth can change preferred intercepting filter 1222.Next the data flow of intercepting is handled by the low pass of digital filter 1224, removes unwanted offset component.Intercepting filter 1222 and digital filter 1224 are realized preliminary selection, and final selection is finished in the mode of knowing by channel processor 228.
See that from Fig. 2 preferred embodiment is equipped with a plurality of DDC214, each DDC214 is connected with ADC210, and selects in a plurality of ADC210/ antennas 202 one, receives high-speed figure words stream by base plate 1106.The output of DDC214, the data flow of low speed (for example: be approximately 10MHz, baseband signal) is connected to Time Division Multiplexing bus 226, is sent to a plurality of channel processors 228 through output format device 1232.The output of DDC is placed TDM bus 226, make any one channel processor 228, can select any one DDC214 with receiving baseband signal.When certain channel processor 228 or DDC214 inefficacy, channel processor is by control bus 224 and control bus interface 1234, another efficient channel processor is linked to each other with effective DDC, avoid two channel processors to insert same DDC in suitable competition/arbitration process mode.However, in the preferred embodiment, all DDC214 are assigned certain time slot on TDM bus 226, are connected with a particular channel processor 228.
Continuation is with reference to Fig. 2, and receiver of the present invention also is equipped with a plurality of receiver units (being denoted as 230 and 230 ' among the figure).Each receiver unit 230 and 230 ' all comprises the parts that preamble is mentioned, and is positioned at before the TDM bus 226, receives and handle wireless frequency signal.In order to realize the diversity reception function with the present invention, a pair of adjacent antenna, one from the antenna sets 202 that is connected with receiving element 230, another (is expressed as 2 respectively from the antenna sets 202 ' that is connected with receiving element 230 ', 4, ..., n), be designed to provide the service of a sector in the communication system.Handle by receiving element 230 and 230 ' independently of one another from the signal that antenna 202 and 202 ' receives.Although be interpreted as only using a bus, receiver memory 230 and 230 ' output by TDM bus 226 and 226 ', are transferred to signal processor 228 respectively, and diversity reception is so far finished.
With reference to Figure 17, the preferred embodiment of a channel processor 228 is shown.As described below, each channel processor can transmit and receive operation.In the preferred embodiment, each signal processor 228 at most can 8 channels of communication system that supports transmits and receives (being 4 channels under the diversity reception pattern).I/O (I/O) port one 740 and 1740 ' receive respectively from the low speed baseband signal of TDM bus 226 or 226 ', be transmitted to a pair of processor 1742 and 1742 '.What be connected with 1742 ' with each processor 1742 is digital signal processor (DSP) 1744 and 1744 ' and memory 1746 and I746 '.Each processor 1742 and 1742 ' is supported four communication channels.As shown in figure 17, in a preferred embodiment, processor 1742 and 1742 ' can be configured in monitoring reception unit 230 or 230 ', or monitor two unit according to the requirement of preferred diversity scheme.This structure has certain redundancy in diversity.Under receiving mode, if an inefficacy in processor 1742 and 1742 ', because another processor still could be handled the baseband signal of corresponding receiving element, so only may lose the diversity reception function.Should understand, processor 1742 and 1742 ' can be merged by suitable diversity selection and diversity to be realized.Processor 1742 is further communicated by letter with 1748 ' with control assembly 1748 respectively with 1742 ', handles and to the DDC214 communicating control information, and is middle through I/O port one 740 and 1740 ' and the control bus 224 mentioned.
Continuation illustrates the transmitter section 300 (transmitter) of transceiver 400 with reference to Figure 17 and Fig. 4.Under the emission mode, channel processor 228 receives the descending communication signal (by the interface 436 that illustrates among Figure 17) that will transmit from communication system network communication channel.Such as these down link signals can be the control or the signaling informations of towards whole zone (as a paging information) or certain sector (as a switching command), also can be the voice and/or the data (as a Traffic Channel) of down link.In channel processor 228, processor 1742 and 1742 ' independent process down link signal produce the low speed baseband signal.Under the transmission mode, channel processor 228 can support eight (8) bar communication channels (can be Traffic Channel, signaling channel, or their combination), if an inefficacy in processor 1742 or 1742 ', the influence that system is caused is that capacity reduces, but can not lose whole zone or sector.In addition, remove in a plurality of channel processors 228, only can lose 8 channels.
The processing of in the transmitter 300 processing and the receiver 200 of baseband signal being finished is just in time complementary.The baseband signal of low speed via I/O interface 1740 or 1740 ', is sent to TDM downlink bus 300 and 300 ' from channel processor 228, although have only a bus to be used to, arrives a plurality of digital up converter (DUC) 302 more therefrom.DUC302 interpolation baseband signal is to certain ovrn speed.Interpolation is handled and is made all baseband signals from channel processor 228 have identical speed, can be a center addition.Next baseband signal after the interpolation is up-converted into and is certain IF signal, as quaternary PSK signal (QPSK), four-phase differential phase shift keyi signal (DQPSK), frequency modulated signal (FM), or am signals (AM), (modulated process is finished in channel processor 228 for I, Q input).Baseband signal is the high speed baseband signal from zero hertz of skew after the carrier modulation now.Side-play amount is by programming DUC302 control.Baseband modulation signal is sent to signal selector 306 in high speed backplane connector 304.Signal selector can be selected the subgroup of baseband modulation signal.Selecteed subgroup is the communication channel of launching in a certain particular sector of communication system.The subgroup of baseband modulation signal is sent to the digital adder addition, and the high speed signal summation is sent to digital to analog converter (DAC) 310 and converts the IF analog signal to via back plane connector 1130.The IF analog signal is up-converted into the signal into RF by upconverter 314, is exaggerated device 418 (Fig. 4) amplification and launches from antenna 420 (Fig. 4).
In a preferred embodiment, be the reliability of further enhanced system, DAC310 is equipped with the DAC311 group that is connected on the RF piece by three, and a DAC is connected with a piece.The DAC311 group is transformed into analog signal to three superposed signals that receive from the independent signal bus 313 of back plane connector 1130.Compare with adopting a DAC, this mode has increased the dynamic range of signal.Redundancy increases simultaneously, because when a DAC inefficacy, two other still can work on.Its result is the minimizing of power system capacity, and can not lose whole zone or sector.One group of received is simulated addition towards the DAC311 output of the signal of the unified sector of communication system in adder 312, the analog signal after the addition is sent to upconverter 314.
Similar with receiver 200, transmitter 300 constitutes (shown in the figure 330 and 330 ') by a plurality of transmitter units too.Transmitter unit 330 and 330 ' comprises transmitter 300 all devices between channel processor 228 and amplifier 418.To each transmitter unit 330 and 330 ', 314 pairs of superposed simulation signals towards a certain sector of communication system of upconverter carry out up-conversion, and it exports addition in RF adder 316.The RF signal of addition is sent to amplifier 418, from 420 emissions.If whole transmitter unit 330 or 330 ' lost efficacy, its result is the just minimizing of power system capacity still, and can not be losing of communication system entire portion.
With reference to Figure 13, DUC302 according to the preferred embodiment of the invention is shown.Preferred embodiment is equipped with a plurality of DUC302, and each DUC302 comprises a up-conversion/modulator 1340, receives from the down link baseband signal of bus 300 and 300 ' with from the control signal of control bus 224 by form circuit 1341.Next the output of up-conversion/modulator 1340 send selector 306 to.In the preferred embodiment, the form that selector can take dual input and door to organize, end input is connected to a bit (being base band signal modulated) of data word.As long as control line keeps high potential (logical one), output will be followed the tracks of the variation of input.Next the output of selector 306 be sent to a digital adder group 1308, and adder is added to the data from the previous digital adder that is connected with other DUC on the signalling channel.The front points out that a sector of the corresponding communication system of each bars passage sends added signal to DAC group 311.If selector disconnects, selector 306 is output as zero, as an input of adder 1308 input signal is remained unchanged.Should be understood to, the input of adder 1308, output or the two need to demarcate the summation that makes digital signal simultaneously and are within the dynamic range of adder 1308.In this case, the DUC output of communication system particular sector signal is pointed in expression, can be added and be converted into an analog signal.Perhaps,, can in device, further collect, change into analog signal through a plurality of DAC, with the dynamic range of enhanced system with redundancy is provided as realizing in a preferred embodiment.
With reference to Figure 14, illustrate and carry out I according to the present invention, the upconverter 1400 of Q modulation.Upconverter 1400 comprises first and second interpolation filters 1402 and 1404 (as limited impulse response (FIR) filter) respectively to the I of baseband signal, and Q component is realized interpolation.Baseband signal I after the interpolation, Q component is up-conversion in frequency mixer 1406 and 1408, is received as the input of digital control oscillator (NCO) 1410.Digital control oscillator 1410 be input as the up-conversion frequencies omega
0, with the product of sample rate τ reciprocal, the stationary phase increment of product value for obtaining by the up-conversion frequency.Product term inputs to the phase accumulator 1410 of NCO inside.Phase accumulator 1412 is output as sampling phase Φ, is sent to sinusoidal wave cosine wave maker 1414 and 1416 respectively, is used to produce up-conversion signal.Baseband signal I after the up-conversion, Q component addition in adder 1418 is output as the modulation IF signal of upconverter 1400.
Figure 15 illustrates and realizes R, Θ modulation, the modulator 1500 of Direct Phase modulation.Modulator 1500 provides a kind of simplified way, is used for producing FM on upconverter 1400.Baseband signal is sent to interpolation filter 1502 (as the FIR filter), multiplies each other with k τ through scaler 1504 then.Digital control oscillator/modulator (NCOM) 1508 inner adders 1506 are to calibrated baseband signal of interpolation and stationary phase increment ω
0τ carries out sum operation.Deliver to phase accumulator 1510 with value, the sampling phase Φ of accumulator output is sent to sine-wave generator 1512, generates the IF signal output of modulator 1500 modulation.
Device shown in Figure 14 and 15 all is applicable to up-conversion/modulator 1340 of the present invention.But upconverter 1400 is not enough to produce mentioned FM signal, and modulator 1500 does not have I yet, the up-conversion process of Q component.Preferred up-conversion/modulator 1340 shown in Figure 16 is not only supported I simultaneously, Q up-conversion and FM modulation, and support plurality of access modes significantly not increasing under BTS hardware and the condition of cost.Up-conversion/modulator 1340 provides I for single baseband signal, the Q upward frequency conversion, and for the double-basis band signal provides R, the Θ modulation.
The I of baseband signal, Q component or two R, the Θ signal is respectively from port one 602 and 1604 input up-conversion/modulators 1340.At I, Q signal and R are selected in the Θ signal signal selector 1606 and 1608 according to the mode of operation of up-conversion/modulator 1340.
Consider to handle I, the process of Q signal, the I component of signal is sent to interpolation filter (for example, FIR filter) 1610 from selector 1606.I signal after the interpolation is sent to frequency mixer 1612, and the sine wave of being exported by cosine generator 1614 carries out up-conversion.The input sample phase place Φ that cosine wave generator 1614 receives from phase accumulator 1616.Selector 1618 is at I, and Q up-conversion state is selected zero input down, and the output of selector 1618 is multiplied each other by calibration device and k τ, produces zero output at adder 1622 and ω
0The τ addition.This and value at I, are ω under the Q pattern
0τ, the input that produces the phase accumulator of sampling phase output Φ exactly.
The Q component processing procedure of signal is similar.Q component is sent to interpolation filter (for example, FIR filter) 1626 through the selection of selector 1608.Signal after the interpolation is sent to frequency mixer 1628, and the sine wave of being exported by forcing function generator 1630 carries out up-conversion.At I, under the Q pattern, sine-wave generator 1630 receiving phase accumulators 1616 produce, from an input of the selector 1632 of selecting sampling phase Φ.At I, the Q pattern, the I of up-conversion, Q signal addition in adder 1634 is as the up-conversion/modulation output of up-conversion/modulator 1340.
At R, in the Θ processing procedure, selector 1606 and 1608 is selected independently R, the Θ signal.For R, Θ handles, and up-conversion/modulator 1340 can be handled two R, Θ signal simultaneously.First signal R, Θ-1 realizes interpolation and filtering by interpolation filter 1610.At R, under the Θ pattern, selector 1618 is selected the R after the interpolation, and Θ-1 signal multiplies each other by scaler and k τ, and at adder 1622 and ω
0The τ addition.The output of adder sends phase accumulator 1616 to and generates sampling phase Φ, as the input of cosine wave generator 1614.Cosine wave generator 1614 is output as R, under the Θ tupe, and in 1,340 two IF modulation signals of up-conversion/modulator one.
Second R, Θ signal 1R, Θ-2, selected device 1608 choose and send interpolation filter 1626 to.R after the interpolation, Θ-2 signal next sends calibration device to and k τ multiplies each other.The signal of being demarcated is at adder 1638 and ω
0The τ addition.Adder 1638 is output as the input of phase accumulator 1640, the output sampling phase φ that accumulator generates, and selected device 1632 is chosen and is sent sine-wave generator 1630 to.The output of sine-wave generator 1630 under the Θ tupe, is one in 1,340 two IF modulation signal outputs of up-conversion/modulator at R.
Can understand like this,, be sent to the value ω of adder 1622 and 1638 for guaranteeing the accurate of cosine wave generator 1614 and sine-wave generator 1630 output phases
0τ should be consistent.In addition, ω
0The value of τ can be set under the control of channel processor, such as selects the carrier frequency of cosine wave generator 1614 and sine-wave generator 1630 output valves.Equally, can set calibration device value k τ, select different exemplary frequency deviation values.
After having described the receiver 200 and transmitter 300 of transceiver 400 respectively, hereinafter transceiver 400 is described in further detail with reference to Fig. 4.Transceiver 400 is made of two transceiver units 402 and 404.Two unit are identical, all comprise a plurality of RF processing blocks 406, and each RF processing block 406 comprises a RF frequency mixer 408 and an ADC410, the signal that link together reception and digitlization arrive from antenna 412.RF processing block 406 also comprises three DAC414, and their output is sent to RF upconverter 418 through the addition of adder 416.The output of RF upconverter 417 further sends a RF adder 419 to, and from the corresponding output of Transmit-Receive Unit 404 additions.The RF signal of addition sends amplifier 418 to, is exaggerated before launching from antenna 420.
The signal that receives from ADC410 is sent to a plurality of data-converting blocks (DCM) 426 via receiving bus 428.Equally, transmit and be sent to DAC414 from DCM426 via emission bus 430.Can recognize, all be data/address bus at a high speed as the reception bus 428 and the emission bus 430 of RF member 432 base arrangements.In a preferred embodiment, the nearly 60MHz of the transfer rate of base plate, however, the physical connection of sealing makes high speed not have remarkable error transmissions becomes possibility.
With reference to Figure 11, show the preferred embodiment of DCM426.DCM426 comprises a plurality of DDC application-specific integrated circuit (ASIC)s (ASIC) 1102 and a plurality of DUC ASIC1104 realizes transmitting and receiving Signal Processing.Received signal connects 1108 from antenna 412 via receiving base plate, and base plate receiver 1106 and buffer memory/driver element 1107 are connected to DDC ASIC1102 by communication link 1110.In a preferred embodiment, DCM426 has 10 DDC ASIC1120, and just as mentioned before, three of each DDC ASIC1120 internal structures are DDC independently.In a preferred embodiment, 8 DDC ASIC1120 are used to realize the function of communication channel, and two other is used to realize function of search.The output of DDC ASIC1120 is by link 1112, and base plate formatter 1114 is sent to base plate with backplane drive device 1116 and is connected 1118.Connect 1118 from base plate, the signal that receives is sent to intermediary 450 (Fig. 4), further is transmitted to the channel processor group of handling in the plate 446 448.
Under the emission mode, transmitting is connected 1118 through interface medium 450 with base plate from channel processor 448, passes emission base plate receiver 1120 and selection/formatter 1124, is transmitted to a plurality of DUCASIC1104.Each DUC ASIC1104 comprises 4 independently DUC, and just as mentioned before, DUC can handle R, 4 channels under the Θ pattern or I, 2 channels under the Q pattern.The output of DUCASIC1104 is sent to emission backplane drive device 1128 and is connected 1130 with base plate via link 1126, sends DAC414 then to.
Should be understood to, need provide suitable clock signal, be masked as 460 in the drawings to DCM426.
The intermediary 450 of consideration between DCM426 and channel processor 448, it can be any suitable communication medium.For example: intermediary can be a microwave link, TDM period or optical fiber link.This arrangement allows channel processor 448 stably is placed on place away from DCM426 and RF processing block 406.Like this, the Channel Processing function can be finished in the concentrated area, and transmission-receiving function can be finished at the communication unit station.Because the pith of communicator can be away from the communication unit station of reality, the structure at communication unit station has been simplified in this arrangement.Consequently, install needed physical space and reduce relatively, the Operation and maintenance activity is concentrated relatively, and this is undoubtedly a kind of saving concerning operating personnel.
As shown in Figure 4, transceiver 400 comprises three DCM426, and the capacity of each DCM426 is 12 channels.Such arrangement makes system very reliable.If a DCM426 lost efficacy whole system lost part channel.In addition, DCM can be provided many air interface functions by repacking.In other words, DDC on the DCM and DUC can be programmed separately and be used for special air interface.So transceiver 400 has the function that multiple air interface is provided.
Can understand from preamble, transceiver 400 has many advantages.With reference to Fig. 5, can see that the receiver 500 of transceiver 400 is very alike with receiver 200 shown in Figure 2.For the sake of simplicity, omitted DDC214 and TDM bus 226 among the figure, should understand receiver 500 and comprise with top.Receiver also comprises a DDC502 in addition, is connected to ADC506 by selector 504, is used to receive the up link digital signal from antenna 508/ frequency mixer 509, and transmits data by data/address bus 514 to channel processor 510.In running, channel processor is necessary to scan other antennas signal is transmitted by the optimal antenna in the zone for handling a communication channel.In other words, can put forward better communication quality, communicate to connect by rebuliding on that slave antenna if serve the antenna of another sector.Which slave antenna all sectors in the channel processor Search Area determine to choose.Among the present invention, channel processor 510 is caught the output of DDC502, and by control bus 512 it is programmed, thereby realizes the signal of all antennas in the receiving area.The signal that relatively receives in the channel processor as signal strength signal intensity indication (RSSI) etc., judges whether to exist better antenna.Different with single slave antenna service individual channel, DDC502 is the signal in the multiple antenna receiving area under the indication of channel processor, and in addition, processing and DDC214 in the DDC502 are identical.
Figure 19 has illustrated a kind of 1900-1926 step of channel search method, 1900 steps, and the search beginning, 1902 steps were set timer.In the judgement step 1904, channel processor checks whether DDC302 is idle, also promptly do not search for the one other channel processor at once, if idle, the judgement step 1906, check whether control bus 312 is idle, if, 1908 step timers stop, 1909 steps, channel processor 310 intercepting control buss 312.If 1912 step channel processors 302 can't intercept control bus 302, then returned for 1902 steps.If DDC302 or control bus 312 are not idle, then whether inspection is overtime, in time bar that whether echo check DDC is idle.If overtime, system reported an error in 1920 steps, and promptly channel processor 310 can't be finished function of search.
If 1912 step control buss 312 are are successfully intercepted and captured, in 1914 steps, channel processor programming DDC302 realizes function of search.If DDC302 is activated during 1916 steps, 1920 steps were abandoned programming, and simultaneity factor reports an error.Otherwise DDC302 accepts programming information, and 308 collect sampled value since 1918 steps from different antennas.After 1922 steps, the collection sampling was finished, in 1924 steps, DDC was programmed to idle mode, and in 1926 steps, flow process finishes.
Another performance of transceiver 400 is to provide signaling for all sectors in a certain particular sector or the communication zone.Refer again to Fig. 3 and Figure 13, the output of up-conversion/modulator 1340 is sent to selector 306, and selector 306 selects to point to the signaling of a certain particular sector in the communication zone from the output of a plurality of up-conversion/modulators.As shown in Figure 3, for the communication zone of one three sector, three data channel 313 offer three sectors of communication zone, and the function of selector 306 is the output of up-conversion/modulator 1340 to be added to of three data channel get on.By above method, the down link signal that arrives from up-conversion/modulator 1340 is sent to the corresponding sector of communication zone.
With reference to Fig. 6,, another structure arrangement has been proposed although shown transceiver 600 has comprised described functional part when mentioning transceiver 400.The advantage of transceiver 600 is, has been equipped with the digital down converter and the corresponding downstream digital link upconverter of up link in channel processor.Channel processor is connected to RF hardware by high-speed link then.
Under receiving mode, the RF signal from antenna 602 (be designated as 1,2 ..., n) be received and be sent to associated reception RF processing block 604.Each RF receives processing block 604 and comprises a RF low-converter 606 and an analog digital converter 608.The high-speed digital data that receives 604 outputs of RF processing block is flowed through by a up link bus 610, is sent to a plurality of channel processors 612.Up link bus 610 is certain high-speed bus such as fiber buss or other.Channel processor 612 comprises a selector, the data flow of which slave antenna of selective reception, and a DDC and a series of Base-Band Processing element 613, selection and processing recover to communicate to connect from the data flow of antenna.Communication channel is connected to cellular network and PSTN then by rights.
Under the emission mode, the down link signal that channel processor 612 receives from cellular network and PSTN.Channel processor comprises a up-conversion/modulator 615, and down link signal is carried out up-conversion and modulation, and data flow is transmitted to RF emission processing unit 614 via emission bus 616 then.Should be understood to, emission bus 616 also is a suitable high-speed bus.RF emission processing unit 614 comprises digital adder 618, and DAC620 and RF upconverter 622 are handled uplink data flow, finally form analog signal.The RF analog signal arrives power amplifier 626 and antenna 628 and launches with the form of RF analog signal via analog transmissions bus 624.
With reference to Fig. 7,, a kind of structure arrangement has been proposed again although shown transceiver 700 has comprised described functional part when mentioning transceiver 400 too.Transceiver 700 is used for a sector of partitioning communication system.Will be understood that transceiver 700 can be easy to such an extent that be modified to and serve a plurality of sectors.
Under receiving mode, the RF signal is received and is sent to RF by antenna 702 and receives processing block 704.Each receives RF processing block 704 and comprises a RF low-converter 703 and an ADC705.The high-speed digital data that receives 704 outputs of RF processing block is flowed through by high speed backplane 706, is transmitted to a plurality of DDC708.DDC708 selects and down-conversion data flow at a high speed as previously mentioned.DDC708 is output as the data flow of low speed, is sent to channel processor 714 by bus 710 and 712.Channel processor is handled channel as previously mentioned, and finishes communicating by letter between channel and cellular network and the PSTN by channel bus 700 and network interface 718.Had base plate at a high speed to connect, the DDC708 of transceiver 700 also is placed in the Channel Processing piece easily.
Under the emission mode, start from the down link signal of cellular network and PSTN, be sent to channel processor 714 by interface 718 and channel bus 716.Channel processor 714 comprises DUC and DAC, and up-conversion and digitlization down link signal form the IF analog signal.Simulation with I F signal is sent to emission array 724 via the connection 722 of coaxial cable or other suitable media, down link signal here with other down link Simulation with I F signal combination together.Combine analog IF signal connects 726 via coaxial cable, is transmitted to RF upconverter 728.RF upconverter 728 becomes the RF signal to the IF conversion of signals.RF signal RF addition in adder 730 of upconverter 728 outputs is transmitted to power amplifier and transmitting antenna (not shown) then.
From transceiver 700 as can be seen, the high-speed data of down link signal is handled, and also is Digital Up Convert, has finished easily in channel processor 714.Figure 18 shows a preferred embodiment of channel processor 714.Channel processor 714 shown in Figure 17 is all alike with channel processor 2,280 minutes aspect a lot, if any similar parts and parameter.In addition channel processor 714 comprises also that two DUC1802 receive the down link signal of from processor 1742,1742 '.Down link signal converts Simulation with I F signal through the DUC1802 up-conversion to through DAC1806, and then via port one 740,1740 ' is sent to emission array 724.
With reference to Fig. 8,9,10.Shown is other schemes that transceiver 400 each parts connect.For avoiding, so do not adopt the connection of daisy chain type between parts because of single component failure causes losing of whole zone.Can see that from the arrangement of Fig. 8 down link the inner selector 800 of DCM802 is arranged at the front of DUC804 and DAC806.Immediate data link 808 from DCM802 to DCM802, arrives DAC806 from DUC804 to the selector 800 at last.Be equipped with branch's bypass data link 810 of immediate data link 808 in addition.In service, if there is one or more DCM802 to lose efficacy, selector 800 will activate corresponding bypass data link 810, cross the DCM802 of inefficacy, make signal be arrived amplifier 812 and transmitting antenna 814 continuously.Should be understood to, the parts of up link can be connected equally and realize the fault-tolerant receiver of transceiver.
Fig. 9 illustrates a kind of optional arrangement.In Fig. 9, channel processor 920 is connected to DCMs902 by TDM bus 922.DCM902 is connected to each other in the mode described in Fig. 8, the selector 900 of the DCM902 that do not draw among the figure.Can be regarded as selector can directly realize in DCM902 simply.Bypass link 924 is directly connected to relevant DCM to channel processor 920, and is connected into selector (not shown) additional among the DCM902.If because the problem of channel processor causes TDM bus 922 to lose efficacy, or TDM bus 922 itself goes wrong, the selector of DCM902 inside will activate certain bypass link 924, make signal be sent to DAC906 continuously, amplifier 912 and transmitting antenna 914.
Figure 10 shows another optional arrangement again.In addition, DCM1002 is connected to each other in the described mode of Fig. 8.Among Figure 10, direct link 1030 is with the mode connecting channel processor 820 of daisy chain, and the output of each channel processor 1020 addition and value in adder 1030 are sent to DCM1002 by TDM bus 1034.Bypass link 1036 forms the second bus, delivers to selector 1038 in the identical mode of DCM802 among Fig. 8.Under the situation that any one channel processor lost efficacy, can walk around the channel processor of inefficacy,, arrive selector 1000, DAC, 1006, amplifier 1012 and antenna 1014 in the identical mode of DCM802 from the signal of other channel processors 1020.
From the description of aforementioned some preferred embodiments, can understand many advantages of the present invention and feature.Should be understood to, as understandable from claim hereinafter, many other embodiment, advantage and feature also should be included in its zone of reasonableness.
Claims (10)
1. up-conversion/modulator comprises:
A first selector and a second selector with a plurality of inputs and an output, the output of each first selector and second selector link to each other with one second interpolation filter with one first interpolation filter respectively;
An output selectivity ground of first interpolation filter links to each other with a first adder with one first frequency mixer, and first adder receives one first programmable phase value, and the output valve of first adder links to each other with one first phase accumulator;
An output of first phase accumulator links to each other with a primary sinusoid generator, and optionally links to each other with one second sine-wave generator;
An output selectivity ground of second interpolation filter links to each other with a second adder with one second frequency mixer; Second adder receives one second programmable phase value, and the output of adder links to each other with one second phase accumulator.
An output selectivity ground of each first and second frequency mixer links to each other with the input of an output adder and each first and second frequency mixer respectively; And
An output of second phase accumulator optionally links to each other with one second sine-wave generator.
2. as the up-conversion/modulator in the claim 1, wherein the first, the second calibration device can be programmed to demarcate the output of the first, the second interpolater.
3. multi-mode up-conversion/modulator comprises:
A first selector and a second selector with a plurality of inputs and an output connect a plurality of inputs to receive a plurality of input signals, and each first selector and second selector can be operated to select in a plurality of input signals;
The output of first selector and second selector links to each other with the input of first interpolation filter with second interpolation filter respectively.
Wherein under a kind of first operator scheme:
Input signal input up-conversion/modulator with first signal component and secondary signal component, mode is that first component links to each other with first interpolation filter by first selector, and second component correspondingly links to each other with second interpolation filter by second selector;
An output of first interpolation filter links to each other with first input of one first frequency mixer, and the output of a primary sinusoid generator links to each other with second input of first frequency mixer.The output of first frequency mixer links to each other with first input of an output adder;
An output of second interpolation filter links to each other with first input of one second frequency mixer, an output of one second sine-wave generator links to each other with second input of second frequency mixer, and an output of second frequency mixer links to each other with second input of output adder; And
One first phase accumulator receives one first programmable phase value, and phase accumulator phase value output links to each other with an input of each first and second sine-wave generator;
With, wherein under a kind of second operator scheme:
One first input signal links to each other with up-conversion/modulator with one second input signal, and mode is that first input signal links to each other with first interpolation filter through first selector, and second input signal links to each other with second interpolation filter through second selector;
The output of first interpolation filter links to each other with first calibration device able to programme;
A first adder receives the calibrated output valve of first calibration device able to programme and one first phase value, and one first addition output valve of adder links to each other with first phase accumulator, and the phase value output of accumulator links to each other with primary sinusoid generator;
The output of second interpolation filter links to each other with second calibration device;
A second adder, receive calibrated output of second calibration device and one second phase value, one second additive value output of second adder output links to each other with second phase accumulator, and the phase value output of accumulator links to each other with second sine-wave generator.
4. the device of up-conversion/modulation communication signal comprises:
Select to have one first signal of first signal component and secondary signal component from a plurality of input signals, perhaps respectively contain the secondary signal of a signal component and the device of the 3rd signal;
If select first signal:
Interpolation first signal component and secondary signal component produce the device of the first and second interpolated signal components respectively;
With the first interpolated signal component and the first device output mixing that is used to produce a sine wave signal, to produce the device of first mixed frequency signal;
With the second interpolated signal component and the second device output mixing that is used to produce a sine wave signal, to produce the device of second mixed frequency signal; And
Device with the first, the second mixed frequency signal addition;
If select second signal:
Interpolation secondary signal and the 3rd signal are to produce the device of the second, the three interpolated signal.
Generate the device of one first programmable phase value by first interpolated signal;
Generate the device of one second programmable phase value by the 3rd interpolated signal; And
Generate the device of a primary sinusoid output signal and one second sine wave signal output respectively by second interpolated signal and the 3rd interpolated signal.
5. as the device in the claim 4, the device that wherein is used for interpolation second and the 3rd signal comprises the device of interpolation first and second signal components.
6. as the device in the claim 6, wherein when second of selection and the 3rd signal, this device further comprises:
The device that is used to programme and demarcates the device of second interpolated signal and be used to programme demarcation the 3rd interpolated signal.
7. many kinds of access module up-conversion/modulator communication signal methods comprise following each step:
Select to have under first kind of access module a signal of communication of first signal component and secondary signal component, perhaps a pair of signal of communication under second kind of access module;
When selecting the signal of communication of first kind of access module:
Interpolation first component and second component;
With interpolation first component and a primary sinusoid signal, the interpolation second component and the second sine wave signal mixing; And
With the secondary signal component addition after first signal component after the interpolation mixing and the interpolation mixing;
When selecting a pair of signal of communication:
Second signal of first signal in a pair of signal of communication of interpolation and a pair of signal of communication,
With interpolation first signal and one first programmable phase value, an interpolation secondary signal and one second programmable phase value addition respectively;
Determine one first phase angle by first signal of addition, and determine one second phase angle by the secondary signal of addition,
Generate a primary sinusoid by first phase angle, generate one second sine wave by second phase angle.
8. after method as claimed in claim 7 first signal and the step of second signal of a pair of signal of communication in a pair of signal of communication of interpolation, further comprise:
The programming calibration device is demarcated interpolation first signal and an interpolation secondary signal.
9. a multichannel inserts digital transmitter, comprising:
A plurality of channel processors are used for receiving the signal of communication that processing will be launched on a channel of a plurality of communication channels,
A plurality of multichannels relevant with each of a plurality of communication channels respectively and that link to each other with channel processor insert up-conversion/modulators, are used for a kind of the signal of communication up-conversion according to a plurality of cut-in methods, are modulated to intermediate-freuqncy signal;
Insert a plurality of digital adders that up-conversion/modulator is connected with multichannel, be used for that digital medium-frequency signal is done add operation and form the digital medium-frequency signal subgroup.
A digital analog converter is used for converting the digital medium-frequency signal subgroup to an analog signal.
A wireless frequency upconverter that is connected with digital analog converter, being used for analog-signal transitions is wireless frequency signal; And
A power amplifier that is connected with upconverter is used to amplify wireless frequency signal and transmits this wireless frequency signal to antenna.
10. insert digital transmitter as the multichannel in the claim 9, wherein each multichannel access up-conversion/modulator respectively comprises:
A first selector and a second selector with a plurality of inputs and an output, the output of each first selector and second selector are connected with one second interpolation filter with one first interpolation filter respectively;
An output selectivity ground of first interpolation filter is connected with a first adder with one first frequency mixer, further connects first adder to receive one first programmable phase value, and the output of adder is connected with one first phase accumulator;
An output of first phase accumulator is connected with a primary sinusoid generator, and optionally is connected with one second sine-wave generator;
An output selectivity ground of second interpolation filter is connected with a second adder with one second frequency mixer, further connects second adder, and to receive one second programmable phase value, the output of adder is connected with one second phase accumulator;
An output selectivity ground of each first and second frequency mixer is connected with the input of an output adder and first and second frequency mixers respectively;
An output selectivity ground of second phase accumulator is connected with one second sine-wave generator;
Under first kind of operator scheme, output adder is output as a up-conversion output signal thus, under second kind of operator scheme, and an output signal that is output as modulation of each first and second sine-wave generator.
Applications Claiming Priority (2)
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| US41538795A | 1995-04-03 | 1995-04-03 | |
| US08/415,387 | 1995-04-03 |
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| CN96190283A Expired - Fee Related CN1064794C (en) | 1995-04-03 | 1996-02-29 | Multiple access up converter/modulator and method |
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| CN (1) | CN1064794C (en) |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN102147473A (en) * | 2010-12-17 | 2011-08-10 | 航天恒星科技有限公司 | Common-frequency multi-system satellite navigation signal generation system |
| CN102269818A (en) * | 2010-06-01 | 2011-12-07 | 联发科技股份有限公司 | Configurable calculating circuit and receiver |
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| US6034969A (en) * | 1998-05-26 | 2000-03-07 | Motorola, Inc. | Method and system for cross frame transmit combining of transmit signals |
| JP5414484B2 (en) * | 2009-12-01 | 2014-02-12 | 三菱電機株式会社 | Fourier transform circuit, receiver and Fourier transform method |
| CN110995334B (en) * | 2019-12-02 | 2022-04-19 | 西安航天天绘数据技术有限公司 | Space-based frequency hopping data chain system with multi-channel parallel processing |
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| US4462001A (en) * | 1982-02-22 | 1984-07-24 | Canadian Patents & Development Limited | Baseband linearizer for wideband, high power, nonlinear amplifiers |
| GB2135844B (en) * | 1983-02-21 | 1986-08-28 | Nippon Telegraph & Telephone | Oscillator with variable frequency and phase |
| JPS62502439A (en) * | 1985-04-04 | 1987-09-17 | モトロ−ラ・インコ−ポレ−テッド | Digital zero IF selection stage |
| SE463390B (en) * | 1989-03-13 | 1990-11-12 | Ericsson Telefon Ab L M | VAAGFORMSGENERATOR |
| US5008900A (en) * | 1989-08-14 | 1991-04-16 | International Mobile Machines Corporation | Subscriber unit for wireless digital subscriber communication system |
| US5111163A (en) * | 1991-05-06 | 1992-05-05 | Hughes Aircraft Company | Digital FM modulator |
| US5351016A (en) * | 1993-05-28 | 1994-09-27 | Ericsson Ge Mobile Communications Inc. | Adaptively self-correcting modulation system and method |
| US5412351A (en) * | 1993-10-07 | 1995-05-02 | Nystrom; Christian | Quadrature local oscillator network |
| US5386202A (en) * | 1993-11-03 | 1995-01-31 | Sicom, Inc. | Data communication modulation with managed intersymbol interference |
| US5412352A (en) * | 1994-04-18 | 1995-05-02 | Stanford Telecommunications, Inc. | Modulator having direct digital synthesis for broadband RF transmission |
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1996
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102269818A (en) * | 2010-06-01 | 2011-12-07 | 联发科技股份有限公司 | Configurable calculating circuit and receiver |
| CN102269818B (en) * | 2010-06-01 | 2013-07-24 | 联发科技股份有限公司 | Configurable calculating circuit and receiver |
| CN102147473A (en) * | 2010-12-17 | 2011-08-10 | 航天恒星科技有限公司 | Common-frequency multi-system satellite navigation signal generation system |
| CN102147473B (en) * | 2010-12-17 | 2012-09-26 | 航天恒星科技有限公司 | Common-frequency multi-system satellite navigation signal generation system |
Also Published As
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| ITRM960188A1 (en) | 1997-09-25 |
| PL180753B1 (en) | 2001-04-30 |
| CN1064794C (en) | 2001-04-18 |
| IL117369A0 (en) | 1996-07-23 |
| FI964824A0 (en) | 1996-12-02 |
| IT1284306B1 (en) | 1998-05-18 |
| JPH10501674A (en) | 1998-02-10 |
| GB2304262A (en) | 1997-03-12 |
| GB9624183D0 (en) | 1997-01-08 |
| ITRM960188A0 (en) | 1996-03-25 |
| KR970703644A (en) | 1997-07-03 |
| PL317897A1 (en) | 1997-04-28 |
| TW287335B (en) | 1996-10-01 |
| BR9605951A (en) | 1997-08-19 |
| FI964824A (en) | 1996-12-02 |
| DE19680328T1 (en) | 1997-07-31 |
| CA2191098A1 (en) | 1996-10-10 |
| WO1996031942A1 (en) | 1996-10-10 |
| CA2191098C (en) | 2000-05-02 |
| FR2732535B1 (en) | 2002-11-29 |
| AU695320B2 (en) | 1998-08-13 |
| KR100210633B1 (en) | 1999-07-15 |
| FR2732535A1 (en) | 1996-10-04 |
| MX9606016A (en) | 1997-12-31 |
| SE9604433L (en) | 1996-12-02 |
| SE519826C2 (en) | 2003-04-15 |
| SE9604433D0 (en) | 1996-12-02 |
| AU5356696A (en) | 1996-10-23 |
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