Disclosure of Invention
The application provides a current-limiting circuit, a chip and electronic equipment, which realize the high-precision current-limiting effect of the circuit by using a high-voltage floating ground and a double-loop negative feedback control mode.
The embodiment of the first aspect of the application provides a current limiting circuit, which comprises a current source, a voltage output end, a first operational amplifier, a first current mirror and a voltage stabilizing module;
the input end of the first operational amplifier is respectively connected with a voltage division node of the voltage output end and the reference voltage source, and the output end of the first operational amplifier is connected to the current source through a first current mirror and transmits the current to the voltage stabilizing module;
the input end of the voltage stabilizing module is connected with the first operational amplifier, the output end of the voltage stabilizing module is connected with the voltage output end and is connected into a first voltage source and a floating ground voltage, and when the voltage of the first voltage source is smaller than or equal to a first preset threshold value, the voltage stabilizing module is in an amplifying state and amplifies the connected current by a specified multiple.
In some embodiments of the present application, the voltage stabilizing module includes a second operational amplifier, a third MOS transistor, a fourth MOS transistor, and a fifth MOS transistor;
the source electrodes of the fourth MOS tube and the fifth MOS tube are respectively connected with a first voltage source, the drain electrodes of the fourth MOS tube and the fifth MOS tube are respectively connected with the input end of the second operational amplifier, the grid electrode of the fourth MOS tube is connected with the grid electrode of the fifth MOS tube, and the grid electrode of the fourth MOS tube is also connected with the drain electrode of the third MOS tube;
the input end of the second operational amplifier is further connected with the voltage output end, the output end of the second operational amplifier is connected with the grid electrode of the third MOS tube, and the second operational amplifier is connected with the floating ground voltage.
In some embodiments of the present application, the voltage stabilizing module further includes a first compensation device, one end of the first compensation device is connected to the source of the fifth MOS transistor, and the other end of the first compensation device is connected to the output end of the second operational amplifier.
In some embodiments of the present application, the current regulator further includes a sixth MOS transistor and a seventh MOS transistor, the sixth MOS transistor is connected to the first operational amplifier, the seventh MOS transistor is connected to the voltage stabilizing module, and the sixth MOS transistor and the seventh MOS transistor form a third current mirror, and amplify a current flowing through the third current mirror and transmit the amplified current to the voltage stabilizing module.
In some embodiments of the present application, the sixth MOS transistor and the seventh MOS transistor are both N-type MOS transistors, and a source of the sixth MOS transistor and a source of the seventh MOS transistor are grounded, respectively.
In some embodiments of the present application, the current limiting circuit further includes an eighth N-type MOS transistor, a gate of the eighth MOS transistor is connected to a bias voltage, a source of the eighth MOS transistor is connected to the seventh MOS transistor, and a drain of the eighth MOS transistor is connected to a gate of the fourth MOS transistor.
In some embodiments of the present application, the current limiting circuit further includes a triode, a base of the triode is connected to the output terminal of the first operational amplifier, an emitter of the triode is connected to the gate of the sixth MOS transistor and the gate of the seventh MOS transistor, and a collector of the triode is connected to the first current mirror.
In some embodiments of the present application, the current limiting circuit further comprises a second compensation device, one end of the second compensation device is connected to the output terminal of the first operational amplifier, and the other end of the second compensation device is grounded.
Embodiments of a second aspect of the present application provide a chip on which the current limiting circuit according to the first aspect is integrated.
An embodiment of the third aspect of the present application provides an electronic device, which includes a control module, where the control module applies the chip of the second aspect.
The technical scheme provided in the embodiment of the application at least has the following technical effects or advantages:
according to the current limiting circuit provided by the embodiment of the application, the input end of the first operational amplifier is respectively connected with the voltage division node and the reference voltage source of the voltage output end, the current is transmitted to the voltage stabilizing module, the input end of the voltage stabilizing module is connected with the first operational amplifier, the output end of the voltage stabilizing module is connected with the voltage output end, the first voltage source is connected with the floating ground voltage, and when the voltage of the first voltage source is smaller than or equal to a first preset threshold value, the voltage stabilizing module can be in an amplifying state and amplifies the connected current by specified times. Thus, the first operational amplifier and the voltage stabilizing module can form a negative feedback circuit, and the output voltage V is subjected to the principle of the operational amplifier OUT So as to stabilize the output voltage V OUT This in turn allows a more accurate current to be obtained. And under the condition that the voltage stabilizing module floats to the ground, the interference of an external element to a circuit can be reduced, and the stability of output voltage and the accuracy of current can be further improved.
Detailed Description
Exemplary embodiments of the present application will be described in more detail below with reference to the accompanying drawings. While exemplary embodiments of the present application are shown in the drawings, it should be understood that the present application may be embodied in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.
It is to be noted that, unless otherwise specified, technical or scientific terms used herein shall have the ordinary meaning as understood by those skilled in the art to which this application belongs.
A current limiting circuit, a chip, and an electronic device according to embodiments of the present application are described below with reference to the drawings.
Referring to fig. 1, a current limiting circuit provided in this embodiment is shown in fig. 1, and the circuit includes a current source, a voltage output terminal, a first operational amplifier, a first current mirror, and a voltage stabilizing module.
The input end of the first operational amplifier is respectively connected with a voltage division node of the voltage output end and a reference voltage source, and the output end of the first operational amplifier is connected with the current source through the first current mirror and transmits the current to the voltage stabilizing module. The input end of the voltage stabilizing module is connected with the first operational amplifier, the output end of the voltage stabilizing module is connected with the voltage output end and is connected with the first voltage source and the floating ground voltage, and when the voltage of the first voltage source is smaller than or equal to a first preset threshold value, the voltage stabilizing module is in an amplifying state and amplifies the connected current by a specified multiple.
In the current limiting circuit provided by this embodiment, the input terminal of the first operational amplifier is connected to the voltage dividing node and the reference voltage source of the voltage output terminal respectively, and transmits the current to the voltage stabilizing module, the input terminal of the voltage stabilizing module is connected to the first operational amplifier, and the output terminal of the voltage stabilizing module is connected to the voltage output terminal, and is connected to the first voltage source and the floating ground voltage, so that when the voltage of the first voltage source is less than or equal to the first preset threshold, the voltage stabilizing module can amplify the connected current by a specified multiple for the amplification state. Thus, the first operational amplifier and the voltage stabilizing module can be combined into oneA negative feedback circuit for outputting the voltage V according to the principle of the operational amplifier OUT So as to stabilize the output voltage V OUT This in turn allows a more accurate current to be obtained. And under the condition that the voltage stabilizing module floats to the ground, the interference of an external element to a circuit can be reduced, and the stability of output voltage and the accuracy of current can be further improved.
The positive input end of the first operational amplifier is connected to a reference voltage source, and the negative input end of the first operational amplifier is connected with a voltage division node of the voltage output end. Theoretically, the reference voltage source is equal to the voltage on the voltage dividing node of the voltage output terminal when the current limiting circuit normally works. As shown in fig. 2, the voltage output terminal is connected to a resistor R2 and a resistor R3 in sequence, wherein the resistor R3 is grounded, and a voltage dividing node between the resistor R2 and the resistor R3 is connected to the first operational amplifier. In addition, the first operational amplifier further comprises two power supply terminals, one of which is connected with a power supply voltage VCC, and the other of which is grounded.
According to the virtual short characteristic (normal working state, the voltage of the positive input end and the reverse input end is equal) of the operational amplifier, the output voltage V of the fail current limiting circuit OUT And a reference voltage V of the first operational amplifier REF The relationship between them is: v OUT =V REF R3 (R2+ R3). During the operation of the first operational amplifier, the output voltage V is not stable because the voltages applied may not be stable OUT May be higher or lower than the above V OUT Theoretical value of (i), i.e. V REF Value of/R3 · (R2+ R3).
In this embodiment, the first operational amplifier and the voltage-stabilizing module can form a negative feedback circuit when the actual V is OUT Value ratio of the above V OUT When the theoretical value of (a) is large, the first operational amplifier outputs a value opposite to the inverted input, i.e., outputs a value larger than the actual value of V in the present application, according to the principle of the operational amplifier OUT A value that is small; when the actual V OUT Value ratio of the above V OUT Is small, the first operational amplifier will output a value opposite to the inverting input, i.e. in this application output is less than the actual V, according to the principle of the operational amplifier OUT A large value. Thereby can play a role in stabilizingOutput voltage V OUT This in turn allows a more accurate current to be obtained.
As shown in fig. 2, the first current mirror includes a cascode first MOS transistor and a cascode second MOS transistor. The source electrode of the first MOS tube and the source electrode of the second MOS tube are both connected with the power supply voltage VCC, and the grid electrode of the first MOS tube is connected with the grid electrode of the second MOS tube and is both connected with the current source IBIAS.
Further, as shown in fig. 2, the current limiting circuit further includes a triode, a base of the triode is connected to the output terminal of the first operational amplifier, an emitter of the triode is connected to a gate of a sixth MOS transistor and a gate of a seventh MOS transistor, which will be described below, and a collector of the triode is connected to the first current mirror (specifically, a drain of the second MOS transistor). When the output voltage of the first operational amplifier makes the triode conductive, the output voltage V can be obtained through the triode OUT The change of the voltage is transmitted to the voltage stabilizing module.
In some embodiments of the present invention, the voltage stabilizing module may include a second operational amplifier, a third MOS transistor, a fourth MOS transistor, and a fifth MOS transistor; the source electrodes of the fourth MOS tube and the fifth MOS tube are respectively connected with a first voltage source, the drain electrodes of the fourth MOS tube and the fifth MOS tube are respectively connected with the input end of the second operational amplifier, and the grid electrode of the fourth MOS tube is connected with the drain electrode of the third MOS tube; and the grid electrode of the fourth MOS tube is connected with the grid electrode of the fifth MOS tube to form a second current mirror, and the second current mirror amplifies the current by a specified multiple.
The input end of the second operational amplifier is further connected with the voltage output end, the output end of the second operational amplifier is connected with the grid electrode of the third MOS tube, and the second operational amplifier is connected with the floating ground voltage.
As shown in fig. 2 and fig. 3, the voltage stabilizing module includes a second operational amplifier, a third MOS transistor, a fourth MOS transistor and a fifth MOS transistor, and the positive input end and the output voltage V of the second operational amplifier OUT And the inverted input end of the second operational amplifier is connected with the drain electrode of the fourth MOS tube. The source of the fourth MOS transistor is connected to the first voltage source VB, so the drain voltage Vtr of the fourth MOS transistor is also positively correlated to the first voltage source VB, that is, when the first voltage source VB is high (or increased), the fourth MOS transistor is turned onThe drain voltage of the MOS tube is also high voltage (increased); when the first voltage source voltage VB is a low voltage (or decreases), the drain voltage Vtr of the fourth MOS transistor is also a low voltage (or decreases). The fifth MOS transistor and the fourth MOS transistor are cascode current mirrors, that is, the source of the fifth MOS transistor is also connected to the first voltage source voltage VB, and the drain of the fifth MOS transistor is connected to the output voltage V OUT The drain voltage of the fifth MOS transistor is connected with the output voltage V OUT And (4) positively correlating.
As above, the second operational amplifier, the third MOS transistor, the fourth MOS transistor and the fifth MOS transistor can form a negative feedback circuit (output voltage V) OUT Back to the positive input of the second operational amplifier), when the voltage at the positive input of the second operational amplifier (output voltage V) OUT ) When the voltage at the reverse input end (the drain voltage Vtr of the fourth MOS tube) is equal, the fifth MOS tube and the fourth MOS tube work normally as current mirrors, and the current flowing through the fifth MOS tube and the fourth MOS tube can be amplified. And because the second operational amplifier floats to the ground, the interference of an external element to the circuit can be reduced, and the stability of the output voltage and the accuracy of the current can be further improved.
Specifically, the floating ground voltage VL of the second operational amplifier may be equal to VB-VOP, i.e., the difference between the first voltage source voltage VB and the suitable operating voltage VOP of the low-voltage devices (e.g., the sixth MOS transistor and the seventh MOS transistor described below in this embodiment) in the high-voltage well. The specific value range of the appropriate working voltage VOP of the low-voltage device in the high-voltage well can be set differently according to different processes, and is usually less than 5.5V.
In this embodiment, the output voltage V OUT Applications to automotive power modules, engine control modules, multi-voltage domain designs, etc., are typically lower voltages. Therefore, when the voltage of the first voltage source voltage VB is lower, the gate voltage and the drain voltage of the fourth MOS transistor, the source voltage of the fifth MOS transistor, and the drain voltage of the third MOS transistor are lower, the third MOS transistor operates in a saturation region, and the drain voltage Vtr of the fourth MOS transistor can be lower than the lower output voltage V OUT The forward input voltage and the reverse input voltage of the second operational amplifier OPM2 are equal, the second operational amplifier OPM2 works normally, and the fifth MOS transistor and the fourth MOS transistor are used as electricityThe current mirror amplifies the current flowing through it. At this time, since the inverting input terminal of the first operational amplifier OPM1 is low, the output becomes high, so that the current amplified by the current mirror can be transmitted.
When the first voltage source voltage VB is higher, the grid voltage and the drain voltage of the fourth MOS tube, the source electrode of the fifth MOS tube and the drain voltage of the third MOS tube are higher, the fifth MOS tube works in a saturation region, and the drain voltage Vtr of the fourth MOS tube is higher than the lower output voltage V OUT . The drain voltage Vtr of the fourth MOS transistor is higher than the lower output voltage V OUT Namely, the forward input voltage and the reverse input voltage of the second operational amplifier OPM2 are not equal, the output voltage of the second operational amplifier OPM2 is low voltage and cannot work normally, and the gate voltage of the third MOS transistor is very low, namely, the third MOS transistor is normally on and works in a linear region, which is equivalent to a resistance with adjustable impedance. Therefore, when the first voltage source voltage VB is higher, the negative feedback circuit formed by the second operational amplifier, the third MOS tube, the fourth MOS tube and the fifth MOS tube cannot normally amplify, the third MOS tube works in a linear region and is equivalent to a resistor, and the impedance of the current source structure is increased, so that the influence of high voltage on the whole current limiting circuit can be avoided, the output current value is prevented from being overlarge, and the current precision of the current limiting circuit is ensured.
Furthermore, the voltage stabilizing module further comprises a first compensation device, one end of the first compensation device is connected with the source electrode of the fifth MOS tube, and the other end of the first compensation device is connected with the output end of the second operational amplifier, so that the stability of the feedback loop is improved. In particular, the compensation device may be a capacitor, such as capacitor C2 in fig. 2 and 3.
In some embodiments of this embodiment, a sixth MOS transistor and a seventh MOS transistor may be further disposed between the voltage stabilizing module and the triode in the current limiting circuit, the sixth MOS transistor is connected to the first operational amplifier, the seventh MOS transistor is connected to the voltage stabilizing module, and the sixth MOS transistor and the seventh MOS transistor form a third current mirror, which amplifies a current flowing through the third current mirror and transmits the amplified current to the voltage stabilizing module. The sixth MOS transistor and the seventh MOS transistor may form the negative feedback circuit together with the first operational amplifier and the voltage stabilizing module.
In practical applications, the current limiting circuit may be connected to some low-voltage devices, that is, the source of the sixth MOS transistor and the source of the seventh MOS transistor are grounded, respectively. At this time, the sixth MOS transistor and the seventh MOS transistor can select an N-type MOS transistor driven by low voltage.
The current limiting circuit can be further provided with an eighth MOS tube for protecting the sixth MOS tube and the seventh MOS tube, the eighth MOS tube can be a high-voltage-resistant P-type MOS tube, the grid electrode of the eighth MOS tube is connected with bias voltage, the source electrode of the eighth MOS tube can be connected with the seventh MOS tube, and the drain electrode of the eighth MOS tube is connected with the grid electrode of the fourth MOS tube.
A resistor R1 may be further disposed between the triode and the sixth MOS transistor to adjust the voltage division and the current flowing through the sixth MOS transistor and the seventh MOS transistor.
Based on the three groups of current mirrors, if the current source IBIAS passes through the first current mirror formed by the first MOS transistor and the second MOS transistor, the mirror ratio of the current mirror is K1, the ibis is further amplified by K1 times through the third current mirror formed by the sixth MOS transistor and the seventh MOS transistor, the mirror ratio of the current mirror is K2, that is, the ibis is further amplified by K1 times by K2 times, and then the current mirror passes through the second current mirror formed by the fourth MOS transistor and the fifth MOS transistor, the mirror ratio of the current mirror is K3, that is, the ibis is further amplified by K2 times by K1 times, and then the current mirror is further amplified by K3 times, so that the final current limiting size is: IBIAS K1K 2K 3. Any number of K1, K2 and K3 may be used, and those skilled in the art can determine the desired flow limiting value.
Specifically, the first MOS transistor, the second MOS transistor, the third MOS transistor, the fourth MOS transistor, and the fifth MOS transistor may all be P-type MOS transistors to bear a higher working voltage.
In other embodiments of this embodiment, the current limiting circuit may further include a second compensation device, one end of the second compensation device is connected to the output terminal of the first operational amplifier, and the other end of the second compensation device is grounded.
As shown in fig. 2, the second compensation device may include a resistor R4 and a capacitor C1 connected in series, the resistor R being grounded, and the capacitor C1 being connected to the output terminal of the first operational amplifier. By setting the second compensation device, the stability of the negative feedback loop is compensated.
In the present embodiment, the specific circuit configuration of the first operational amplifier and the specific numerical value of each voltage are not particularly limited as long as the respective functions can be performed. For example, the forward and reverse inputs of the first operational amplifier may be interchanged. The type selection of the MOS transistors is not limited to the above scheme, and may be determined according to voltage values of the power supply voltage VCC and the first power supply voltage VB.
Based on the same concept of the current limiting circuit, the present embodiment further provides a chip on which the current limiting circuit according to any of the above embodiments is integrated.
The chip provided by this embodiment is based on the same concept of the above-mentioned mode current limiting circuit, so that at least the beneficial effects that the above-mentioned current limiting circuit can achieve can be achieved, and the details are not repeated herein.
Based on the same concept of the current limiting circuit, the embodiment further provides an electronic device, which includes a control module, and the control module applies the chip.
Specifically, the electronic device may be a Micro Control Unit (MCU) including a Micro Controller Unit (MCU) prepared using the chip, and any control system (such as an automobile chip and an automobile control system) using the chip.
The electronic device provided in this embodiment is based on the same concept of the above-mentioned mode current limiting circuit, so that at least the beneficial effects that the above-mentioned current limiting circuit can achieve can be achieved, and the details are not repeated herein.
It should be noted that the above-mentioned embodiments illustrate rather than limit the application, and that those skilled in the art will be able to design alternative embodiments without departing from the scope of the appended claims. The word "comprising" does not exclude the presence of elements or steps not listed in a claim. The word "a" or "an" preceding an element does not exclude the presence of a plurality of such elements. The application may be implemented by means of hardware comprising several distinct elements, and by means of a suitably programmed computer. In the unit claims enumerating several means, several of these means may be embodied by one and the same item of hardware. In the description of the present application, it is to be noted that, unless otherwise specified, "a plurality" means two or more; the terms "upper," "lower," "left," "right," "inner," "outer," and the like, indicate an orientation or positional relationship that is merely for convenience in describing the application and to simplify the description, and do not indicate or imply that the referenced devices or elements must have a particular orientation, be constructed and operated in a particular orientation, and thus should not be construed as limiting the application. Moreover, the terms "first," "second," "third," and the like are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or order. "vertical" is not strictly vertical, but is within the tolerance of the error. "parallel" is not strictly parallel but within the tolerance of the error. The above words may be interpreted as names.
The following description is given with the directional terms as they are used in the drawings and not intended to limit the specific structure of the present application. In the description of the present application, it should also be noted that, unless expressly stated or limited otherwise, the terms "mounted," "connected," and "connected" are to be construed broadly and include, for example, fixed and removable connections as well as integral connections; may be directly connected or indirectly connected through an intermediate. The specific meaning of the above terms in the present application can be understood as appropriate by one of ordinary skill in the art.
The above description is only for the preferred embodiment of the present application, but the scope of the present application is not limited thereto, and any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope of the present application should be covered within the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.