CN114924143A - Digital source single-receiving network vector analysis system - Google Patents

Digital source single-receiving network vector analysis system Download PDF

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CN114924143A
CN114924143A CN202210368949.1A CN202210368949A CN114924143A CN 114924143 A CN114924143 A CN 114924143A CN 202210368949 A CN202210368949 A CN 202210368949A CN 114924143 A CN114924143 A CN 114924143A
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real
signal processor
mixer
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戴仁寿
林楠林
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Shenzhen Qibo Jinggong Technology Co ltd
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    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
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    • GPHYSICS
    • G01MEASURING; TESTING
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    • G01R27/00Arrangements for measuring resistance, reactance, impedance, or electric characteristics derived therefrom
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Abstract

The invention discloses a digital source single receiving network vector analysis system, which comprises a real-time signal processor, a digital-to-analog converter, an emission mixer, a local oscillator, a directional coupler, a test emission port, a test receiving port, a coupler and receiving port selection switch, a receiving mixer and an analog-to-digital converter, wherein the emission mixer is connected with the local oscillator through the directional coupler; the real-time signal processor transmits a data signal to the transmitting mixer through the digital-to-analog converter and transmits the data signal to the test transmitting port through the directional coupler; the test receiving port transmits the received data signals to the real-time signal processor through the coupler and the receiving port selection switch, and the coupler and the receiving port selection switch transmit the data signals to the real-time signal processor through the receiving mixer and the analog-to-digital converter. The invention aims to provide a digital source single receiving network vector analysis system which is good in stability, accurate in test frequency, simple in structure, convenient to use and strong in practicability.

Description

Digital source single receiving network vector analysis system
Technical Field
The invention relates to the technical field of network vector analysis, in particular to a digital source list receiving network vector analysis system.
Background
A Network Vector Analyzer (VNA) is a radio frequency/microwave/millimeter wave test instrument that can both transmit and receive in a wide frequency range. The receiver must have the function of accurately measuring the relative amplitude and phase variations between the transmitted and received signals, hence the name vectorAn analyzer. The test aims at characterizing a "Scattering Matrix" (Scattering Matrix) of unknown circuit "networks" (circuit boards, cables, connectors, converters, filters, amplifying and attenuating devices/modules, etc.). For the most common two-port networks, the two most important parameters in the scattering matrix are S 11 (reflection coefficient) and S 21 (transmission coefficient). Both of these parameters are complex functions of frequency (containing both amplitude and phase information).
Referring to fig. 1, fig. 1 is a block diagram of a conventional network vector analyzer system; in this fig. 1, the frequency tracking signal source 1 is a single frequency signal generated purely analog at any test instant by the frequency tracking signal source 1. Many communication devices today must withstand broadband modulated complex signals, so the test signals of high performance network vector analyzers should also provide broadband complex signals;
the test signal and correction algorithm module 5 of fig. 1 has functions of a circuit and a correction algorithm for accurately testing the amplitude ratio and the phase difference between two signals, however, how accurately the test signal and correction algorithm module 5 measures the amplitude ratio and the phase difference, especially the phase difference, between two signals is a very challenging radio frequency circuit design, especially considering that the directional coupler 2 is not ideal, a forward direction signal leaks into a reverse direction (R), and a reverse direction signal also enters into a forward direction (F).
Therefore, many "complex" circuit designs and many patent applications for phase detection have been developed to test the phase difference between the transmitted and reflected signals accurately and truly. The existing network vector analyzer is too complex in the aspect of testing the phase difference between accurate and real transmitted and reflected signals, and is not suitable for the development of the modern electronic industry.
Chinese patent application No. 201310596828.3, application date: 11/22/2013, open day: 19/02/2014, with patent names: the invention discloses a broadband vector network analyzer, which is characterized in that a frequency segmentation mode is adopted, a test frequency range is divided into three frequency bands of low frequency, radio frequency and microwave, and excitation signal generation, test signal directional separation and variable frequency receiving methods of each frequency band are different. The instrument generally comprises a network analysis module, a 6-20G front-end module and a 6G front-end module, wherein the network analysis module comprises an excitation signal source submodule, a fixed local oscillator submodule, a local oscillator signal source submodule and an intermediate frequency processing submodule, the 6 GHz-20 GHz front-end module is connected with the 6G front-end module and shares a test port of the 6-20G front-end module, and the two front-end modules are respectively connected to the network analysis module to realize interaction with the submodules of the network analysis module. The invention adopts a measuring frequency segmentation processing mode, so that the processing of different frequency bands is mutually independent, the difficulties in low-frequency measurement and high-frequency measurement design under the condition of small volume are effectively avoided, and the wider frequency measurement range is realized.
Although the above patent document discloses a wideband vector network analyzer, the testing frequency of the wideband vector network analyzer is not accurate enough, the stability is not good, the testing method is not simple enough, and the practicability is not strong.
Disclosure of Invention
In view of this, the invention provides a digital source single-receiving network vector analysis system with good stability, accurate test frequency, simple structure, convenient use and strong practicability.
In order to realize the purpose of the invention, the following technical scheme can be adopted:
a digital source single receiving network vector analysis system comprises a real-time signal processor, a digital-to-analog converter, a transmitting mixer, a local oscillator, a directional coupler, a testing transmitting port, a testing receiving port, a coupler and receiving port selection switch, a receiving mixer and an analog-to-digital converter;
the real-time signal processor transmits a data signal to a transmitting mixer through a digital-to-analog converter, and the transmitting mixer transmits the data signal to a test transmitting port through a directional coupler; the test receiving port transmits the received data signal to the real-time signal processor through the coupler and the receiving port selection switch, and the coupler and the receiving port selection switch transmit the data signal to the real-time signal processor through the receiving mixer and the analog-to-digital converter;
a local oscillator is arranged between the transmitting mixer and the receiving mixer, and transmits a numerical control frequency source to the transmitting mixer and the receiving mixer respectively; and a forward and reverse selection switch is arranged between the directional coupler and the coupler and between the directional coupler and the receiving port selection switch, and the forward and reverse selection switch respectively controls the directional coupler and the receiving port selection switch.
The real-time signal processor includes a signal processor having a real-time continuous high sampling frequency for data transmission, reception and processing.
The real-time signal processor is a signal processor for transmitting and receiving intermediate frequency signals; the frequency bandwidth of the intermediate frequency signal is W, and the frequency bandwidth meets the formula:
Figure BDA0003587067100000031
said F 0 At an intermediate frequency, said F s Is the sampling frequency.
The test frequency point distance of the signals transmitted by the real-time signal processor is dF; the dF satisfies the following equation:
1) dF must divide W by
Figure BDA0003587067100000032
And force K to be an even number;
2) dF must be divided by F s Let us order
Figure BDA0003587067100000033
3) dF must be divided by F 0 Let us order
Figure BDA0003587067100000034
The real-time signal processor obtains a multi-frequency digital signal x (n) through the following formula;
Figure BDA0003587067100000035
wherein, a (k) represents the weighted amplitude of a frequency point, and p (k) is the initial phase corresponding to each frequency point; x (N) is a broadband signal composed of K frequencies with N (number of sampling points) period.
The digital-to-analog converter is used for generating a fixed periodic multi-frequency signal; the digital-to-analog converter is adjusted to different radio frequency points through the transmitting mixer and the local oscillator; the real-time signal processor controls the local oscillator to generate a discrete frequency point F x (ii) a Said F x Obtained by the following formula:
Figure BDA0003587067100000041
wherein, F 1 ,F 2 To select a test frequency range.
The invention has the beneficial effects that: 1) the invention completes the accurate measurement of the amplitude ratio and the phase difference of the two signals in a single connection mode; the invention fully utilizes the periodicity of the digital signal source, and ensures that the phase difference between the transmitted signal and the reflected signal is constant at each frequency point in the aspect of receiving data processing. The aim of double receiving is achieved by single-channel receiving through a forward and reverse selection switch; 2) the invention adopts the complex field ratio H (f) of the reverse signal and the forward signal in the calculation step 2 (f)/H 1 (f) The calculation gracefully removes the dependence on the initial phase of the signal and also automatically removes the uncertainty of the phase and the amplitude brought by the whole hardware signal flow system; in a sense, the temperature drift problem is also solved; 3) the signal source is a broadband signal consisting of a plurality of frequencies, the test result reflects the performance state of the tested part in practical application more truly, and the practicability is high; 4) the invention has simple and convenient use, good stability and accurate test, is a technical upgrade in the field and is suitable for general popularization and use.
Drawings
FIG. 1 is a block diagram of a prior art network vector analyzer system for a digital source single receive network vector analysis system in accordance with an embodiment of the present invention;
fig. 2 is a system block diagram of a digital source single receiving network vector analysis system according to an embodiment of the present invention.
Detailed Description
The invention is further described in detail below with reference to the drawings and the examples of the invention.
Real time example 1
Referring to fig. 1, a conventional network vector analyzer generally includes a frequency tracking signal source 1, a directional coupler 2, a test port 3, a dual receiver 4, and a test signal and correction algorithm module 5; the frequency tracking signal source 1 is a single frequency signal generated by pure simulation at any testing moment of the frequency tracking signal source 1. Many communication devices today must withstand broadband modulated complex signals, so the test signals of high performance network vector analyzers should also provide broadband complex signals;
the test signal and correction algorithm module 5 has functions of accurately testing the amplitude ratio and the phase difference between two signals, correcting algorithm, and the like, however, how the test signal and correction algorithm module 5 accurately measures the amplitude ratio and the phase difference, especially the phase difference, between two signals is a very challenging radio frequency circuit design, especially considering that the directional coupler 2 is not ideal, a forward direction signal leaks into a reverse direction (R), and a reverse direction signal also enters into a forward direction (F).
Therefore, the existing vector analyzer has low accuracy of testing frequency and poor stability, and is difficult to meet the requirement of high-precision testing.
Referring to fig. 2, the digital source single-receiver network vector analysis system includes a real-time signal processor (DSP)100, a digital-to-analog converter (DAC)101, a transmit mixer 102, a local oscillator 110, a directional coupler 103, a test transmit port 104, a test receive port 108, a coupler and receive port selection switch 107, a receive mixer 106, and an analog-to-digital converter (ADC) 105;
the real-time signal processor (DSP)100 transmits a data signal to a transmit mixer 102 through a digital-to-analog converter (DAC)101, and the transmit mixer 102 transmits the data signal to a test transmit port 104 through a directional coupler 103; the test receiving port 108 passes the received data signal through a coupler and receiving port selection switch 107, and the coupler and receiving port selection switch 107 transmits the data signal to the real-time signal processor (DSP)100 through the receiving mixer 106 via the analog-to-digital converter 105;
a local oscillator 110 is arranged between the transmitting mixer 102 and the receiving mixer 106, and the local oscillator 110 transmits a numerical control frequency source to the transmitting mixer 102 and the receiving mixer 106 respectively; a forward and reverse selection switch 109 is arranged between the directional coupler 103 and the coupler and receiving port selection switch 107, and the forward and reverse selection switch 109 controls the directional coupler 103 and the coupler and receiving port selection switch 107 respectively.
In this embodiment, the local oscillator 110 is preferably a digitally controlled frequency source local oscillator 110.
In this embodiment, the real-time signal processor (DSP)100 generates a digital signal source to be transmitted, and transmits a corresponding intermediate frequency (spectrum) analog signal to the transmission mixer 102 via a digital-to-analog converter (DAC)101 to be up-regulated to a transmission signal in a desired test frequency range, and the transmission mixer 102 transmits the transmission signal to the test transmission port 104 via a directional coupler 103; and entering a circuit network to be tested.
The test receiving port 108 transmits the received analog frequency (spectrum) signal to the receiving mixer 106 through the coupler and the receiving port selection switch 107 to be down-regulated and restored to an intermediate frequency (spectrum) analog signal, and the intermediate frequency (spectrum) analog signal is converted into a receiving digital signal source through the analog-to-digital converter 105 and transmitted to the real-time signal processor.
In this embodiment, the real-time signal processor (DSP)100 employs a real-time continuous digital signal source. The digital signal source can generate a single frequency signal and can also generate a broadband complex signal.
In this real-time example, the real-time signal processor (DSP)100 employs single-receive real-time continuous digital broadband signal processing during signal reception. The known accurate and controllable phase difference information exists between the received signal and the digital source signal, so that the phase difference and the amplitude ratio between the transmitted signal and the received signal can be accurately, stably, simply and clearly detected only by single-channel receiving.
In this embodiment, preferably, the real-time signal processor (DSP)100 can control the local oscillator 110 and the forward/reverse selection switch 109 through the control line 111, respectively.
In this embodiment, it is preferable that the real-time signal processor (DSP)100 includes a signal processor having functions of continuously coping with data transmission, reception, and processing of an intermediate frequency (spectrum) in real time, and controlling various parts of the entire system.
Further, preferably, the real-time signal processor (DSP)100 is a chip of model TMS320C 6657.
In this embodiment, the digital-to-analog converter (DAC)101 is a digital-to-analog converter (DAC) with a high sampling frequency, and preferably, the digital-to-analog converter (DAC)101 is a chip with a model of MAX 5885.
In this real-time example, in an actual implementation process, the transmitting mixer 102 may be composed of mixers of different frequency bands according to a frequency range requirement.
In this embodiment, the directional coupler 103 is a broadband directional coupler, f (forward) represents a forward coupling outlet, and r (reverse) represents a reverse coupling outlet.
In this embodiment, the test transmitting port 104 is a signal transmitting port; in measuring the reflection coefficient (S) 11 ) Then, only the test transmitting port 104 is connected; when measuring the transmission coefficient (S) 21 ) Then the transmit port 104 and the receive port 108 need to be tested simultaneously.
In this embodiment, the forward/reverse selector switch (F/R)109 is a digitally controlled broadband alternative switch. The forward/reverse selection switch (F/R)109 transmits either a signal of a forward outlet (F port) of the directional coupler 103 or a signal of a reverse outlet (R port) to the coupler and reception port selection switch 107 under the control of the real-time signal processor (DSP) 100.
In this real-time example, the coupler and receive port selector switch 107 is another wide-band digitally controlled alternative switch, which is tasked to either transmit the coupler output signal from the forward/reverse selector switch (F/R)109 to the receive mixer under the control of the real-time signal processor (DSP)100106, or select to test the signal transmitted by the receive port 108. Measuring the reflection coefficient (S) 11 ) When the coupler and receiving port selection switch 107 is on, the forward/reverse selection switch (F/R)109 is selected; testing the Transmission coefficient (S) 21 ) The coupler and reception port selection switch 107 selects the connection test reception port 108.
The test receiving port 108 is testing the reflection coefficient (S) 11 ) This port is not used. In testing the transmission coefficient (S) 21 ) The test reception port 108 is required to be used.
The receive mixer 106 is the same series of mixers as the transmit mixer 102. The transmit mixer 102 functions as an up-converter and the receive mixer 106 functions as a down-converter.
The analog-to-digital converter (ADC)105 is a high-speed sampling ADC, and preferably, the analog-to-digital converter (ADC)105 is a chip of LTC2163 series.
The local oscillator 110 is a digitally controlled frequency source that generates discrete frequency signals evenly distributed over a test frequency range under the control of a real-time signal processor (DSP) 100.
In this embodiment, preferably, the real-time signal processor (DSP)100 is a signal processor that transmits and receives an Intermediate Frequency (IF) signal; the frequency bandwidth of the intermediate frequency signal is W, and the frequency bandwidth meets the formula:
Figure BDA0003587067100000071
said F 0 At an intermediate frequency, said F s Is the sampling frequency.
In this embodiment, according to a user requirement (for example, the number of test points in a certain test range or the maximum test distance in a DTF test), the distance between two adjacent frequency points is designed and set as dF; the dF must simultaneously satisfy the following equation:
1) dF must divide W exactly
Figure BDA0003587067100000081
And force K to be an even number;
2) dF must be divided by F s Let us order
Figure BDA0003587067100000082
3) dF must be divided by F 0 Let us order
Figure BDA0003587067100000083
In this embodiment, preferably, the real-time signal processor (DSP)100 obtains the multi-frequency digital signal x (n) by the following formula;
Figure BDA0003587067100000084
in the above expression, a (k) represents the weighting amplitude of a certain frequency bin, and in actual practice, a (k) is 1, and p (k) is the initial phase corresponding to each frequency bin.
The target for the selection of p (k) is to minimize the peak-to-average ratio of the final signal x (n). The digital signal x (N) is a broadband signal (bandwidth W, sampling frequency F) composed of K frequencies with N (sampling points) periods s ). This signal is repeatedly and continuously sent to a digital-to-analog converter (DAC)101 to complete the transmission of the intermediate frequency signal.
In this embodiment, the digital-to-analog converter (DAC)101 is a digital-to-analog converter that generates a fixed periodic multi-frequency signal; the digital-to-analog converter (DAC)101 is tuned up to different rf frequencies by the transmit mixer 102 and the local oscillator 110; the real-time signal processor 100 controls the local oscillator 110 to generate the discrete frequency point F x (ii) a Said F x Obtained by the following formula:
Figure BDA0003587067100000085
wherein, F 1 ,F 2 To select a test frequency range.
When the digital signal is processed, the invention comprises the following steps:
at each RF frequency point F x Upper, real time messageThe signal processor (DSP)100 on the receiving side must perform the following signal processing (assumed to be S) 11 Measurement):
1) on receiving the ADC signal, the DSP must perform block processing (block processing), each data block must be composed of consecutive sampled data points, the length of the data block must be an integral multiple of N, and L ═ B × N, and B is an integer.
2) The spacing between any two data blocks must also be an integer multiple of N, which digitally ensures that the phase difference between the transmitted and received signals is constant.
3) And forward/reverse selection switch 109 is turned on to F, (forward/reverse selection switch 109 is constantly selected by coupler and reception port selection switch 107), and data blocks of length L ═ B × N are added in "small blocks":
Figure BDA0003587067100000091
a data block y (N) of length N is formed.
4) And the y (n) signals are arranged on the following frequency points:
Figure BDA0003587067100000092
performing discrete Fourier transform to obtain K complex numbers H 1 (j),j=0,1,2,…,K-1。
5) The forward and reverse selection switch 109 is turned to the R port, and then the same calculation steps as the above 3 and 4 are carried out to obtain H 2 (j)。
6) Tuning the local oscillator 110 to the next frequency (F) x + W), then repeat the above steps 3), 4), 5) and add the data to the corresponding H 1 (j),H 2 (j) (i.e. continuously expanding the length of the two complex vector columns), until the local oscillator finishes scanning all the frequency points, we will obtain two complex vector columns H 1 (f),H 2 (f),f=0,1,2,…,(m2-m1+1)*K。
7) Combining the two complex vector rows into one complex vector row H (f) ═ H 2 (f)/H 1 (f) As will be demonstrated below, by H (f), we can determine S 11 (f) And (4) parameters.
The invention measures the reflection coefficient (S) 11 ) ComputingThe derivation is:
assuming that the outgoing signal is X (f) and the return signal is Y (f) at directional coupler 103, the present invention has the following equations describing the coupler characteristics and the two vectors H measured 1 (f) And H 2 (f):
H 1 (f)=D 11 *X(f)+D 12 *Y(f)
H 2 (f)=D 21 *X(f)+D 22 *Y(f)
Above D 11 ,D 12 ,D 21 ,D 22 Are scattering matrix parameters that describe the properties of the coupler and these values will be determined by standard device rectification.
Simplifying the above equation system can result in:
Figure BDA0003587067100000101
wherein R (f) ═ Y (f)/X (f) is S required 11 (f) Parameter(s)
Figure BDA0003587067100000102
Figure BDA0003587067100000103
The correction process of the invention is as follows:
connecting 3 standard impedance components, 50 Ω, open circuit (impedance ∞), and short circuit (impedance ∞) to the test transmission port 104, and for each component, the present invention completes data processing in a complete frequency range to obtain a corresponding complex vector column h (f), and according to the above expression of h (f), the following relationship can be obtained:
1. a standard 50 omega impedance is used for the impedance,
Figure BDA0003587067100000104
because R ═ 0;
2. the circuit is opened, and the air conditioner is opened,
Figure BDA0003587067100000105
because R ═ 1;
3. short-circuiting the short-circuit-protection circuit,
Figure BDA0003587067100000106
because R is-1;
above H l ,H o ,H s Is a complex vector sequence in the full frequency band range obtained after correction. They will be permanently stored until new corrective data replaces them. These correction data are calculated as unknown S 11 The preconditions required for the parameters.
Coefficient of reflection (S) 11 ) Final calculation formula
In this embodiment, according to the above algebraic relation, we can obtain:
C=(H o -H s )/(2*H l -H o -H s ),A=H l *C,B=H o *(C+1)-A
corresponding to an unknown network to be tested, the invention collects the corresponding complex vector column H x (f) Then S required 11 (f) The following steps are carried out:
Figure BDA0003587067100000107
note that a, C, B are all complex columns dependent on the frequency f. All of the above operations are complex operations.
Other data formulas of the invention are as follows:
1. echo attenuation: rtl (f) ═ 20 log 10 (|S 11 (f)|)
2. Standing-wave ratio: vswr (f) (|1+ | S) 11 ||)/(1-|S 11 |)
Smith Chart, aligning a plurality of columns S 11 (f) Represented in Smith Chart polar coordinate System
DTF (distance to fault), or time domain reflectometry results: r (t) ═ S 11 (f) Inverse fourier transform of | s.
In the present embodiment, the transmission coefficient (S) 21 ) The testing steps are as follows:
constant connection of coupler and receive port selection switch 107 to the test receive port108, then designing, receiving and processing data blocks, adjusting frequency with the same transmitted signal, but without adjusting the forward/reverse selection switch 109; first, a calibration wire is used to connect the test transmit port 104 with the test receive port 108 to measure the complex vector column H c (f) Then accessing unknown network to obtain H x (f) Then, S measured 21 (f) Namely:
S 21 (f)=H x (f)/H c (f)。
the invention completes the accurate measurement of the amplitude ratio and the phase difference of the two signals by single receiving, fully utilizes the periodicity of a digital signal source, and ensures that the phase difference between the transmitted signal and the reflected signal is constant at each frequency point in the aspect of receiving data processing. Through the forward and reverse selection switch 109, the invention achieves the purpose of double receiving by single-channel receiving; the invention has strong practicability, good stability and more accurate test frequency.
The above description is only a preferred embodiment of the present invention, and is not intended to limit the scope of the present invention.

Claims (6)

1. A digital source list reception network vector analysis system, characterized by: the device comprises a real-time signal processor, a digital-to-analog converter, an emission mixer, a local oscillator, a directional coupler, a test emission port, a test receiving port, a coupler and receiving port selection switch, a receiving mixer and an analog-to-digital converter;
the real-time signal processor transmits a data signal to a transmitting mixer through a digital-to-analog converter, and the transmitting mixer transmits the data signal to a test transmitting port through a directional coupler; the test receiving port transmits the received data signal to the real-time signal processor through the coupler and the receiving port selection switch, and the coupler and the receiving port selection switch transmit the data signal to the real-time signal processor through the receiving mixer and the analog-to-digital converter;
a local oscillator is arranged between the transmitting mixer and the receiving mixer, and transmits a numerical control frequency source to the transmitting mixer and the receiving mixer respectively; and a forward and reverse selection switch is arranged between the directional coupler and the coupler and between the directional coupler and the receiving port selection switch, and the forward and reverse selection switch respectively controls the directional coupler and the receiving port selection switch.
2. The digital source receive network vector analysis system of claim 1, wherein: the real-time signal processor includes a signal processor having a real-time continuous high sampling frequency for data transmission, reception and processing.
3. The digital source receive network vector analysis system of claim 2, wherein: the real-time signal processor is a signal processor for transmitting and receiving intermediate frequency signals; the frequency bandwidth of the intermediate frequency signal is W, and the frequency bandwidth meets the formula:
Figure FDA0003587067090000011
said F 0 At an intermediate frequency, said F s Is the sampling frequency.
4. The digital source receive network vector analysis system of claim 1 or 2, wherein: the test frequency point distance of the signals transmitted by the real-time signal processor is dF; the dF satisfies the following equation:
1) dF must divide W by
Figure FDA0003587067090000012
And force K to be an even number;
2) dF must divide by Fs, order
Figure FDA0003587067090000021
3) dF must be divided by F 0 Let us order
Figure FDA0003587067090000022
5. The digital source receive network vector analysis system of claim 4, wherein: the real-time signal processor obtains a multi-frequency digital signal x (n) through the following formula;
Figure FDA0003587067090000023
wherein, a (k) represents the weighted amplitude of a frequency point, and p (k) is the initial phase corresponding to each frequency point; x (N) is a broadband signal composed of K frequencies with N (number of sampling points) period.
6. The digital source receive network vector analysis system of claim 5, wherein: the digital-to-analog converter is used for generating a fixed periodic multi-frequency signal; the digital-to-analog converter is adjusted to different radio frequency points through the transmitting mixer and the local oscillator; the real-time signal processor controls the local oscillator to generate a discrete frequency point F x (ii) a Said F x Obtained by the following formula:
F x =m*W-F 0 ,m=[m 1 ,m 2 ],
Figure FDA0003587067090000024
wherein, F 1 ,F 2 To select a test frequency range.
CN202210368949.1A 2022-04-08 2022-04-08 Digital source single-receiving network vector analysis system Pending CN114924143A (en)

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