CN114910689A - Real-time monitoring method for chip current - Google Patents
Real-time monitoring method for chip current Download PDFInfo
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- CN114910689A CN114910689A CN202210816401.9A CN202210816401A CN114910689A CN 114910689 A CN114910689 A CN 114910689A CN 202210816401 A CN202210816401 A CN 202210816401A CN 114910689 A CN114910689 A CN 114910689A
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Abstract
The invention relates to the technical field of chip design, in particular to a real-time monitoring method of chip current, which comprises the following steps: acquiring the turnover times of multiple key signals in the same time interval in real time, and reading the pre-stored optimal weight of each key signal; the optimal weight is obtained by fitting equivalent current models corresponding to a plurality of different historical time intervals to each path of key signal, wherein the plurality of different historical time intervals comprise a plurality of different working states, and the turning times corresponding to the different working states are different; and carrying out weighted summation on the historical turnover times of the multiple key signals according to the optimal weight corresponding to each key signal to obtain equivalent currents of the same power domain in the chip at the corresponding time interval. Compared with the prior art, the invention has the advantages that the response speed is improved by thousands of times, the current of each chip in a very short time can be obtained, and the purposes of microsecond-level real-time monitoring and chip current regulation can be achieved.
Description
Technical Field
The invention relates to the technical field of chip design, in particular to a real-time monitoring method for chip current.
Background
The chip current is an important parameter of the chip, and if the current of one chip is too large, the current may exceed the current bearing capacity of a power management module (PMU), and then the power management module is triggered to perform overcurrent protection, which may cause the chip to be halted and even restarted, so it is very important for the chip to reduce the current. At present, the conventional method for calculating the chip current needs to read corresponding data from a sensor, and the data is the response speed of millisecond level, and the response speed of millisecond level has larger response delay due to higher working frequency of the chip.
Disclosure of Invention
In order to solve the above technical problems, an object of the present invention is to provide a method for monitoring a chip current in real time, wherein the adopted technical scheme is as follows:
the embodiment of the invention provides a real-time monitoring method of chip current, which comprises the following steps:
acquiring the turnover times of multiple paths of key signals in the same time interval in real time, and reading the optimal weight of each pre-stored path of key signals, wherein the multiple paths of key signals are multiple key signals corresponding to each circuit module in the same power domain in the same chip, and the same power domain means that each circuit module shares the same voltage source to supply power; the optimal weight is obtained by fitting equivalent current models corresponding to a plurality of different historical time intervals to each path of key signal, the plurality of different historical time intervals comprise a plurality of different working states, and the turning times corresponding to the different working states are different; the equivalent current model is based on the historical turning times of all paths of key signals of the same circuit module in the same historical time interval, the historical turning times of multiple paths of key signals are weighted and summed according to preset weight parameters of all paths of key signals to obtain equivalent current, and the equivalent current model is established according to the mapping relation between the equivalent current and the simulation current of the circuit module, wherein the preset weight parameters are parameters to be fitted; and carrying out weighted summation on the turnover times of the multiple key signals according to the optimal weight corresponding to each key signal to obtain equivalent currents of the same power domain in the chip in the corresponding time interval.
The invention has the following beneficial effects:
according to the method provided by the embodiment of the invention, only the turnover frequency of the key signal needs to be monitored, then the corresponding equivalent current can be obtained by combining the pre-stored optimal weight of the corresponding key signal, and the optimal weight is stored in the storage unit of the chip and is the microsecond-level response speed, compared with the prior art, the response speed is improved by millions of times, the current of the chip in each extremely short time can be obtained, and the purpose of monitoring the chip current in microsecond-level real time can be achieved.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions and advantages of the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and other drawings can be obtained by those skilled in the art without creative efforts.
Fig. 1 is a flowchart of a method for monitoring a chip current in real time according to an embodiment of the present invention.
Detailed Description
To further illustrate the technical means and effects of the present invention adopted to achieve the predetermined objects, the following detailed description will be given for the real-time monitoring method of chip current according to the present invention, and the specific implementation manner, structure, features and effects thereof with reference to the accompanying drawings and preferred embodiments. In the following description, different "one embodiment" or "another embodiment" refers to not necessarily the same embodiment. Furthermore, the particular features, structures, or characteristics may be combined in any suitable manner in one or more embodiments.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs.
The following describes a specific scheme of the real-time monitoring method of the chip current provided by the invention in detail with reference to the accompanying drawings.
Referring to fig. 1, a flowchart of a real-time monitoring method for chip current according to an embodiment of the present invention is shown, where the real-time monitoring method includes the following steps:
step S001, acquiring the turnover frequency of multiple paths of key signals in the same time interval in real time, and reading the pre-stored optimal weight of each path of key signals, wherein the multiple paths of key signals are multiple key signals corresponding to at least one circuit module in the same power domain in the same chip, and the same power domain means that each circuit module shares the same voltage source to supply power; the optimal weight is obtained by fitting equivalent current models corresponding to a plurality of different historical time intervals to obtain the optimal weight of each path of key signals, wherein the plurality of different historical time intervals comprise a plurality of different working states, and the turning times corresponding to the different working states are different; the equivalent current model is based on the historical turning times of all the key signals in the same historical time interval, the historical turning times of the key signals are weighted and summed according to preset weight parameters of all the key signals to obtain equivalent current, and the equivalent current model is established according to the mapping relation between the equivalent current and the simulation current of the circuit module, wherein the preset weight parameters are parameters to be fitted.
It should be noted that a plurality of circuit blocks are included in the same power domain of the same chip, and the mature design of each circuit block having independent functions in the chip is also referred to as IP. The signal is overturned along with the operation of the chip, the occupation ratio of the current caused by the overturning of the clock signal in the current of the chip is the largest, the parasitic RC circuit in the chip is charged and discharged due to the fact that the signal is overturned once, the larger the signal overturning frequency is in the same time interval, the more frequent the operation is, the larger the current of the chip is, and therefore the overturning frequency of the signal can reflect the size of the current.
The multi-path key signals refer to a plurality of different key signals (performance counters) in a circuit module, the key signals refer to key signals representing key signals which mainly contribute to the current of a chip in each circuit module in the same power supply domain and used for representing the count of activities related to hardware in the circuit modules, each key signal represents a type of operation, the value of each key signal represents the number of times of corresponding operation in statistical time, one type of operation refers to read-write operation or operation and the like, and the operation comprises addition operation, multiplication operation and the like. For a circuit module, the influence of the operation represented by different key signals on the current of the circuit module is different, that is, the operation represented by different key signals is of different importance for the same circuit module.
In the process of acquiring the turnover times of the multiple paths of key signals in the same time interval in real time, the time interval adopts microsecond-level time intervals. In the embodiment of the present invention, the optimal weight is also obtained by fitting an equivalent current model corresponding to a plurality of microsecond-level historical time intervals, for example, 10 microseconds is used as a time interval; in other embodiments, the implementer may set the length of the historical time interval according to the requirement, which is not limited herein. For the multipath key signals under the kth circuit module, the equivalent current model meets the following conditions:
in the formula I k (t) represents the simulated current of the kth circuit module in the same power domain during the tth historical time interval,
Representing the historical turnover number of the ith circuit key signal of the kth circuit module in the same power domain in the tth historical time interval,
The preset weight parameter represents the ith key signal of the kth circuit module in the same power domain, n represents the number of key signals in the kth circuit module in the same power domain, and b (k) represents a constant.
Ideally, the equivalent current is equal to the simulation current, wherein the simulation current is the current of the corresponding circuit module obtained by the conventional simulation method, and the functions of simulating the current of the circuit module and obtaining the simulation current of the whole chip in the prior art are both within the protection scope of the present invention. In the equivalent current model, the historical turnover times and the simulation current are known numbers, the preset weight parameters of each path of key signals are unknown numbers, and a group of optimal weights can be obtained by fitting the equivalent current model under a plurality of time intervals, so that the curve of the equivalent current can be wirelessly close to the curve of the simulation current.
Similarly, the optimal weight of the multiple paths of key signals corresponding to each circuit module can be obtained by adopting the same method. The optimal weights of the multiple paths of key signals corresponding to different circuit modules are stored in corresponding storage modules, such as registers, and can also be stored in designated positions according to requirements, so that the corresponding optimal weights can be read when the chip current is calculated.
It should be noted that, in order to improve the fitting accuracy, in the embodiment of the present invention, based on the same time interval, the number of times of flipping of each path of signal in different working states needs to be obtained, the number of times of flipping in different working states is different, the number of times of flipping reflects the busy degree of chip work, different working states correspond to different scenes, for example, the number of times of flipping of multiple paths of key signals acquired in a working state with frequent work, the number of times of flipping of multiple paths of key signals acquired in a working state with idle work, the number of times of flipping of signals in multiple different working states such as multiple paths of key signals acquired in a working state with idle work, and the like, the types of working states are richer, that is, the richer the scenes covered, the more accurate the model obtained by fitting, and the more accurate the optimal weight obtained by final fitting. As an example, in a game, for example, in the operating state when one character is at rest or walking, the operating state when one character is performing a plurality of actions simultaneously, and the operating state when a plurality of characters are performing the most complicated actions simultaneously in the same time interval, the busy degree of the actual operating state corresponding to the chip increases in sequence, and the current also increases in sequence.
And S002, carrying out weighted summation on the turnover times of the multiple key signals according to the optimal weight corresponding to each key signal to obtain the equivalent current of the chip in the corresponding time interval.
Specifically, by reading the optimal weight stored in the storage unit, when calculating the real-time current, the equivalent current of one circuit module in the τ -th time interval acquired in real time satisfies:
in the formula, I (tau) represents equivalent current in the same power supply domain in the chip in the tau time interval, K represents the number of circuit modules in the same power supply domain,
Represents the number of times of the i-th critical signal of the k-th circuit module in the same power domain in the tau-th time interval,
And b represents an optimal weight of the ith key signal of the kth circuit module in the same power domain, and b represents a constant.
In summary, the method provided in the embodiment of the present invention calculates the current of the chip by monitoring the number of signal flips in real time and combining the optimal weight, where the optimal weight is obtained by fitting the historical number of signal flips of each channel of key signals under different working conditions with the simulation current, and stores the optimal weight in the memory unit of the chip, so as to facilitate reading the optimal weight parameter of the corresponding key signal during the real-time current calculation process, and since the current is calculated by monitoring the number of signal flips only, and then combining the pre-stored optimal weight, the corresponding result can be obtained, which is a response speed in the order of microseconds; the method disclosed by the patent is improved by tens of millions of times compared with the response speed of the prior art, can obtain the current of the chip in each extremely short time, and can achieve the purposes of microsecond real-time monitoring and chip current adjustment.
Preferably, there are a plurality of different key signals representing different operations in a circuit module, some of the key signals have little influence on the current of the chip, and some of the key signals are closely related to the current of the chip, so that the key signals in the circuit module are screened, and the signals closely related to the current are retained, so as to reduce the amount of calculation and improve the accuracy of final fitting, wherein the method for selecting multiple paths of key signals in corresponding circuit modules comprises: the first method is to select multiple key signals according to experience; the second method is to select a plurality of key signals according to the weight obtained by fitting, specifically, establish an initial equivalent current model, perform weighted summation on the turnover times of each key signal and a preset initial weight parameter to obtain a corresponding initial actual equivalent current, establish an initial equivalent current model according to the initial simulation current and the initial actual equivalent current, fit the initial equivalent current models corresponding to a plurality of time intervals to obtain a corresponding initial weight, and select a plurality of key signals according to the initial weight, for example, select the TOP20 signals with the largest initial equivalent current. In other embodiments, other screening methods may be adopted to screen the critical signals closely related to the chip power, or the number of the selected critical signals may be set as required.
Preferably, the step of screening for key signals comprises the following optimization steps: fitting equivalent current models in all different working states based on the selected key signals, comparing the fitted curves with the simulation curves, calculating the fitting degree between the fitted curves and the simulation curves, and considering that the currently selected key signals meet the requirements when the fitting degree in all the different working states is greater than a preset fitting threshold; otherwise, fitting again by increasing the number of the key signals and calculating the fitting degree, and when the fitting degree is greater than or equal to the fitting threshold value, considering that the currently selected key signals meet the requirements. The obtaining means of the fitting degree is to obtain the sum of the mean square deviations between the two, and the obtaining of the fitting degree is the prior art and is not described any more. In the embodiment of the present invention, the preset fitting threshold is 95%, and in other embodiments, the size of the fitting threshold may also be set according to actual requirements.
Preferably, there are two methods of fitting the optimal weights in the embodiments of the present invention: the first is a weight obtained by one-time fitting as an optimal weight. The second method is to select the optimal weight by two or more fitting, and select the multi-channel key signals by using the weight obtained by the first fitting, for example, select the multi-channel signals corresponding to the top20 largest weights as the key signals; and then establishing an equivalent current model by using the selected key signals, performing second fitting on the re-established equivalent current model, and when the fitting degree between the fitting curve and the simulation curve meets the requirement, taking the weight corresponding to each key signal as the optimal weight so as to improve the selection precision of the weight. The fitting degree meeting the requirement means that the fitting degree is larger than a preset fitting threshold value. Similarly, in other embodiments, the optimal weight may also be selected in a multiple fitting manner, specifically, the key signal may be screened through the weight obtained through the last fitting multiple times, and the optimal weight may be obtained by establishing an equivalent current model according to the key signal screened last time and fitting.
Preferably, since a chip includes a plurality of IPs, each IP, that is, each circuit module, has multiple paths of key signals, and each circuit module is fitted separately, the calculation amount is large, and a certain error exists in the process of fitting the key signals in each circuit module to obtain the optimal weight, where the error refers to an error between the weight of the key signals to a single circuit module and the weight of the entire chip, and the overall error after the errors corresponding to all the circuit modules are superimposed is large, in order to reduce the calculation amount and the overall error at the same time, the multiple paths of key signals of each circuit module in different working states are selected, and the obtaining step of the optimal weight further includes:
acquiring historical turning times of all key signals under a plurality of circuit modules based on the same time interval, wherein each circuit module corresponds to a plurality of paths of key signals; and acquiring the simulation current of the whole chip in the same time interval.
And step two, carrying out weighted summation on the historical turnover times corresponding to the key signals of all the circuit modules by combining preset weight parameters, and establishing an equivalent current model of the same power domain in the chip.
Specifically, at the same time interval, the equivalent current model of the same power domain in the chip is:
wherein I (t) represents the simulation current of the same power domain in the chip in the t-th historical time interval, n represents the number of the historical key signals corresponding to the kth module in the same power domain, K represents the number of the circuit modules in the same power domain in the chip,
representing the historical flip times of the ith historical key signal of the kth module in the same power domain during the tth historical time interval,
and b is a constant, and represents the preset weight of the ith historical key signal corresponding to the kth module in the same power domain.
Compared with the mode of obtaining the optimal weight by fitting a single module, the mode of obtaining the optimal weight by fitting the whole signal by using the whole equivalent current model of the chip can reduce the calculated amount, and meanwhile, the weight of the key signal relative to the whole chip is more concerned, so that the whole error is smaller.
Preferably, since the chip includes a plurality of power domains, currents in different power domains have different influences on the chip, some power domains have larger influences on the chip, and some power domains have weaker influences on the chip. Therefore, the magnitude of the superscalar value of the equivalent current is different, the load distribution speed of the load management module for the reduction in the same power supply domain is different, and in order to achieve the purpose of adaptively adjusting the load distribution speed, a mapping table between the superscalar value of the equivalent current and the adjustment strength of the load distribution speed needs to be established, and the mapping table records the one-to-one correspondence relationship between the superscalar value and the adjustment strength. The super-standard value of the equivalent current is obtained by calculating a difference value between the equivalent current and a current threshold value, wherein the obtained difference value is the super-standard value, the current threshold value is an empirical threshold value of a safe current which can be borne by the power management module, and the current threshold value can be set according to actual requirements in practical application. The acquisition of the corresponding relation can configure the adjusting force of the corresponding load distribution speed in advance according to experience, and the adjusting force of the load distribution speed needs to be adjusted under the condition that the working stability and performance of the chip are not damaged as much as possible in the configuration process, so that the chip can work safely while keeping higher performance. The load management module obtains the adjusting force of the load distribution speed by inquiring the mapping table, and adjusts the load distribution speed according to the adjusting force.
Preferably, since the equivalent current change rate is continuously changed, in order to make the range of the equivalent current covered by the mapping table more comprehensive, the value range of the superscalar value is divided into a plurality of different levels according to the section to which the superscalar value belongs, each level corresponds to one adjustment force, and then a one-to-one mapping table between the superscalar level and one adjustment force is obtained. Specifically, firstly, calculating a difference value between the equivalent current and a current threshold value, wherein the difference value is an overproof value; and then, inquiring the standard exceeding grade according to the standard exceeding value, and inquiring a mapping table according to the standard exceeding grade to obtain the corresponding regulation strength of the load distribution speed, so that the load management module regulates the load distribution speed according to the obtained regulation strength.
It should be noted that: the precedence order of the above embodiments of the present invention is only for description, and does not represent the merits of the embodiments. And specific embodiments thereof have been described above. Other embodiments are within the scope of the following claims. In some cases, the actions or steps recited in the claims may be performed in a different order than in the embodiments and still achieve desirable results. In addition, the processes depicted in the accompanying figures do not necessarily require the particular order shown, or sequential order, to achieve desirable results. In some embodiments, multitasking and parallel processing may also be possible or may be advantageous.
The embodiments in the present specification are described in a progressive manner, and the same and similar parts among the embodiments are referred to each other, and each embodiment focuses on the differences from the other embodiments.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents, improvements and the like that fall within the spirit and principle of the present invention are intended to be included therein.
Claims (10)
1. A real-time monitoring method for chip current is characterized by comprising the following steps:
the method comprises the steps of acquiring the turnover times of multiple paths of key signals in the same time interval in real time, and reading the optimal weight of each pre-stored path of key signal, wherein the multiple paths of key signals are multiple key signals corresponding to each circuit module in the same power domain in the same chip, and the same power domain means that each circuit module shares the same voltage source for supplying power; the optimal weight is obtained by fitting equivalent current models corresponding to a plurality of different historical time intervals to each path of key signal, the plurality of different historical time intervals comprise a plurality of different working states, and the turning times corresponding to the different working states are different; the equivalent current model is based on the historical turning times of all paths of key signals of the same circuit module in the same historical time interval, the historical turning times of multiple paths of key signals are weighted and summed according to preset weight parameters of all paths of key signals to obtain equivalent current, and the equivalent current model is established according to the mapping relation between the equivalent current and the simulation current of the circuit module, wherein the preset weight parameters are parameters to be fitted;
and carrying out weighted summation on the turnover times of the multiple key signals according to the optimal weight corresponding to each key signal to obtain equivalent currents of the same power domain in the chip in the corresponding time interval.
2. The method according to claim 1, wherein the equivalent current model satisfies the following conditions:
in the formula I k (t) represents the simulated current of the kth circuit module in the same power domain in the tth historical time interval,
Showing the historical turnover number of the ith key signal of the kth circuit module in the same power domain in the tth historical time interval,
The preset weight parameter represents the ith key signal in the kth circuit module, n represents the number of key signals in the kth circuit module, and b (k) represents a constant.
3. The method for monitoring the chip current in real time according to claim 1, wherein the step of obtaining the equivalent current model comprises the following optimization steps:
based on the historical turning times of all key signals of all circuit modules in the same power domain in the same historical time interval, carrying out weighted summation on the historical turning times of multiple key signals according to preset weight parameters of all key signals in all circuit modules to obtain equivalent current, and establishing an equivalent current model of the same power domain of the chip according to the mapping relation between the equivalent current and the simulation current of the circuit modules.
4. The method according to claim 3, wherein the equivalent current model of the whole chip satisfies the following conditions:
wherein I (t) represents the simulation current of the same power domain in the chip in the t-th historical time interval, n represents the number of key signals in the k-th module in the same power domainK denotes the number of identical power domain circuit blocks in the chip,
indicating the historical turnover number of the ith historical key signal of the kth module in the same power domain in the tth historical time interval,
and b represents a constant.
5. The method for real-time monitoring of chip current according to claim 1 or 3, wherein the step of selecting the key signal comprises:
and fitting the equivalent current models corresponding to the plurality of historical time intervals to obtain corresponding weights, and selecting a plurality of key signals according to the weights.
6. The method of claim 1, wherein the step of screening the key signals further comprises the step of optimizing:
fitting equivalent current models in all different working states based on the selected key signals, calculating the fitting degree between the fitted curve and the simulation curve, and considering that the currently selected key signals meet the requirements when the fitting degree is greater than a preset fitting threshold;
otherwise, increasing the key signals, fitting again and calculating the fitting degree, so that the fitting degree is larger than a preset fitting threshold value to obtain the key signals meeting the requirements.
7. The method for monitoring the chip current in real time according to claim 1, wherein the optimal weight is obtained by fitting equivalent current models in all different working states, and when the fitting degree between the fitted curve and the simulation curve meets the requirement, the weight corresponding to each key signal is the optimal weight.
8. The method of claim 1, wherein the step of obtaining equivalent currents of the same power domains in the chips at corresponding time intervals is followed by:
calculating a difference value between the equivalent current and a current threshold value, wherein the difference value is a superscalar value; inquiring a mapping table according to the standard exceeding value to obtain the corresponding regulation strength of the load distribution speed, so that the load management module regulates the load distribution speed according to the obtained regulation strength; the mapping table records a one-to-one correspondence relationship between the superscalar value and the adjustment strength.
9. The method of claim 1, wherein the step of obtaining equivalent currents of the same power domains in the chips at corresponding time intervals is followed by:
calculating a difference value between the equivalent current and a current threshold value, wherein the difference value is a superscalar value; inquiring the standard exceeding grade according to the standard exceeding value, and inquiring a mapping table according to the standard exceeding grade to obtain the corresponding regulation strength of the load distribution speed, so that the load management module regulates the load distribution speed according to the obtained regulation strength; the mapping table records a one-to-one correspondence relationship between the superscale and the adjustment strength, wherein the superscale is obtained by dividing a value range of a superscale value into a plurality of different levels.
10. The method according to claim 1, wherein the optimal weight of each of the critical signals is stored in a corresponding storage module.
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