CN114895801A - Liquid crystal writing device with voltage switching control function and method - Google Patents

Liquid crystal writing device with voltage switching control function and method Download PDF

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Publication number
CN114895801A
CN114895801A CN202210385000.2A CN202210385000A CN114895801A CN 114895801 A CN114895801 A CN 114895801A CN 202210385000 A CN202210385000 A CN 202210385000A CN 114895801 A CN114895801 A CN 114895801A
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voltage
liquid crystal
conductive layer
erasing
tft
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Inventor
李清波
杨猛训
武晓娟
王修亮
汤伟伟
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Shandong Lanbeisite Educational Equipment Group
Beijing BOE Optoelectronics Technology Co Ltd
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Shandong Lanbeisite Educational Equipment Group
Beijing BOE Optoelectronics Technology Co Ltd
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Priority to CN202210385000.2A priority Critical patent/CN114895801A/en
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0412—Digitisers structurally integrated in a display
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/044—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
    • G06F3/0445—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means using two or more layers of sensing electrodes, e.g. using two layers of electrodes separated by a dielectric layer
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3648—Control of matrices with row and column drivers using an active matrix

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Human Computer Interaction (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Computer Hardware Design (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

The invention discloses a liquid crystal writing device with a voltage switching control function and a method thereof, wherein the liquid crystal writing device comprises: the processor receives the communication signal and is used for controlling the selector switch to switch corresponding voltages of the TFT and the conducting layer according to the communication signal so as to achieve erasing and/or discharging.

Description

Liquid crystal writing device with voltage switching control function and method
Technical Field
The invention relates to the technical field of liquid crystal writing, in particular to a liquid crystal writing device with a voltage switching control function and a method.
Background
The statements in this section merely provide background information related to the present disclosure and may not necessarily constitute prior art.
Currently, a liquid crystal writing device includes a conductive layer, a bistable liquid crystal layer, and a substrate layer, which are sequentially disposed from top to bottom; a plurality of pixel units are arranged on the basal layer in an array mode, and each pixel unit is internally provided with a pixel electrode and a thin film field effect transistor TFT (TFT for short) connected with the pixel electrode.
The voltage control process of the liquid crystal writing device during erasing comprises the steps of applying a conducting voltage to a TFT grid electrode, applying an input voltage to a TFT source electrode so as to input a set voltage to a corresponding pixel electrode, applying a voltage to a conducting layer so as to form a voltage difference between the conducting layer and the pixel electrode, and forming an erasing electric field at a position where the pixel electrode and the conducting layer are overlapped in space so as to realize erasing.
Or, when the liquid crystal writing device carries out local erasing by illumination, the set control voltage and the set input voltage are respectively applied to the grid electrode and the source electrode of the TFT, so that the TFT is in a critical cut-off state, the illumination with the set intensity is applied to the erasing area, the voltage is applied to the corresponding pixel electrode, the voltage is applied to the conducting layer, and a voltage difference is formed between the conducting layer and the pixel electrode, so that the local erasing is realized; and after the erasing is finished, the applied voltage is controlled to be cancelled, and the discharging is finished.
It can be seen that the voltage selection is required for the power-on voltage control during erasing and/or the discharge voltage control after erasing, so that the voltage of the pixel electrode and the voltage difference between the conductive layers satisfy the erasing condition. The voltage control in the current erasing process cannot realize the automatic selection and switching of the voltage.
Disclosure of Invention
In order to solve the above problems, the present invention provides a liquid crystal writing device and method with voltage switching control function, which realizes automatic selection and switching control of voltage during erasing.
In order to achieve the purpose, the invention adopts the following technical scheme:
in a first aspect, the present invention provides a liquid crystal writing apparatus having a voltage switching control function, comprising: the processor receives the communication signal and is used for controlling the selector switch to switch corresponding voltages of the TFT and the conducting layer according to the communication signal so as to achieve erasing and/or discharging.
As an alternative embodiment, the switch is a high voltage switch.
As an alternative embodiment, when the processor receives the communication signal of the erasing instruction, in the one-key erasing state, the on voltage is applied to the gate of the TFT through the switching of the voltage, and the corresponding voltage is applied to the source of the TFT and the conducting layer respectively, so that a voltage difference is formed between the conducting layer and the pixel electrode.
As an alternative embodiment, when the processor receives the communication signal of the erase command, in the local erase state by light irradiation, the processor applies a set voltage to all or a set part of the TFTs to make them in the critical off state by switching the voltage, and applies the voltage to the conductive layer so as to form a voltage difference between the conductive layer and the pixel electrode.
In an alternative embodiment, the processor controls the discharge of the voltage applied region by switching the voltage when receiving the communication signal of the partial erase command in the optical erase end state.
As an alternative embodiment, the liquid crystal writing apparatus further comprises a wireless signal receiving unit in communication with the erasing member, the wireless signal receiving unit being configured to receive the communication signal transmitted by the erasing member.
In an alternative embodiment, electrode lines are respectively led out from the base layer and the conductive layer to connect a voltage driving circuit for providing required voltage for the base layer and the conductive layer.
As an alternative embodiment, the voltage driving circuit is designed on the basis of a bipolar transistor, a MOS transistor, an IGBT or an integrated circuit.
As an alternative embodiment, the liquid crystal writing apparatus further comprises a power supply and a voltage driving circuit connected to the processor; the driving circuit comprises a source voltage driving circuit, a grid voltage driving circuit and a conducting layer voltage driving circuit, each driving circuit at least comprises two access ports, and at least two access ports are connected with a power supply; the processor receives the communication signals and controls the conduction of the corresponding communication ports connected with the voltage driving circuits according to the communication signals so as to trigger the conduction of the corresponding access ports, and the voltage driving circuits output required voltages.
In a second aspect, the present invention provides a method for operating the liquid crystal writing device with voltage switching control function according to the first aspect, comprising: and controlling the selector switch to switch the corresponding voltage of the TFT and the conducting layer through the received communication signal so as to realize erasing and/or discharging.
Compared with the prior art, the invention has the following beneficial effects:
the invention provides a liquid crystal writing device with a voltage switching control function and a method thereof, which receive a communication signal sent by an erasing element through communication with the erasing element, control a selector switch to switch corresponding voltages of a TFT and a conducting layer according to the communication signal, realize power-on voltage control during erasing and/or discharge voltage control after erasing is finished, and realize automatic selection and switching control of the voltages during erasing.
Advantages of additional aspects of the invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, are included to provide a further understanding of the invention, and are incorporated in and constitute a part of this specification, illustrate exemplary embodiments of the invention and together with the description serve to explain the invention and not to limit the invention.
Fig. 1 is a schematic view of a liquid crystal writing device with voltage switching control function according to embodiment 1 of the present invention;
FIG. 2 is a schematic diagram of a TFT wiring provided in embodiment 1 of the present invention;
fig. 3 is a schematic diagram of a power supply circuit provided in embodiment 1 of the present invention;
fig. 4 is a schematic diagram of a source voltage driving circuit according to embodiment 1 of the present invention;
fig. 5 is a schematic diagram of a conductive layer voltage driving circuit according to embodiment 1 of the present invention;
fig. 6 is a schematic diagram of a gate voltage driving circuit according to embodiment 1 of the present invention.
Detailed Description
The invention is further described with reference to the following figures and examples.
It is to be understood that the following detailed description is exemplary and is intended to provide further explanation of the invention as claimed. Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs.
It is noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of exemplary embodiments according to the invention. As used herein, the singular forms "a", "an", and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise, and it should be understood that the terms "comprises" and "comprising", and any variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
The embodiments and features of the embodiments of the present invention may be combined with each other without conflict.
Example 1
As shown in fig. 1, the present embodiment provides a liquid crystal writing device having a voltage switching control function, the liquid crystal writing device including: the conductive layer, the bistable liquid crystal layer and the substrate layer are sequentially arranged from top to bottom; the conducting layer can be not divided, a plurality of pixel units are arranged on the base layer in an array mode, a pixel electrode and a TFT connected with the pixel electrode are arranged in each pixel unit, and the TFT can provide voltage for the pixel electrode connected with the TFT in a conducting mode;
the liquid crystal writing device further includes: the processor receives the communication signal and is used for controlling the selector switch to switch corresponding voltages of the TFT and the conducting layer according to the communication signal so as to achieve erasing and/or discharging.
Alternatively, the TFT gate is applied with an on-voltage V GON An input voltage is applied to the source electrode of the TFT, so that a set voltage is input to the corresponding pixel electrode, and then a voltage is applied to the conductive layer so as to form a voltage difference between the conductive layer and the pixel electrode, and an erasing electric field is formed at a position where the pixel electrode and the conductive layer are overlapped in space, so that erasing is realized.
The erase process voltage control specifically includes:
(1) when the processor does not receive the communication signal of the erasing instruction, namely the initial state, the voltage difference between the pixel units of the conducting layer and the base layer is zero.
(2) When the processor receives an erasing instruction, in a one-key erasing state, through voltage switching, a conducting voltage is applied to the grid electrode of the TFT, and corresponding voltages are respectively applied to the source electrode of the TFT and the conducting layer of the TFT, so that a voltage difference is formed between the conducting layer and the pixel electrode.
Specifically, in the first half period of voltage application, the on-voltage V is applied to the gate of the TFT in the pixel unit on the base layer GON Applying a voltage of 0V to the TFT source and a voltage V to the conductive layer SON (ii) a Thus, a voltage difference V is formed between the conductive layer and the pixel electrode SON 。
In the second half period of voltage application, an on-voltage V is applied to the gate of the TFT in the pixel unit on the substrate layer GON Applying a voltage V to the TFT source SON Applying a voltage of 0V to the conductive layer to form a voltage difference V between the conductive layer and the pixel electrode SON 。
Therefore, when the two erasing states are switched, the voltages of the source electrode and the conducting layer of the TFT need to be selected, so that the present embodiment switches the voltages of the source electrode and the conducting layer of the TFT through the switch to satisfy the current erasing state.
The voltage switching control is applied to a one-key erase state, and as another alternative embodiment, can also be applied to partial erase; the erase process voltage control specifically includes:
(1) when the processor does not receive the communication signal of the erasing instruction, the voltage difference between the pixel units of the conducting layer and the base layer is zero.
(2) When the processor receives an erasing command, the voltage is switched to apply a conducting voltage V to the TFT source electrode of the local erasing area GON And applying corresponding voltages to the TFT source electrode and the conducting layer respectively so that a voltage difference is formed between the conducting layer and the pixel electrode in the local erasing area, and the voltage difference of the rest areas is still zero. The voltage switching process is identical to that described above, with the TFT source at a voltage of 0V and a voltage of V SON Switching the conductive layer at voltage 0V and voltage V SON To satisfy the current erase state.
As an alternative embodiment, in the process of implementing local erasure by illumination:
the processor receives the communication signal of the erasing command, and controls to apply a set voltage to all or a set part of the TFTs so as to enable the TFTs to be in a critical cut-off state, and simultaneously, applies a voltage to the conductive layer so as to form a voltage difference between the conductive layer and the pixel electrode. Specifically, a voltage of 0V is applied to the gate of the TFT, and a voltage V is applied to the source of the TFT MINDON Applying a voltage V to the conductive layer SON Thus, a voltage difference | V is formed between the conductive layer and the pixel electrode in the area exposed to the set intensity MINDON -V SON |。
The processor controls the applied voltage to discharge after receiving the communication signal of the discharge instruction; specifically, a voltage V is applied to the TFT gate GON Applying a voltage V to the TFT source MINDON Or grounded, applying a voltage V to the conductive layer MINDON Or to ground so that there is no voltage difference between the conductive layer and the pixel electrode.
Therefore, when the erasing state and the discharging state of the optical erasing are switched, the voltages of the TFT grid electrode, the TFT source electrode and the conducting layer need to be selected; as can be seen from the above process, the TFT gateVoltage at pole 0V and voltage V GON And switching in the ground, the conductive layer being at a voltage V MINDON Voltage V SON And switching in ground. Therefore, the present embodiment realizes voltage switching of the TFT gate and the conductive layer by the switch to satisfy the current erasing state and the discharging state.
As an alternative embodiment, the change-over switch adopts a high-voltage change-over switch; the present embodiment provides models that may be used, i.e., MAX6922, PT6392, etc., but is not limited thereto.
It is understood that any other circuit structure capable of being implemented may be adopted for the switch, as long as the voltage switching of the TFT gate, the TFT source and the conductive layer can be implemented, and those skilled in the art may design or select a circuit according to specific operating conditions, and details are not described here.
As an optional implementation manner, the liquid crystal writing device further comprises a wireless signal receiving unit which is communicated with the erasing piece, and the wireless signal receiving unit is used for receiving the communication signal sent by the erasing piece.
As an optional implementation manner, a wireless signal transmitting unit is arranged on the erasing piece device, and the wireless signal transmitting unit is started through a key;
or, as another optional embodiment, the erasing piece is an optical erasing piece, and the wireless signal transmitting unit is started after the illumination unit on the optical erasing piece meets the trigger condition or the illumination unit is triggered and lighted.
The wireless signal transmitting unit transmits a communication signal to the liquid crystal writing device, and after the wireless signal receiving unit on the liquid crystal writing device receives the communication signal, the switching switch is controlled to switch the corresponding voltage of the TFT and the conducting layer according to the communication signal; and when the light is erased, a second wireless communication signal sent by the light erasing piece is also received to control the applied voltage to be removed.
As an alternative embodiment, a wiring diagram of the TFT is given as shown in fig. 2. The first polar plate represents a pixel electrode area connected with the TFT on the substrate layer, and the second polar plate represents a conductive layer; in this embodiment, electrode lines are respectively led out from the base layer and the conductive layer to connect a voltage driving circuit capable of supplying voltages required for the base layer and the conductive layer.
As an alternative embodiment, the voltage driving circuit may adopt any other circuit structure capable of implementing voltage driving, as long as it can implement switching of various voltages of the base layer and the conductive layer, and a person skilled in the art may design or select the circuit according to a specific working condition.
As an alternative embodiment, the voltage driving circuit may be designed based on bipolar transistors, MOS transistors, IGBTs, integrated circuits, etc.; of course, those skilled in the art can select other switching elements according to actual needs.
In the present embodiment, a bipolar transistor is taken as an example to perform a design description of a voltage driving circuit, but the design description is only an example and is not limited specifically.
Specifically, the method comprises the following steps: a power supply and voltage drive circuit connected to the processor; the voltage driving circuit comprises a source voltage driving circuit, a grid voltage driving circuit and a conducting layer voltage driving circuit, each voltage driving circuit at least comprises two access ports, and at least two access ports are connected with a power supply; the processor receives the communication signals and controls the conduction of the corresponding communication ports connected with the voltage driving circuits according to the communication signals so as to trigger the conduction of the corresponding access ports, and the voltage driving circuits output required voltages.
In this embodiment, as shown in fig. 3, the power supply at least includes one power input port and three power output ports; the power input port is connected with a communication port of the processor, and the three power output ports are respectively V for connecting the source voltage driving circuit SON V for connecting grid voltage driving circuit GON And a medium voltage V MIDON (ii) a The three power output ports can be modulated to output required voltage by a PWM modulation method.
In this embodiment, as shown in fig. 4, the source voltage driving circuit includes a first access port, a second access port and a ground port; wherein the first access portAnd port V SON Connection, second access port and V MIDON And connecting, wherein the grounding port is grounded.
The source voltage driving circuit comprises three communication ports connected with the processor and is used for triggering the conduction of the three access ports respectively; the communication port P1 is used for triggering the conduction of the first access port, the communication port P2 is used for triggering the conduction of the second access port, and the communication port P3 is used for triggering the conduction of the ground port; and the connection switching of each access port in the source voltage driving circuit is realized.
The output end of the source electrode voltage driving circuit is connected with the source electrode of the TFT, and the voltage input to the source electrode of the TFT is adjusted through the connection of the switching access port.
In this embodiment, the source voltage driving circuit includes a first source sub-circuit, a second source sub-circuit and a third source sub-circuit, and all of them are connected to the processor; the first source sub-circuit is used for providing a first voltage for the source electrode of the TFT, the second source sub-circuit is used for providing a second voltage for the source electrode of the TFT, and the third source sub-circuit is used for grounding the source electrode of the TFT.
In this embodiment, the first source sub-circuit comprises at least a first communication port P1 and a first access port; first access port and power output port V SON The first communication port P1 is connected to the processor.
The first source sub-circuit at least comprises a first triode Q3A and a second triode Q1A, a communication port P1 of the processor is connected with the base electrode of the first triode Q3A through at least one first resistor, the base electrode of the first triode Q3A is grounded through at least one second resistor, and the emitter electrode of the first triode Q3A is grounded;
the collector of the first triode Q3A is connected with the base of the second triode Q1A through at least one third resistor R3, the base of the second triode Q1A is connected with the emitter of the second triode Q1A through at least one fourth resistor R1, and the emitter of the second triode Q1A is connected with the power output port V SON Connected to the collector of the second transistor Q1A via at least one fifth resistor R6 and the TFT sourceThe poles are connected.
In this embodiment, the second source sub-circuit at least includes a second communication port P2 and a second access port, the second access port and the power output port V MIDON The second communication port P2 is connected to the processor.
The second source sub-circuit at least comprises a third triode Q3B and a fourth triode Q1B, a communication port P2 of the processor is connected with the base electrode of the third triode Q3B through at least one sixth resistor, the base electrode of the third triode Q3B is grounded through at least one seventh resistor, and the emitter electrode of the third triode Q3B is grounded;
the collector of the third triode Q3B is connected to the base of the fourth triode Q1B through at least one eighth resistor R16, the base of the fourth triode Q1B is connected to the emitter of the fourth triode Q1B through at least one ninth resistor R11, and the emitter of the fourth triode Q1B is connected to the power output port V MIDON And the collector electrode of the fourth triode Q1B is connected with the input end of the first diode, and the output end of the first diode is connected with the source electrode of the TFT.
In this embodiment, the third source sub-circuit at least comprises a third communication port P3 and a ground port, the third communication port P3 is connected to the processor, and the ground port is used for grounding the TFT source.
The third source sub-circuit at least comprises a sixth triode Q7, a communication port P3 of the processor is connected with the base electrode of the sixth triode Q7 through at least one tenth resistor R21, the collector electrode of the sixth triode Q7 is used for being connected with the source electrode of the TFT, and the emitter electrode of the sixth triode Q7 is grounded.
In the embodiment, the processor controls the conduction of the communication ports P1-P3 according to the received first communication signal so as to drive the conduction of the corresponding access ports, and realize the switching of the first voltage, the second voltage and the ground.
In this embodiment, as shown in fig. 5, the conductive layer voltage driving circuit includes a first conductive layer sub-circuit, a second conductive layer sub-circuit, and a third conductive layer sub-circuit, and is connected to the processor; the first conductive layer sub-circuit is configured to provide a first voltage to the conductive layer, the second conductive layer sub-circuit is configured to provide a second voltage to the conductive layer, and the third conductive layer sub-circuit is configured to ground the conductive layer.
The first conductive layer sub-circuit comprises at least a fourth communication port P4 and a fourth access port; fourth access port and power output port V SON The fourth communication port P4 is connected with the processor; the output of the first conductive layer sub-circuit is connected to the conductive layer. Other circuit structures are the same as the first source sub-circuit, and are not described herein again.
The second conductive layer sub-circuit comprises at least a fifth communication port P5 and a fifth access port, the fifth access port and a power output port V MIDON The fifth communication port P5 is connected to the processor and the output is connected to the conductive layer. Other circuit structures are the same as the second source sub-circuit, and are not described herein again.
The third conductive layer sub-circuit comprises at least a sixth communication port P6, which is connected to the processor, and a ground port for grounding the conductive layer. Other circuit structures are the same as the third source sub-circuit, and are not described herein again.
In the embodiment, the processor controls the conduction of the communication ports P4-P6 according to the received first communication signal so as to drive the conduction of the corresponding access ports, and realize the switching of the first voltage, the second voltage and the ground.
In this embodiment, as shown in fig. 6, the gate voltage driving circuit includes a first gate sub-circuit, a second gate sub-circuit and a third gate sub-circuit, and is connected to the processor; the first gate sub-circuit is used for providing a first voltage for the gate of the TFT, the second gate sub-circuit is used for providing a second voltage for the gate of the TFT, and the third gate sub-circuit is used for grounding the gate of the TFT.
The first gate sub-circuit comprises at least a seventh communication port P7 and a seventh access port; seventh access port and power output port V GON The seventh communication port P7 is connected to the processor, and the output terminal is connected to the TFT gate. Other electricityThe path structure is identical to the first source sub-circuit, and is not described herein again.
The second gate sub-circuit at least comprises an eighth communication port P8 and an eighth access port, the eighth access port and the power output port V MIDON The eighth communication port P8 is connected to the processor, and the output terminal is connected to the TFT gate. Other circuit structures are the same as the second source sub-circuit, and are not described herein again.
The third gate sub-circuit at least comprises a ninth communication port P9 and a ground port, the ninth communication port P9 is connected with the processor, and the ground port is used for grounding the TFT gate. Other circuit structures are the same as the third source sub-circuit, and are not described herein again.
In the embodiment, the processor controls the conduction of the communication ports P7-P9 according to the received first communication signal so as to drive the conduction of the corresponding access ports, and realize the switching of the first voltage, the second voltage and the ground.
It can be understood that the voltage driving circuit may also adopt any other circuit structure capable of implementing voltage driving, as long as it can implement switching of various voltages of the substrate layer and the conductive layer and switching of various ports, and those skilled in the art can design or select a circuit according to specific working conditions.
In this embodiment, the voltage driving circuit may be connected to the TFT source, the TFT gate and the conductive layer through connectors, respectively; the processor controls the selector switch to switch the corresponding voltages of the TFT and the conducting layer according to the received communication signals so as to respectively control the voltages of the source electrode, the grid electrode and the conducting layer of the TFT and realize erasing and/or discharging.
For example, in one-key erasing, an on voltage of 20V is provided by the gate voltage driving circuit, and an input voltage of 0V is provided by the source voltage driving circuit, at this time, the voltage applied to each pixel electrode is 0V, and a voltage of 25V is applied to the conductive layer by the conductive layer voltage driving circuit, so that a voltage difference between the conductive layer and the base layer is 25V, and an erasing electric field is achieved, thereby implementing erasing.
When in optical erasing, 0V voltage is provided by the grid voltage driving circuit, 10V voltage is provided by the source voltage driving circuit, 35V voltage is applied to the conducting layer by the conducting layer voltage driving circuit, after the TFT in the illumination area with set intensity is conducted, the voltage on the pixel electrode corresponding to the erasing area is 10V, the voltage difference between the conducting layer and the substrate layer is 25V, the erasing electric field is achieved, and erasing is achieved.
After the erase is completed, the discharge is performed by applying a voltage of 30V to the conductive layer through the gate voltage driving circuit, applying an input voltage of 0V to the conductive layer through the source voltage driving circuit, and applying a voltage of 0V to the conductive layer through the conductive layer voltage driving circuit.
Of course, the above voltage values are only exemplary, and those skilled in the art can reasonably select each applied voltage value according to actual needs and characteristics of the liquid crystal.
It will be appreciated that a positioning circuit may also be integrated on the base layer for positioning the erasing elements and controlling the switching of the voltages at the pixel units at the corresponding erasing positions, so as to realize the position positioning or other positioning functions during the partial erasing.
It can be understood that the positioning circuit can be implemented by electromagnetic positioning, capacitive positioning, infrared positioning, ultrasonic positioning or image positioning, which are positioning methods already disclosed in the prior art, and the specific implementation process is not described in detail.
Example 2
The present embodiment provides a method for operating an erasing circuit of a liquid crystal writing device according to embodiment 1, including: and controlling the selector switch to switch the corresponding voltage of the TFT and the conducting layer through the received communication signal so as to realize erasing and/or discharging.
Although the embodiments of the present invention have been described with reference to the accompanying drawings, it is not intended to limit the scope of the present invention, and it should be understood by those skilled in the art that various modifications and variations can be made without inventive efforts by those skilled in the art based on the technical solution of the present invention.

Claims (10)

1. A liquid crystal writing apparatus having a voltage switching control function, comprising: the processor receives the communication signal and is used for controlling the selector switch to switch corresponding voltages of the TFT and the conducting layer according to the communication signal so as to achieve erasing and/or discharging.
2. The liquid crystal writing apparatus with voltage switching control function as claimed in claim 1, wherein said switch is a high voltage switch.
3. The liquid crystal writing apparatus with voltage switching control function according to claim 1, wherein the processor applies an on voltage to the gate of the TFT and applies corresponding voltages to the source and the conductive layer of the TFT, respectively, by switching of the voltages in a one-key erase state when receiving the communication signal of the erase command, so as to form a voltage difference between the conductive layer and the pixel electrode.
4. The liquid crystal writing apparatus having a voltage switching control function according to claim 1, wherein the processor, upon receiving the communication signal of the erase command, applies a set voltage to all or a set part of the TFTs to be in a threshold off state by switching of the voltage in a partially erased state by light irradiation, and applies the voltage to the conductive layer so as to form a voltage difference between the conductive layer and the pixel electrode.
5. The liquid crystal writing apparatus having a voltage switching control function according to claim 4, wherein the processor controls the discharge of the voltage applied region by switching the voltage in the light erasing completed state when receiving the communication signal of the partial erasing command.
6. The liquid crystal writing apparatus with voltage switching control function according to claim 1, further comprising a wireless signal receiving unit for communicating with the erasing member, wherein the wireless signal receiving unit is configured to receive the communication signal transmitted from the erasing member.
7. The liquid crystal writing apparatus having a voltage switching control function according to claim 1, wherein the electrode lines are respectively led out from the base layer and the conductive layer to connect a voltage driving circuit for supplying a desired voltage to the base layer and the conductive layer.
8. The liquid crystal writing apparatus with voltage switching control function as claimed in claim 7, wherein said voltage driving circuit is designed based on bipolar transistor, MOS transistor, IGBT or integrated circuit.
9. The liquid crystal writing apparatus with voltage switching control function according to claim 7, further comprising a power supply and a voltage driving circuit connected to the processor; the driving circuit comprises a source voltage driving circuit, a grid voltage driving circuit and a conducting layer voltage driving circuit, each driving circuit at least comprises two access ports, and at least two access ports are connected with a power supply; the processor receives the communication signals and controls the conduction of the corresponding communication ports connected with the voltage driving circuits according to the communication signals so as to trigger the conduction of the corresponding access ports, and the voltage driving circuits output required voltages.
10. An operating method of the liquid crystal writing apparatus with voltage switching control function according to any one of claims 1 to 9, comprising: and controlling the switch to switch corresponding voltages of the TFT and the conductive layer through the received communication signal so as to realize erasing and/or discharging.
CN202210385000.2A 2022-04-13 2022-04-13 Liquid crystal writing device with voltage switching control function and method Pending CN114895801A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202210385000.2A CN114895801A (en) 2022-04-13 2022-04-13 Liquid crystal writing device with voltage switching control function and method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202210385000.2A CN114895801A (en) 2022-04-13 2022-04-13 Liquid crystal writing device with voltage switching control function and method

Publications (1)

Publication Number Publication Date
CN114895801A true CN114895801A (en) 2022-08-12

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Application Number Title Priority Date Filing Date
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Country Link
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