CN114880045A - Register configuration method, device and related equipment - Google Patents
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Abstract
The embodiment of the invention provides a register configuration method, a register configuration device and related equipment, wherein the method comprises the following steps: acquiring identification information of a register to be configured, wherein the identification information comprises a module identification and a register identification of a module to which the register to be configured belongs; searching module path information corresponding to the module identifier and internal path information corresponding to the register identifier, wherein the internal path information is the path information of the register to be configured in the module; synthesizing the path information of the register to be configured based on the module path information and the internal path information; and configuring the register to be configured according to the path information of the register to be configured. It can be seen that, in the embodiment of the present invention, on the basis of back door access, the path information of the register to be configured is determined according to the identification information of the register to be configured, so that manual confirmation and one-by-one filling are not required, the initialization configuration process is shortened, and the efficiency of chip verification iteration is improved.
Description
Technical Field
The embodiment of the invention relates to the technical field of chip testing, in particular to a register configuration method, a register configuration device and related equipment.
Background
In a System-on-a-Chip (SOC) test and verification process, a register needs to be initialized for the SOC, and corresponding configuration information is written into the register of the SOC. However, in the register initialization process, the number of registers to be configured is large, and the time consumption of the initialization process is too long, thereby reducing the efficiency of the chip verification iteration.
Disclosure of Invention
Embodiments of the present invention provide a register configuration method, a register configuration device and a related apparatus, so as to avoid circuit design errors possibly caused by a tag voltage error.
In order to achieve the above object, the embodiments of the present invention provide the following technical solutions.
In a first aspect, an embodiment of the present invention provides a register configuration method, including:
acquiring identification information of a register to be configured, wherein the identification information comprises a module identification and a register identification of a module to which the register to be configured belongs;
searching module path information corresponding to the module identifier and internal path information corresponding to the register identifier, wherein the internal path information is the path information of the register to be configured in the module;
synthesizing the path information of the register to be configured based on the module path information and the internal path information;
and configuring the register to be configured according to the path information of the register to be configured.
Optionally, the searching for the module path information corresponding to the module identifier and the internal path information corresponding to the register identifier includes:
based on the module identification, module path information corresponding to the module identification is searched in the component verification environment;
and searching internal path information corresponding to the register identification in a register model based on the register identification.
Optionally, the synthesizing the path information of the register to be configured based on the module path information and the internal path information does not include redundant information other than path information, and includes:
and splicing the module path information and the internal path information to obtain the path information of the register to be configured.
Optionally, the module path information and the internal path information have redundant information other than path information, and synthesizing the path information of the register to be configured based on the module path information and the internal path information includes:
extracting path information in the module path information and the internal path information;
and splicing the extracted path information to obtain the path information of the register to be configured.
Optionally, in the step of obtaining the identification information of the register to be configured, the configuration information of the register to be configured is also obtained;
the configuring the register to be configured according to the path information of the register to be configured specifically includes: and configuring the configuration information of the register to be configured to the register pointed by the path information.
Optionally, after obtaining the identifier information of the register to be configured, before searching for the module path information corresponding to the module identifier and the internal path information corresponding to the register identifier, the method further includes:
and starting a verification environment corresponding to the register to be configured.
In a second aspect, an embodiment of the present invention provides a register configuration apparatus, including:
the information acquisition module is used for acquiring identification information of a register to be configured, wherein the identification information comprises a module identification and a register identification of a module to which the register to be configured belongs;
the information searching module is used for searching module path information corresponding to the module identifier and internal path information corresponding to the register identifier, wherein the internal path information is the path information of the register to be configured in the module;
a synthesizing module, configured to synthesize path information of the register to be configured based on the module path information and the internal path information;
and the configuration module is used for configuring the register to be configured according to the path information of the register to be configured.
Optionally, the information searching module is configured to search module path information corresponding to the module identifier and internal path information corresponding to the register identifier, and includes:
based on the module identification, module path information corresponding to the module identification is searched in the component verification environment;
and searching internal path information corresponding to the register identification in a register model based on the register identification.
Optionally, the module path information and the internal path information do not have redundant information other than path information, and the synthesizing module is configured to synthesize the path information of the register to be configured based on the module path information and the internal path information, and includes:
and splicing the module path information and the internal path information to obtain the path information of the register to be configured.
Optionally, the module path information and the internal path information have redundant information other than path information, and the synthesizing module is configured to synthesize the path information of the register to be configured based on the module path information and the internal path information, and includes:
extracting path information in the module path information and the internal path information;
and splicing the extracted path information to obtain the path information of the register to be configured.
Optionally, the information obtaining module is configured to obtain identification information of a register to be configured, and also obtain configuration information of the register to be configured;
the configuration module is configured to configure the register to be configured according to the path information of the register to be configured, and specifically includes: and configuring the configuration information of the register to be configured to the register pointed by the path information.
Optionally, the register configuration apparatus further includes:
and the environment starting module is used for starting the verification environment corresponding to the register to be configured.
In a third aspect, an embodiment of the present invention provides a chip verification platform, where the chip verification platform is configured to execute the register configuration method provided in the embodiment of the present invention.
Optionally, the chip verification platform is configured with a register configuration function, and the register configuration function is used for executing the register configuration method provided by the embodiment of the present invention when called.
Optionally, the chip verification platform is configured with a corresponding relationship between the module identifier and the module path information, and a corresponding relationship between the register identifier and the internal path information.
Optionally, the correspondence between the module identifier and the module path information is stored in a verification environment provided by the chip verification platform, and the correspondence between the register identifier and the internal path information is stored in a register model after model instantiation.
Optionally, the chip verification platform is configured with a parallel configuration function, and when the parallel configuration function is called, the parallel configuration function is used for paralleling the register configuration method provided by the embodiment of the present invention in a plurality of functional areas.
In a fourth aspect, an embodiment of the present invention provides a computer device, including: at least one memory and at least one processor; the memory stores one or more computer-executable instructions that are invoked by the processor to perform the register configuration method provided by the embodiments of the present invention.
In a fifth aspect, an embodiment of the present invention provides a storage medium, where the storage medium stores one or more executable instructions, and the one or more executable instructions are configured to execute the register configuration method provided in the embodiment of the present invention.
The embodiment of the invention provides a register configuration method, a register configuration device and related equipment, wherein the method comprises the following steps: acquiring identification information of a register to be configured, wherein the identification information comprises a module identification and a register identification of a module to which the register to be configured belongs; searching module path information corresponding to the module identifier and internal path information corresponding to the register identifier, wherein the internal path information is the path information of the register to be configured in the module; synthesizing the path information of the register to be configured based on the module path information and the internal path information; and configuring the register to be configured according to the path information of the register to be configured.
It can be seen that, in the embodiment of the present invention, based on the back-door access, the path information of the register to be configured is determined according to the identification information of the register to be configured, so that manual confirmation and one-by-one filling are not required, the initialization configuration process is shortened, and the efficiency of chip verification iteration is improved.
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In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below, it is obvious that the drawings in the following description are only embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to the provided drawings without creative efforts.
FIG. 1 is an alternative SOC architecture diagram;
FIG. 2 is an alternative architecture diagram of a register configuration chip verification platform according to an embodiment of the present invention;
FIG. 3 is an alternative flowchart of a register allocation method according to an embodiment of the present invention;
FIG. 4 is a flowchart illustrating another alternative register allocation method according to an embodiment of the present invention;
FIG. 5 is an alternative block diagram of the register configuration apparatus according to the embodiment of the present invention;
fig. 6 is another alternative block diagram of a register configuration apparatus according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
An alternative SOC architecture is shown in fig. 1, the SOC system may be divided into a plurality of functional areas, such as a plurality of computation control areas, a plurality of data storage processing areas, a plurality of north bridges, etc., which are shown in the figure, each functional area is directly or indirectly connected to the bus, each functional area contains a plurality of modules (i.e., IPs), and each module is configured with a plurality of registers.
As described in the background, in a System-on-a-Chip (SOC) test and verification process, a register needs to be initialized for the SOC. The optional SOC register initialization scheme may include two types, one type is a front door access mode, and the other type is a back door access mode.
In the front door access mode, by adding an excitation to a configuration port of a chip (see fig. 1), the excitation needs to be transmitted to each module (i.e., IP) through a bus inside an SOC system, and each module analyzes corresponding excitation content, extracts address data, converts corresponding configuration information, and writes the configuration information into a register corresponding to the address data.
However, as the number of functional modules integrated by the SOC increases, the SOC size increases, and the number of registers to be configured when the SOC is initialized increases. Taking the example that the SOC system divides 10 functional areas, if each functional area includes 20 modules, and each module needs to be configured with at least 50 registers, the whole system initialization needs to be configured with more than 10000 registers. Meanwhile, the modules mounted at the far end of the system bus in the SOC architecture (i.e. indirectly connected to the bus, such as the modules in the north bridge in fig. 1) also need to decode and route each module on the data path, so as to finally configure the corresponding register. Obviously, the initialization configuration process in this way takes too long.
The back door access mode may not go through the bus, but instead directly assigns the registers by calling a register configuration function (e.g., $ dispose) in the system in the authentication environment. However, this method requires manual confirmation of the complete RTL path of the registers and filling in one by one, and when there are tens of thousands of registers, the corresponding initialization configuration process also has the drawback of consuming too much time.
Based on this, the embodiment of the present invention provides a register configuration method, an apparatus and a related device, where the method includes: acquiring identification information of a register to be configured, wherein the identification information comprises a module identification and a register identification of a module to which the register to be configured belongs; searching module path information corresponding to the module identifier and internal path information corresponding to the register identifier, wherein the internal path information is the path information of the register to be configured in the module; synthesizing the path information of the register to be configured based on the module path information and the internal path information; and configuring the register to be configured according to the path information of the register to be configured.
It can be seen that, in the embodiment of the present invention, based on the back-door access, the path information of the register to be configured is determined according to the identification information of the register to be configured, so that manual confirmation and one-by-one filling are not required, the initialization configuration process is shortened, and the efficiency of chip verification iteration is improved.
It can be understood that, in the embodiment of the present invention, the path information of the register to be configured is split into two parts, that is, module path information and internal path information, where the module path information is used to describe path information (i.e., hierarchy information) of a module in a system, and the internal path information is used to describe path information (i.e., hierarchy information) of the register in the module, so that the module path information and the internal path information can be respectively searched, and then complete path information of the register to be configured is determined.
In an optional implementation, referring to an optional architecture diagram of the chip verification platform shown in fig. 2, an embodiment of the present invention provides a chip verification platform, where a corresponding relationship between a module identifier and module path information and a corresponding relationship between a register identifier and internal path information are configured in the chip verification platform, so that the corresponding module path information may be searched based on the module identifier, and the corresponding internal path information may be searched based on the register identifier. The module path information and the internal path information may be, for example, RTL (Register Transfer Level) hierarchy information (also referred to as RTL path information), so that the RTL path information with complete registers may be determined based on the module path information and the internal path information.
In an optional example, the correspondence between the module identifier and the module path information may be stored in a verification environment provided by the chip verification platform, and the correspondence between the Register identifier and the internal path information may be stored in a Register model (Register model) after model instantiation.
Specifically, the corresponding relation between the module identifier and the module path information can be obtained by arranging by a verifier or by processing a script, and the determination process of the corresponding relation between the module identifier and the module path information is simple and efficient based on the fact that the number of modules is far less than that of registers. Meanwhile, the module-based hierarchical information (i.e., path information) is usually hardly changed after the SOC architecture is stable, so that the corresponding relationship between the corresponding module identifier and the module path information has strong universality, and thus, the method can be applied to not only the initial scene of the SOC, but also other required scenes.
Further, a file storing the correspondence between the module identifier and the module path information may be converted into a configuration file Cfg of a UVM (Universal Verification Methodology) Verification environment through a Perl script, and the hierarchical information of the module in the corresponding functional region is configured into a corresponding Component Verification environment (e.g., UVM Component Env) by instantiating the configuration files of different functional region Verification environments.
In a further alternative example, the correspondence of the Register identification and the internal path information may be provided by a designer and stored in a Register model file (Regmodel), so that, when a Register model (Register model) of a different module is instantiated, the correspondence of the corresponding Register identification and the internal path information may be stored in the instantiated Register model (Register model).
Based on the mode, the module path information and the internal path information of the register in the SOC can be stored in the respective verification environments in a partitioning mode, so that the fact that the complete RTL path of the register is confirmed manually is not needed like a back door access mode.
Based on the above chip verification platform, in an alternative implementation, fig. 3 exemplarily shows an alternative flowchart of the register configuration method provided by the embodiment of the present invention. As shown in fig. 3, the method includes:
step S20: acquiring identification information of a register to be configured;
the identification information includes a module identification and a register identification of the module to which the register to be configured belongs. The module identifier may be a module domain name, or an identifier defined by a designer based on a preset rule, and it should be noted that the module identifier corresponds to the module one to one, so that a clear and unique reference relationship is provided between the module identifier and the module, thereby avoiding an error. Correspondingly, the register identification can be a register name or an identification defined by a designer based on a preset rule, and similarly, the register identification and the register are in one-to-one correspondence, so that the register identification and the register have a clear and unique reference relationship, and errors are avoided.
In an alternative example, the identification information of the register may be input by a designer, may be imported based on a preset file, or may be imported based on a specific operation, and the embodiment of the present invention is not specifically limited herein.
In other examples, while the identification information of the register to be configured is obtained, the configuration information (e.g., a specific register value) of the register to be configured may also be obtained at the same time, so that the configuration of the register may be performed based on the configuration information.
Step S22: searching module path information corresponding to the module identifier and internal path information corresponding to the register identifier;
in the process of configuring the register to be configured, the internal path information is the path information of the register to be configured in the module;
the partition has been stored to a corresponding location based on the module path information and the internal path information of the register in the SOC, so that the corresponding path information can be looked up based on the module identification and the register identification.
Step S24: synthesizing the path information of the register to be configured based on the module path information and the internal path information;
after the module path information and the internal path information are obtained, path information may be synthesized based on these path information.
When the module path information and the internal path information do not have redundant information except for the path information, the path information of the register to be configured can be synthesized in a splicing mode; when redundant information except path information exists in the module path information and the internal path information, path information in the module path information and the internal path information can be extracted, and the extracted path information is spliced, so that the path information of the register to be configured is obtained.
Step S26: configuring the register to be configured according to the path information of the register to be configured;
after the path information of the register to be configured is obtained, the register to be configured can be configured in a back-door configuration mode.
Specifically, in the UVM verification environment, function UVM _ hdl _ default () may be called to perform register assignment, so as to implement configuration of a register to be configured.
In an example where the identification information of the register to be configured is obtained and the configuration information of the register to be configured is also obtained at the same time, the step may directly configure the configuration information of the register to be configured to the register pointed by the path information.
Based on the above register configuration method, in an alternative implementation, fig. 4 exemplarily shows another alternative flowchart of the register configuration method provided by the embodiment of the present invention. As shown in fig. 4, between step S20 and step S22, the method may further include:
step S21: starting a verification environment corresponding to the register to be configured;
the corresponding relation based on the module identification and the module path information is stored in the component verification environment, and the corresponding relation between the register identification and the internal path information is stored in the register model, so that the corresponding relation can be obtained by starting the verification environment corresponding to the register to be configured and including the component verification environment and the corresponding register model based on the verification environment.
Further, in the present example, step S22 may include:
step S220: based on the module identification, module path information corresponding to the module identification is searched in the component verification environment;
specifically, when the module identifier is a module domain name, module path information corresponding to the module may be retrieved in the component verification environment based on the module domain name.
Step S221: and searching internal path information corresponding to the register identification in a register model based on the register identification.
When the register identifier is a register name, the internal path information corresponding to the register can be retrieved from the register model based on the register name.
Therefore, the simulation time of the SOC chip in the register initialization stage can be greatly shortened, a large number of complete paths of the registers do not need to be manually sorted by a verifier, and meanwhile, a complex data path does not need to be passed in the configuration process, so that the error probability in the initialization stage is reduced.
In an alternative example, the register configuration method may be packaged as a specific register configuration function (for example, may be named as a DPI function), and the register configuration function is configured in the chip verification platform. When the register needs to be initialized, the register can be initialized by calling the register configuration function and providing the identification information and the configuration information of the register for the function.
In another optional example, on the premise that the register configuration method is packaged as a register configuration function, the steps S22 to S24 may be further packaged as an instance (Task), so that when the function is called, the instance is further called to complete a corresponding search and path synthesis process, thereby implementing initialization of the register.
It should be noted that one functional partition of the SOC may include an initialization sequence of registers for multiple modules, and in the process of performing register configuration on one functional partition, the above register configuration method may be used to perform initialization sequence assignment on the registers, or the initialization sequence assignment on the registers may be performed by calling a packaged function. In the process of performing register configuration simultaneously in multiple functional partitions, the embodiment of the present invention may further configure a parallel configuration function (for example, a SystemC parallel statement such as FORK _ JOIN) in the chip verification platform, so that parallel processing of register configuration in multiple functional partitions may be performed, simulation time of the initialization process may be further shortened, and efficiency of chip verification iteration may be improved.
In the following, the register configuration apparatus provided in the embodiment of the present invention is introduced, and the contents of the apparatus described below may be regarded as a chip verification device or a computer device, which is a functional module required to implement the register configuration method provided in the embodiment of the present invention. The device content described below may be referred to in correspondence with the method content described above.
Fig. 5 is an alternative block diagram of the register configuration apparatus according to the embodiment of the present invention. As shown in fig. 5, the apparatus may include:
the information obtaining module 200 is configured to obtain identification information of a register to be configured, where the identification information includes a module identifier and a register identifier of a module to which the register to be configured belongs;
an information searching module 210, configured to search module path information corresponding to the module identifier and internal path information corresponding to the register identifier, where the internal path information is path information of the register to be configured in a module;
a synthesizing module 220, configured to synthesize path information of the register to be configured based on the module path information and the internal path information;
the configuration module 230 is configured to configure the register to be configured according to the path information of the register to be configured.
Optionally, the information searching module 210 is configured to search module path information corresponding to the module identifier and internal path information corresponding to the register identifier, and includes:
based on the module identification, module path information corresponding to the module identification is searched in the component verification environment;
and searching internal path information corresponding to the register identification in a register model based on the register identification.
Optionally, the module path information and the internal path information do not have redundant information other than path information, and the synthesizing module 220 is configured to synthesize the path information of the register to be configured based on the module path information and the internal path information, and includes:
and splicing the module path information and the internal path information to obtain the path information of the register to be configured.
Optionally, the module path information and the internal path information have redundant information other than path information, and the synthesizing module 220 is configured to synthesize the path information of the register to be configured based on the module path information and the internal path information, and includes:
extracting path information in the module path information and the internal path information;
and splicing the extracted path information to obtain the path information of the register to be configured.
Optionally, the information obtaining module 200 is configured to obtain the identification information of the register to be configured, and also obtain the configuration information of the register to be configured;
the configuration module 230 is configured to configure the register to be configured according to the path information of the register to be configured, and specifically, the configuration module is configured to: and configuring the configuration information of the register to be configured to the register pointed by the path information.
Alternatively, fig. 6 shows another alternative block diagram of the register configuration apparatus provided in the embodiment of the present invention. The register configuration device further comprises:
and the environment starting module 240 is configured to start the verification environment corresponding to the register to be configured.
The embodiment of the invention also provides a chip verification platform, and the chip verification platform can be configured to execute the register configuration method provided by the embodiment of the invention.
Optionally, the chip verification platform is configured with a register configuration function, and the register configuration function is used for executing the register configuration method provided by the embodiment of the present invention when called.
Optionally, the chip verification platform is configured with a parallel configuration function, and when the parallel configuration function is called, the parallel configuration function is used for executing the register configuration method provided by the embodiment of the present invention in parallel in a plurality of functional areas.
An embodiment of the present invention further provides a computer device, where the computer device may include: at least one memory and at least one processor; the memory stores one or more computer-executable instructions that are invoked by the processor to perform the register configuration method provided by the embodiments of the present invention.
An embodiment of the present invention provides a storage medium, where the storage medium stores one or more executable instructions, and the one or more executable instructions are configured to execute the register configuration method.
While various embodiments of the present invention have been described above, various alternatives described in the various embodiments can be combined and cross-referenced without conflict to extend the variety of possible embodiments that can be considered disclosed and disclosed in connection with the embodiments of the present invention.
Although the embodiments of the present invention have been disclosed above, the present application is not limited thereto. Various changes and modifications may be effected therein by one of ordinary skill in the pertinent art without departing from the scope or spirit of the present disclosure, and it is intended that the scope of the present disclosure be defined by the appended claims.
Claims (19)
1. A register configuration method, comprising:
acquiring identification information of a register to be configured, wherein the identification information comprises a module identification and a register identification of a module to which the register to be configured belongs;
searching module path information corresponding to the module identifier and internal path information corresponding to the register identifier, wherein the internal path information is the path information of the register to be configured in the module;
synthesizing the path information of the register to be configured based on the module path information and the internal path information;
and configuring the register to be configured according to the path information of the register to be configured.
2. The method of claim 1, wherein said searching for module path information corresponding to said module identifier and internal path information corresponding to said register identifier comprises:
based on the module identification, module path information corresponding to the module identification is searched in the component verification environment;
and searching internal path information corresponding to the register identification in a register model based on the register identification.
3. The method according to claim 2, wherein the module path information and the internal path information do not have redundant information other than path information, and the synthesizing the path information of the register to be configured based on the module path information and the internal path information includes:
and splicing the module path information and the internal path information to obtain the path information of the register to be configured.
4. The method according to claim 2, wherein the module path information and the internal path information have redundant information other than path information, and the synthesizing the path information of the register to be configured based on the module path information and the internal path information comprises:
extracting path information in the module path information and the internal path information;
and splicing the extracted path information to obtain the path information of the register to be configured.
5. The method according to claim 1, wherein in the step of obtaining the identification information of the register to be configured, the configuration information of the register to be configured is also obtained;
the configuring the register to be configured according to the path information of the register to be configured specifically includes: and configuring the configuration information of the register to be configured to the register pointed by the path information.
6. The method according to claim 1, wherein after obtaining the identification information of the register to be configured, and before searching for the module path information corresponding to the module identifier and the internal path information corresponding to the register identifier, the method further comprises:
and starting a verification environment corresponding to the register to be configured.
7. A register configuration apparatus, comprising:
the information acquisition module is used for acquiring identification information of a register to be configured, wherein the identification information comprises a module identification and a register identification of a module to which the register to be configured belongs;
the information searching module is used for searching module path information corresponding to the module identifier and internal path information corresponding to the register identifier, wherein the internal path information is the path information of the register to be configured in the module;
a synthesizing module, configured to synthesize path information of the register to be configured based on the module path information and the internal path information;
and the configuration module is used for configuring the register to be configured according to the path information of the register to be configured.
8. The register configuration device according to claim 7, wherein the information searching module is configured to search for module path information corresponding to the module identifier and internal path information corresponding to the register identifier, and includes:
based on the module identification, module path information corresponding to the module identification is searched in the component verification environment;
and searching internal path information corresponding to the register identification in a register model based on the register identification.
9. The register configuration apparatus according to claim 8, wherein the module path information and the internal path information do not have redundant information other than path information, and the synthesizing module is configured to synthesize the path information of the register to be configured based on the module path information and the internal path information, and includes:
and splicing the module path information and the internal path information to obtain the path information of the register to be configured.
10. The register configuration apparatus according to claim 8, wherein the module path information and the internal path information have redundant information other than path information, and the synthesizing module is configured to synthesize the path information of the register to be configured based on the module path information and the internal path information, and includes:
extracting path information in the module path information and the internal path information;
and splicing the extracted path information to obtain the path information of the register to be configured.
11. The register configuration apparatus according to claim 7, wherein the information obtaining module is configured to, in the step of obtaining the identification information of the register to be configured, further obtain the configuration information of the register to be configured;
the configuration module is configured to configure the register to be configured according to the path information of the register to be configured, and specifically includes: and configuring the configuration information of the register to be configured to the register pointed by the path information.
12. The register configuring apparatus according to claim 7, further comprising:
and the environment starting module is used for starting the verification environment corresponding to the register to be configured.
13. A chip validation platform, wherein the chip validation platform is configured to perform the register configuration method of any of claims 1-6.
14. The platform of claim 13, wherein the chip validation platform is configured with a register configuration function that, when called, is configured to perform the register configuration method of any of claims 1-6.
15. The platform of claim 13, wherein the chip verification platform is configured with a correspondence between module identifiers and module path information, and a correspondence between register identifiers and internal path information.
16. The platform of claim 15, wherein the correspondence between the module identifier and the module path information is stored in a verification environment provided by the chip verification platform, and wherein the correspondence between the register identifier and the internal path information is stored in a model instantiated register model.
17. The platform of claim 13, wherein the chip verification platform is configured with parallel configuration functions that, when called, are configured to perform the register configuration method of any one of claims 1-6 in parallel in a plurality of functional areas.
18. A computer device, comprising: at least one memory and at least one processor; the memory stores one or more computer-executable instructions that are called by the processor to perform the register configuration method of any of claims 1-6.
19. A storage medium storing one or more executable instructions for performing the register configuration method of any one of claims 1-6.
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